drivers/scsi/g_NCR5380.c

   1 /*
   2  * Generic Generic NCR5380 driver
   3  *
   4  * Copyright 1993, Drew Eckhardt
   5  *      Visionary Computing
   6  *      (Unix and Linux consulting and custom programming)
   7  *      drew@colorado.edu
   8  *      +1 (303) 440-4894
   9  *
  10  * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
  11  *    K.Lentin@cs.monash.edu.au
  12  *
  13  * NCR53C400A extensions (c) 1996, Ingmar Baumgart
  14  *    ingmar@gonzo.schwaben.de
  15  *
  16  * DTC3181E extensions (c) 1997, Ronald van Cuijlenborg
  17  * ronald.van.cuijlenborg@tip.nl or nutty@dds.nl
  18  *
  19  * Added ISAPNP support for DTC436 adapters,
  20  * Thomas Sailer, sailer@ife.ee.ethz.ch
  21  *
  22  * See Documentation/scsi/g_NCR5380.txt for more info.
  23  */
  24
  25 #include <asm/io.h>
  26 #include <linux/blkdev.h>
  27 #include <linux/module.h>
  28 #include <scsi/scsi_host.h>
  29 #include <linux/init.h>
  30 #include <linux/ioport.h>
  31 #include <linux/isa.h>
  32 #include <linux/pnp.h>
  33 #include <linux/interrupt.h>
  34
  35 /* Definitions for the core NCR5380 driver. */
  36
  37 #define NCR5380_read(reg) \
  38         ioread8(hostdata->io + hostdata->offset + (reg))
  39 #define NCR5380_write(reg, value) \
  40         iowrite8(value, hostdata->io + hostdata->offset + (reg))
  41
  42 #define NCR5380_implementation_fields \
  43         int offset; \
  44         int c400_ctl_status; \
  45         int c400_blk_cnt; \
  46         int c400_host_buf; \
  47         int io_width
  48
  49 #define NCR5380_dma_xfer_len            generic_NCR5380_dma_xfer_len
  50 #define NCR5380_dma_recv_setup          generic_NCR5380_pread
  51 #define NCR5380_dma_send_setup          generic_NCR5380_pwrite
  52 #define NCR5380_dma_residual            NCR5380_dma_residual_none
  53
  54 #define NCR5380_intr                    generic_NCR5380_intr
  55 #define NCR5380_queue_command           generic_NCR5380_queue_command
  56 #define NCR5380_abort                   generic_NCR5380_abort
  57 #define NCR5380_bus_reset               generic_NCR5380_bus_reset
  58 #define NCR5380_info                    generic_NCR5380_info
  59
  60 #define NCR5380_io_delay(x)             udelay(x)
  61
  62 #include "NCR5380.h"
  63
  64 #define DRV_MODULE_NAME "g_NCR5380"
  65
  66 #define NCR53C400_mem_base 0x3880
  67 #define NCR53C400_host_buffer 0x3900
  68 #define NCR53C400_region_size 0x3a00
  69
  70 #define BOARD_NCR5380 0
  71 #define BOARD_NCR53C400 1
  72 #define BOARD_NCR53C400A 2
  73 #define BOARD_DTC3181E 3
  74 #define BOARD_HP_C2502 4
  75
  76 #define IRQ_AUTO 254
  77
  78 #define MAX_CARDS 8
  79
  80 /* old-style parameters for compatibility */
  81 static int ncr_irq = -1;
  82 static int ncr_addr;
  83 static int ncr_5380;
  84 static int ncr_53c400;
  85 static int ncr_53c400a;
  86 static int dtc_3181e;
  87 static int hp_c2502;
  88 module_param_hw(ncr_irq, int, irq, 0);
  89 module_param_hw(ncr_addr, int, ioport, 0);
  90 module_param(ncr_5380, int, 0);
  91 module_param(ncr_53c400, int, 0);
  92 module_param(ncr_53c400a, int, 0);
  93 module_param(dtc_3181e, int, 0);
  94 module_param(hp_c2502, int, 0);
  95
  96 static int irq[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
  97 module_param_hw_array(irq, int, irq, NULL, 0);
  98 MODULE_PARM_DESC(irq, "IRQ number(s) (0=none, 254=auto [default])");
  99
 100 static int base[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
 101 module_param_hw_array(base, int, ioport, NULL, 0);
 102 MODULE_PARM_DESC(base, "base address(es)");
 103
 104 static int card[] = { -1, -1, -1, -1, -1, -1, -1, -1 };
 105 module_param_array(card, int, NULL, 0);
 106 MODULE_PARM_DESC(card, "card type (0=NCR5380, 1=NCR53C400, 2=NCR53C400A, 3=DTC3181E, 4=HP C2502)");
 107
 108 MODULE_ALIAS("g_NCR5380_mmio");
 109 MODULE_LICENSE("GPL");
 110
 111 static void g_NCR5380_trigger_irq(struct Scsi_Host *instance)
 112 {
 113         struct NCR5380_hostdata *hostdata = shost_priv(instance);
 114
 115         /*
 116          * An interrupt is triggered whenever BSY = false, SEL = true
 117          * and a bit set in the SELECT_ENABLE_REG is asserted on the
 118          * SCSI bus.
 119          *
 120          * Note that the bus is only driven when the phase control signals
 121          * (I/O, C/D, and MSG) match those in the TCR.
 122          */
 123         NCR5380_write(TARGET_COMMAND_REG,
 124                       PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
 125         NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
 126         NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
 127         NCR5380_write(INITIATOR_COMMAND_REG,
 128                       ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
 129
 130         msleep(1);
 131
 132         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
 133         NCR5380_write(SELECT_ENABLE_REG, 0);
 134         NCR5380_write(TARGET_COMMAND_REG, 0);
 135 }
 136
 137 /**
 138  * g_NCR5380_probe_irq - find the IRQ of a NCR5380 or equivalent
 139  * @instance: SCSI host instance
 140  *
 141  * Autoprobe for the IRQ line used by the card by triggering an IRQ
 142  * and then looking to see what interrupt actually turned up.
 143  */
 144
 145 static int g_NCR5380_probe_irq(struct Scsi_Host *instance)
 146 {
 147         struct NCR5380_hostdata *hostdata = shost_priv(instance);
 148         int irq_mask, irq;
 149
 150         NCR5380_read(RESET_PARITY_INTERRUPT_REG);
 151         irq_mask = probe_irq_on();
 152         g_NCR5380_trigger_irq(instance);
 153         irq = probe_irq_off(irq_mask);
 154         NCR5380_read(RESET_PARITY_INTERRUPT_REG);
 155
 156         if (irq <= 0)
 157                 return NO_IRQ;
 158         return irq;
 159 }
 160
 161 /*
 162  * Configure I/O address of 53C400A or DTC436 by writing magic numbers
 163  * to ports 0x779 and 0x379.
 164  */
 165 static void magic_configure(int idx, u8 irq, u8 magic[])
 166 {
 167         u8 cfg = 0;
 168
 169         outb(magic[0], 0x779);
 170         outb(magic[1], 0x379);
 171         outb(magic[2], 0x379);
 172         outb(magic[3], 0x379);
 173         outb(magic[4], 0x379);
 174
 175         if (irq == 9)
 176                 irq = 2;
 177
 178         if (idx >= 0 && idx <= 7)
 179                 cfg = 0x80 | idx | (irq << 4);
 180         outb(cfg, 0x379);
 181 }
 182
 183 static irqreturn_t legacy_empty_irq_handler(int irq, void *dev_id)
 184 {
 185         return IRQ_HANDLED;
 186 }
 187
 188 static int legacy_find_free_irq(int *irq_table)
 189 {
 190         while (*irq_table != -1) {
 191                 if (!request_irq(*irq_table, legacy_empty_irq_handler,
 192                                  IRQF_PROBE_SHARED, "Test IRQ",
 193                                  (void *)irq_table)) {
 194                         free_irq(*irq_table, (void *) irq_table);
 195                         return *irq_table;
 196                 }
 197                 irq_table++;
 198         }
 199         return -1;
 200 }
 201
 202 static unsigned int ncr_53c400a_ports[] = {
 203         0x280, 0x290, 0x300, 0x310, 0x330, 0x340, 0x348, 0x350, 0
 204 };
 205 static unsigned int dtc_3181e_ports[] = {
 206         0x220, 0x240, 0x280, 0x2a0, 0x2c0, 0x300, 0x320, 0x340, 0
 207 };
 208 static u8 ncr_53c400a_magic[] = {       /* 53C400A & DTC436 */
 209         0x59, 0xb9, 0xc5, 0xae, 0xa6
 210 };
 211 static u8 hp_c2502_magic[] = {  /* HP C2502 */
 212         0x0f, 0x22, 0xf0, 0x20, 0x80
 213 };
 214 static int hp_c2502_irqs[] = {
 215         9, 5, 7, 3, 4, -1
 216 };
 217
 218 static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
 219                         struct device *pdev, int base, int irq, int board)
 220 {
 221         bool is_pmio = base <= 0xffff;
 222         int ret;
 223         int flags = 0;
 224         unsigned int *ports = NULL;
 225         u8 *magic = NULL;
 226         int i;
 227         int port_idx = -1;
 228         unsigned long region_size;
 229         struct Scsi_Host *instance;
 230         struct NCR5380_hostdata *hostdata;
 231         u8 __iomem *iomem;
 232
 233         switch (board) {
 234         case BOARD_NCR5380:
 235                 flags = FLAG_NO_PSEUDO_DMA | FLAG_DMA_FIXUP;
 236                 break;
 237         case BOARD_NCR53C400A:
 238                 ports = ncr_53c400a_ports;
 239                 magic = ncr_53c400a_magic;
 240                 break;
 241         case BOARD_HP_C2502:
 242                 ports = ncr_53c400a_ports;
 243                 magic = hp_c2502_magic;
 244                 break;
 245         case BOARD_DTC3181E:
 246                 ports = dtc_3181e_ports;
 247                 magic = ncr_53c400a_magic;
 248                 break;
 249         }
 250
 251         if (is_pmio && ports && magic) {
 252                 /* wakeup sequence for the NCR53C400A and DTC3181E */
 253
 254                 /* Disable the adapter and look for a free io port */
 255                 magic_configure(-1, 0, magic);
 256
 257                 region_size = 16;
 258                 if (base)
 259                         for (i = 0; ports[i]; i++) {
 260                                 if (base == ports[i]) { /* index found */
 261                                         if (!request_region(ports[i],
 262                                                             region_size,
 263                                                             "ncr53c80"))
 264                                                 return -EBUSY;
 265                                         break;
 266                                 }
 267                         }
 268                 else
 269                         for (i = 0; ports[i]; i++) {
 270                                 if (!request_region(ports[i], region_size,
 271                                                     "ncr53c80"))
 272                                         continue;
 273                                 if (inb(ports[i]) == 0xff)
 274                                         break;
 275                                 release_region(ports[i], region_size);
 276                         }
 277                 if (ports[i]) {
 278                         /* At this point we have our region reserved */
 279                         magic_configure(i, 0, magic); /* no IRQ yet */
 280                         base = ports[i];
 281                         outb(0xc0, base + 9);
 282                         if (inb(base + 9) != 0x80) {
 283                                 ret = -ENODEV;
 284                                 goto out_release;
 285                         }
 286                         port_idx = i;
 287                 } else
 288                         return -EINVAL;
 289         } else if (is_pmio) {
 290                 /* NCR5380 - no configuration, just grab */
 291                 region_size = 8;
 292                 if (!base || !request_region(base, region_size, "ncr5380"))
 293                         return -EBUSY;
 294         } else {        /* MMIO */
 295                 region_size = NCR53C400_region_size;
 296                 if (!request_mem_region(base, region_size, "ncr5380"))
 297                         return -EBUSY;
 298         }
 299
 300         if (is_pmio)
 301                 iomem = ioport_map(base, region_size);
 302         else
 303                 iomem = ioremap(base, region_size);
 304
 305         if (!iomem) {
 306                 ret = -ENOMEM;
 307                 goto out_release;
 308         }
 309
 310         instance = scsi_host_alloc(tpnt, sizeof(struct NCR5380_hostdata));
 311         if (instance == NULL) {
 312                 ret = -ENOMEM;
 313                 goto out_unmap;
 314         }
 315         hostdata = shost_priv(instance);
 316
 317         hostdata->io = iomem;
 318         hostdata->region_size = region_size;
 319
 320         if (is_pmio) {
 321                 hostdata->io_port = base;
 322                 hostdata->io_width = 1; /* 8-bit PDMA by default */
 323                 hostdata->offset = 0;
 324
 325                 /*
 326                  * On NCR53C400 boards, NCR5380 registers are mapped 8 past
 327                  * the base address.
 328                  */
 329                 switch (board) {
 330                 case BOARD_NCR53C400:
 331                         hostdata->io_port += 8;
 332                         hostdata->c400_ctl_status = 0;
 333                         hostdata->c400_blk_cnt = 1;
 334                         hostdata->c400_host_buf = 4;
 335                         break;
 336                 case BOARD_DTC3181E:
 337                         hostdata->io_width = 2; /* 16-bit PDMA */
 338                         /* fall through */
 339                 case BOARD_NCR53C400A:
 340                 case BOARD_HP_C2502:
 341                         hostdata->c400_ctl_status = 9;
 342                         hostdata->c400_blk_cnt = 10;
 343                         hostdata->c400_host_buf = 8;
 344                         break;
 345                 }
 346         } else {
 347                 hostdata->base = base;
 348                 hostdata->offset = NCR53C400_mem_base;
 349                 switch (board) {
 350                 case BOARD_NCR53C400:
 351                         hostdata->c400_ctl_status = 0x100;
 352                         hostdata->c400_blk_cnt = 0x101;
 353                         hostdata->c400_host_buf = 0x104;
 354                         break;
 355                 case BOARD_DTC3181E:
 356                 case BOARD_NCR53C400A:
 357                 case BOARD_HP_C2502:
 358                         pr_err(DRV_MODULE_NAME ": unknown register offsets\n");
 359                         ret = -EINVAL;
 360                         goto out_unregister;
 361                 }
 362         }
 363
 364         /* Check for vacant slot */
 365         NCR5380_write(MODE_REG, 0);
 366         if (NCR5380_read(MODE_REG) != 0) {
 367                 ret = -ENODEV;
 368                 goto out_unregister;
 369         }
 370
 371         ret = NCR5380_init(instance, flags | FLAG_LATE_DMA_SETUP);
 372         if (ret)
 373                 goto out_unregister;
 374
 375         switch (board) {
 376         case BOARD_NCR53C400:
 377         case BOARD_DTC3181E:
 378         case BOARD_NCR53C400A:
 379         case BOARD_HP_C2502:
 380                 NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
 381         }
 382
 383         NCR5380_maybe_reset_bus(instance);
 384
 385         /* Compatibility with documented NCR5380 kernel parameters */
 386         if (irq == 255 || irq == 0)
 387                 irq = NO_IRQ;
 388         else if (irq == -1)
 389                 irq = IRQ_AUTO;
 390
 391         if (board == BOARD_HP_C2502) {
 392                 int *irq_table = hp_c2502_irqs;
 393                 int board_irq = -1;
 394
 395                 switch (irq) {
 396                 case NO_IRQ:
 397                         board_irq = 0;
 398                         break;
 399                 case IRQ_AUTO:
 400                         board_irq = legacy_find_free_irq(irq_table);
 401                         break;
 402                 default:
 403                         while (*irq_table != -1)
 404                                 if (*irq_table++ == irq)
 405                                         board_irq = irq;
 406                 }
 407
 408                 if (board_irq <= 0) {
 409                         board_irq = 0;
 410                         irq = NO_IRQ;
 411                 }
 412
 413                 magic_configure(port_idx, board_irq, magic);
 414         }
 415
 416         if (irq == IRQ_AUTO) {
 417                 instance->irq = g_NCR5380_probe_irq(instance);
 418                 if (instance->irq == NO_IRQ)
 419                         shost_printk(KERN_INFO, instance, "no irq detected\n");
 420         } else {
 421                 instance->irq = irq;
 422                 if (instance->irq == NO_IRQ)
 423                         shost_printk(KERN_INFO, instance, "no irq provided\n");
 424         }
 425
 426         if (instance->irq != NO_IRQ) {
 427                 if (request_irq(instance->irq, generic_NCR5380_intr,
 428                                 0, "NCR5380", instance)) {
 429                         instance->irq = NO_IRQ;
 430                         shost_printk(KERN_INFO, instance,
 431                                      "irq %d denied\n", instance->irq);
 432                 } else {
 433                         shost_printk(KERN_INFO, instance,
 434                                      "irq %d acquired\n", instance->irq);
 435                 }
 436         }
 437
 438         ret = scsi_add_host(instance, pdev);
 439         if (ret)
 440                 goto out_free_irq;
 441         scsi_scan_host(instance);
 442         dev_set_drvdata(pdev, instance);
 443         return 0;
 444
 445 out_free_irq:
 446         if (instance->irq != NO_IRQ)
 447                 free_irq(instance->irq, instance);
 448         NCR5380_exit(instance);
 449 out_unregister:
 450         scsi_host_put(instance);
 451 out_unmap:
 452         iounmap(iomem);
 453 out_release:
 454         if (is_pmio)
 455                 release_region(base, region_size);
 456         else
 457                 release_mem_region(base, region_size);
 458         return ret;
 459 }
 460
 461 static void generic_NCR5380_release_resources(struct Scsi_Host *instance)
 462 {
 463         struct NCR5380_hostdata *hostdata = shost_priv(instance);
 464         void __iomem *iomem = hostdata->io;
 465         unsigned long io_port = hostdata->io_port;
 466         unsigned long base = hostdata->base;
 467         unsigned long region_size = hostdata->region_size;
 468
 469         scsi_remove_host(instance);
 470         if (instance->irq != NO_IRQ)
 471                 free_irq(instance->irq, instance);
 472         NCR5380_exit(instance);
 473         scsi_host_put(instance);
 474         iounmap(iomem);
 475         if (io_port)
 476                 release_region(io_port, region_size);
 477         else
 478                 release_mem_region(base, region_size);
 479 }
 480
 481 /**
 482  *      generic_NCR5380_pread - pseudo DMA read
 483  *      @hostdata: scsi host private data
 484  *      @dst: buffer to read into
 485  *      @len: buffer length
 486  *
 487  *      Perform a pseudo DMA mode read from an NCR53C400 or equivalent
 488  *      controller
 489  */
 490
 491 static inline int generic_NCR5380_pread(struct NCR5380_hostdata *hostdata,
 492                                         unsigned char *dst, int len)
 493 {
 494         int blocks = len / 128;
 495         int start = 0;
 496
 497         NCR5380_write(hostdata->c400_ctl_status, CSR_BASE | CSR_TRANS_DIR);
 498         NCR5380_write(hostdata->c400_blk_cnt, blocks);
 499         while (1) {
 500                 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
 501                         break;
 502                 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
 503                         printk(KERN_ERR "53C400r: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
 504                         return -1;
 505                 }
 506                 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
 507                         ; /* FIXME - no timeout */
 508
 509                 if (hostdata->io_port && hostdata->io_width == 2)
 510                         insw(hostdata->io_port + hostdata->c400_host_buf,
 511                                                         dst + start, 64);
 512                 else if (hostdata->io_port)
 513                         insb(hostdata->io_port + hostdata->c400_host_buf,
 514                                                         dst + start, 128);
 515                 else
 516                         memcpy_fromio(dst + start,
 517                                 hostdata->io + NCR53C400_host_buffer, 128);
 518
 519                 start += 128;
 520                 blocks--;
 521         }
 522
 523         if (blocks) {
 524                 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
 525                         ; /* FIXME - no timeout */
 526
 527                 if (hostdata->io_port && hostdata->io_width == 2)
 528                         insw(hostdata->io_port + hostdata->c400_host_buf,
 529                                                         dst + start, 64);
 530                 else if (hostdata->io_port)
 531                         insb(hostdata->io_port + hostdata->c400_host_buf,
 532                                                         dst + start, 128);
 533                 else
 534                         memcpy_fromio(dst + start,
 535                                 hostdata->io + NCR53C400_host_buffer, 128);
 536
 537                 start += 128;
 538                 blocks--;
 539         }
 540
 541         if (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ))
 542                 printk("53C400r: no 53C80 gated irq after transfer");
 543
 544         /* wait for 53C80 registers to be available */
 545         while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG))
 546                 ;
 547
 548         if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER))
 549                 printk(KERN_ERR "53C400r: no end dma signal\n");
 550
 551         return 0;
 552 }
 553
 554 /**
 555  *      generic_NCR5380_pwrite - pseudo DMA write
 556  *      @hostdata: scsi host private data
 557  *      @dst: buffer to read into
 558  *      @len: buffer length
 559  *
 560  *      Perform a pseudo DMA mode read from an NCR53C400 or equivalent
 561  *      controller
 562  */
 563
 564 static inline int generic_NCR5380_pwrite(struct NCR5380_hostdata *hostdata,
 565                                          unsigned char *src, int len)
 566 {
 567         int blocks = len / 128;
 568         int start = 0;
 569
 570         NCR5380_write(hostdata->c400_ctl_status, CSR_BASE);
 571         NCR5380_write(hostdata->c400_blk_cnt, blocks);
 572         while (1) {
 573                 if (NCR5380_read(hostdata->c400_ctl_status) & CSR_GATED_53C80_IRQ) {
 574                         printk(KERN_ERR "53C400w: Got 53C80_IRQ start=%d, blocks=%d\n", start, blocks);
 575                         return -1;
 576                 }
 577
 578                 if (NCR5380_read(hostdata->c400_blk_cnt) == 0)
 579                         break;
 580                 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
 581                         ; // FIXME - timeout
 582
 583                 if (hostdata->io_port && hostdata->io_width == 2)
 584                         outsw(hostdata->io_port + hostdata->c400_host_buf,
 585                                                         src + start, 64);
 586                 else if (hostdata->io_port)
 587                         outsb(hostdata->io_port + hostdata->c400_host_buf,
 588                                                         src + start, 128);
 589                 else
 590                         memcpy_toio(hostdata->io + NCR53C400_host_buffer,
 591                                     src + start, 128);
 592
 593                 start += 128;
 594                 blocks--;
 595         }
 596         if (blocks) {
 597                 while (NCR5380_read(hostdata->c400_ctl_status) & CSR_HOST_BUF_NOT_RDY)
 598                         ; // FIXME - no timeout
 599
 600                 if (hostdata->io_port && hostdata->io_width == 2)
 601                         outsw(hostdata->io_port + hostdata->c400_host_buf,
 602                                                         src + start, 64);
 603                 else if (hostdata->io_port)
 604                         outsb(hostdata->io_port + hostdata->c400_host_buf,
 605                                                         src + start, 128);
 606                 else
 607                         memcpy_toio(hostdata->io + NCR53C400_host_buffer,
 608                                     src + start, 128);
 609
 610                 start += 128;
 611                 blocks--;
 612         }
 613
 614         /* wait for 53C80 registers to be available */
 615         while (!(NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)) {
 616                 udelay(4); /* DTC436 chip hangs without this */
 617                 /* FIXME - no timeout */
 618         }
 619
 620         if (!(NCR5380_read(BUS_AND_STATUS_REG) & BASR_END_DMA_TRANSFER)) {
 621                 printk(KERN_ERR "53C400w: no end dma signal\n");
 622         }
 623
 624         while (!(NCR5380_read(TARGET_COMMAND_REG) & TCR_LAST_BYTE_SENT))
 625                 ;       // TIMEOUT
 626         return 0;
 627 }
 628
 629 static int generic_NCR5380_dma_xfer_len(struct NCR5380_hostdata *hostdata,
 630                                         struct scsi_cmnd *cmd)
 631 {
 632         int transfersize = cmd->transfersize;
 633
 634         if (hostdata->flags & FLAG_NO_PSEUDO_DMA)
 635                 return 0;
 636
 637         /* Limit transfers to 32K, for xx400 & xx406
 638          * pseudoDMA that transfers in 128 bytes blocks.
 639          */
 640         if (transfersize > 32 * 1024 && cmd->SCp.this_residual &&
 641             !(cmd->SCp.this_residual % transfersize))
 642                 transfersize = 32 * 1024;
 643
 644         /* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
 645         if (transfersize % 128)
 646                 transfersize = 0;
 647
 648         return transfersize;
 649 }
 650
 651 /*
 652  *      Include the NCR5380 core code that we build our driver around
 653  */
 654
 655 #include "NCR5380.c"
 656
 657 static struct scsi_host_template driver_template = {
 658         .module                 = THIS_MODULE,
 659         .proc_name              = DRV_MODULE_NAME,
 660         .name                   = "Generic NCR5380/NCR53C400 SCSI",
 661         .info                   = generic_NCR5380_info,
 662         .queuecommand           = generic_NCR5380_queue_command,
 663         .eh_abort_handler       = generic_NCR5380_abort,
 664         .eh_bus_reset_handler   = generic_NCR5380_bus_reset,
 665         .can_queue              = 16,
 666         .this_id                = 7,
 667         .sg_tablesize           = SG_ALL,
 668         .cmd_per_lun            = 2,
 669         .use_clustering         = DISABLE_CLUSTERING,
 670         .cmd_size               = NCR5380_CMD_SIZE,
 671         .max_sectors            = 128,
 672 };
 673
 674
 675 static int generic_NCR5380_isa_match(struct device *pdev, unsigned int ndev)
 676 {
 677         int ret = generic_NCR5380_init_one(&driver_template, pdev, base[ndev],
 678                                           irq[ndev], card[ndev]);
 679         if (ret) {
 680                 if (base[ndev])
 681                         printk(KERN_WARNING "Card not found at address 0x%03x\n",
 682                                base[ndev]);
 683                 return 0;
 684         }
 685
 686         return 1;
 687 }
 688
 689 static int generic_NCR5380_isa_remove(struct device *pdev,
 690                                    unsigned int ndev)
 691 {
 692         generic_NCR5380_release_resources(dev_get_drvdata(pdev));
 693         dev_set_drvdata(pdev, NULL);
 694         return 0;
 695 }
 696
 697 static struct isa_driver generic_NCR5380_isa_driver = {
 698         .match          = generic_NCR5380_isa_match,
 699         .remove         = generic_NCR5380_isa_remove,
 700         .driver         = {
 701                 .name   = DRV_MODULE_NAME
 702         },
 703 };
 704
 705 #ifdef CONFIG_PNP
 706 static struct pnp_device_id generic_NCR5380_pnp_ids[] = {
 707         { .id = "DTC436e", .driver_data = BOARD_DTC3181E },
 708         { .id = "" }
 709 };
 710 MODULE_DEVICE_TABLE(pnp, generic_NCR5380_pnp_ids);
 711
 712 static int generic_NCR5380_pnp_probe(struct pnp_dev *pdev,
 713                                const struct pnp_device_id *id)
 714 {
 715         int base, irq;
 716
 717         if (pnp_activate_dev(pdev) < 0)
 718                 return -EBUSY;
 719
 720         base = pnp_port_start(pdev, 0);
 721         irq = pnp_irq(pdev, 0);
 722
 723         return generic_NCR5380_init_one(&driver_template, &pdev->dev, base, irq,
 724                                        id->driver_data);
 725 }
 726
 727 static void generic_NCR5380_pnp_remove(struct pnp_dev *pdev)
 728 {
 729         generic_NCR5380_release_resources(pnp_get_drvdata(pdev));
 730         pnp_set_drvdata(pdev, NULL);
 731 }
 732
 733 static struct pnp_driver generic_NCR5380_pnp_driver = {
 734         .name           = DRV_MODULE_NAME,
 735         .id_table       = generic_NCR5380_pnp_ids,
 736         .probe          = generic_NCR5380_pnp_probe,
 737         .remove         = generic_NCR5380_pnp_remove,
 738 };
 739 #endif /* defined(CONFIG_PNP) */
 740
 741 static int pnp_registered, isa_registered;
 742
 743 static int __init generic_NCR5380_init(void)
 744 {
 745         int ret = 0;
 746
 747         /* compatibility with old-style parameters */
 748         if (irq[0] == -1 && base[0] == 0 && card[0] == -1) {
 749                 irq[0] = ncr_irq;
 750                 base[0] = ncr_addr;
 751                 if (ncr_5380)
 752                         card[0] = BOARD_NCR5380;
 753                 if (ncr_53c400)
 754                         card[0] = BOARD_NCR53C400;
 755                 if (ncr_53c400a)
 756                         card[0] = BOARD_NCR53C400A;
 757                 if (dtc_3181e)
 758                         card[0] = BOARD_DTC3181E;
 759                 if (hp_c2502)
 760                         card[0] = BOARD_HP_C2502;
 761         }
 762
 763 #ifdef CONFIG_PNP
 764         if (!pnp_register_driver(&generic_NCR5380_pnp_driver))
 765                 pnp_registered = 1;
 766 #endif
 767         ret = isa_register_driver(&generic_NCR5380_isa_driver, MAX_CARDS);
 768         if (!ret)
 769                 isa_registered = 1;
 770
 771         return (pnp_registered || isa_registered) ? 0 : ret;
 772 }
 773
 774 static void __exit generic_NCR5380_exit(void)
 775 {
 776 #ifdef CONFIG_PNP
 777         if (pnp_registered)
 778                 pnp_unregister_driver(&generic_NCR5380_pnp_driver);
 779 #endif
 780         if (isa_registered)
 781                 isa_unregister_driver(&generic_NCR5380_isa_driver);
 782 }
 783
 784 module_init(generic_NCR5380_init);
 785 module_exit(generic_NCR5380_exit);