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1 /*
2 * Common boot and setup code for both 32-bit and 64-bit.
3 * Extracted from arch/powerpc/kernel/setup_64.c.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #undef DEBUG
14
15 #include <linux/export.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/platform_device.h>
24 #include <linux/seq_file.h>
25 #include <linux/ioport.h>
26 #include <linux/console.h>
27 #include <linux/screen_info.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/percpu.h>
35 #include <linux/memblock.h>
36 #include <linux/of_platform.h>
37 #include <linux/hugetlb.h>
38 #include <asm/debugfs.h>
39 #include <asm/io.h>
40 #include <asm/paca.h>
41 #include <asm/prom.h>
42 #include <asm/processor.h>
43 #include <asm/vdso_datapage.h>
44 #include <asm/pgtable.h>
45 #include <asm/smp.h>
46 #include <asm/elf.h>
47 #include <asm/machdep.h>
48 #include <asm/time.h>
49 #include <asm/cputable.h>
50 #include <asm/sections.h>
51 #include <asm/firmware.h>
52 #include <asm/btext.h>
53 #include <asm/nvram.h>
54 #include <asm/setup.h>
55 #include <asm/rtas.h>
56 #include <asm/iommu.h>
57 #include <asm/serial.h>
58 #include <asm/cache.h>
59 #include <asm/page.h>
60 #include <asm/mmu.h>
61 #include <asm/xmon.h>
62 #include <asm/cputhreads.h>
63 #include <mm/mmu_decl.h>
64 #include <asm/fadump.h>
65 #include <asm/udbg.h>
66 #include <asm/hugetlb.h>
67 #include <asm/livepatch.h>
68 #include <asm/mmu_context.h>
69 #include <asm/cpu_has_feature.h>
70
71 #include "setup.h"
72
73 #ifdef DEBUG
74 #include <asm/udbg.h>
75 #define DBG(fmt...) udbg_printf(fmt)
76 #else
77 #define DBG(fmt...)
78 #endif
79
80 /* The main machine-dep calls structure
81 */
82 struct machdep_calls ppc_md;
83 EXPORT_SYMBOL(ppc_md);
84 struct machdep_calls *machine_id;
85 EXPORT_SYMBOL(machine_id);
86
87 int boot_cpuid = -1;
88 int boot_hw_cpuid = -1;
89 EXPORT_SYMBOL_GPL(boot_cpuid);
90
91 /*
92 * These are used in binfmt_elf.c to put aux entries on the stack
93 * for each elf executable being started.
94 */
95 int dcache_bsize;
96 int icache_bsize;
97 int ucache_bsize;
98
99
100 unsigned long klimit = (unsigned long) _end;
101
102 /*
103 * This still seems to be needed... -- paulus
104 */
105 struct screen_info screen_info = {
106 .orig_x = 0,
107 .orig_y = 25,
108 .orig_video_cols = 80,
109 .orig_video_lines = 25,
110 .orig_video_isVGA = 1,
111 .orig_video_points = 16
112 };
113 #if defined(CONFIG_FB_VGA16_MODULE)
114 EXPORT_SYMBOL(screen_info);
115 #endif
116
117 /* Variables required to store legacy IO irq routing */
118 int of_i8042_kbd_irq;
119 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
120 int of_i8042_aux_irq;
121 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
122
123 #ifdef __DO_IRQ_CANON
124 /* XXX should go elsewhere eventually */
125 int ppc_do_canonicalize_irqs;
126 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
127 #endif
128
129 #ifdef CONFIG_CRASH_CORE
130 /* This keeps a track of which one is the crashing cpu. */
131 int crashing_cpu = -1;
132 #endif
133
134 /* also used by kexec */
135 void machine_shutdown(void)
136 {
137 #ifdef CONFIG_FA_DUMP
138 /*
139 * if fadump is active, cleanup the fadump registration before we
140 * shutdown.
141 */
142 fadump_cleanup();
143 #endif
144
145 if (ppc_md.machine_shutdown)
146 ppc_md.machine_shutdown();
147 }
148
149 static void machine_hang(void)
150 {
151 pr_emerg("System Halted, OK to turn off power\n");
152 local_irq_disable();
153 while (1)
154 ;
155 }
156
157 void machine_restart(char *cmd)
158 {
159 machine_shutdown();
160 if (ppc_md.restart)
161 ppc_md.restart(cmd);
162
163 smp_send_stop();
164
165 do_kernel_restart(cmd);
166 mdelay(1000);
167
168 machine_hang();
169 }
170
171 void machine_power_off(void)
172 {
173 machine_shutdown();
174 if (pm_power_off)
175 pm_power_off();
176
177 smp_send_stop();
178 machine_hang();
179 }
180 /* Used by the G5 thermal driver */
181 EXPORT_SYMBOL_GPL(machine_power_off);
182
183 void (*pm_power_off)(void);
184 EXPORT_SYMBOL_GPL(pm_power_off);
185
186 void machine_halt(void)
187 {
188 machine_shutdown();
189 if (ppc_md.halt)
190 ppc_md.halt();
191
192 smp_send_stop();
193 machine_hang();
194 }
195
196
197 #ifdef CONFIG_TAU
198 extern u32 cpu_temp(unsigned long cpu);
199 extern u32 cpu_temp_both(unsigned long cpu);
200 #endif /* CONFIG_TAU */
201
202 #ifdef CONFIG_SMP
203 DEFINE_PER_CPU(unsigned int, cpu_pvr);
204 #endif
205
206 static void show_cpuinfo_summary(struct seq_file *m)
207 {
208 struct device_node *root;
209 const char *model = NULL;
210 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
211 unsigned long bogosum = 0;
212 int i;
213 for_each_online_cpu(i)
214 bogosum += loops_per_jiffy;
215 seq_printf(m, "total bogomips\t: %lu.%02lu\n",
216 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
217 #endif /* CONFIG_SMP && CONFIG_PPC32 */
218 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
219 if (ppc_md.name)
220 seq_printf(m, "platform\t: %s\n", ppc_md.name);
221 root = of_find_node_by_path("/");
222 if (root)
223 model = of_get_property(root, "model", NULL);
224 if (model)
225 seq_printf(m, "model\t\t: %s\n", model);
226 of_node_put(root);
227
228 if (ppc_md.show_cpuinfo != NULL)
229 ppc_md.show_cpuinfo(m);
230
231 #ifdef CONFIG_PPC32
232 /* Display the amount of memory */
233 seq_printf(m, "Memory\t\t: %d MB\n",
234 (unsigned int)(total_memory / (1024 * 1024)));
235 #endif
236 }
237
238 static int show_cpuinfo(struct seq_file *m, void *v)
239 {
240 unsigned long cpu_id = (unsigned long)v - 1;
241 unsigned int pvr;
242 unsigned long proc_freq;
243 unsigned short maj;
244 unsigned short min;
245
246 #ifdef CONFIG_SMP
247 pvr = per_cpu(cpu_pvr, cpu_id);
248 #else
249 pvr = mfspr(SPRN_PVR);
250 #endif
251 maj = (pvr >> 8) & 0xFF;
252 min = pvr & 0xFF;
253
254 seq_printf(m, "processor\t: %lu\n", cpu_id);
255 seq_printf(m, "cpu\t\t: ");
256
257 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
258 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
259 else
260 seq_printf(m, "unknown (%08x)", pvr);
261
262 #ifdef CONFIG_ALTIVEC
263 if (cpu_has_feature(CPU_FTR_ALTIVEC))
264 seq_printf(m, ", altivec supported");
265 #endif /* CONFIG_ALTIVEC */
266
267 seq_printf(m, "\n");
268
269 #ifdef CONFIG_TAU
270 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
271 #ifdef CONFIG_TAU_AVERAGE
272 /* more straightforward, but potentially misleading */
273 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
274 cpu_temp(cpu_id));
275 #else
276 /* show the actual temp sensor range */
277 u32 temp;
278 temp = cpu_temp_both(cpu_id);
279 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
280 temp & 0xff, temp >> 16);
281 #endif
282 }
283 #endif /* CONFIG_TAU */
284
285 /*
286 * Platforms that have variable clock rates, should implement
287 * the method ppc_md.get_proc_freq() that reports the clock
288 * rate of a given cpu. The rest can use ppc_proc_freq to
289 * report the clock rate that is same across all cpus.
290 */
291 if (ppc_md.get_proc_freq)
292 proc_freq = ppc_md.get_proc_freq(cpu_id);
293 else
294 proc_freq = ppc_proc_freq;
295
296 if (proc_freq)
297 seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
298 proc_freq / 1000000, proc_freq % 1000000);
299
300 if (ppc_md.show_percpuinfo != NULL)
301 ppc_md.show_percpuinfo(m, cpu_id);
302
303 /* If we are a Freescale core do a simple check so
304 * we dont have to keep adding cases in the future */
305 if (PVR_VER(pvr) & 0x8000) {
306 switch (PVR_VER(pvr)) {
307 case 0x8000: /* 7441/7450/7451, Voyager */
308 case 0x8001: /* 7445/7455, Apollo 6 */
309 case 0x8002: /* 7447/7457, Apollo 7 */
310 case 0x8003: /* 7447A, Apollo 7 PM */
311 case 0x8004: /* 7448, Apollo 8 */
312 case 0x800c: /* 7410, Nitro */
313 maj = ((pvr >> 8) & 0xF);
314 min = PVR_MIN(pvr);
315 break;
316 default: /* e500/book-e */
317 maj = PVR_MAJ(pvr);
318 min = PVR_MIN(pvr);
319 break;
320 }
321 } else {
322 switch (PVR_VER(pvr)) {
323 case 0x0020: /* 403 family */
324 maj = PVR_MAJ(pvr) + 1;
325 min = PVR_MIN(pvr);
326 break;
327 case 0x1008: /* 740P/750P ?? */
328 maj = ((pvr >> 8) & 0xFF) - 1;
329 min = pvr & 0xFF;
330 break;
331 case 0x004e: /* POWER9 bits 12-15 give chip type */
332 maj = (pvr >> 8) & 0x0F;
333 min = pvr & 0xFF;
334 break;
335 default:
336 maj = (pvr >> 8) & 0xFF;
337 min = pvr & 0xFF;
338 break;
339 }
340 }
341
342 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
343 maj, min, PVR_VER(pvr), PVR_REV(pvr));
344
345 #ifdef CONFIG_PPC32
346 seq_printf(m, "bogomips\t: %lu.%02lu\n",
347 loops_per_jiffy / (500000/HZ),
348 (loops_per_jiffy / (5000/HZ)) % 100);
349 #endif
350
351 #ifdef CONFIG_SMP
352 seq_printf(m, "\n");
353 #endif
354 /* If this is the last cpu, print the summary */
355 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
356 show_cpuinfo_summary(m);
357
358 return 0;
359 }
360
361 static void *c_start(struct seq_file *m, loff_t *pos)
362 {
363 if (*pos == 0) /* just in case, cpu 0 is not the first */
364 *pos = cpumask_first(cpu_online_mask);
365 else
366 *pos = cpumask_next(*pos - 1, cpu_online_mask);
367 if ((*pos) < nr_cpu_ids)
368 return (void *)(unsigned long)(*pos + 1);
369 return NULL;
370 }
371
372 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
373 {
374 (*pos)++;
375 return c_start(m, pos);
376 }
377
378 static void c_stop(struct seq_file *m, void *v)
379 {
380 }
381
382 const struct seq_operations cpuinfo_op = {
383 .start =c_start,
384 .next = c_next,
385 .stop = c_stop,
386 .show = show_cpuinfo,
387 };
388
389 void __init check_for_initrd(void)
390 {
391 #ifdef CONFIG_BLK_DEV_INITRD
392 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
393 initrd_start, initrd_end);
394
395 /* If we were passed an initrd, set the ROOT_DEV properly if the values
396 * look sensible. If not, clear initrd reference.
397 */
398 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
399 initrd_end > initrd_start)
400 ROOT_DEV = Root_RAM0;
401 else
402 initrd_start = initrd_end = 0;
403
404 if (initrd_start)
405 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
406
407 DBG(" <- check_for_initrd()\n");
408 #endif /* CONFIG_BLK_DEV_INITRD */
409 }
410
411 #ifdef CONFIG_SMP
412
413 int threads_per_core, threads_per_subcore, threads_shift;
414 cpumask_t threads_core_mask;
415 EXPORT_SYMBOL_GPL(threads_per_core);
416 EXPORT_SYMBOL_GPL(threads_per_subcore);
417 EXPORT_SYMBOL_GPL(threads_shift);
418 EXPORT_SYMBOL_GPL(threads_core_mask);
419
420 static void __init cpu_init_thread_core_maps(int tpc)
421 {
422 int i;
423
424 threads_per_core = tpc;
425 threads_per_subcore = tpc;
426 cpumask_clear(&threads_core_mask);
427
428 /* This implementation only supports power of 2 number of threads
429 * for simplicity and performance
430 */
431 threads_shift = ilog2(tpc);
432 BUG_ON(tpc != (1 << threads_shift));
433
434 for (i = 0; i < tpc; i++)
435 cpumask_set_cpu(i, &threads_core_mask);
436
437 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
438 tpc, tpc > 1 ? "s" : "");
439 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
440 }
441
442
443 /**
444 * setup_cpu_maps - initialize the following cpu maps:
445 * cpu_possible_mask
446 * cpu_present_mask
447 *
448 * Having the possible map set up early allows us to restrict allocations
449 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
450 *
451 * We do not initialize the online map here; cpus set their own bits in
452 * cpu_online_mask as they come up.
453 *
454 * This function is valid only for Open Firmware systems. finish_device_tree
455 * must be called before using this.
456 *
457 * While we're here, we may as well set the "physical" cpu ids in the paca.
458 *
459 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
460 */
461 void __init smp_setup_cpu_maps(void)
462 {
463 struct device_node *dn = NULL;
464 int cpu = 0;
465 int nthreads = 1;
466 bool boot_cpu_added = false;
467
468 DBG("smp_setup_cpu_maps()\n");
469
470 while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
471 const __be32 *intserv;
472 __be32 cpu_be;
473 int j, len;
474
475 DBG(" * %pOF...\n", dn);
476
477 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
478 &len);
479 if (intserv) {
480 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
481 nthreads);
482 } else {
483 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
484 intserv = of_get_property(dn, "reg", &len);
485 if (!intserv) {
486 cpu_be = cpu_to_be32(cpu);
487 intserv = &cpu_be; /* assume logical == phys */
488 len = 4;
489 }
490 }
491
492 nthreads = len / sizeof(int);
493 /*
494 * If boot cpu hasn't been added to paca and there are only
495 * last nthreads slots available in paca array then wait
496 * for boot cpu to show up.
497 */
498 if (!boot_cpu_added && (cpu + nthreads) >= nr_cpu_ids) {
499 int found = 0;
500
501 DBG("Holding last nthreads paca slots for boot cpu\n");
502 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
503 if (boot_hw_cpuid == be32_to_cpu(intserv[j])) {
504 found = 1;
505 break;
506 }
507 }
508 if (!found)
509 continue;
510 }
511
512 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
513 bool avail;
514
515 DBG(" thread %d -> cpu %d (hard id %d)\n",
516 j, cpu, be32_to_cpu(intserv[j]));
517
518 avail = of_device_is_available(dn);
519 if (!avail)
520 avail = !of_property_match_string(dn,
521 "enable-method", "spin-table");
522
523 set_cpu_present(cpu, avail);
524 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
525 set_cpu_possible(cpu, true);
526 if (boot_hw_cpuid == be32_to_cpu(intserv[j])) {
527 DBG("Boot cpu %d (hard id %d) added to paca\n",
528 cpu, be32_to_cpu(intserv[j]));
529 boot_cpu_added = true;
530 }
531 cpu++;
532 }
533 }
534
535 /* If no SMT supported, nthreads is forced to 1 */
536 if (!cpu_has_feature(CPU_FTR_SMT)) {
537 DBG(" SMT disabled ! nthreads forced to 1\n");
538 nthreads = 1;
539 }
540
541 #ifdef CONFIG_PPC64
542 /*
543 * On pSeries LPAR, we need to know how many cpus
544 * could possibly be added to this partition.
545 */
546 if (firmware_has_feature(FW_FEATURE_LPAR) &&
547 (dn = of_find_node_by_path("/rtas"))) {
548 int num_addr_cell, num_size_cell, maxcpus;
549 const __be32 *ireg;
550
551 num_addr_cell = of_n_addr_cells(dn);
552 num_size_cell = of_n_size_cells(dn);
553
554 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
555
556 if (!ireg)
557 goto out;
558
559 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
560
561 /* Double maxcpus for processors which have SMT capability */
562 if (cpu_has_feature(CPU_FTR_SMT))
563 maxcpus *= nthreads;
564
565 if (maxcpus > nr_cpu_ids) {
566 printk(KERN_WARNING
567 "Partition configured for %d cpus, "
568 "operating system maximum is %u.\n",
569 maxcpus, nr_cpu_ids);
570 maxcpus = nr_cpu_ids;
571 } else
572 printk(KERN_INFO "Partition configured for %d cpus.\n",
573 maxcpus);
574
575 for (cpu = 0; cpu < maxcpus; cpu++)
576 set_cpu_possible(cpu, true);
577 out:
578 of_node_put(dn);
579 }
580 vdso_data->processorCount = num_present_cpus();
581 #endif /* CONFIG_PPC64 */
582
583 /* Initialize CPU <=> thread mapping/
584 *
585 * WARNING: We assume that the number of threads is the same for
586 * every CPU in the system. If that is not the case, then some code
587 * here will have to be reworked
588 */
589 cpu_init_thread_core_maps(nthreads);
590
591 /* Now that possible cpus are set, set nr_cpu_ids for later use */
592 setup_nr_cpu_ids();
593
594 free_unused_pacas();
595 }
596 #endif /* CONFIG_SMP */
597
598 #ifdef CONFIG_PCSPKR_PLATFORM
599 static __init int add_pcspkr(void)
600 {
601 struct device_node *np;
602 struct platform_device *pd;
603 int ret;
604
605 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
606 of_node_put(np);
607 if (!np)
608 return -ENODEV;
609
610 pd = platform_device_alloc("pcspkr", -1);
611 if (!pd)
612 return -ENOMEM;
613
614 ret = platform_device_add(pd);
615 if (ret)
616 platform_device_put(pd);
617
618 return ret;
619 }
620 device_initcall(add_pcspkr);
621 #endif /* CONFIG_PCSPKR_PLATFORM */
622
623 void probe_machine(void)
624 {
625 extern struct machdep_calls __machine_desc_start;
626 extern struct machdep_calls __machine_desc_end;
627 unsigned int i;
628
629 /*
630 * Iterate all ppc_md structures until we find the proper
631 * one for the current machine type
632 */
633 DBG("Probing machine type ...\n");
634
635 /*
636 * Check ppc_md is empty, if not we have a bug, ie, we setup an
637 * entry before probe_machine() which will be overwritten
638 */
639 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
640 if (((void **)&ppc_md)[i]) {
641 printk(KERN_ERR "Entry %d in ppc_md non empty before"
642 " machine probe !\n", i);
643 }
644 }
645
646 for (machine_id = &__machine_desc_start;
647 machine_id < &__machine_desc_end;
648 machine_id++) {
649 DBG(" %s ...", machine_id->name);
650 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
651 if (ppc_md.probe()) {
652 DBG(" match !\n");
653 break;
654 }
655 DBG("\n");
656 }
657 /* What can we do if we didn't find ? */
658 if (machine_id >= &__machine_desc_end) {
659 DBG("No suitable machine found !\n");
660 for (;;);
661 }
662
663 printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
664 }
665
666 /* Match a class of boards, not a specific device configuration. */
667 int check_legacy_ioport(unsigned long base_port)
668 {
669 struct device_node *parent, *np = NULL;
670 int ret = -ENODEV;
671
672 switch(base_port) {
673 case I8042_DATA_REG:
674 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
675 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
676 if (np) {
677 parent = of_get_parent(np);
678
679 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
680 if (!of_i8042_kbd_irq)
681 of_i8042_kbd_irq = 1;
682
683 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
684 if (!of_i8042_aux_irq)
685 of_i8042_aux_irq = 12;
686
687 of_node_put(np);
688 np = parent;
689 break;
690 }
691 np = of_find_node_by_type(NULL, "8042");
692 /* Pegasos has no device_type on its 8042 node, look for the
693 * name instead */
694 if (!np)
695 np = of_find_node_by_name(NULL, "8042");
696 if (np) {
697 of_i8042_kbd_irq = 1;
698 of_i8042_aux_irq = 12;
699 }
700 break;
701 case FDC_BASE: /* FDC1 */
702 np = of_find_node_by_type(NULL, "fdc");
703 break;
704 default:
705 /* ipmi is supposed to fail here */
706 break;
707 }
708 if (!np)
709 return ret;
710 parent = of_get_parent(np);
711 if (parent) {
712 if (strcmp(parent->type, "isa") == 0)
713 ret = 0;
714 of_node_put(parent);
715 }
716 of_node_put(np);
717 return ret;
718 }
719 EXPORT_SYMBOL(check_legacy_ioport);
720
721 static int ppc_panic_event(struct notifier_block *this,
722 unsigned long event, void *ptr)
723 {
724 /*
725 * If firmware-assisted dump has been registered then trigger
726 * firmware-assisted dump and let firmware handle everything else.
727 */
728 crash_fadump(NULL, ptr);
729 ppc_md.panic(ptr); /* May not return */
730 return NOTIFY_DONE;
731 }
732
733 static struct notifier_block ppc_panic_block = {
734 .notifier_call = ppc_panic_event,
735 .priority = INT_MIN /* may not return; must be done last */
736 };
737
738 void __init setup_panic(void)
739 {
740 if (!ppc_md.panic)
741 return;
742 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
743 }
744
745 #ifdef CONFIG_CHECK_CACHE_COHERENCY
746 /*
747 * For platforms that have configurable cache-coherency. This function
748 * checks that the cache coherency setting of the kernel matches the setting
749 * left by the firmware, as indicated in the device tree. Since a mismatch
750 * will eventually result in DMA failures, we print * and error and call
751 * BUG() in that case.
752 */
753
754 #ifdef CONFIG_NOT_COHERENT_CACHE
755 #define KERNEL_COHERENCY 0
756 #else
757 #define KERNEL_COHERENCY 1
758 #endif
759
760 static int __init check_cache_coherency(void)
761 {
762 struct device_node *np;
763 const void *prop;
764 int devtree_coherency;
765
766 np = of_find_node_by_path("/");
767 prop = of_get_property(np, "coherency-off", NULL);
768 of_node_put(np);
769
770 devtree_coherency = prop ? 0 : 1;
771
772 if (devtree_coherency != KERNEL_COHERENCY) {
773 printk(KERN_ERR
774 "kernel coherency:%s != device tree_coherency:%s\n",
775 KERNEL_COHERENCY ? "on" : "off",
776 devtree_coherency ? "on" : "off");
777 BUG();
778 }
779
780 return 0;
781 }
782
783 late_initcall(check_cache_coherency);
784 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
785
786 #ifdef CONFIG_DEBUG_FS
787 struct dentry *powerpc_debugfs_root;
788 EXPORT_SYMBOL(powerpc_debugfs_root);
789
790 static int powerpc_debugfs_init(void)
791 {
792 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
793
794 return powerpc_debugfs_root == NULL;
795 }
796 arch_initcall(powerpc_debugfs_init);
797 #endif
798
799 void ppc_printk_progress(char *s, unsigned short hex)
800 {
801 pr_info("%s\n", s);
802 }
803
804 void arch_setup_pdev_archdata(struct platform_device *pdev)
805 {
806 pdev->archdata.dma_mask = DMA_BIT_MASK(32);
807 pdev->dev.dma_mask = &pdev->archdata.dma_mask;
808 set_dma_ops(&pdev->dev, &dma_direct_ops);
809 }
810
811 static __init void print_system_info(void)
812 {
813 pr_info("-----------------------------------------------------\n");
814 #ifdef CONFIG_PPC_BOOK3S_64
815 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
816 #endif
817 #ifdef CONFIG_PPC_STD_MMU_32
818 pr_info("Hash_size = 0x%lx\n", Hash_size);
819 #endif
820 pr_info("phys_mem_size = 0x%llx\n",
821 (unsigned long long)memblock_phys_mem_size());
822
823 pr_info("dcache_bsize = 0x%x\n", dcache_bsize);
824 pr_info("icache_bsize = 0x%x\n", icache_bsize);
825 if (ucache_bsize != 0)
826 pr_info("ucache_bsize = 0x%x\n", ucache_bsize);
827
828 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features);
829 pr_info(" possible = 0x%016lx\n",
830 (unsigned long)CPU_FTRS_POSSIBLE);
831 pr_info(" always = 0x%016lx\n",
832 (unsigned long)CPU_FTRS_ALWAYS);
833 pr_info("cpu_user_features = 0x%08x 0x%08x\n",
834 cur_cpu_spec->cpu_user_features,
835 cur_cpu_spec->cpu_user_features2);
836 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features);
837 #ifdef CONFIG_PPC64
838 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
839 #endif
840
841 #ifdef CONFIG_PPC_BOOK3S_64
842 if (htab_address)
843 pr_info("htab_address = 0x%p\n", htab_address);
844 if (htab_hash_mask)
845 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask);
846 #endif
847 #ifdef CONFIG_PPC_STD_MMU_32
848 if (Hash)
849 pr_info("Hash = 0x%p\n", Hash);
850 if (Hash_mask)
851 pr_info("Hash_mask = 0x%lx\n", Hash_mask);
852 #endif
853
854 if (PHYSICAL_START > 0)
855 pr_info("physical_start = 0x%llx\n",
856 (unsigned long long)PHYSICAL_START);
857 pr_info("-----------------------------------------------------\n");
858 }
859
860 /*
861 * Called into from start_kernel this initializes memblock, which is used
862 * to manage page allocation until mem_init is called.
863 */
864 void __init setup_arch(char **cmdline_p)
865 {
866 *cmdline_p = boot_command_line;
867
868 /* Set a half-reasonable default so udelay does something sensible */
869 loops_per_jiffy = 500000000 / HZ;
870
871 /* Unflatten the device-tree passed by prom_init or kexec */
872 unflatten_device_tree();
873
874 /*
875 * Initialize cache line/block info from device-tree (on ppc64) or
876 * just cputable (on ppc32).
877 */
878 initialize_cache_info();
879
880 /* Initialize RTAS if available. */
881 rtas_initialize();
882
883 /* Check if we have an initrd provided via the device-tree. */
884 check_for_initrd();
885
886 /* Probe the machine type, establish ppc_md. */
887 probe_machine();
888
889 /* Setup panic notifier if requested by the platform. */
890 setup_panic();
891
892 /*
893 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
894 * it from their respective probe() function.
895 */
896 setup_power_save();
897
898 /* Discover standard serial ports. */
899 find_legacy_serial_ports();
900
901 /* Register early console with the printk subsystem. */
902 register_early_udbg_console();
903
904 /* Setup the various CPU maps based on the device-tree. */
905 smp_setup_cpu_maps();
906
907 /* Initialize xmon. */
908 xmon_setup();
909
910 /* Check the SMT related command line arguments (ppc64). */
911 check_smt_enabled();
912
913 /* On BookE, setup per-core TLB data structures. */
914 setup_tlb_core_data();
915
916 /*
917 * Release secondary cpus out of their spinloops at 0x60 now that
918 * we can map physical -> logical CPU ids.
919 *
920 * Freescale Book3e parts spin in a loop provided by firmware,
921 * so smp_release_cpus() does nothing for them.
922 */
923 #ifdef CONFIG_SMP
924 smp_release_cpus();
925 #endif
926
927 /* Print various info about the machine that has been gathered so far. */
928 print_system_info();
929
930 /* Reserve large chunks of memory for use by CMA for KVM. */
931 kvm_cma_reserve();
932
933 klp_init_thread_info(&init_thread_info);
934
935 init_mm.start_code = (unsigned long)_stext;
936 init_mm.end_code = (unsigned long) _etext;
937 init_mm.end_data = (unsigned long) _edata;
938 init_mm.brk = klimit;
939
940 #ifdef CONFIG_PPC_MM_SLICES
941 #ifdef CONFIG_PPC64
942 if (!radix_enabled())
943 init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64;
944 #elif defined(CONFIG_PPC_8xx)
945 init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW;
946 #else
947 #error "context.addr_limit not initialized."
948 #endif
949 #endif
950
951 #ifdef CONFIG_SPAPR_TCE_IOMMU
952 mm_iommu_init(&init_mm);
953 #endif
954 irqstack_early_init();
955 exc_lvl_early_init();
956 emergency_stack_init();
957
958 initmem_init();
959
960 #ifdef CONFIG_DUMMY_CONSOLE
961 conswitchp = &dummy_con;
962 #endif
963 if (ppc_md.setup_arch)
964 ppc_md.setup_arch();
965
966 paging_init();
967
968 /* Initialize the MMU context management stuff. */
969 mmu_context_init();
970
971 #ifdef CONFIG_PPC64
972 /* Interrupt code needs to be 64K-aligned. */
973 if ((unsigned long)_stext & 0xffff)
974 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
975 (unsigned long)_stext);
976 #endif
977 }