arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/tm.h>
  40 #include <asm/setup.h>
  41 #include <asm/security_features.h>
  42
  43 #include "powernv.h"
  44
  45
  46 static bool fw_feature_is(const char *state, const char *name,
  47                           struct device_node *fw_features)
  48 {
  49         struct device_node *np;
  50         bool rc = false;
  51
  52         np = of_get_child_by_name(fw_features, name);
  53         if (np) {
  54                 rc = of_property_read_bool(np, state);
  55                 of_node_put(np);
  56         }
  57
  58         return rc;
  59 }
  60
  61 static void init_fw_feat_flags(struct device_node *np)
  62 {
  63         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  64                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  65
  66         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  67                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  68
  69         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  71
  72         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  73                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  74
  75         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  76                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  79                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  80
  81         /*
  82          * The features below are enabled by default, so we instead look to see
  83          * if firmware has *disabled* them, and clear them if so.
  84          */
  85         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  86                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  87
  88         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  89                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  90
  91         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  92                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  93
  94         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  95                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  96 }
  97
  98 static void pnv_setup_rfi_flush(void)
  99 {
 100         struct device_node *np, *fw_features;
 101         enum l1d_flush_type type;
 102         bool enable;
 103
 104         /* Default to fallback in case fw-features are not available */
 105         type = L1D_FLUSH_FALLBACK;
 106
 107         np = of_find_node_by_name(NULL, "ibm,opal");
 108         fw_features = of_get_child_by_name(np, "fw-features");
 109         of_node_put(np);
 110
 111         if (fw_features) {
 112                 init_fw_feat_flags(fw_features);
 113                 of_node_put(fw_features);
 114
 115                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 116                         type = L1D_FLUSH_MTTRIG;
 117
 118                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 119                         type = L1D_FLUSH_ORI;
 120         }
 121
 122         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 123                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 124                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 125
 126         setup_rfi_flush(type, enable);
 127 }
 128
 129 static void __init pnv_setup_arch(void)
 130 {
 131         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 132
 133         pnv_setup_rfi_flush();
 134         setup_stf_barrier();
 135
 136         /* Initialize SMP */
 137         pnv_smp_init();
 138
 139         /* Setup PCI */
 140         pnv_pci_init();
 141
 142         /* Setup RTC and NVRAM callbacks */
 143         if (firmware_has_feature(FW_FEATURE_OPAL))
 144                 opal_nvram_init();
 145
 146         /* Enable NAP mode */
 147         powersave_nap = 1;
 148
 149         /* XXX PMCS */
 150 }
 151
 152 static void __init pnv_init(void)
 153 {
 154         /*
 155          * Initialize the LPC bus now so that legacy serial
 156          * ports can be found on it
 157          */
 158         opal_lpc_init();
 159
 160 #ifdef CONFIG_HVC_OPAL
 161         if (firmware_has_feature(FW_FEATURE_OPAL))
 162                 hvc_opal_init_early();
 163         else
 164 #endif
 165                 add_preferred_console("hvc", 0, NULL);
 166 }
 167
 168 static void __init pnv_init_IRQ(void)
 169 {
 170         /* Try using a XIVE if available, otherwise use a XICS */
 171         if (!xive_native_init())
 172                 xics_init();
 173
 174         WARN_ON(!ppc_md.get_irq);
 175 }
 176
 177 static void pnv_show_cpuinfo(struct seq_file *m)
 178 {
 179         struct device_node *root;
 180         const char *model = "";
 181
 182         root = of_find_node_by_path("/");
 183         if (root)
 184                 model = of_get_property(root, "model", NULL);
 185         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 186         if (firmware_has_feature(FW_FEATURE_OPAL))
 187                 seq_printf(m, "firmware\t: OPAL\n");
 188         else
 189                 seq_printf(m, "firmware\t: BML\n");
 190         of_node_put(root);
 191         if (radix_enabled())
 192                 seq_printf(m, "MMU\t\t: Radix\n");
 193         else
 194                 seq_printf(m, "MMU\t\t: Hash\n");
 195 }
 196
 197 static void pnv_prepare_going_down(void)
 198 {
 199         /*
 200          * Disable all notifiers from OPAL, we can't
 201          * service interrupts anymore anyway
 202          */
 203         opal_event_shutdown();
 204
 205         /* Soft disable interrupts */
 206         local_irq_disable();
 207
 208         /*
 209          * Return secondary CPUs to firwmare if a flash update
 210          * is pending otherwise we will get all sort of error
 211          * messages about CPU being stuck etc.. This will also
 212          * have the side effect of hard disabling interrupts so
 213          * past this point, the kernel is effectively dead.
 214          */
 215         opal_flash_term_callback();
 216 }
 217
 218 static void  __noreturn pnv_restart(char *cmd)
 219 {
 220         long rc;
 221
 222         pnv_prepare_going_down();
 223
 224         do {
 225                 if (!cmd)
 226                         rc = opal_cec_reboot();
 227                 else if (strcmp(cmd, "full") == 0)
 228                         rc = opal_cec_reboot2(OPAL_REBOOT_FULL_IPL, NULL);
 229                 else
 230                         rc = OPAL_UNSUPPORTED;
 231
 232                 if (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 233                         /* Opal is busy wait for some time and retry */
 234                         opal_poll_events(NULL);
 235                         mdelay(10);
 236
 237                 } else  if (cmd && rc) {
 238                         /* Unknown error while issuing reboot */
 239                         if (rc == OPAL_UNSUPPORTED)
 240                                 pr_err("Unsupported '%s' reboot.\n", cmd);
 241                         else
 242                                 pr_err("Unable to issue '%s' reboot. Err=%ld\n",
 243                                        cmd, rc);
 244                         pr_info("Forcing a cec-reboot\n");
 245                         cmd = NULL;
 246                         rc = OPAL_BUSY;
 247
 248                 } else if (rc != OPAL_SUCCESS) {
 249                         /* Unknown error while issuing cec-reboot */
 250                         pr_err("Unable to reboot. Err=%ld\n", rc);
 251                 }
 252
 253         } while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT);
 254
 255         for (;;)
 256                 opal_poll_events(NULL);
 257 }
 258
 259 static void __noreturn pnv_power_off(void)
 260 {
 261         long rc = OPAL_BUSY;
 262
 263         pnv_prepare_going_down();
 264
 265         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 266                 rc = opal_cec_power_down(0);
 267                 if (rc == OPAL_BUSY_EVENT)
 268                         opal_poll_events(NULL);
 269                 else
 270                         mdelay(10);
 271         }
 272         for (;;)
 273                 opal_poll_events(NULL);
 274 }
 275
 276 static void __noreturn pnv_halt(void)
 277 {
 278         pnv_power_off();
 279 }
 280
 281 static void pnv_progress(char *s, unsigned short hex)
 282 {
 283 }
 284
 285 static void pnv_shutdown(void)
 286 {
 287         /* Let the PCI code clear up IODA tables */
 288         pnv_pci_shutdown();
 289
 290         /*
 291          * Stop OPAL activity: Unregister all OPAL interrupts so they
 292          * don't fire up while we kexec and make sure all potentially
 293          * DMA'ing ops are complete (such as dump retrieval).
 294          */
 295         opal_shutdown();
 296 }
 297
 298 #ifdef CONFIG_KEXEC_CORE
 299 static void pnv_kexec_wait_secondaries_down(void)
 300 {
 301         int my_cpu, i, notified = -1;
 302
 303         my_cpu = get_cpu();
 304
 305         for_each_online_cpu(i) {
 306                 uint8_t status;
 307                 int64_t rc, timeout = 1000;
 308
 309                 if (i == my_cpu)
 310                         continue;
 311
 312                 for (;;) {
 313                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 314                                                    &status);
 315                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 316                                 break;
 317                         barrier();
 318                         if (i != notified) {
 319                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 320                                        "(physical %d) to enter OPAL\n",
 321                                        i, paca[i].hw_cpu_id);
 322                                 notified = i;
 323                         }
 324
 325                         /*
 326                          * On crash secondaries might be unreachable or hung,
 327                          * so timeout if we've waited too long
 328                          * */
 329                         mdelay(1);
 330                         if (timeout-- == 0) {
 331                                 printk(KERN_ERR "kexec: timed out waiting for "
 332                                        "cpu %d (physical %d) to enter OPAL\n",
 333                                        i, paca[i].hw_cpu_id);
 334                                 break;
 335                         }
 336                 }
 337         }
 338 }
 339
 340 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 341 {
 342         u64 reinit_flags;
 343
 344         if (xive_enabled())
 345                 xive_kexec_teardown_cpu(secondary);
 346         else
 347                 xics_kexec_teardown_cpu(secondary);
 348
 349         /* On OPAL, we return all CPUs to firmware */
 350         if (!firmware_has_feature(FW_FEATURE_OPAL))
 351                 return;
 352
 353         if (secondary) {
 354                 /* Return secondary CPUs to firmware on OPAL v3 */
 355                 mb();
 356                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 357                 mb();
 358
 359                 /* Return the CPU to OPAL */
 360                 opal_return_cpu();
 361         } else {
 362                 /* Primary waits for the secondaries to have reached OPAL */
 363                 pnv_kexec_wait_secondaries_down();
 364
 365                 /* Switch XIVE back to emulation mode */
 366                 if (xive_enabled())
 367                         xive_shutdown();
 368
 369                 /*
 370                  * We might be running as little-endian - now that interrupts
 371                  * are disabled, reset the HILE bit to big-endian so we don't
 372                  * take interrupts in the wrong endian later
 373                  *
 374                  * We reinit to enable both radix and hash on P9 to ensure
 375                  * the mode used by the next kernel is always supported.
 376                  */
 377                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 378                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 379                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 380                                 OPAL_REINIT_CPUS_MMU_HASH;
 381                 opal_reinit_cpus(reinit_flags);
 382         }
 383 }
 384 #endif /* CONFIG_KEXEC_CORE */
 385
 386 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 387 static unsigned long pnv_memory_block_size(void)
 388 {
 389         return 256UL * 1024 * 1024;
 390 }
 391 #endif
 392
 393 static void __init pnv_setup_machdep_opal(void)
 394 {
 395         ppc_md.get_boot_time = opal_get_boot_time;
 396         ppc_md.restart = pnv_restart;
 397         pm_power_off = pnv_power_off;
 398         ppc_md.halt = pnv_halt;
 399         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 400         ppc_md.machine_check_exception = opal_machine_check;
 401         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 402         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 403         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 404 }
 405
 406 static int __init pnv_probe(void)
 407 {
 408         if (!of_machine_is_compatible("ibm,powernv"))
 409                 return 0;
 410
 411         if (firmware_has_feature(FW_FEATURE_OPAL))
 412                 pnv_setup_machdep_opal();
 413
 414         pr_debug("PowerNV detected !\n");
 415
 416         pnv_init();
 417
 418         return 1;
 419 }
 420
 421 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 422 void __init pnv_tm_init(void)
 423 {
 424         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 425             !pvr_version_is(PVR_POWER9) ||
 426             early_cpu_has_feature(CPU_FTR_TM))
 427                 return;
 428
 429         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 430                 return;
 431
 432         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 433         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 434         /* Make sure "normal" HTM is off (it should be) */
 435         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 436         /* Turn on no suspend mode, and HTM no SC */
 437         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 438                                             PPC_FEATURE2_HTM_NOSC;
 439         tm_suspend_disabled = true;
 440 }
 441 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 442
 443 /*
 444  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 445  * /proc/cpuinfo
 446  */
 447 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 448 {
 449         unsigned long ret_freq;
 450
 451         ret_freq = cpufreq_get(cpu) * 1000ul;
 452
 453         /*
 454          * If the backend cpufreq driver does not exist,
 455          * then fallback to old way of reporting the clockrate.
 456          */
 457         if (!ret_freq)
 458                 ret_freq = ppc_proc_freq;
 459         return ret_freq;
 460 }
 461
 462 define_machine(powernv) {
 463         .name                   = "PowerNV",
 464         .probe                  = pnv_probe,
 465         .setup_arch             = pnv_setup_arch,
 466         .init_IRQ               = pnv_init_IRQ,
 467         .show_cpuinfo           = pnv_show_cpuinfo,
 468         .get_proc_freq          = pnv_get_proc_freq,
 469         .progress               = pnv_progress,
 470         .machine_shutdown       = pnv_shutdown,
 471         .power_save             = NULL,
 472         .calibrate_decr         = generic_calibrate_decr,
 473 #ifdef CONFIG_KEXEC_CORE
 474         .kexec_cpu_down         = pnv_kexec_cpu_down,
 475 #endif
 476 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 477         .memory_block_size      = pnv_memory_block_size,
 478 #endif
 479 };