arch/powerpc/platforms/pseries/pci.c

   1 /*
   2  * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
   3  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
   4  *
   5  * pSeries specific routines for PCI.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  */
  21
  22 #include <linux/init.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27
  28 #include <asm/eeh.h>
  29 #include <asm/pci-bridge.h>
  30 #include <asm/prom.h>
  31 #include <asm/ppc-pci.h>
  32 #include <asm/pci.h>
  33 #include "pseries.h"
  34
  35 #if 0
  36 void pcibios_name_device(struct pci_dev *dev)
  37 {
  38         struct device_node *dn;
  39
  40         /*
  41          * Add IBM loc code (slot) as a prefix to the device names for service
  42          */
  43         dn = pci_device_to_OF_node(dev);
  44         if (dn) {
  45                 const char *loc_code = of_get_property(dn, "ibm,loc-code",
  46                                 NULL);
  47                 if (loc_code) {
  48                         int loc_len = strlen(loc_code);
  49                         if (loc_len < sizeof(dev->dev.name)) {
  50                                 memmove(dev->dev.name+loc_len+1, dev->dev.name,
  51                                         sizeof(dev->dev.name)-loc_len-1);
  52                                 memcpy(dev->dev.name, loc_code, loc_len);
  53                                 dev->dev.name[loc_len] = ' ';
  54                                 dev->dev.name[sizeof(dev->dev.name)-1] = '\0';
  55                         }
  56                 }
  57         }
  58 }
  59 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_name_device);
  60 #endif
  61
  62 static void __init pSeries_request_regions(void)
  63 {
  64         if (!isa_io_base)
  65                 return;
  66
  67         request_region(0x20,0x20,"pic1");
  68         request_region(0xa0,0x20,"pic2");
  69         request_region(0x00,0x20,"dma1");
  70         request_region(0x40,0x20,"timer");
  71         request_region(0x80,0x10,"dma page reg");
  72         request_region(0xc0,0x20,"dma2");
  73 }
  74
  75 void __init pSeries_final_fixup(void)
  76 {
  77         struct pci_controller *hose;
  78
  79         pSeries_request_regions();
  80
  81         eeh_addr_cache_build();
  82
  83         list_for_each_entry(hose, &hose_list, list_node) {
  84                 struct device_node *dn = hose->dn, *nvdn;
  85
  86                 while (1) {
  87                         dn = of_find_all_nodes(dn);
  88                         if (!dn)
  89                                 break;
  90                         nvdn = of_parse_phandle(dn, "ibm,nvlink", 0);
  91                         if (!nvdn)
  92                                 continue;
  93                         if (!of_device_is_compatible(nvdn, "ibm,npu-link"))
  94                                 continue;
  95                         if (!of_device_is_compatible(nvdn->parent,
  96                                                 "ibm,power9-npu"))
  97                                 continue;
  98                         WARN_ON_ONCE(pnv_npu2_init(hose));
  99                         break;
 100                 }
 101         }
 102 }
 103
 104 /*
 105  * Assume the winbond 82c105 is the IDE controller on a
 106  * p610/p615/p630. We should probably be more careful in case
 107  * someone tries to plug in a similar adapter.
 108  */
 109 static void fixup_winbond_82c105(struct pci_dev* dev)
 110 {
 111         int i;
 112         unsigned int reg;
 113
 114         if (!machine_is(pseries))
 115                 return;
 116
 117         printk("Using INTC for W82c105 IDE controller.\n");
 118         pci_read_config_dword(dev, 0x40, &reg);
 119         /* Enable LEGIRQ to use INTC instead of ISA interrupts */
 120         pci_write_config_dword(dev, 0x40, reg | (1<<11));
 121
 122         for (i = 0; i < DEVICE_COUNT_RESOURCE; ++i) {
 123                 /* zap the 2nd function of the winbond chip */
 124                 if (dev->resource[i].flags & IORESOURCE_IO
 125                     && dev->bus->number == 0 && dev->devfn == 0x81)
 126                         dev->resource[i].flags &= ~IORESOURCE_IO;
 127                 if (dev->resource[i].start == 0 && dev->resource[i].end) {
 128                         dev->resource[i].flags = 0;
 129                         dev->resource[i].end = 0;
 130                 }
 131         }
 132 }
 133 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
 134                          fixup_winbond_82c105);
 135
 136 int pseries_root_bridge_prepare(struct pci_host_bridge *bridge)
 137 {
 138         struct device_node *dn, *pdn;
 139         struct pci_bus *bus;
 140         u32 pcie_link_speed_stats[2];
 141         int rc;
 142
 143         bus = bridge->bus;
 144
 145         /* Rely on the pcibios_free_controller_deferred() callback. */
 146         pci_set_host_bridge_release(bridge, pcibios_free_controller_deferred,
 147                                         (void *) pci_bus_to_host(bus));
 148
 149         dn = pcibios_get_phb_of_node(bus);
 150         if (!dn)
 151                 return 0;
 152
 153         for (pdn = dn; pdn != NULL; pdn = of_get_next_parent(pdn)) {
 154                 rc = of_property_read_u32_array(pdn,
 155                                 "ibm,pcie-link-speed-stats",
 156                                 &pcie_link_speed_stats[0], 2);
 157                 if (!rc)
 158                         break;
 159         }
 160
 161         of_node_put(pdn);
 162
 163         if (rc) {
 164                 pr_debug("no ibm,pcie-link-speed-stats property\n");
 165                 return 0;
 166         }
 167
 168         switch (pcie_link_speed_stats[0]) {
 169         case 0x01:
 170                 bus->max_bus_speed = PCIE_SPEED_2_5GT;
 171                 break;
 172         case 0x02:
 173                 bus->max_bus_speed = PCIE_SPEED_5_0GT;
 174                 break;
 175         case 0x04:
 176                 bus->max_bus_speed = PCIE_SPEED_8_0GT;
 177                 break;
 178         default:
 179                 bus->max_bus_speed = PCI_SPEED_UNKNOWN;
 180                 break;
 181         }
 182
 183         switch (pcie_link_speed_stats[1]) {
 184         case 0x01:
 185                 bus->cur_bus_speed = PCIE_SPEED_2_5GT;
 186                 break;
 187         case 0x02:
 188                 bus->cur_bus_speed = PCIE_SPEED_5_0GT;
 189                 break;
 190         case 0x04:
 191                 bus->cur_bus_speed = PCIE_SPEED_8_0GT;
 192                 break;
 193         default:
 194                 bus->cur_bus_speed = PCI_SPEED_UNKNOWN;
 195                 break;
 196         }
 197
 198         return 0;
 199 }