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x86/mm: Use WRITE_ONCE() when setting PTEs
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1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PGTABLE_64_H
3 #define _ASM_X86_PGTABLE_64_H
4
5 #include <linux/const.h>
6 #include <asm/pgtable_64_types.h>
7
8 #ifndef __ASSEMBLY__
9
10 /*
11 * This file contains the functions and defines necessary to modify and use
12 * the x86-64 page table tree.
13 */
14 #include <asm/processor.h>
15 #include <linux/bitops.h>
16 #include <linux/threads.h>
17
18 extern p4d_t level4_kernel_pgt[512];
19 extern p4d_t level4_ident_pgt[512];
20 extern pud_t level3_kernel_pgt[512];
21 extern pud_t level3_ident_pgt[512];
22 extern pmd_t level2_kernel_pgt[512];
23 extern pmd_t level2_fixmap_pgt[512];
24 extern pmd_t level2_ident_pgt[512];
25 extern pte_t level1_fixmap_pgt[512];
26 extern pgd_t init_top_pgt[];
27
28 #define swapper_pg_dir init_top_pgt
29
30 extern void paging_init(void);
31 static inline void sync_initial_page_table(void) { }
32
33 #define pte_ERROR(e) \
34 pr_err("%s:%d: bad pte %p(%016lx)\n", \
35 __FILE__, __LINE__, &(e), pte_val(e))
36 #define pmd_ERROR(e) \
37 pr_err("%s:%d: bad pmd %p(%016lx)\n", \
38 __FILE__, __LINE__, &(e), pmd_val(e))
39 #define pud_ERROR(e) \
40 pr_err("%s:%d: bad pud %p(%016lx)\n", \
41 __FILE__, __LINE__, &(e), pud_val(e))
42
43 #if CONFIG_PGTABLE_LEVELS >= 5
44 #define p4d_ERROR(e) \
45 pr_err("%s:%d: bad p4d %p(%016lx)\n", \
46 __FILE__, __LINE__, &(e), p4d_val(e))
47 #endif
48
49 #define pgd_ERROR(e) \
50 pr_err("%s:%d: bad pgd %p(%016lx)\n", \
51 __FILE__, __LINE__, &(e), pgd_val(e))
52
53 struct mm_struct;
54
55 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte);
56 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
57
58 static inline void native_set_pte(pte_t *ptep, pte_t pte)
59 {
60 WRITE_ONCE(*ptep, pte);
61 }
62
63 static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
64 pte_t *ptep)
65 {
66 native_set_pte(ptep, native_make_pte(0));
67 }
68
69 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
70 {
71 native_set_pte(ptep, pte);
72 }
73
74 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
75 {
76 WRITE_ONCE(*pmdp, pmd);
77 }
78
79 static inline void native_pmd_clear(pmd_t *pmd)
80 {
81 native_set_pmd(pmd, native_make_pmd(0));
82 }
83
84 static inline pte_t native_ptep_get_and_clear(pte_t *xp)
85 {
86 #ifdef CONFIG_SMP
87 return native_make_pte(xchg(&xp->pte, 0));
88 #else
89 /* native_local_ptep_get_and_clear,
90 but duplicated because of cyclic dependency */
91 pte_t ret = *xp;
92 native_pte_clear(NULL, 0, xp);
93 return ret;
94 #endif
95 }
96
97 static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp)
98 {
99 #ifdef CONFIG_SMP
100 return native_make_pmd(xchg(&xp->pmd, 0));
101 #else
102 /* native_local_pmdp_get_and_clear,
103 but duplicated because of cyclic dependency */
104 pmd_t ret = *xp;
105 native_pmd_clear(xp);
106 return ret;
107 #endif
108 }
109
110 static inline void native_set_pud(pud_t *pudp, pud_t pud)
111 {
112 WRITE_ONCE(*pudp, pud);
113 }
114
115 static inline void native_pud_clear(pud_t *pud)
116 {
117 native_set_pud(pud, native_make_pud(0));
118 }
119
120 static inline pud_t native_pudp_get_and_clear(pud_t *xp)
121 {
122 #ifdef CONFIG_SMP
123 return native_make_pud(xchg(&xp->pud, 0));
124 #else
125 /* native_local_pudp_get_and_clear,
126 * but duplicated because of cyclic dependency
127 */
128 pud_t ret = *xp;
129
130 native_pud_clear(xp);
131 return ret;
132 #endif
133 }
134
135 static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
136 {
137 #if defined(CONFIG_PAGE_TABLE_ISOLATION) && !defined(CONFIG_X86_5LEVEL)
138 WRITE_ONCE(p4dp->pgd, pti_set_user_pgtbl(&p4dp->pgd, p4d.pgd));
139 #else
140 WRITE_ONCE(*p4dp, p4d);
141 #endif
142 }
143
144 static inline void native_p4d_clear(p4d_t *p4d)
145 {
146 #ifdef CONFIG_X86_5LEVEL
147 native_set_p4d(p4d, native_make_p4d(0));
148 #else
149 native_set_p4d(p4d, (p4d_t) { .pgd = native_make_pgd(0)});
150 #endif
151 }
152
153 static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
154 {
155 #ifdef CONFIG_PAGE_TABLE_ISOLATION
156 WRITE_ONCE(*pgdp, pti_set_user_pgtbl(pgdp, pgd));
157 #else
158 WRITE_ONCE(*pgdp, pgd);
159 #endif
160 }
161
162 static inline void native_pgd_clear(pgd_t *pgd)
163 {
164 native_set_pgd(pgd, native_make_pgd(0));
165 }
166
167 extern void sync_global_pgds(unsigned long start, unsigned long end);
168
169 /*
170 * Conversion functions: convert a page and protection to a page entry,
171 * and a page entry and page directory to the page they refer to.
172 */
173
174 /*
175 * Level 4 access.
176 */
177 #define mk_kernel_pgd(address) __pgd((address) | _KERNPG_TABLE)
178
179 /* PUD - Level3 access */
180
181 /* PMD - Level 2 access */
182
183 /* PTE - Level 1 access. */
184
185 /* x86-64 always has all page tables mapped. */
186 #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
187 #define pte_unmap(pte) ((void)(pte))/* NOP */
188
189 /*
190 * Encode and de-code a swap entry
191 *
192 * | ... | 11| 10| 9|8|7|6|5| 4| 3|2| 1|0| <- bit number
193 * | ... |SW3|SW2|SW1|G|L|D|A|CD|WT|U| W|P| <- bit names
194 * | TYPE (59-63) | ~OFFSET (9-58) |0|0|X|X| X| X|X|SD|0| <- swp entry
195 *
196 * G (8) is aliased and used as a PROT_NONE indicator for
197 * !present ptes. We need to start storing swap entries above
198 * there. We also need to avoid using A and D because of an
199 * erratum where they can be incorrectly set by hardware on
200 * non-present PTEs.
201 *
202 * SD (1) in swp entry is used to store soft dirty bit, which helps us
203 * remember soft dirty over page migration
204 *
205 * Bit 7 in swp entry should be 0 because pmd_present checks not only P,
206 * but also L and G.
207 *
208 * The offset is inverted by a binary not operation to make the high
209 * physical bits set.
210 */
211 #define SWP_TYPE_BITS 5
212
213 #define SWP_OFFSET_FIRST_BIT (_PAGE_BIT_PROTNONE + 1)
214
215 /* We always extract/encode the offset by shifting it all the way up, and then down again */
216 #define SWP_OFFSET_SHIFT (SWP_OFFSET_FIRST_BIT+SWP_TYPE_BITS)
217
218 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS)
219
220 /* Extract the high bits for type */
221 #define __swp_type(x) ((x).val >> (64 - SWP_TYPE_BITS))
222
223 /* Shift up (to get rid of type), then down to get value */
224 #define __swp_offset(x) (~(x).val << SWP_TYPE_BITS >> SWP_OFFSET_SHIFT)
225
226 /*
227 * Shift the offset up "too far" by TYPE bits, then down again
228 * The offset is inverted by a binary not operation to make the high
229 * physical bits set.
230 */
231 #define __swp_entry(type, offset) ((swp_entry_t) { \
232 (~(unsigned long)(offset) << SWP_OFFSET_SHIFT >> SWP_TYPE_BITS) \
233 | ((unsigned long)(type) << (64-SWP_TYPE_BITS)) })
234
235 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) })
236 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val((pmd)) })
237 #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val })
238 #define __swp_entry_to_pmd(x) ((pmd_t) { .pmd = (x).val })
239
240 extern int kern_addr_valid(unsigned long addr);
241 extern void cleanup_highmap(void);
242
243 #define HAVE_ARCH_UNMAPPED_AREA
244 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
245
246 #define pgtable_cache_init() do { } while (0)
247 #define check_pgt_cache() do { } while (0)
248
249 #define PAGE_AGP PAGE_KERNEL_NOCACHE
250 #define HAVE_PAGE_AGP 1
251
252 /* fs/proc/kcore.c */
253 #define kc_vaddr_to_offset(v) ((v) & __VIRTUAL_MASK)
254 #define kc_offset_to_vaddr(o) ((o) | ~__VIRTUAL_MASK)
255
256 #define __HAVE_ARCH_PTE_SAME
257
258 #define vmemmap ((struct page *)VMEMMAP_START)
259
260 extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
261 extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
262
263 #define gup_fast_permitted gup_fast_permitted
264 static inline bool gup_fast_permitted(unsigned long start, int nr_pages,
265 int write)
266 {
267 unsigned long len, end;
268
269 len = (unsigned long)nr_pages << PAGE_SHIFT;
270 end = start + len;
271 if (end < start)
272 return false;
273 if (end >> __VIRTUAL_MASK_SHIFT)
274 return false;
275 return true;
276 }
277
278 #include <asm/pgtable-invert.h>
279
280 #endif /* !__ASSEMBLY__ */
281 #endif /* _ASM_X86_PGTABLE_64_H */