2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 200;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "l1d_flush", VCPU_STAT(l1d_flush
) },
188 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
189 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
190 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
191 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
192 { "mmu_flooded", VM_STAT(mmu_flooded
) },
193 { "mmu_recycled", VM_STAT(mmu_recycled
) },
194 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
195 { "mmu_unsync", VM_STAT(mmu_unsync
) },
196 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
197 { "largepages", VM_STAT(lpages
) },
198 { "max_mmu_page_hash_collisions",
199 VM_STAT(max_mmu_page_hash_collisions
) },
203 u64 __read_mostly host_xcr0
;
205 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
210 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
211 vcpu
->arch
.apf
.gfns
[i
] = ~0;
214 static void kvm_on_user_return(struct user_return_notifier
*urn
)
217 struct kvm_shared_msrs
*locals
218 = container_of(urn
, struct kvm_shared_msrs
, urn
);
219 struct kvm_shared_msr_values
*values
;
223 * Disabling irqs at this point since the following code could be
224 * interrupted and executed through kvm_arch_hardware_disable()
226 local_irq_save(flags
);
227 if (locals
->registered
) {
228 locals
->registered
= false;
229 user_return_notifier_unregister(urn
);
231 local_irq_restore(flags
);
232 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
233 values
= &locals
->values
[slot
];
234 if (values
->host
!= values
->curr
) {
235 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
236 values
->curr
= values
->host
;
241 static void shared_msr_update(unsigned slot
, u32 msr
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 /* only read, and nobody should modify it at this time,
248 * so don't need lock */
249 if (slot
>= shared_msrs_global
.nr
) {
250 printk(KERN_ERR
"kvm: invalid MSR slot!");
253 rdmsrl_safe(msr
, &value
);
254 smsr
->values
[slot
].host
= value
;
255 smsr
->values
[slot
].curr
= value
;
258 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
260 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
261 shared_msrs_global
.msrs
[slot
] = msr
;
262 if (slot
>= shared_msrs_global
.nr
)
263 shared_msrs_global
.nr
= slot
+ 1;
265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
267 static void kvm_shared_msr_cpu_online(void)
271 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
272 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
275 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
277 unsigned int cpu
= smp_processor_id();
278 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
281 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
283 smsr
->values
[slot
].curr
= value
;
284 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
288 if (!smsr
->registered
) {
289 smsr
->urn
.on_user_return
= kvm_on_user_return
;
290 user_return_notifier_register(&smsr
->urn
);
291 smsr
->registered
= true;
295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
297 static void drop_user_return_notifiers(void)
299 unsigned int cpu
= smp_processor_id();
300 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
302 if (smsr
->registered
)
303 kvm_on_user_return(&smsr
->urn
);
306 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
308 return vcpu
->arch
.apic_base
;
310 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
312 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
314 u64 old_state
= vcpu
->arch
.apic_base
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 new_state
= msr_info
->data
&
317 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
318 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
319 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
321 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
323 if (!msr_info
->host_initiated
&&
324 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
325 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
326 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
330 kvm_lapic_set_base(vcpu
, msr_info
->data
);
333 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
335 asmlinkage __visible
void kvm_spurious_fault(void)
337 /* Fault while not rebooting. We want the trace. */
340 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
342 #define EXCPT_BENIGN 0
343 #define EXCPT_CONTRIBUTORY 1
346 static int exception_class(int vector
)
356 return EXCPT_CONTRIBUTORY
;
363 #define EXCPT_FAULT 0
365 #define EXCPT_ABORT 2
366 #define EXCPT_INTERRUPT 3
368 static int exception_type(int vector
)
372 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
373 return EXCPT_INTERRUPT
;
377 /* #DB is trap, as instruction watchpoints are handled elsewhere */
378 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
381 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
384 /* Reserved exceptions will result in fault */
388 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
389 unsigned nr
, bool has_error
, u32 error_code
,
395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
397 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
399 if (has_error
&& !is_protmode(vcpu
))
403 * On vmentry, vcpu->arch.exception.pending is only
404 * true if an event injection was blocked by
405 * nested_run_pending. In that case, however,
406 * vcpu_enter_guest requests an immediate exit,
407 * and the guest shouldn't proceed far enough to
410 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
411 vcpu
->arch
.exception
.injected
= true;
413 vcpu
->arch
.exception
.pending
= true;
414 vcpu
->arch
.exception
.injected
= false;
416 vcpu
->arch
.exception
.has_error_code
= has_error
;
417 vcpu
->arch
.exception
.nr
= nr
;
418 vcpu
->arch
.exception
.error_code
= error_code
;
422 /* to check exception */
423 prev_nr
= vcpu
->arch
.exception
.nr
;
424 if (prev_nr
== DF_VECTOR
) {
425 /* triple fault -> shutdown */
426 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
429 class1
= exception_class(prev_nr
);
430 class2
= exception_class(nr
);
431 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
432 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
434 * Generate double fault per SDM Table 5-5. Set
435 * exception.pending = true so that the double fault
436 * can trigger a nested vmexit.
438 vcpu
->arch
.exception
.pending
= true;
439 vcpu
->arch
.exception
.injected
= false;
440 vcpu
->arch
.exception
.has_error_code
= true;
441 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
442 vcpu
->arch
.exception
.error_code
= 0;
444 /* replace previous exception with a new one in a hope
445 that instruction re-execution will regenerate lost
450 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
452 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
454 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
456 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
458 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
460 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
462 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
465 kvm_inject_gp(vcpu
, 0);
467 return kvm_skip_emulated_instruction(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
473 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
475 ++vcpu
->stat
.pf_guest
;
476 vcpu
->arch
.exception
.nested_apf
=
477 is_guest_mode(vcpu
) && fault
->async_page_fault
;
478 if (vcpu
->arch
.exception
.nested_apf
)
479 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
481 vcpu
->arch
.cr2
= fault
->address
;
482 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
486 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
489 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
491 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
493 return fault
->nested_page_fault
;
496 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
498 atomic_inc(&vcpu
->arch
.nmi_queued
);
499 kvm_make_request(KVM_REQ_NMI
, vcpu
);
501 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
503 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
505 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
509 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
511 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
516 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
517 * a #GP and return false.
519 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
521 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
523 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
526 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
528 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
530 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
533 kvm_queue_exception(vcpu
, UD_VECTOR
);
536 EXPORT_SYMBOL_GPL(kvm_require_dr
);
539 * This function will be used to read from the physical memory of the currently
540 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
541 * can read from guest physical or from the guest's guest physical memory.
543 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
544 gfn_t ngfn
, void *data
, int offset
, int len
,
547 struct x86_exception exception
;
551 ngpa
= gfn_to_gpa(ngfn
);
552 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
553 if (real_gfn
== UNMAPPED_GVA
)
556 real_gfn
= gpa_to_gfn(real_gfn
);
558 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
562 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
563 void *data
, int offset
, int len
, u32 access
)
565 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
566 data
, offset
, len
, access
);
570 * Load the pae pdptrs. Return true is they are all valid.
572 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
574 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
575 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
578 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
580 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
581 offset
* sizeof(u64
), sizeof(pdpte
),
582 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
587 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
588 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
590 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
597 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
598 __set_bit(VCPU_EXREG_PDPTR
,
599 (unsigned long *)&vcpu
->arch
.regs_avail
);
600 __set_bit(VCPU_EXREG_PDPTR
,
601 (unsigned long *)&vcpu
->arch
.regs_dirty
);
606 EXPORT_SYMBOL_GPL(load_pdptrs
);
608 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
610 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
616 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
619 if (!test_bit(VCPU_EXREG_PDPTR
,
620 (unsigned long *)&vcpu
->arch
.regs_avail
))
623 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
624 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
625 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
626 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
629 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
634 EXPORT_SYMBOL_GPL(pdptrs_changed
);
636 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
638 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
639 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
644 if (cr0
& 0xffffffff00000000UL
)
648 cr0
&= ~CR0_RESERVED_BITS
;
650 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
653 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
656 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
658 if ((vcpu
->arch
.efer
& EFER_LME
)) {
663 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
668 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
673 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
676 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
678 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
679 kvm_clear_async_pf_completion_queue(vcpu
);
680 kvm_async_pf_hash_reset(vcpu
);
683 if ((cr0
^ old_cr0
) & update_bits
)
684 kvm_mmu_reset_context(vcpu
);
686 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
687 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
688 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
689 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
693 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
695 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
697 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
699 EXPORT_SYMBOL_GPL(kvm_lmsw
);
701 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
703 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
704 !vcpu
->guest_xcr0_loaded
) {
705 /* kvm_set_xcr() also depends on this */
706 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
707 vcpu
->guest_xcr0_loaded
= 1;
711 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
713 if (vcpu
->guest_xcr0_loaded
) {
714 if (vcpu
->arch
.xcr0
!= host_xcr0
)
715 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
716 vcpu
->guest_xcr0_loaded
= 0;
720 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
723 u64 old_xcr0
= vcpu
->arch
.xcr0
;
726 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
727 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
729 if (!(xcr0
& XFEATURE_MASK_FP
))
731 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
735 * Do not allow the guest to set bits that we do not support
736 * saving. However, xcr0 bit 0 is always set, even if the
737 * emulated CPU does not support XSAVE (see fx_init).
739 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
740 if (xcr0
& ~valid_bits
)
743 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
744 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
747 if (xcr0
& XFEATURE_MASK_AVX512
) {
748 if (!(xcr0
& XFEATURE_MASK_YMM
))
750 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
753 vcpu
->arch
.xcr0
= xcr0
;
755 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
756 kvm_update_cpuid(vcpu
);
760 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
762 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
763 __kvm_set_xcr(vcpu
, index
, xcr
)) {
764 kvm_inject_gp(vcpu
, 0);
769 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
771 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
773 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
774 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
775 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
777 if (cr4
& CR4_RESERVED_BITS
)
780 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
783 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
786 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
789 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
792 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
795 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
798 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
801 if (is_long_mode(vcpu
)) {
802 if (!(cr4
& X86_CR4_PAE
))
804 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
805 && ((cr4
^ old_cr4
) & pdptr_bits
)
806 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
810 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
811 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
814 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
815 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
819 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
822 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
823 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
824 kvm_mmu_reset_context(vcpu
);
826 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
827 kvm_update_cpuid(vcpu
);
831 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
833 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
836 cr3
&= ~CR3_PCID_INVD
;
839 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
840 kvm_mmu_sync_roots(vcpu
);
841 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
845 if (is_long_mode(vcpu
) &&
846 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
848 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
849 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
852 vcpu
->arch
.cr3
= cr3
;
853 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
854 kvm_mmu_new_cr3(vcpu
);
857 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
859 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
861 if (cr8
& CR8_RESERVED_BITS
)
863 if (lapic_in_kernel(vcpu
))
864 kvm_lapic_set_tpr(vcpu
, cr8
);
866 vcpu
->arch
.cr8
= cr8
;
869 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
871 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
873 if (lapic_in_kernel(vcpu
))
874 return kvm_lapic_get_cr8(vcpu
);
876 return vcpu
->arch
.cr8
;
878 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
880 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
884 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
885 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
886 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
887 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
891 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
897 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
901 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
902 dr7
= vcpu
->arch
.guest_debug_dr7
;
904 dr7
= vcpu
->arch
.dr7
;
905 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
906 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
907 if (dr7
& DR7_BP_EN_MASK
)
908 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
911 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
913 u64 fixed
= DR6_FIXED_1
;
915 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
920 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
924 vcpu
->arch
.db
[dr
] = val
;
925 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
926 vcpu
->arch
.eff_db
[dr
] = val
;
931 if (val
& 0xffffffff00000000ULL
)
933 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
934 kvm_update_dr6(vcpu
);
939 if (val
& 0xffffffff00000000ULL
)
941 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
942 kvm_update_dr7(vcpu
);
949 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
951 if (__kvm_set_dr(vcpu
, dr
, val
)) {
952 kvm_inject_gp(vcpu
, 0);
957 EXPORT_SYMBOL_GPL(kvm_set_dr
);
959 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
963 *val
= vcpu
->arch
.db
[dr
];
968 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
969 *val
= vcpu
->arch
.dr6
;
971 *val
= kvm_x86_ops
->get_dr6(vcpu
);
976 *val
= vcpu
->arch
.dr7
;
981 EXPORT_SYMBOL_GPL(kvm_get_dr
);
983 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
985 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
989 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
992 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
993 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
996 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
999 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1000 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1002 * This list is modified at module load time to reflect the
1003 * capabilities of the host cpu. This capabilities test skips MSRs that are
1004 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1005 * may depend on host virtualization features rather than host cpu features.
1008 static u32 msrs_to_save
[] = {
1009 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1011 #ifdef CONFIG_X86_64
1012 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1014 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1015 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1016 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1019 static unsigned num_msrs_to_save
;
1021 static u32 emulated_msrs
[] = {
1022 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1023 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1024 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1025 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1026 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1027 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1028 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1030 HV_X64_MSR_VP_INDEX
,
1031 HV_X64_MSR_VP_RUNTIME
,
1032 HV_X64_MSR_SCONTROL
,
1033 HV_X64_MSR_STIMER0_CONFIG
,
1034 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1037 MSR_IA32_TSC_ADJUST
,
1038 MSR_IA32_TSCDEADLINE
,
1039 MSR_IA32_MISC_ENABLE
,
1040 MSR_IA32_MCG_STATUS
,
1042 MSR_IA32_MCG_EXT_CTL
,
1045 MSR_MISC_FEATURES_ENABLES
,
1046 MSR_AMD64_VIRT_SPEC_CTRL
,
1049 static unsigned num_emulated_msrs
;
1052 * List of msr numbers which are used to expose MSR-based features that
1053 * can be used by a hypervisor to validate requested CPU features.
1055 static u32 msr_based_features
[] = {
1057 MSR_IA32_ARCH_CAPABILITIES
,
1060 static unsigned int num_msr_based_features
;
1062 u64
kvm_get_arch_capabilities(void)
1066 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES
, &data
);
1069 * If we're doing cache flushes (either "always" or "cond")
1070 * we will do one whenever the guest does a vmlaunch/vmresume.
1071 * If an outer hypervisor is doing the cache flush for us
1072 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1073 * capability to the guest too, and if EPT is disabled we're not
1074 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1075 * require a nested hypervisor to do a flush of its own.
1077 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1078 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1082 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities
);
1084 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1086 switch (msr
->index
) {
1087 case MSR_IA32_ARCH_CAPABILITIES
:
1088 msr
->data
= kvm_get_arch_capabilities();
1091 if (kvm_x86_ops
->get_msr_feature(msr
))
1097 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1099 struct kvm_msr_entry msr
;
1103 r
= kvm_get_msr_feature(&msr
);
1112 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1114 if (efer
& efer_reserved_bits
)
1117 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1120 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1125 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1127 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1129 u64 old_efer
= vcpu
->arch
.efer
;
1131 if (!kvm_valid_efer(vcpu
, efer
))
1135 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1139 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1141 kvm_x86_ops
->set_efer(vcpu
, efer
);
1143 /* Update reserved bits */
1144 if ((efer
^ old_efer
) & EFER_NX
)
1145 kvm_mmu_reset_context(vcpu
);
1150 void kvm_enable_efer_bits(u64 mask
)
1152 efer_reserved_bits
&= ~mask
;
1154 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1157 * Writes msr value into into the appropriate "register".
1158 * Returns 0 on success, non-0 otherwise.
1159 * Assumes vcpu_load() was already called.
1161 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1163 switch (msr
->index
) {
1166 case MSR_KERNEL_GS_BASE
:
1169 if (is_noncanonical_address(msr
->data
, vcpu
))
1172 case MSR_IA32_SYSENTER_EIP
:
1173 case MSR_IA32_SYSENTER_ESP
:
1175 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1176 * non-canonical address is written on Intel but not on
1177 * AMD (which ignores the top 32-bits, because it does
1178 * not implement 64-bit SYSENTER).
1180 * 64-bit code should hence be able to write a non-canonical
1181 * value on AMD. Making the address canonical ensures that
1182 * vmentry does not fail on Intel after writing a non-canonical
1183 * value, and that something deterministic happens if the guest
1184 * invokes 64-bit SYSENTER.
1186 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1188 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1190 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1193 * Adapt set_msr() to msr_io()'s calling convention
1195 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1197 struct msr_data msr
;
1201 msr
.host_initiated
= true;
1202 r
= kvm_get_msr(vcpu
, &msr
);
1210 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1212 struct msr_data msr
;
1216 msr
.host_initiated
= true;
1217 return kvm_set_msr(vcpu
, &msr
);
1220 #ifdef CONFIG_X86_64
1221 struct pvclock_gtod_data
{
1224 struct { /* extract of a clocksource struct */
1237 static struct pvclock_gtod_data pvclock_gtod_data
;
1239 static void update_pvclock_gtod(struct timekeeper
*tk
)
1241 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1244 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1246 write_seqcount_begin(&vdata
->seq
);
1248 /* copy pvclock gtod data */
1249 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1250 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1251 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1252 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1253 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1255 vdata
->boot_ns
= boot_ns
;
1256 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1258 vdata
->wall_time_sec
= tk
->xtime_sec
;
1260 write_seqcount_end(&vdata
->seq
);
1264 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1267 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1268 * vcpu_enter_guest. This function is only called from
1269 * the physical CPU that is running vcpu.
1271 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1274 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1278 struct pvclock_wall_clock wc
;
1279 struct timespec64 boot
;
1284 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1289 ++version
; /* first time write, random junk */
1293 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1297 * The guest calculates current wall clock time by adding
1298 * system time (updated by kvm_guest_time_update below) to the
1299 * wall clock specified here. guest system time equals host
1300 * system time for us, thus we must fill in host boot time here.
1302 getboottime64(&boot
);
1304 if (kvm
->arch
.kvmclock_offset
) {
1305 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1306 boot
= timespec64_sub(boot
, ts
);
1308 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1309 wc
.nsec
= boot
.tv_nsec
;
1310 wc
.version
= version
;
1312 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1315 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1318 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1320 do_shl32_div32(dividend
, divisor
);
1324 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1325 s8
*pshift
, u32
*pmultiplier
)
1333 scaled64
= scaled_hz
;
1334 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1339 tps32
= (uint32_t)tps64
;
1340 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1341 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1349 *pmultiplier
= div_frac(scaled64
, tps32
);
1351 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1352 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1355 #ifdef CONFIG_X86_64
1356 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1359 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1360 static unsigned long max_tsc_khz
;
1362 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1364 u64 v
= (u64
)khz
* (1000000 + ppm
);
1369 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1373 /* Guest TSC same frequency as host TSC? */
1375 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1379 /* TSC scaling supported? */
1380 if (!kvm_has_tsc_control
) {
1381 if (user_tsc_khz
> tsc_khz
) {
1382 vcpu
->arch
.tsc_catchup
= 1;
1383 vcpu
->arch
.tsc_always_catchup
= 1;
1386 WARN(1, "user requested TSC rate below hardware speed\n");
1391 /* TSC scaling required - calculate ratio */
1392 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1393 user_tsc_khz
, tsc_khz
);
1395 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1396 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1401 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1405 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1407 u32 thresh_lo
, thresh_hi
;
1408 int use_scaling
= 0;
1410 /* tsc_khz can be zero if TSC calibration fails */
1411 if (user_tsc_khz
== 0) {
1412 /* set tsc_scaling_ratio to a safe value */
1413 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1417 /* Compute a scale to convert nanoseconds in TSC cycles */
1418 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1419 &vcpu
->arch
.virtual_tsc_shift
,
1420 &vcpu
->arch
.virtual_tsc_mult
);
1421 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1424 * Compute the variation in TSC rate which is acceptable
1425 * within the range of tolerance and decide if the
1426 * rate being applied is within that bounds of the hardware
1427 * rate. If so, no scaling or compensation need be done.
1429 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1430 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1431 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1432 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1435 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1438 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1440 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1441 vcpu
->arch
.virtual_tsc_mult
,
1442 vcpu
->arch
.virtual_tsc_shift
);
1443 tsc
+= vcpu
->arch
.this_tsc_write
;
1447 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1449 #ifdef CONFIG_X86_64
1451 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1452 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1454 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1455 atomic_read(&vcpu
->kvm
->online_vcpus
));
1458 * Once the masterclock is enabled, always perform request in
1459 * order to update it.
1461 * In order to enable masterclock, the host clocksource must be TSC
1462 * and the vcpus need to have matched TSCs. When that happens,
1463 * perform request to enable masterclock.
1465 if (ka
->use_master_clock
||
1466 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1467 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1469 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1470 atomic_read(&vcpu
->kvm
->online_vcpus
),
1471 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1475 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1477 u64 curr_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1478 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1482 * Multiply tsc by a fixed point number represented by ratio.
1484 * The most significant 64-N bits (mult) of ratio represent the
1485 * integral part of the fixed point number; the remaining N bits
1486 * (frac) represent the fractional part, ie. ratio represents a fixed
1487 * point number (mult + frac * 2^(-N)).
1489 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1491 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1493 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1496 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1499 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1501 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1502 _tsc
= __scale_tsc(ratio
, tsc
);
1506 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1508 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1512 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1514 return target_tsc
- tsc
;
1517 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1519 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1521 return tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1523 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1525 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1527 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1528 vcpu
->arch
.tsc_offset
= offset
;
1531 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1533 struct kvm
*kvm
= vcpu
->kvm
;
1534 u64 offset
, ns
, elapsed
;
1535 unsigned long flags
;
1537 bool already_matched
;
1538 u64 data
= msr
->data
;
1539 bool synchronizing
= false;
1541 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1542 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1543 ns
= ktime_get_boot_ns();
1544 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1546 if (vcpu
->arch
.virtual_tsc_khz
) {
1547 if (data
== 0 && msr
->host_initiated
) {
1549 * detection of vcpu initialization -- need to sync
1550 * with other vCPUs. This particularly helps to keep
1551 * kvm_clock stable after CPU hotplug
1553 synchronizing
= true;
1555 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1556 nsec_to_cycles(vcpu
, elapsed
);
1557 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1559 * Special case: TSC write with a small delta (1 second)
1560 * of virtual cycle time against real time is
1561 * interpreted as an attempt to synchronize the CPU.
1563 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1564 data
+ tsc_hz
> tsc_exp
;
1569 * For a reliable TSC, we can match TSC offsets, and for an unstable
1570 * TSC, we add elapsed time in this computation. We could let the
1571 * compensation code attempt to catch up if we fall behind, but
1572 * it's better to try to match offsets from the beginning.
1574 if (synchronizing
&&
1575 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1576 if (!check_tsc_unstable()) {
1577 offset
= kvm
->arch
.cur_tsc_offset
;
1578 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1580 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1582 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1583 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1586 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1589 * We split periods of matched TSC writes into generations.
1590 * For each generation, we track the original measured
1591 * nanosecond time, offset, and write, so if TSCs are in
1592 * sync, we can match exact offset, and if not, we can match
1593 * exact software computation in compute_guest_tsc()
1595 * These values are tracked in kvm->arch.cur_xxx variables.
1597 kvm
->arch
.cur_tsc_generation
++;
1598 kvm
->arch
.cur_tsc_nsec
= ns
;
1599 kvm
->arch
.cur_tsc_write
= data
;
1600 kvm
->arch
.cur_tsc_offset
= offset
;
1602 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1603 kvm
->arch
.cur_tsc_generation
, data
);
1607 * We also track th most recent recorded KHZ, write and time to
1608 * allow the matching interval to be extended at each write.
1610 kvm
->arch
.last_tsc_nsec
= ns
;
1611 kvm
->arch
.last_tsc_write
= data
;
1612 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1614 vcpu
->arch
.last_guest_tsc
= data
;
1616 /* Keep track of which generation this VCPU has synchronized to */
1617 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1618 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1619 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1621 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1622 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1624 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1625 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1627 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1629 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1630 } else if (!already_matched
) {
1631 kvm
->arch
.nr_vcpus_matched_tsc
++;
1634 kvm_track_tsc_matching(vcpu
);
1635 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1638 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1640 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1643 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1646 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1648 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1649 WARN_ON(adjustment
< 0);
1650 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1651 adjust_tsc_offset_guest(vcpu
, adjustment
);
1654 #ifdef CONFIG_X86_64
1656 static u64
read_tsc(void)
1658 u64 ret
= (u64
)rdtsc_ordered();
1659 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1661 if (likely(ret
>= last
))
1665 * GCC likes to generate cmov here, but this branch is extremely
1666 * predictable (it's just a function of time and the likely is
1667 * very likely) and there's a data dependence, so force GCC
1668 * to generate a branch instead. I don't barrier() because
1669 * we don't actually need a barrier, and if this function
1670 * ever gets inlined it will generate worse code.
1676 static inline u64
vgettsc(u64
*cycle_now
)
1679 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1681 *cycle_now
= read_tsc();
1683 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1684 return v
* gtod
->clock
.mult
;
1687 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1689 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1695 seq
= read_seqcount_begin(>od
->seq
);
1696 mode
= gtod
->clock
.vclock_mode
;
1697 ns
= gtod
->nsec_base
;
1698 ns
+= vgettsc(cycle_now
);
1699 ns
>>= gtod
->clock
.shift
;
1700 ns
+= gtod
->boot_ns
;
1701 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1707 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1709 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1715 seq
= read_seqcount_begin(>od
->seq
);
1716 mode
= gtod
->clock
.vclock_mode
;
1717 ts
->tv_sec
= gtod
->wall_time_sec
;
1718 ns
= gtod
->nsec_base
;
1719 ns
+= vgettsc(cycle_now
);
1720 ns
>>= gtod
->clock
.shift
;
1721 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1723 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1729 /* returns true if host is using tsc clocksource */
1730 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1732 /* checked again under seqlock below */
1733 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1736 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1739 /* returns true if host is using tsc clocksource */
1740 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1743 /* checked again under seqlock below */
1744 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1747 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1753 * Assuming a stable TSC across physical CPUS, and a stable TSC
1754 * across virtual CPUs, the following condition is possible.
1755 * Each numbered line represents an event visible to both
1756 * CPUs at the next numbered event.
1758 * "timespecX" represents host monotonic time. "tscX" represents
1761 * VCPU0 on CPU0 | VCPU1 on CPU1
1763 * 1. read timespec0,tsc0
1764 * 2. | timespec1 = timespec0 + N
1766 * 3. transition to guest | transition to guest
1767 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1768 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1769 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1771 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1774 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1776 * - 0 < N - M => M < N
1778 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1779 * always the case (the difference between two distinct xtime instances
1780 * might be smaller then the difference between corresponding TSC reads,
1781 * when updating guest vcpus pvclock areas).
1783 * To avoid that problem, do not allow visibility of distinct
1784 * system_timestamp/tsc_timestamp values simultaneously: use a master
1785 * copy of host monotonic time values. Update that master copy
1788 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1792 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1794 #ifdef CONFIG_X86_64
1795 struct kvm_arch
*ka
= &kvm
->arch
;
1797 bool host_tsc_clocksource
, vcpus_matched
;
1799 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1800 atomic_read(&kvm
->online_vcpus
));
1803 * If the host uses TSC clock, then passthrough TSC as stable
1806 host_tsc_clocksource
= kvm_get_time_and_clockread(
1807 &ka
->master_kernel_ns
,
1808 &ka
->master_cycle_now
);
1810 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1811 && !ka
->backwards_tsc_observed
1812 && !ka
->boot_vcpu_runs_old_kvmclock
;
1814 if (ka
->use_master_clock
)
1815 atomic_set(&kvm_guest_has_master_clock
, 1);
1817 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1818 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1823 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1825 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1828 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1830 #ifdef CONFIG_X86_64
1832 struct kvm_vcpu
*vcpu
;
1833 struct kvm_arch
*ka
= &kvm
->arch
;
1835 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1836 kvm_make_mclock_inprogress_request(kvm
);
1837 /* no guest entries from this point */
1838 pvclock_update_vm_gtod_copy(kvm
);
1840 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1841 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1843 /* guest entries allowed */
1844 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1845 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1847 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1851 u64
get_kvmclock_ns(struct kvm
*kvm
)
1853 struct kvm_arch
*ka
= &kvm
->arch
;
1854 struct pvclock_vcpu_time_info hv_clock
;
1857 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1858 if (!ka
->use_master_clock
) {
1859 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1860 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1863 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1864 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1865 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1867 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1870 if (__this_cpu_read(cpu_tsc_khz
)) {
1871 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1872 &hv_clock
.tsc_shift
,
1873 &hv_clock
.tsc_to_system_mul
);
1874 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1876 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1883 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1885 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1886 struct pvclock_vcpu_time_info guest_hv_clock
;
1888 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1889 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1892 /* This VCPU is paused, but it's legal for a guest to read another
1893 * VCPU's kvmclock, so we really have to follow the specification where
1894 * it says that version is odd if data is being modified, and even after
1897 * Version field updates must be kept separate. This is because
1898 * kvm_write_guest_cached might use a "rep movs" instruction, and
1899 * writes within a string instruction are weakly ordered. So there
1900 * are three writes overall.
1902 * As a small optimization, only write the version field in the first
1903 * and third write. The vcpu->pv_time cache is still valid, because the
1904 * version field is the first in the struct.
1906 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1908 if (guest_hv_clock
.version
& 1)
1909 ++guest_hv_clock
.version
; /* first time write, random junk */
1911 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1912 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1914 sizeof(vcpu
->hv_clock
.version
));
1918 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1919 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1921 if (vcpu
->pvclock_set_guest_stopped_request
) {
1922 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1923 vcpu
->pvclock_set_guest_stopped_request
= false;
1926 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1928 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1930 sizeof(vcpu
->hv_clock
));
1934 vcpu
->hv_clock
.version
++;
1935 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1937 sizeof(vcpu
->hv_clock
.version
));
1940 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1942 unsigned long flags
, tgt_tsc_khz
;
1943 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1944 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1946 u64 tsc_timestamp
, host_tsc
;
1948 bool use_master_clock
;
1954 * If the host uses TSC clock, then passthrough TSC as stable
1957 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1958 use_master_clock
= ka
->use_master_clock
;
1959 if (use_master_clock
) {
1960 host_tsc
= ka
->master_cycle_now
;
1961 kernel_ns
= ka
->master_kernel_ns
;
1963 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1965 /* Keep irq disabled to prevent changes to the clock */
1966 local_irq_save(flags
);
1967 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1968 if (unlikely(tgt_tsc_khz
== 0)) {
1969 local_irq_restore(flags
);
1970 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1973 if (!use_master_clock
) {
1975 kernel_ns
= ktime_get_boot_ns();
1978 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1981 * We may have to catch up the TSC to match elapsed wall clock
1982 * time for two reasons, even if kvmclock is used.
1983 * 1) CPU could have been running below the maximum TSC rate
1984 * 2) Broken TSC compensation resets the base at each VCPU
1985 * entry to avoid unknown leaps of TSC even when running
1986 * again on the same CPU. This may cause apparent elapsed
1987 * time to disappear, and the guest to stand still or run
1990 if (vcpu
->tsc_catchup
) {
1991 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1992 if (tsc
> tsc_timestamp
) {
1993 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1994 tsc_timestamp
= tsc
;
1998 local_irq_restore(flags
);
2000 /* With all the info we got, fill in the values */
2002 if (kvm_has_tsc_control
)
2003 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2005 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2006 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2007 &vcpu
->hv_clock
.tsc_shift
,
2008 &vcpu
->hv_clock
.tsc_to_system_mul
);
2009 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2012 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2013 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2014 vcpu
->last_guest_tsc
= tsc_timestamp
;
2016 /* If the host uses TSC clocksource, then it is stable */
2018 if (use_master_clock
)
2019 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2021 vcpu
->hv_clock
.flags
= pvclock_flags
;
2023 if (vcpu
->pv_time_enabled
)
2024 kvm_setup_pvclock_page(v
);
2025 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2026 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2031 * kvmclock updates which are isolated to a given vcpu, such as
2032 * vcpu->cpu migration, should not allow system_timestamp from
2033 * the rest of the vcpus to remain static. Otherwise ntp frequency
2034 * correction applies to one vcpu's system_timestamp but not
2037 * So in those cases, request a kvmclock update for all vcpus.
2038 * We need to rate-limit these requests though, as they can
2039 * considerably slow guests that have a large number of vcpus.
2040 * The time for a remote vcpu to update its kvmclock is bound
2041 * by the delay we use to rate-limit the updates.
2044 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2046 static void kvmclock_update_fn(struct work_struct
*work
)
2049 struct delayed_work
*dwork
= to_delayed_work(work
);
2050 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2051 kvmclock_update_work
);
2052 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2053 struct kvm_vcpu
*vcpu
;
2055 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2056 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2057 kvm_vcpu_kick(vcpu
);
2061 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2063 struct kvm
*kvm
= v
->kvm
;
2065 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2066 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2067 KVMCLOCK_UPDATE_DELAY
);
2070 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2072 static void kvmclock_sync_fn(struct work_struct
*work
)
2074 struct delayed_work
*dwork
= to_delayed_work(work
);
2075 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2076 kvmclock_sync_work
);
2077 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2079 if (!kvmclock_periodic_sync
)
2082 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2083 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2084 KVMCLOCK_SYNC_PERIOD
);
2087 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2089 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2090 unsigned bank_num
= mcg_cap
& 0xff;
2091 u32 msr
= msr_info
->index
;
2092 u64 data
= msr_info
->data
;
2095 case MSR_IA32_MCG_STATUS
:
2096 vcpu
->arch
.mcg_status
= data
;
2098 case MSR_IA32_MCG_CTL
:
2099 if (!(mcg_cap
& MCG_CTL_P
))
2101 if (data
!= 0 && data
!= ~(u64
)0)
2103 vcpu
->arch
.mcg_ctl
= data
;
2106 if (msr
>= MSR_IA32_MC0_CTL
&&
2107 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2108 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2109 /* only 0 or all 1s can be written to IA32_MCi_CTL
2110 * some Linux kernels though clear bit 10 in bank 4 to
2111 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2112 * this to avoid an uncatched #GP in the guest
2114 if ((offset
& 0x3) == 0 &&
2115 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2117 if (!msr_info
->host_initiated
&&
2118 (offset
& 0x3) == 1 && data
!= 0)
2120 vcpu
->arch
.mce_banks
[offset
] = data
;
2128 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2130 struct kvm
*kvm
= vcpu
->kvm
;
2131 int lm
= is_long_mode(vcpu
);
2132 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2133 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2134 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2135 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2136 u32 page_num
= data
& ~PAGE_MASK
;
2137 u64 page_addr
= data
& PAGE_MASK
;
2142 if (page_num
>= blob_size
)
2145 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2150 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2159 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2161 gpa_t gpa
= data
& ~0x3f;
2163 /* Bits 3:5 are reserved, Should be zero */
2167 vcpu
->arch
.apf
.msr_val
= data
;
2169 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2170 kvm_clear_async_pf_completion_queue(vcpu
);
2171 kvm_async_pf_hash_reset(vcpu
);
2175 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2179 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2180 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2181 kvm_async_pf_wakeup_all(vcpu
);
2185 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2187 vcpu
->arch
.pv_time_enabled
= false;
2190 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2192 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2195 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2196 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2199 vcpu
->arch
.st
.steal
.preempted
= 0;
2201 if (vcpu
->arch
.st
.steal
.version
& 1)
2202 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2204 vcpu
->arch
.st
.steal
.version
+= 1;
2206 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2207 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2211 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2212 vcpu
->arch
.st
.last_steal
;
2213 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2215 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2216 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2220 vcpu
->arch
.st
.steal
.version
+= 1;
2222 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2223 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2226 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2229 u32 msr
= msr_info
->index
;
2230 u64 data
= msr_info
->data
;
2233 case MSR_AMD64_NB_CFG
:
2234 case MSR_IA32_UCODE_REV
:
2235 case MSR_IA32_UCODE_WRITE
:
2236 case MSR_VM_HSAVE_PA
:
2237 case MSR_AMD64_PATCH_LOADER
:
2238 case MSR_AMD64_BU_CFG2
:
2239 case MSR_AMD64_DC_CFG
:
2243 return set_efer(vcpu
, data
);
2245 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2246 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2247 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2248 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2250 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2255 case MSR_FAM10H_MMIO_CONF_BASE
:
2257 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2262 case MSR_IA32_DEBUGCTLMSR
:
2264 /* We support the non-activated case already */
2266 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2267 /* Values other than LBR and BTF are vendor-specific,
2268 thus reserved and should throw a #GP */
2271 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2274 case 0x200 ... 0x2ff:
2275 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2276 case MSR_IA32_APICBASE
:
2277 return kvm_set_apic_base(vcpu
, msr_info
);
2278 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2279 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2280 case MSR_IA32_TSCDEADLINE
:
2281 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2283 case MSR_IA32_TSC_ADJUST
:
2284 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2285 if (!msr_info
->host_initiated
) {
2286 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2287 adjust_tsc_offset_guest(vcpu
, adj
);
2289 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2292 case MSR_IA32_MISC_ENABLE
:
2293 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2295 case MSR_IA32_SMBASE
:
2296 if (!msr_info
->host_initiated
)
2298 vcpu
->arch
.smbase
= data
;
2301 kvm_write_tsc(vcpu
, msr_info
);
2303 case MSR_KVM_WALL_CLOCK_NEW
:
2304 case MSR_KVM_WALL_CLOCK
:
2305 vcpu
->kvm
->arch
.wall_clock
= data
;
2306 kvm_write_wall_clock(vcpu
->kvm
, data
);
2308 case MSR_KVM_SYSTEM_TIME_NEW
:
2309 case MSR_KVM_SYSTEM_TIME
: {
2310 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2312 kvmclock_reset(vcpu
);
2314 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2315 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2317 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2318 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2320 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2323 vcpu
->arch
.time
= data
;
2324 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2326 /* we verify if the enable bit is set... */
2330 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2331 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2332 sizeof(struct pvclock_vcpu_time_info
)))
2333 vcpu
->arch
.pv_time_enabled
= false;
2335 vcpu
->arch
.pv_time_enabled
= true;
2339 case MSR_KVM_ASYNC_PF_EN
:
2340 if (kvm_pv_enable_async_pf(vcpu
, data
))
2343 case MSR_KVM_STEAL_TIME
:
2345 if (unlikely(!sched_info_on()))
2348 if (data
& KVM_STEAL_RESERVED_MASK
)
2351 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2352 data
& KVM_STEAL_VALID_BITS
,
2353 sizeof(struct kvm_steal_time
)))
2356 vcpu
->arch
.st
.msr_val
= data
;
2358 if (!(data
& KVM_MSR_ENABLED
))
2361 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2364 case MSR_KVM_PV_EOI_EN
:
2365 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2369 case MSR_IA32_MCG_CTL
:
2370 case MSR_IA32_MCG_STATUS
:
2371 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2372 return set_msr_mce(vcpu
, msr_info
);
2374 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2375 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2376 pr
= true; /* fall through */
2377 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2378 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2379 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2380 return kvm_pmu_set_msr(vcpu
, msr_info
);
2382 if (pr
|| data
!= 0)
2383 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2384 "0x%x data 0x%llx\n", msr
, data
);
2386 case MSR_K7_CLK_CTL
:
2388 * Ignore all writes to this no longer documented MSR.
2389 * Writes are only relevant for old K7 processors,
2390 * all pre-dating SVM, but a recommended workaround from
2391 * AMD for these chips. It is possible to specify the
2392 * affected processor models on the command line, hence
2393 * the need to ignore the workaround.
2396 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2397 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2398 case HV_X64_MSR_CRASH_CTL
:
2399 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2400 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2401 msr_info
->host_initiated
);
2402 case MSR_IA32_BBL_CR_CTL3
:
2403 /* Drop writes to this legacy MSR -- see rdmsr
2404 * counterpart for further detail.
2406 if (report_ignored_msrs
)
2407 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2410 case MSR_AMD64_OSVW_ID_LENGTH
:
2411 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2413 vcpu
->arch
.osvw
.length
= data
;
2415 case MSR_AMD64_OSVW_STATUS
:
2416 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2418 vcpu
->arch
.osvw
.status
= data
;
2420 case MSR_PLATFORM_INFO
:
2421 if (!msr_info
->host_initiated
||
2422 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2423 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2424 cpuid_fault_enabled(vcpu
)))
2426 vcpu
->arch
.msr_platform_info
= data
;
2428 case MSR_MISC_FEATURES_ENABLES
:
2429 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2430 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2431 !supports_cpuid_fault(vcpu
)))
2433 vcpu
->arch
.msr_misc_features_enables
= data
;
2436 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2437 return xen_hvm_config(vcpu
, data
);
2438 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2439 return kvm_pmu_set_msr(vcpu
, msr_info
);
2441 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2445 if (report_ignored_msrs
)
2447 "ignored wrmsr: 0x%x data 0x%llx\n",
2454 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2458 * Reads an msr value (of 'msr_index') into 'pdata'.
2459 * Returns 0 on success, non-0 otherwise.
2460 * Assumes vcpu_load() was already called.
2462 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2464 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2466 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2468 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2471 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2472 unsigned bank_num
= mcg_cap
& 0xff;
2475 case MSR_IA32_P5_MC_ADDR
:
2476 case MSR_IA32_P5_MC_TYPE
:
2479 case MSR_IA32_MCG_CAP
:
2480 data
= vcpu
->arch
.mcg_cap
;
2482 case MSR_IA32_MCG_CTL
:
2483 if (!(mcg_cap
& MCG_CTL_P
))
2485 data
= vcpu
->arch
.mcg_ctl
;
2487 case MSR_IA32_MCG_STATUS
:
2488 data
= vcpu
->arch
.mcg_status
;
2491 if (msr
>= MSR_IA32_MC0_CTL
&&
2492 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2493 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2494 data
= vcpu
->arch
.mce_banks
[offset
];
2503 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2505 switch (msr_info
->index
) {
2506 case MSR_IA32_PLATFORM_ID
:
2507 case MSR_IA32_EBL_CR_POWERON
:
2508 case MSR_IA32_DEBUGCTLMSR
:
2509 case MSR_IA32_LASTBRANCHFROMIP
:
2510 case MSR_IA32_LASTBRANCHTOIP
:
2511 case MSR_IA32_LASTINTFROMIP
:
2512 case MSR_IA32_LASTINTTOIP
:
2514 case MSR_K8_TSEG_ADDR
:
2515 case MSR_K8_TSEG_MASK
:
2517 case MSR_VM_HSAVE_PA
:
2518 case MSR_K8_INT_PENDING_MSG
:
2519 case MSR_AMD64_NB_CFG
:
2520 case MSR_FAM10H_MMIO_CONF_BASE
:
2521 case MSR_AMD64_BU_CFG2
:
2522 case MSR_IA32_PERF_CTL
:
2523 case MSR_AMD64_DC_CFG
:
2526 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2527 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2528 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2529 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2530 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2531 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2534 case MSR_IA32_UCODE_REV
:
2535 msr_info
->data
= 0x100000000ULL
;
2538 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + vcpu
->arch
.tsc_offset
;
2541 case 0x200 ... 0x2ff:
2542 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2543 case 0xcd: /* fsb frequency */
2547 * MSR_EBC_FREQUENCY_ID
2548 * Conservative value valid for even the basic CPU models.
2549 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2550 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2551 * and 266MHz for model 3, or 4. Set Core Clock
2552 * Frequency to System Bus Frequency Ratio to 1 (bits
2553 * 31:24) even though these are only valid for CPU
2554 * models > 2, however guests may end up dividing or
2555 * multiplying by zero otherwise.
2557 case MSR_EBC_FREQUENCY_ID
:
2558 msr_info
->data
= 1 << 24;
2560 case MSR_IA32_APICBASE
:
2561 msr_info
->data
= kvm_get_apic_base(vcpu
);
2563 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2564 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2566 case MSR_IA32_TSCDEADLINE
:
2567 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2569 case MSR_IA32_TSC_ADJUST
:
2570 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2572 case MSR_IA32_MISC_ENABLE
:
2573 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2575 case MSR_IA32_SMBASE
:
2576 if (!msr_info
->host_initiated
)
2578 msr_info
->data
= vcpu
->arch
.smbase
;
2580 case MSR_IA32_PERF_STATUS
:
2581 /* TSC increment by tick */
2582 msr_info
->data
= 1000ULL;
2583 /* CPU multiplier */
2584 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2587 msr_info
->data
= vcpu
->arch
.efer
;
2589 case MSR_KVM_WALL_CLOCK
:
2590 case MSR_KVM_WALL_CLOCK_NEW
:
2591 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2593 case MSR_KVM_SYSTEM_TIME
:
2594 case MSR_KVM_SYSTEM_TIME_NEW
:
2595 msr_info
->data
= vcpu
->arch
.time
;
2597 case MSR_KVM_ASYNC_PF_EN
:
2598 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2600 case MSR_KVM_STEAL_TIME
:
2601 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2603 case MSR_KVM_PV_EOI_EN
:
2604 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2606 case MSR_IA32_P5_MC_ADDR
:
2607 case MSR_IA32_P5_MC_TYPE
:
2608 case MSR_IA32_MCG_CAP
:
2609 case MSR_IA32_MCG_CTL
:
2610 case MSR_IA32_MCG_STATUS
:
2611 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2612 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2613 case MSR_K7_CLK_CTL
:
2615 * Provide expected ramp-up count for K7. All other
2616 * are set to zero, indicating minimum divisors for
2619 * This prevents guest kernels on AMD host with CPU
2620 * type 6, model 8 and higher from exploding due to
2621 * the rdmsr failing.
2623 msr_info
->data
= 0x20000000;
2625 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2626 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2627 case HV_X64_MSR_CRASH_CTL
:
2628 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2629 return kvm_hv_get_msr_common(vcpu
,
2630 msr_info
->index
, &msr_info
->data
);
2632 case MSR_IA32_BBL_CR_CTL3
:
2633 /* This legacy MSR exists but isn't fully documented in current
2634 * silicon. It is however accessed by winxp in very narrow
2635 * scenarios where it sets bit #19, itself documented as
2636 * a "reserved" bit. Best effort attempt to source coherent
2637 * read data here should the balance of the register be
2638 * interpreted by the guest:
2640 * L2 cache control register 3: 64GB range, 256KB size,
2641 * enabled, latency 0x1, configured
2643 msr_info
->data
= 0xbe702111;
2645 case MSR_AMD64_OSVW_ID_LENGTH
:
2646 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2648 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2650 case MSR_AMD64_OSVW_STATUS
:
2651 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2653 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2655 case MSR_PLATFORM_INFO
:
2656 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2658 case MSR_MISC_FEATURES_ENABLES
:
2659 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2662 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2663 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2665 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2669 if (report_ignored_msrs
)
2670 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2678 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2681 * Read or write a bunch of msrs. All parameters are kernel addresses.
2683 * @return number of msrs set successfully.
2685 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2686 struct kvm_msr_entry
*entries
,
2687 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2688 unsigned index
, u64
*data
))
2692 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2693 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2700 * Read or write a bunch of msrs. Parameters are user addresses.
2702 * @return number of msrs set successfully.
2704 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2705 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2706 unsigned index
, u64
*data
),
2709 struct kvm_msrs msrs
;
2710 struct kvm_msr_entry
*entries
;
2715 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2719 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2722 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2723 entries
= memdup_user(user_msrs
->entries
, size
);
2724 if (IS_ERR(entries
)) {
2725 r
= PTR_ERR(entries
);
2729 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2734 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2745 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2750 case KVM_CAP_IRQCHIP
:
2752 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2753 case KVM_CAP_SET_TSS_ADDR
:
2754 case KVM_CAP_EXT_CPUID
:
2755 case KVM_CAP_EXT_EMUL_CPUID
:
2756 case KVM_CAP_CLOCKSOURCE
:
2758 case KVM_CAP_NOP_IO_DELAY
:
2759 case KVM_CAP_MP_STATE
:
2760 case KVM_CAP_SYNC_MMU
:
2761 case KVM_CAP_USER_NMI
:
2762 case KVM_CAP_REINJECT_CONTROL
:
2763 case KVM_CAP_IRQ_INJECT_STATUS
:
2764 case KVM_CAP_IOEVENTFD
:
2765 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2767 case KVM_CAP_PIT_STATE2
:
2768 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2769 case KVM_CAP_XEN_HVM
:
2770 case KVM_CAP_VCPU_EVENTS
:
2771 case KVM_CAP_HYPERV
:
2772 case KVM_CAP_HYPERV_VAPIC
:
2773 case KVM_CAP_HYPERV_SPIN
:
2774 case KVM_CAP_HYPERV_SYNIC
:
2775 case KVM_CAP_HYPERV_SYNIC2
:
2776 case KVM_CAP_HYPERV_VP_INDEX
:
2777 case KVM_CAP_PCI_SEGMENT
:
2778 case KVM_CAP_DEBUGREGS
:
2779 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2781 case KVM_CAP_ASYNC_PF
:
2782 case KVM_CAP_GET_TSC_KHZ
:
2783 case KVM_CAP_KVMCLOCK_CTRL
:
2784 case KVM_CAP_READONLY_MEM
:
2785 case KVM_CAP_HYPERV_TIME
:
2786 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2787 case KVM_CAP_TSC_DEADLINE_TIMER
:
2788 case KVM_CAP_ENABLE_CAP_VM
:
2789 case KVM_CAP_DISABLE_QUIRKS
:
2790 case KVM_CAP_SET_BOOT_CPU_ID
:
2791 case KVM_CAP_SPLIT_IRQCHIP
:
2792 case KVM_CAP_IMMEDIATE_EXIT
:
2793 case KVM_CAP_GET_MSR_FEATURES
:
2796 case KVM_CAP_ADJUST_CLOCK
:
2797 r
= KVM_CLOCK_TSC_STABLE
;
2799 case KVM_CAP_X86_GUEST_MWAIT
:
2800 r
= kvm_mwait_in_guest();
2802 case KVM_CAP_X86_SMM
:
2803 /* SMBASE is usually relocated above 1M on modern chipsets,
2804 * and SMM handlers might indeed rely on 4G segment limits,
2805 * so do not report SMM to be available if real mode is
2806 * emulated via vm86 mode. Still, do not go to great lengths
2807 * to avoid userspace's usage of the feature, because it is a
2808 * fringe case that is not enabled except via specific settings
2809 * of the module parameters.
2811 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
2814 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2816 case KVM_CAP_NR_VCPUS
:
2817 r
= KVM_SOFT_MAX_VCPUS
;
2819 case KVM_CAP_MAX_VCPUS
:
2822 case KVM_CAP_NR_MEMSLOTS
:
2823 r
= KVM_USER_MEM_SLOTS
;
2825 case KVM_CAP_PV_MMU
: /* obsolete */
2829 r
= KVM_MAX_MCE_BANKS
;
2832 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2834 case KVM_CAP_TSC_CONTROL
:
2835 r
= kvm_has_tsc_control
;
2837 case KVM_CAP_X2APIC_API
:
2838 r
= KVM_X2APIC_API_VALID_FLAGS
;
2848 long kvm_arch_dev_ioctl(struct file
*filp
,
2849 unsigned int ioctl
, unsigned long arg
)
2851 void __user
*argp
= (void __user
*)arg
;
2855 case KVM_GET_MSR_INDEX_LIST
: {
2856 struct kvm_msr_list __user
*user_msr_list
= argp
;
2857 struct kvm_msr_list msr_list
;
2861 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2864 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2865 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2868 if (n
< msr_list
.nmsrs
)
2871 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2872 num_msrs_to_save
* sizeof(u32
)))
2874 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2876 num_emulated_msrs
* sizeof(u32
)))
2881 case KVM_GET_SUPPORTED_CPUID
:
2882 case KVM_GET_EMULATED_CPUID
: {
2883 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2884 struct kvm_cpuid2 cpuid
;
2887 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2890 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2896 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2901 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2903 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2904 sizeof(kvm_mce_cap_supported
)))
2908 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
2909 struct kvm_msr_list __user
*user_msr_list
= argp
;
2910 struct kvm_msr_list msr_list
;
2914 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
2917 msr_list
.nmsrs
= num_msr_based_features
;
2918 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
2921 if (n
< msr_list
.nmsrs
)
2924 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
2925 num_msr_based_features
* sizeof(u32
)))
2931 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
2941 static void wbinvd_ipi(void *garbage
)
2946 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2948 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2951 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2953 /* Address WBINVD may be executed by guest */
2954 if (need_emulate_wbinvd(vcpu
)) {
2955 if (kvm_x86_ops
->has_wbinvd_exit())
2956 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2957 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2958 smp_call_function_single(vcpu
->cpu
,
2959 wbinvd_ipi
, NULL
, 1);
2962 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2964 /* Apply any externally detected TSC adjustments (due to suspend) */
2965 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2966 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2967 vcpu
->arch
.tsc_offset_adjustment
= 0;
2968 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2971 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2972 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2973 rdtsc() - vcpu
->arch
.last_host_tsc
;
2975 mark_tsc_unstable("KVM discovered backwards TSC");
2977 if (check_tsc_unstable()) {
2978 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2979 vcpu
->arch
.last_guest_tsc
);
2980 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2981 vcpu
->arch
.tsc_catchup
= 1;
2984 if (kvm_lapic_hv_timer_in_use(vcpu
))
2985 kvm_lapic_restart_hv_timer(vcpu
);
2988 * On a host with synchronized TSC, there is no need to update
2989 * kvmclock on vcpu->cpu migration
2991 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2992 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2993 if (vcpu
->cpu
!= cpu
)
2994 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2998 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3001 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3003 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3006 vcpu
->arch
.st
.steal
.preempted
= 1;
3008 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3009 &vcpu
->arch
.st
.steal
.preempted
,
3010 offsetof(struct kvm_steal_time
, preempted
),
3011 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3014 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3018 if (vcpu
->preempted
)
3019 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3022 * Disable page faults because we're in atomic context here.
3023 * kvm_write_guest_offset_cached() would call might_fault()
3024 * that relies on pagefault_disable() to tell if there's a
3025 * bug. NOTE: the write to guest memory may not go through if
3026 * during postcopy live migration or if there's heavy guest
3029 pagefault_disable();
3031 * kvm_memslots() will be called by
3032 * kvm_write_guest_offset_cached() so take the srcu lock.
3034 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3035 kvm_steal_time_set_preempted(vcpu
);
3036 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3038 kvm_x86_ops
->vcpu_put(vcpu
);
3039 vcpu
->arch
.last_host_tsc
= rdtsc();
3041 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3042 * on every vmexit, but if not, we might have a stale dr6 from the
3043 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3048 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3049 struct kvm_lapic_state
*s
)
3051 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
3052 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3054 return kvm_apic_get_state(vcpu
, s
);
3057 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3058 struct kvm_lapic_state
*s
)
3062 r
= kvm_apic_set_state(vcpu
, s
);
3065 update_cr8_intercept(vcpu
);
3070 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3072 return (!lapic_in_kernel(vcpu
) ||
3073 kvm_apic_accept_pic_intr(vcpu
));
3077 * if userspace requested an interrupt window, check that the
3078 * interrupt window is open.
3080 * No need to exit to userspace if we already have an interrupt queued.
3082 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3084 return kvm_arch_interrupt_allowed(vcpu
) &&
3085 !kvm_cpu_has_interrupt(vcpu
) &&
3086 !kvm_event_needs_reinjection(vcpu
) &&
3087 kvm_cpu_accept_dm_intr(vcpu
);
3090 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3091 struct kvm_interrupt
*irq
)
3093 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3096 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3097 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3098 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3103 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3104 * fail for in-kernel 8259.
3106 if (pic_in_kernel(vcpu
->kvm
))
3109 if (vcpu
->arch
.pending_external_vector
!= -1)
3112 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3113 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3117 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3119 kvm_inject_nmi(vcpu
);
3124 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3126 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3131 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3132 struct kvm_tpr_access_ctl
*tac
)
3136 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3140 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3144 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3147 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3149 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3152 vcpu
->arch
.mcg_cap
= mcg_cap
;
3153 /* Init IA32_MCG_CTL to all 1s */
3154 if (mcg_cap
& MCG_CTL_P
)
3155 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3156 /* Init IA32_MCi_CTL to all 1s */
3157 for (bank
= 0; bank
< bank_num
; bank
++)
3158 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3160 if (kvm_x86_ops
->setup_mce
)
3161 kvm_x86_ops
->setup_mce(vcpu
);
3166 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3167 struct kvm_x86_mce
*mce
)
3169 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3170 unsigned bank_num
= mcg_cap
& 0xff;
3171 u64
*banks
= vcpu
->arch
.mce_banks
;
3173 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3176 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3177 * reporting is disabled
3179 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3180 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3182 banks
+= 4 * mce
->bank
;
3184 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3185 * reporting is disabled for the bank
3187 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3189 if (mce
->status
& MCI_STATUS_UC
) {
3190 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3191 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3192 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3195 if (banks
[1] & MCI_STATUS_VAL
)
3196 mce
->status
|= MCI_STATUS_OVER
;
3197 banks
[2] = mce
->addr
;
3198 banks
[3] = mce
->misc
;
3199 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3200 banks
[1] = mce
->status
;
3201 kvm_queue_exception(vcpu
, MC_VECTOR
);
3202 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3203 || !(banks
[1] & MCI_STATUS_UC
)) {
3204 if (banks
[1] & MCI_STATUS_VAL
)
3205 mce
->status
|= MCI_STATUS_OVER
;
3206 banks
[2] = mce
->addr
;
3207 banks
[3] = mce
->misc
;
3208 banks
[1] = mce
->status
;
3210 banks
[1] |= MCI_STATUS_OVER
;
3214 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3215 struct kvm_vcpu_events
*events
)
3219 * FIXME: pass injected and pending separately. This is only
3220 * needed for nested virtualization, whose state cannot be
3221 * migrated yet. For now we can combine them.
3223 events
->exception
.injected
=
3224 (vcpu
->arch
.exception
.pending
||
3225 vcpu
->arch
.exception
.injected
) &&
3226 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3227 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3228 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3229 events
->exception
.pad
= 0;
3230 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3232 events
->interrupt
.injected
=
3233 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3234 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3235 events
->interrupt
.soft
= 0;
3236 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3238 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3239 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3240 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3241 events
->nmi
.pad
= 0;
3243 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3245 events
->smi
.smm
= is_smm(vcpu
);
3246 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3247 events
->smi
.smm_inside_nmi
=
3248 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3249 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3251 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3252 | KVM_VCPUEVENT_VALID_SHADOW
3253 | KVM_VCPUEVENT_VALID_SMM
);
3254 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3257 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3259 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3260 struct kvm_vcpu_events
*events
)
3262 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3263 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3264 | KVM_VCPUEVENT_VALID_SHADOW
3265 | KVM_VCPUEVENT_VALID_SMM
))
3268 if (events
->exception
.injected
&&
3269 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3270 is_guest_mode(vcpu
)))
3273 /* INITs are latched while in SMM */
3274 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3275 (events
->smi
.smm
|| events
->smi
.pending
) &&
3276 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3280 vcpu
->arch
.exception
.injected
= false;
3281 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3282 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3283 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3284 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3286 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3287 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3288 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3289 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3290 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3291 events
->interrupt
.shadow
);
3293 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3294 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3295 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3296 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3298 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3299 lapic_in_kernel(vcpu
))
3300 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3302 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3303 u32 hflags
= vcpu
->arch
.hflags
;
3304 if (events
->smi
.smm
)
3305 hflags
|= HF_SMM_MASK
;
3307 hflags
&= ~HF_SMM_MASK
;
3308 kvm_set_hflags(vcpu
, hflags
);
3310 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3312 if (events
->smi
.smm
) {
3313 if (events
->smi
.smm_inside_nmi
)
3314 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3316 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3317 if (lapic_in_kernel(vcpu
)) {
3318 if (events
->smi
.latched_init
)
3319 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3321 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3326 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3331 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3332 struct kvm_debugregs
*dbgregs
)
3336 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3337 kvm_get_dr(vcpu
, 6, &val
);
3339 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3341 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3344 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3345 struct kvm_debugregs
*dbgregs
)
3350 if (dbgregs
->dr6
& ~0xffffffffull
)
3352 if (dbgregs
->dr7
& ~0xffffffffull
)
3355 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3356 kvm_update_dr0123(vcpu
);
3357 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3358 kvm_update_dr6(vcpu
);
3359 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3360 kvm_update_dr7(vcpu
);
3365 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3367 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3369 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3370 u64 xstate_bv
= xsave
->header
.xfeatures
;
3374 * Copy legacy XSAVE area, to avoid complications with CPUID
3375 * leaves 0 and 1 in the loop below.
3377 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3380 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3381 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3384 * Copy each region from the possibly compacted offset to the
3385 * non-compacted offset.
3387 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3389 u64 feature
= valid
& -valid
;
3390 int index
= fls64(feature
) - 1;
3391 void *src
= get_xsave_addr(xsave
, feature
);
3394 u32 size
, offset
, ecx
, edx
;
3395 cpuid_count(XSTATE_CPUID
, index
,
3396 &size
, &offset
, &ecx
, &edx
);
3397 if (feature
== XFEATURE_MASK_PKRU
)
3398 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3399 sizeof(vcpu
->arch
.pkru
));
3401 memcpy(dest
+ offset
, src
, size
);
3409 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3411 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3412 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3416 * Copy legacy XSAVE area, to avoid complications with CPUID
3417 * leaves 0 and 1 in the loop below.
3419 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3421 /* Set XSTATE_BV and possibly XCOMP_BV. */
3422 xsave
->header
.xfeatures
= xstate_bv
;
3423 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3424 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3427 * Copy each region from the non-compacted offset to the
3428 * possibly compacted offset.
3430 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3432 u64 feature
= valid
& -valid
;
3433 int index
= fls64(feature
) - 1;
3434 void *dest
= get_xsave_addr(xsave
, feature
);
3437 u32 size
, offset
, ecx
, edx
;
3438 cpuid_count(XSTATE_CPUID
, index
,
3439 &size
, &offset
, &ecx
, &edx
);
3440 if (feature
== XFEATURE_MASK_PKRU
)
3441 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3442 sizeof(vcpu
->arch
.pkru
));
3444 memcpy(dest
, src
+ offset
, size
);
3451 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3452 struct kvm_xsave
*guest_xsave
)
3454 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3455 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3456 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3458 memcpy(guest_xsave
->region
,
3459 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3460 sizeof(struct fxregs_state
));
3461 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3462 XFEATURE_MASK_FPSSE
;
3466 #define XSAVE_MXCSR_OFFSET 24
3468 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3469 struct kvm_xsave
*guest_xsave
)
3472 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3473 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3475 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3477 * Here we allow setting states that are not present in
3478 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3479 * with old userspace.
3481 if (xstate_bv
& ~kvm_supported_xcr0() ||
3482 mxcsr
& ~mxcsr_feature_mask
)
3484 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3486 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3487 mxcsr
& ~mxcsr_feature_mask
)
3489 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3490 guest_xsave
->region
, sizeof(struct fxregs_state
));
3495 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3496 struct kvm_xcrs
*guest_xcrs
)
3498 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3499 guest_xcrs
->nr_xcrs
= 0;
3503 guest_xcrs
->nr_xcrs
= 1;
3504 guest_xcrs
->flags
= 0;
3505 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3506 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3509 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3510 struct kvm_xcrs
*guest_xcrs
)
3514 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3517 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3520 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3521 /* Only support XCR0 currently */
3522 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3523 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3524 guest_xcrs
->xcrs
[i
].value
);
3533 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3534 * stopped by the hypervisor. This function will be called from the host only.
3535 * EINVAL is returned when the host attempts to set the flag for a guest that
3536 * does not support pv clocks.
3538 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3540 if (!vcpu
->arch
.pv_time_enabled
)
3542 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3543 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3547 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3548 struct kvm_enable_cap
*cap
)
3554 case KVM_CAP_HYPERV_SYNIC2
:
3557 case KVM_CAP_HYPERV_SYNIC
:
3558 if (!irqchip_in_kernel(vcpu
->kvm
))
3560 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3561 KVM_CAP_HYPERV_SYNIC2
);
3567 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3568 unsigned int ioctl
, unsigned long arg
)
3570 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3571 void __user
*argp
= (void __user
*)arg
;
3574 struct kvm_lapic_state
*lapic
;
3575 struct kvm_xsave
*xsave
;
3576 struct kvm_xcrs
*xcrs
;
3582 case KVM_GET_LAPIC
: {
3584 if (!lapic_in_kernel(vcpu
))
3586 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3591 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3595 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3600 case KVM_SET_LAPIC
: {
3602 if (!lapic_in_kernel(vcpu
))
3604 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3605 if (IS_ERR(u
.lapic
))
3606 return PTR_ERR(u
.lapic
);
3608 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3611 case KVM_INTERRUPT
: {
3612 struct kvm_interrupt irq
;
3615 if (copy_from_user(&irq
, argp
, sizeof irq
))
3617 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3621 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3625 r
= kvm_vcpu_ioctl_smi(vcpu
);
3628 case KVM_SET_CPUID
: {
3629 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3630 struct kvm_cpuid cpuid
;
3633 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3635 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3638 case KVM_SET_CPUID2
: {
3639 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3640 struct kvm_cpuid2 cpuid
;
3643 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3645 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3646 cpuid_arg
->entries
);
3649 case KVM_GET_CPUID2
: {
3650 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3651 struct kvm_cpuid2 cpuid
;
3654 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3656 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3657 cpuid_arg
->entries
);
3661 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3666 case KVM_GET_MSRS
: {
3667 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3668 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3669 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3672 case KVM_SET_MSRS
: {
3673 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3674 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3675 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3678 case KVM_TPR_ACCESS_REPORTING
: {
3679 struct kvm_tpr_access_ctl tac
;
3682 if (copy_from_user(&tac
, argp
, sizeof tac
))
3684 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3688 if (copy_to_user(argp
, &tac
, sizeof tac
))
3693 case KVM_SET_VAPIC_ADDR
: {
3694 struct kvm_vapic_addr va
;
3698 if (!lapic_in_kernel(vcpu
))
3701 if (copy_from_user(&va
, argp
, sizeof va
))
3703 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3704 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3705 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3708 case KVM_X86_SETUP_MCE
: {
3712 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3714 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3717 case KVM_X86_SET_MCE
: {
3718 struct kvm_x86_mce mce
;
3721 if (copy_from_user(&mce
, argp
, sizeof mce
))
3723 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3726 case KVM_GET_VCPU_EVENTS
: {
3727 struct kvm_vcpu_events events
;
3729 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3732 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3737 case KVM_SET_VCPU_EVENTS
: {
3738 struct kvm_vcpu_events events
;
3741 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3744 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3747 case KVM_GET_DEBUGREGS
: {
3748 struct kvm_debugregs dbgregs
;
3750 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3753 if (copy_to_user(argp
, &dbgregs
,
3754 sizeof(struct kvm_debugregs
)))
3759 case KVM_SET_DEBUGREGS
: {
3760 struct kvm_debugregs dbgregs
;
3763 if (copy_from_user(&dbgregs
, argp
,
3764 sizeof(struct kvm_debugregs
)))
3767 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3770 case KVM_GET_XSAVE
: {
3771 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3776 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3779 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3784 case KVM_SET_XSAVE
: {
3785 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3786 if (IS_ERR(u
.xsave
))
3787 return PTR_ERR(u
.xsave
);
3789 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3792 case KVM_GET_XCRS
: {
3793 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3798 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3801 if (copy_to_user(argp
, u
.xcrs
,
3802 sizeof(struct kvm_xcrs
)))
3807 case KVM_SET_XCRS
: {
3808 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3810 return PTR_ERR(u
.xcrs
);
3812 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3815 case KVM_SET_TSC_KHZ
: {
3819 user_tsc_khz
= (u32
)arg
;
3821 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3824 if (user_tsc_khz
== 0)
3825 user_tsc_khz
= tsc_khz
;
3827 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3832 case KVM_GET_TSC_KHZ
: {
3833 r
= vcpu
->arch
.virtual_tsc_khz
;
3836 case KVM_KVMCLOCK_CTRL
: {
3837 r
= kvm_set_guest_paused(vcpu
);
3840 case KVM_ENABLE_CAP
: {
3841 struct kvm_enable_cap cap
;
3844 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3846 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3857 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3859 return VM_FAULT_SIGBUS
;
3862 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3866 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3868 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3872 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3875 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3879 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3880 u32 kvm_nr_mmu_pages
)
3882 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3885 mutex_lock(&kvm
->slots_lock
);
3887 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3888 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3890 mutex_unlock(&kvm
->slots_lock
);
3894 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3896 return kvm
->arch
.n_max_mmu_pages
;
3899 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3901 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3905 switch (chip
->chip_id
) {
3906 case KVM_IRQCHIP_PIC_MASTER
:
3907 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3908 sizeof(struct kvm_pic_state
));
3910 case KVM_IRQCHIP_PIC_SLAVE
:
3911 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3912 sizeof(struct kvm_pic_state
));
3914 case KVM_IRQCHIP_IOAPIC
:
3915 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3924 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3926 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3930 switch (chip
->chip_id
) {
3931 case KVM_IRQCHIP_PIC_MASTER
:
3932 spin_lock(&pic
->lock
);
3933 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3934 sizeof(struct kvm_pic_state
));
3935 spin_unlock(&pic
->lock
);
3937 case KVM_IRQCHIP_PIC_SLAVE
:
3938 spin_lock(&pic
->lock
);
3939 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3940 sizeof(struct kvm_pic_state
));
3941 spin_unlock(&pic
->lock
);
3943 case KVM_IRQCHIP_IOAPIC
:
3944 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3950 kvm_pic_update_irq(pic
);
3954 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3956 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3958 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3960 mutex_lock(&kps
->lock
);
3961 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3962 mutex_unlock(&kps
->lock
);
3966 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3969 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3971 mutex_lock(&pit
->pit_state
.lock
);
3972 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3973 for (i
= 0; i
< 3; i
++)
3974 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3975 mutex_unlock(&pit
->pit_state
.lock
);
3979 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3981 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3982 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3983 sizeof(ps
->channels
));
3984 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3985 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3986 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3990 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3994 u32 prev_legacy
, cur_legacy
;
3995 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3997 mutex_lock(&pit
->pit_state
.lock
);
3998 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3999 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4000 if (!prev_legacy
&& cur_legacy
)
4002 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4003 sizeof(pit
->pit_state
.channels
));
4004 pit
->pit_state
.flags
= ps
->flags
;
4005 for (i
= 0; i
< 3; i
++)
4006 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4008 mutex_unlock(&pit
->pit_state
.lock
);
4012 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4013 struct kvm_reinject_control
*control
)
4015 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4020 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4021 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4022 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4024 mutex_lock(&pit
->pit_state
.lock
);
4025 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4026 mutex_unlock(&pit
->pit_state
.lock
);
4032 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4033 * @kvm: kvm instance
4034 * @log: slot id and address to which we copy the log
4036 * Steps 1-4 below provide general overview of dirty page logging. See
4037 * kvm_get_dirty_log_protect() function description for additional details.
4039 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4040 * always flush the TLB (step 4) even if previous step failed and the dirty
4041 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4042 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4043 * writes will be marked dirty for next log read.
4045 * 1. Take a snapshot of the bit and clear it if needed.
4046 * 2. Write protect the corresponding page.
4047 * 3. Copy the snapshot to the userspace.
4048 * 4. Flush TLB's if needed.
4050 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4052 bool is_dirty
= false;
4055 mutex_lock(&kvm
->slots_lock
);
4058 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4060 if (kvm_x86_ops
->flush_log_dirty
)
4061 kvm_x86_ops
->flush_log_dirty(kvm
);
4063 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4066 * All the TLBs can be flushed out of mmu lock, see the comments in
4067 * kvm_mmu_slot_remove_write_access().
4069 lockdep_assert_held(&kvm
->slots_lock
);
4071 kvm_flush_remote_tlbs(kvm
);
4073 mutex_unlock(&kvm
->slots_lock
);
4077 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4080 if (!irqchip_in_kernel(kvm
))
4083 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4084 irq_event
->irq
, irq_event
->level
,
4089 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4090 struct kvm_enable_cap
*cap
)
4098 case KVM_CAP_DISABLE_QUIRKS
:
4099 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4102 case KVM_CAP_SPLIT_IRQCHIP
: {
4103 mutex_lock(&kvm
->lock
);
4105 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4106 goto split_irqchip_unlock
;
4108 if (irqchip_in_kernel(kvm
))
4109 goto split_irqchip_unlock
;
4110 if (kvm
->created_vcpus
)
4111 goto split_irqchip_unlock
;
4112 r
= kvm_setup_empty_irq_routing(kvm
);
4114 goto split_irqchip_unlock
;
4115 /* Pairs with irqchip_in_kernel. */
4117 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4118 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4120 split_irqchip_unlock
:
4121 mutex_unlock(&kvm
->lock
);
4124 case KVM_CAP_X2APIC_API
:
4126 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4129 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4130 kvm
->arch
.x2apic_format
= true;
4131 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4132 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4143 long kvm_arch_vm_ioctl(struct file
*filp
,
4144 unsigned int ioctl
, unsigned long arg
)
4146 struct kvm
*kvm
= filp
->private_data
;
4147 void __user
*argp
= (void __user
*)arg
;
4150 * This union makes it completely explicit to gcc-3.x
4151 * that these two variables' stack usage should be
4152 * combined, not added together.
4155 struct kvm_pit_state ps
;
4156 struct kvm_pit_state2 ps2
;
4157 struct kvm_pit_config pit_config
;
4161 case KVM_SET_TSS_ADDR
:
4162 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4164 case KVM_SET_IDENTITY_MAP_ADDR
: {
4167 mutex_lock(&kvm
->lock
);
4169 if (kvm
->created_vcpus
)
4170 goto set_identity_unlock
;
4172 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4173 goto set_identity_unlock
;
4174 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4175 set_identity_unlock
:
4176 mutex_unlock(&kvm
->lock
);
4179 case KVM_SET_NR_MMU_PAGES
:
4180 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4182 case KVM_GET_NR_MMU_PAGES
:
4183 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4185 case KVM_CREATE_IRQCHIP
: {
4186 mutex_lock(&kvm
->lock
);
4189 if (irqchip_in_kernel(kvm
))
4190 goto create_irqchip_unlock
;
4193 if (kvm
->created_vcpus
)
4194 goto create_irqchip_unlock
;
4196 r
= kvm_pic_init(kvm
);
4198 goto create_irqchip_unlock
;
4200 r
= kvm_ioapic_init(kvm
);
4202 kvm_pic_destroy(kvm
);
4203 goto create_irqchip_unlock
;
4206 r
= kvm_setup_default_irq_routing(kvm
);
4208 kvm_ioapic_destroy(kvm
);
4209 kvm_pic_destroy(kvm
);
4210 goto create_irqchip_unlock
;
4212 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4214 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4215 create_irqchip_unlock
:
4216 mutex_unlock(&kvm
->lock
);
4219 case KVM_CREATE_PIT
:
4220 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4222 case KVM_CREATE_PIT2
:
4224 if (copy_from_user(&u
.pit_config
, argp
,
4225 sizeof(struct kvm_pit_config
)))
4228 mutex_lock(&kvm
->lock
);
4231 goto create_pit_unlock
;
4233 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4237 mutex_unlock(&kvm
->lock
);
4239 case KVM_GET_IRQCHIP
: {
4240 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4241 struct kvm_irqchip
*chip
;
4243 chip
= memdup_user(argp
, sizeof(*chip
));
4250 if (!irqchip_kernel(kvm
))
4251 goto get_irqchip_out
;
4252 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4254 goto get_irqchip_out
;
4256 if (copy_to_user(argp
, chip
, sizeof *chip
))
4257 goto get_irqchip_out
;
4263 case KVM_SET_IRQCHIP
: {
4264 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4265 struct kvm_irqchip
*chip
;
4267 chip
= memdup_user(argp
, sizeof(*chip
));
4274 if (!irqchip_kernel(kvm
))
4275 goto set_irqchip_out
;
4276 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4278 goto set_irqchip_out
;
4286 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4289 if (!kvm
->arch
.vpit
)
4291 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4295 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4302 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4305 if (!kvm
->arch
.vpit
)
4307 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4310 case KVM_GET_PIT2
: {
4312 if (!kvm
->arch
.vpit
)
4314 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4318 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4323 case KVM_SET_PIT2
: {
4325 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4328 if (!kvm
->arch
.vpit
)
4330 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4333 case KVM_REINJECT_CONTROL
: {
4334 struct kvm_reinject_control control
;
4336 if (copy_from_user(&control
, argp
, sizeof(control
)))
4338 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4341 case KVM_SET_BOOT_CPU_ID
:
4343 mutex_lock(&kvm
->lock
);
4344 if (kvm
->created_vcpus
)
4347 kvm
->arch
.bsp_vcpu_id
= arg
;
4348 mutex_unlock(&kvm
->lock
);
4350 case KVM_XEN_HVM_CONFIG
: {
4351 struct kvm_xen_hvm_config xhc
;
4353 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4358 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4362 case KVM_SET_CLOCK
: {
4363 struct kvm_clock_data user_ns
;
4367 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4376 * TODO: userspace has to take care of races with VCPU_RUN, so
4377 * kvm_gen_update_masterclock() can be cut down to locked
4378 * pvclock_update_vm_gtod_copy().
4380 kvm_gen_update_masterclock(kvm
);
4381 now_ns
= get_kvmclock_ns(kvm
);
4382 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4383 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4386 case KVM_GET_CLOCK
: {
4387 struct kvm_clock_data user_ns
;
4390 now_ns
= get_kvmclock_ns(kvm
);
4391 user_ns
.clock
= now_ns
;
4392 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4393 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4396 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4401 case KVM_ENABLE_CAP
: {
4402 struct kvm_enable_cap cap
;
4405 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4407 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4417 static void kvm_init_msr_list(void)
4422 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4423 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4427 * Even MSRs that are valid in the host may not be exposed
4428 * to the guests in some cases.
4430 switch (msrs_to_save
[i
]) {
4431 case MSR_IA32_BNDCFGS
:
4432 if (!kvm_x86_ops
->mpx_supported())
4436 if (!kvm_x86_ops
->rdtscp_supported())
4444 msrs_to_save
[j
] = msrs_to_save
[i
];
4447 num_msrs_to_save
= j
;
4449 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4450 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4454 emulated_msrs
[j
] = emulated_msrs
[i
];
4457 num_emulated_msrs
= j
;
4459 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4460 struct kvm_msr_entry msr
;
4462 msr
.index
= msr_based_features
[i
];
4463 if (kvm_get_msr_feature(&msr
))
4467 msr_based_features
[j
] = msr_based_features
[i
];
4470 num_msr_based_features
= j
;
4473 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4481 if (!(lapic_in_kernel(vcpu
) &&
4482 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4483 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4494 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4501 if (!(lapic_in_kernel(vcpu
) &&
4502 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4504 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4506 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4516 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4517 struct kvm_segment
*var
, int seg
)
4519 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4522 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4523 struct kvm_segment
*var
, int seg
)
4525 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4528 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4529 struct x86_exception
*exception
)
4533 BUG_ON(!mmu_is_nested(vcpu
));
4535 /* NPT walks are always user-walks */
4536 access
|= PFERR_USER_MASK
;
4537 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4542 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4543 struct x86_exception
*exception
)
4545 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4546 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4549 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4550 struct x86_exception
*exception
)
4552 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4553 access
|= PFERR_FETCH_MASK
;
4554 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4557 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4558 struct x86_exception
*exception
)
4560 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4561 access
|= PFERR_WRITE_MASK
;
4562 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4565 /* uses this to access any guest's mapped memory without checking CPL */
4566 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4567 struct x86_exception
*exception
)
4569 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4572 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4573 struct kvm_vcpu
*vcpu
, u32 access
,
4574 struct x86_exception
*exception
)
4577 int r
= X86EMUL_CONTINUE
;
4580 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4582 unsigned offset
= addr
& (PAGE_SIZE
-1);
4583 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4586 if (gpa
== UNMAPPED_GVA
)
4587 return X86EMUL_PROPAGATE_FAULT
;
4588 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4591 r
= X86EMUL_IO_NEEDED
;
4603 /* used for instruction fetching */
4604 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4605 gva_t addr
, void *val
, unsigned int bytes
,
4606 struct x86_exception
*exception
)
4608 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4609 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4613 /* Inline kvm_read_guest_virt_helper for speed. */
4614 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4616 if (unlikely(gpa
== UNMAPPED_GVA
))
4617 return X86EMUL_PROPAGATE_FAULT
;
4619 offset
= addr
& (PAGE_SIZE
-1);
4620 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4621 bytes
= (unsigned)PAGE_SIZE
- offset
;
4622 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4624 if (unlikely(ret
< 0))
4625 return X86EMUL_IO_NEEDED
;
4627 return X86EMUL_CONTINUE
;
4630 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
4631 gva_t addr
, void *val
, unsigned int bytes
,
4632 struct x86_exception
*exception
)
4634 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4637 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
4638 * is returned, but our callers are not ready for that and they blindly
4639 * call kvm_inject_page_fault. Ensure that they at least do not leak
4640 * uninitialized kernel stack memory into cr2 and error code.
4642 memset(exception
, 0, sizeof(*exception
));
4643 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4646 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4648 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
4649 gva_t addr
, void *val
, unsigned int bytes
,
4650 struct x86_exception
*exception
, bool system
)
4652 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4655 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4656 access
|= PFERR_USER_MASK
;
4658 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
4661 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4662 unsigned long addr
, void *val
, unsigned int bytes
)
4664 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4665 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4667 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4670 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4671 struct kvm_vcpu
*vcpu
, u32 access
,
4672 struct x86_exception
*exception
)
4675 int r
= X86EMUL_CONTINUE
;
4677 /* kvm_write_guest_virt_system can pull in tons of pages. */
4678 vcpu
->arch
.l1tf_flush_l1d
= true;
4681 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4684 unsigned offset
= addr
& (PAGE_SIZE
-1);
4685 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4688 if (gpa
== UNMAPPED_GVA
)
4689 return X86EMUL_PROPAGATE_FAULT
;
4690 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4692 r
= X86EMUL_IO_NEEDED
;
4704 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
4705 unsigned int bytes
, struct x86_exception
*exception
,
4708 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4709 u32 access
= PFERR_WRITE_MASK
;
4711 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
4712 access
|= PFERR_USER_MASK
;
4714 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4718 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
4719 unsigned int bytes
, struct x86_exception
*exception
)
4721 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
4722 PFERR_WRITE_MASK
, exception
);
4724 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4726 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4727 gpa_t gpa
, bool write
)
4729 /* For APIC access vmexit */
4730 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4733 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4734 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4741 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4742 gpa_t
*gpa
, struct x86_exception
*exception
,
4745 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4746 | (write
? PFERR_WRITE_MASK
: 0);
4749 * currently PKRU is only applied to ept enabled guest so
4750 * there is no pkey in EPT page table for L1 guest or EPT
4751 * shadow page table for L2 guest.
4753 if (vcpu_match_mmio_gva(vcpu
, gva
)
4754 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4755 vcpu
->arch
.access
, 0, access
)) {
4756 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4757 (gva
& (PAGE_SIZE
- 1));
4758 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4762 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4764 if (*gpa
== UNMAPPED_GVA
)
4767 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4770 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4771 const void *val
, int bytes
)
4775 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4778 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4782 struct read_write_emulator_ops
{
4783 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4785 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4786 void *val
, int bytes
);
4787 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4788 int bytes
, void *val
);
4789 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4790 void *val
, int bytes
);
4794 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4796 if (vcpu
->mmio_read_completed
) {
4797 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4798 vcpu
->mmio_fragments
[0].gpa
, val
);
4799 vcpu
->mmio_read_completed
= 0;
4806 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4807 void *val
, int bytes
)
4809 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4812 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4813 void *val
, int bytes
)
4815 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4818 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4820 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4821 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4824 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4825 void *val
, int bytes
)
4827 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4828 return X86EMUL_IO_NEEDED
;
4831 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4832 void *val
, int bytes
)
4834 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4836 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4837 return X86EMUL_CONTINUE
;
4840 static const struct read_write_emulator_ops read_emultor
= {
4841 .read_write_prepare
= read_prepare
,
4842 .read_write_emulate
= read_emulate
,
4843 .read_write_mmio
= vcpu_mmio_read
,
4844 .read_write_exit_mmio
= read_exit_mmio
,
4847 static const struct read_write_emulator_ops write_emultor
= {
4848 .read_write_emulate
= write_emulate
,
4849 .read_write_mmio
= write_mmio
,
4850 .read_write_exit_mmio
= write_exit_mmio
,
4854 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4856 struct x86_exception
*exception
,
4857 struct kvm_vcpu
*vcpu
,
4858 const struct read_write_emulator_ops
*ops
)
4862 bool write
= ops
->write
;
4863 struct kvm_mmio_fragment
*frag
;
4864 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4867 * If the exit was due to a NPF we may already have a GPA.
4868 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4869 * Note, this cannot be used on string operations since string
4870 * operation using rep will only have the initial GPA from the NPF
4873 if (vcpu
->arch
.gpa_available
&&
4874 emulator_can_use_gpa(ctxt
) &&
4875 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4876 gpa
= vcpu
->arch
.gpa_val
;
4877 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4879 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4881 return X86EMUL_PROPAGATE_FAULT
;
4884 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4885 return X86EMUL_CONTINUE
;
4888 * Is this MMIO handled locally?
4890 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4891 if (handled
== bytes
)
4892 return X86EMUL_CONTINUE
;
4898 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4899 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4903 return X86EMUL_CONTINUE
;
4906 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4908 void *val
, unsigned int bytes
,
4909 struct x86_exception
*exception
,
4910 const struct read_write_emulator_ops
*ops
)
4912 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4916 if (ops
->read_write_prepare
&&
4917 ops
->read_write_prepare(vcpu
, val
, bytes
))
4918 return X86EMUL_CONTINUE
;
4920 vcpu
->mmio_nr_fragments
= 0;
4922 /* Crossing a page boundary? */
4923 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4926 now
= -addr
& ~PAGE_MASK
;
4927 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4930 if (rc
!= X86EMUL_CONTINUE
)
4933 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4939 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4941 if (rc
!= X86EMUL_CONTINUE
)
4944 if (!vcpu
->mmio_nr_fragments
)
4947 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4949 vcpu
->mmio_needed
= 1;
4950 vcpu
->mmio_cur_fragment
= 0;
4952 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4953 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4954 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4955 vcpu
->run
->mmio
.phys_addr
= gpa
;
4957 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4960 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4964 struct x86_exception
*exception
)
4966 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4967 exception
, &read_emultor
);
4970 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4974 struct x86_exception
*exception
)
4976 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4977 exception
, &write_emultor
);
4980 #define CMPXCHG_TYPE(t, ptr, old, new) \
4981 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4983 #ifdef CONFIG_X86_64
4984 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4986 # define CMPXCHG64(ptr, old, new) \
4987 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4990 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4995 struct x86_exception
*exception
)
4997 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5003 /* guests cmpxchg8b have to be emulated atomically */
5004 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5007 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5009 if (gpa
== UNMAPPED_GVA
||
5010 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5013 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
5016 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
5017 if (is_error_page(page
))
5020 kaddr
= kmap_atomic(page
);
5021 kaddr
+= offset_in_page(gpa
);
5024 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5027 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5030 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5033 exchanged
= CMPXCHG64(kaddr
, old
, new);
5038 kunmap_atomic(kaddr
);
5039 kvm_release_page_dirty(page
);
5042 return X86EMUL_CMPXCHG_FAILED
;
5044 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
5045 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5047 return X86EMUL_CONTINUE
;
5050 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5052 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5055 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5059 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5060 if (vcpu
->arch
.pio
.in
)
5061 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5062 vcpu
->arch
.pio
.size
, pd
);
5064 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5065 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5069 pd
+= vcpu
->arch
.pio
.size
;
5074 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5075 unsigned short port
, void *val
,
5076 unsigned int count
, bool in
)
5078 vcpu
->arch
.pio
.port
= port
;
5079 vcpu
->arch
.pio
.in
= in
;
5080 vcpu
->arch
.pio
.count
= count
;
5081 vcpu
->arch
.pio
.size
= size
;
5083 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5084 vcpu
->arch
.pio
.count
= 0;
5088 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5089 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5090 vcpu
->run
->io
.size
= size
;
5091 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5092 vcpu
->run
->io
.count
= count
;
5093 vcpu
->run
->io
.port
= port
;
5098 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5099 int size
, unsigned short port
, void *val
,
5102 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5105 if (vcpu
->arch
.pio
.count
)
5108 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5110 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5113 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5114 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5115 vcpu
->arch
.pio
.count
= 0;
5122 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5123 int size
, unsigned short port
,
5124 const void *val
, unsigned int count
)
5126 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5128 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5129 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5130 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5133 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5135 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5138 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5140 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5143 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5145 if (!need_emulate_wbinvd(vcpu
))
5146 return X86EMUL_CONTINUE
;
5148 if (kvm_x86_ops
->has_wbinvd_exit()) {
5149 int cpu
= get_cpu();
5151 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5152 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5153 wbinvd_ipi
, NULL
, 1);
5155 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5158 return X86EMUL_CONTINUE
;
5161 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5163 kvm_emulate_wbinvd_noskip(vcpu
);
5164 return kvm_skip_emulated_instruction(vcpu
);
5166 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5170 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5172 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5175 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5176 unsigned long *dest
)
5178 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5181 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5182 unsigned long value
)
5185 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5188 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5190 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5193 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5195 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5196 unsigned long value
;
5200 value
= kvm_read_cr0(vcpu
);
5203 value
= vcpu
->arch
.cr2
;
5206 value
= kvm_read_cr3(vcpu
);
5209 value
= kvm_read_cr4(vcpu
);
5212 value
= kvm_get_cr8(vcpu
);
5215 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5222 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5224 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5229 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5232 vcpu
->arch
.cr2
= val
;
5235 res
= kvm_set_cr3(vcpu
, val
);
5238 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5241 res
= kvm_set_cr8(vcpu
, val
);
5244 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5251 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5253 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5256 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5258 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5261 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5263 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5266 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5268 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5271 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5273 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5276 static unsigned long emulator_get_cached_segment_base(
5277 struct x86_emulate_ctxt
*ctxt
, int seg
)
5279 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5282 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5283 struct desc_struct
*desc
, u32
*base3
,
5286 struct kvm_segment var
;
5288 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5289 *selector
= var
.selector
;
5292 memset(desc
, 0, sizeof(*desc
));
5300 set_desc_limit(desc
, var
.limit
);
5301 set_desc_base(desc
, (unsigned long)var
.base
);
5302 #ifdef CONFIG_X86_64
5304 *base3
= var
.base
>> 32;
5306 desc
->type
= var
.type
;
5308 desc
->dpl
= var
.dpl
;
5309 desc
->p
= var
.present
;
5310 desc
->avl
= var
.avl
;
5318 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5319 struct desc_struct
*desc
, u32 base3
,
5322 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5323 struct kvm_segment var
;
5325 var
.selector
= selector
;
5326 var
.base
= get_desc_base(desc
);
5327 #ifdef CONFIG_X86_64
5328 var
.base
|= ((u64
)base3
) << 32;
5330 var
.limit
= get_desc_limit(desc
);
5332 var
.limit
= (var
.limit
<< 12) | 0xfff;
5333 var
.type
= desc
->type
;
5334 var
.dpl
= desc
->dpl
;
5339 var
.avl
= desc
->avl
;
5340 var
.present
= desc
->p
;
5341 var
.unusable
= !var
.present
;
5344 kvm_set_segment(vcpu
, &var
, seg
);
5348 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5349 u32 msr_index
, u64
*pdata
)
5351 struct msr_data msr
;
5354 msr
.index
= msr_index
;
5355 msr
.host_initiated
= false;
5356 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5364 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5365 u32 msr_index
, u64 data
)
5367 struct msr_data msr
;
5370 msr
.index
= msr_index
;
5371 msr
.host_initiated
= false;
5372 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5375 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5377 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5379 return vcpu
->arch
.smbase
;
5382 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5384 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5386 vcpu
->arch
.smbase
= smbase
;
5389 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5392 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5395 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5396 u32 pmc
, u64
*pdata
)
5398 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5401 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5403 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5406 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5407 struct x86_instruction_info
*info
,
5408 enum x86_intercept_stage stage
)
5410 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5413 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5414 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5416 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5419 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5421 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5424 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5426 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5429 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5431 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5434 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5436 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5439 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5441 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5444 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5446 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5449 static const struct x86_emulate_ops emulate_ops
= {
5450 .read_gpr
= emulator_read_gpr
,
5451 .write_gpr
= emulator_write_gpr
,
5452 .read_std
= emulator_read_std
,
5453 .write_std
= emulator_write_std
,
5454 .read_phys
= kvm_read_guest_phys_system
,
5455 .fetch
= kvm_fetch_guest_virt
,
5456 .read_emulated
= emulator_read_emulated
,
5457 .write_emulated
= emulator_write_emulated
,
5458 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5459 .invlpg
= emulator_invlpg
,
5460 .pio_in_emulated
= emulator_pio_in_emulated
,
5461 .pio_out_emulated
= emulator_pio_out_emulated
,
5462 .get_segment
= emulator_get_segment
,
5463 .set_segment
= emulator_set_segment
,
5464 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5465 .get_gdt
= emulator_get_gdt
,
5466 .get_idt
= emulator_get_idt
,
5467 .set_gdt
= emulator_set_gdt
,
5468 .set_idt
= emulator_set_idt
,
5469 .get_cr
= emulator_get_cr
,
5470 .set_cr
= emulator_set_cr
,
5471 .cpl
= emulator_get_cpl
,
5472 .get_dr
= emulator_get_dr
,
5473 .set_dr
= emulator_set_dr
,
5474 .get_smbase
= emulator_get_smbase
,
5475 .set_smbase
= emulator_set_smbase
,
5476 .set_msr
= emulator_set_msr
,
5477 .get_msr
= emulator_get_msr
,
5478 .check_pmc
= emulator_check_pmc
,
5479 .read_pmc
= emulator_read_pmc
,
5480 .halt
= emulator_halt
,
5481 .wbinvd
= emulator_wbinvd
,
5482 .fix_hypercall
= emulator_fix_hypercall
,
5483 .intercept
= emulator_intercept
,
5484 .get_cpuid
= emulator_get_cpuid
,
5485 .set_nmi_mask
= emulator_set_nmi_mask
,
5486 .get_hflags
= emulator_get_hflags
,
5487 .set_hflags
= emulator_set_hflags
,
5488 .pre_leave_smm
= emulator_pre_leave_smm
,
5491 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5493 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5495 * an sti; sti; sequence only disable interrupts for the first
5496 * instruction. So, if the last instruction, be it emulated or
5497 * not, left the system with the INT_STI flag enabled, it
5498 * means that the last instruction is an sti. We should not
5499 * leave the flag on in this case. The same goes for mov ss
5501 if (int_shadow
& mask
)
5503 if (unlikely(int_shadow
|| mask
)) {
5504 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5506 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5510 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5512 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5513 if (ctxt
->exception
.vector
== PF_VECTOR
)
5514 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5516 if (ctxt
->exception
.error_code_valid
)
5517 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5518 ctxt
->exception
.error_code
);
5520 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5524 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5526 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5529 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5531 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5532 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5534 ctxt
->eip
= kvm_rip_read(vcpu
);
5535 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5536 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5537 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5538 cs_db
? X86EMUL_MODE_PROT32
:
5539 X86EMUL_MODE_PROT16
;
5540 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5541 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5542 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5544 init_decode_cache(ctxt
);
5545 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5548 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5550 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5553 init_emulate_ctxt(vcpu
);
5557 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5558 ret
= emulate_int_real(ctxt
, irq
);
5560 if (ret
!= X86EMUL_CONTINUE
)
5561 return EMULATE_FAIL
;
5563 ctxt
->eip
= ctxt
->_eip
;
5564 kvm_rip_write(vcpu
, ctxt
->eip
);
5565 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5567 if (irq
== NMI_VECTOR
)
5568 vcpu
->arch
.nmi_pending
= 0;
5570 vcpu
->arch
.interrupt
.pending
= false;
5572 return EMULATE_DONE
;
5574 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5576 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5578 int r
= EMULATE_DONE
;
5580 ++vcpu
->stat
.insn_emulation_fail
;
5581 trace_kvm_emulate_insn_failed(vcpu
);
5582 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5583 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5584 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5585 vcpu
->run
->internal
.ndata
= 0;
5586 r
= EMULATE_USER_EXIT
;
5588 kvm_queue_exception(vcpu
, UD_VECTOR
);
5593 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5594 bool write_fault_to_shadow_pgtable
,
5600 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5603 if (!vcpu
->arch
.mmu
.direct_map
) {
5605 * Write permission should be allowed since only
5606 * write access need to be emulated.
5608 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5611 * If the mapping is invalid in guest, let cpu retry
5612 * it to generate fault.
5614 if (gpa
== UNMAPPED_GVA
)
5619 * Do not retry the unhandleable instruction if it faults on the
5620 * readonly host memory, otherwise it will goto a infinite loop:
5621 * retry instruction -> write #PF -> emulation fail -> retry
5622 * instruction -> ...
5624 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5627 * If the instruction failed on the error pfn, it can not be fixed,
5628 * report the error to userspace.
5630 if (is_error_noslot_pfn(pfn
))
5633 kvm_release_pfn_clean(pfn
);
5635 /* The instructions are well-emulated on direct mmu. */
5636 if (vcpu
->arch
.mmu
.direct_map
) {
5637 unsigned int indirect_shadow_pages
;
5639 spin_lock(&vcpu
->kvm
->mmu_lock
);
5640 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5641 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5643 if (indirect_shadow_pages
)
5644 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5650 * if emulation was due to access to shadowed page table
5651 * and it failed try to unshadow page and re-enter the
5652 * guest to let CPU execute the instruction.
5654 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5657 * If the access faults on its page table, it can not
5658 * be fixed by unprotecting shadow page and it should
5659 * be reported to userspace.
5661 return !write_fault_to_shadow_pgtable
;
5664 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5665 unsigned long cr2
, int emulation_type
)
5667 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5668 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5670 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5671 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5674 * If the emulation is caused by #PF and it is non-page_table
5675 * writing instruction, it means the VM-EXIT is caused by shadow
5676 * page protected, we can zap the shadow page and retry this
5677 * instruction directly.
5679 * Note: if the guest uses a non-page-table modifying instruction
5680 * on the PDE that points to the instruction, then we will unmap
5681 * the instruction and go to an infinite loop. So, we cache the
5682 * last retried eip and the last fault address, if we meet the eip
5683 * and the address again, we can break out of the potential infinite
5686 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5688 if (!(emulation_type
& EMULTYPE_RETRY
))
5691 if (x86_page_table_writing_insn(ctxt
))
5694 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5697 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5698 vcpu
->arch
.last_retry_addr
= cr2
;
5700 if (!vcpu
->arch
.mmu
.direct_map
)
5701 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5703 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5708 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5709 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5711 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5713 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5714 /* This is a good place to trace that we are exiting SMM. */
5715 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5717 /* Process a latched INIT or SMI, if any. */
5718 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5721 kvm_mmu_reset_context(vcpu
);
5724 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5726 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5728 vcpu
->arch
.hflags
= emul_flags
;
5730 if (changed
& HF_SMM_MASK
)
5731 kvm_smm_changed(vcpu
);
5734 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5743 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5744 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5749 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5751 struct kvm_run
*kvm_run
= vcpu
->run
;
5753 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5754 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5755 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5756 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5757 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5758 *r
= EMULATE_USER_EXIT
;
5761 * "Certain debug exceptions may clear bit 0-3. The
5762 * remaining contents of the DR6 register are never
5763 * cleared by the processor".
5765 vcpu
->arch
.dr6
&= ~15;
5766 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5767 kvm_queue_exception(vcpu
, DB_VECTOR
);
5771 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5773 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5774 int r
= EMULATE_DONE
;
5776 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5779 * rflags is the old, "raw" value of the flags. The new value has
5780 * not been saved yet.
5782 * This is correct even for TF set by the guest, because "the
5783 * processor will not generate this exception after the instruction
5784 * that sets the TF flag".
5786 if (unlikely(rflags
& X86_EFLAGS_TF
))
5787 kvm_vcpu_do_singlestep(vcpu
, &r
);
5788 return r
== EMULATE_DONE
;
5790 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5792 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5794 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5795 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5796 struct kvm_run
*kvm_run
= vcpu
->run
;
5797 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5798 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5799 vcpu
->arch
.guest_debug_dr7
,
5803 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5804 kvm_run
->debug
.arch
.pc
= eip
;
5805 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5806 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5807 *r
= EMULATE_USER_EXIT
;
5812 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5813 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5814 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5815 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5820 vcpu
->arch
.dr6
&= ~15;
5821 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5822 kvm_queue_exception(vcpu
, DB_VECTOR
);
5831 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5838 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5839 bool writeback
= true;
5840 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5842 vcpu
->arch
.l1tf_flush_l1d
= true;
5845 * Clear write_fault_to_shadow_pgtable here to ensure it is
5848 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5849 kvm_clear_exception_queue(vcpu
);
5851 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5852 init_emulate_ctxt(vcpu
);
5855 * We will reenter on the same instruction since
5856 * we do not set complete_userspace_io. This does not
5857 * handle watchpoints yet, those would be handled in
5860 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5861 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5864 ctxt
->interruptibility
= 0;
5865 ctxt
->have_exception
= false;
5866 ctxt
->exception
.vector
= -1;
5867 ctxt
->perm_ok
= false;
5869 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5871 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5873 trace_kvm_emulate_insn_start(vcpu
);
5874 ++vcpu
->stat
.insn_emulation
;
5875 if (r
!= EMULATION_OK
) {
5876 if (emulation_type
& EMULTYPE_TRAP_UD
)
5877 return EMULATE_FAIL
;
5878 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5880 return EMULATE_DONE
;
5881 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5882 return EMULATE_DONE
;
5883 if (emulation_type
& EMULTYPE_SKIP
)
5884 return EMULATE_FAIL
;
5885 return handle_emulation_failure(vcpu
);
5889 if (emulation_type
& EMULTYPE_SKIP
) {
5890 kvm_rip_write(vcpu
, ctxt
->_eip
);
5891 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5892 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5893 return EMULATE_DONE
;
5896 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5897 return EMULATE_DONE
;
5899 /* this is needed for vmware backdoor interface to work since it
5900 changes registers values during IO operation */
5901 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5902 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5903 emulator_invalidate_register_cache(ctxt
);
5907 /* Save the faulting GPA (cr2) in the address field */
5908 ctxt
->exception
.address
= cr2
;
5910 r
= x86_emulate_insn(ctxt
);
5912 if (r
== EMULATION_INTERCEPTED
)
5913 return EMULATE_DONE
;
5915 if (r
== EMULATION_FAILED
) {
5916 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5918 return EMULATE_DONE
;
5920 return handle_emulation_failure(vcpu
);
5923 if (ctxt
->have_exception
) {
5925 if (inject_emulated_exception(vcpu
))
5927 } else if (vcpu
->arch
.pio
.count
) {
5928 if (!vcpu
->arch
.pio
.in
) {
5929 /* FIXME: return into emulator if single-stepping. */
5930 vcpu
->arch
.pio
.count
= 0;
5933 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5935 r
= EMULATE_USER_EXIT
;
5936 } else if (vcpu
->mmio_needed
) {
5937 if (!vcpu
->mmio_is_write
)
5939 r
= EMULATE_USER_EXIT
;
5940 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5941 } else if (r
== EMULATION_RESTART
)
5947 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5948 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5949 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5950 kvm_rip_write(vcpu
, ctxt
->eip
);
5951 if (r
== EMULATE_DONE
&&
5952 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5953 kvm_vcpu_do_singlestep(vcpu
, &r
);
5954 if (!ctxt
->have_exception
||
5955 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5956 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5959 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5960 * do nothing, and it will be requested again as soon as
5961 * the shadow expires. But we still need to check here,
5962 * because POPF has no interrupt shadow.
5964 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5965 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5967 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5971 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5973 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5975 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5976 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5977 size
, port
, &val
, 1);
5978 /* do not return to emulator after return from userspace */
5979 vcpu
->arch
.pio
.count
= 0;
5982 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5984 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5988 /* We should only ever be called with arch.pio.count equal to 1 */
5989 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5991 /* For size less than 4 we merge, else we zero extend */
5992 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5996 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5997 * the copy and tracing
5999 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
6000 vcpu
->arch
.pio
.port
, &val
, 1);
6001 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6006 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
6011 /* For size less than 4 we merge, else we zero extend */
6012 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
6014 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
6017 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
6021 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
6025 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
6027 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6029 __this_cpu_write(cpu_tsc_khz
, 0);
6033 static void tsc_khz_changed(void *data
)
6035 struct cpufreq_freqs
*freq
= data
;
6036 unsigned long khz
= 0;
6040 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6041 khz
= cpufreq_quick_get(raw_smp_processor_id());
6044 __this_cpu_write(cpu_tsc_khz
, khz
);
6047 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6050 struct cpufreq_freqs
*freq
= data
;
6052 struct kvm_vcpu
*vcpu
;
6053 int i
, send_ipi
= 0;
6056 * We allow guests to temporarily run on slowing clocks,
6057 * provided we notify them after, or to run on accelerating
6058 * clocks, provided we notify them before. Thus time never
6061 * However, we have a problem. We can't atomically update
6062 * the frequency of a given CPU from this function; it is
6063 * merely a notifier, which can be called from any CPU.
6064 * Changing the TSC frequency at arbitrary points in time
6065 * requires a recomputation of local variables related to
6066 * the TSC for each VCPU. We must flag these local variables
6067 * to be updated and be sure the update takes place with the
6068 * new frequency before any guests proceed.
6070 * Unfortunately, the combination of hotplug CPU and frequency
6071 * change creates an intractable locking scenario; the order
6072 * of when these callouts happen is undefined with respect to
6073 * CPU hotplug, and they can race with each other. As such,
6074 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6075 * undefined; you can actually have a CPU frequency change take
6076 * place in between the computation of X and the setting of the
6077 * variable. To protect against this problem, all updates of
6078 * the per_cpu tsc_khz variable are done in an interrupt
6079 * protected IPI, and all callers wishing to update the value
6080 * must wait for a synchronous IPI to complete (which is trivial
6081 * if the caller is on the CPU already). This establishes the
6082 * necessary total order on variable updates.
6084 * Note that because a guest time update may take place
6085 * anytime after the setting of the VCPU's request bit, the
6086 * correct TSC value must be set before the request. However,
6087 * to ensure the update actually makes it to any guest which
6088 * starts running in hardware virtualization between the set
6089 * and the acquisition of the spinlock, we must also ping the
6090 * CPU after setting the request bit.
6094 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6096 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6099 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6101 spin_lock(&kvm_lock
);
6102 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6103 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6104 if (vcpu
->cpu
!= freq
->cpu
)
6106 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6107 if (vcpu
->cpu
!= smp_processor_id())
6111 spin_unlock(&kvm_lock
);
6113 if (freq
->old
< freq
->new && send_ipi
) {
6115 * We upscale the frequency. Must make the guest
6116 * doesn't see old kvmclock values while running with
6117 * the new frequency, otherwise we risk the guest sees
6118 * time go backwards.
6120 * In case we update the frequency for another cpu
6121 * (which might be in guest context) send an interrupt
6122 * to kick the cpu out of guest context. Next time
6123 * guest context is entered kvmclock will be updated,
6124 * so the guest will not see stale values.
6126 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6131 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6132 .notifier_call
= kvmclock_cpufreq_notifier
6135 static int kvmclock_cpu_online(unsigned int cpu
)
6137 tsc_khz_changed(NULL
);
6141 static void kvm_timer_init(void)
6143 max_tsc_khz
= tsc_khz
;
6145 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6146 #ifdef CONFIG_CPU_FREQ
6147 struct cpufreq_policy policy
;
6150 memset(&policy
, 0, sizeof(policy
));
6152 cpufreq_get_policy(&policy
, cpu
);
6153 if (policy
.cpuinfo
.max_freq
)
6154 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6157 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6158 CPUFREQ_TRANSITION_NOTIFIER
);
6160 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6162 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6163 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6166 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6168 int kvm_is_in_guest(void)
6170 return __this_cpu_read(current_vcpu
) != NULL
;
6173 static int kvm_is_user_mode(void)
6177 if (__this_cpu_read(current_vcpu
))
6178 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6180 return user_mode
!= 0;
6183 static unsigned long kvm_get_guest_ip(void)
6185 unsigned long ip
= 0;
6187 if (__this_cpu_read(current_vcpu
))
6188 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6193 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6194 .is_in_guest
= kvm_is_in_guest
,
6195 .is_user_mode
= kvm_is_user_mode
,
6196 .get_guest_ip
= kvm_get_guest_ip
,
6199 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6201 __this_cpu_write(current_vcpu
, vcpu
);
6203 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6205 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6207 __this_cpu_write(current_vcpu
, NULL
);
6209 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6211 static void kvm_set_mmio_spte_mask(void)
6214 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6217 * Set the reserved bits and the present bit of an paging-structure
6218 * entry to generate page fault with PFER.RSV = 1.
6220 /* Mask the reserved physical address bits. */
6221 mask
= rsvd_bits(maxphyaddr
, 51);
6223 /* Set the present bit. */
6226 #ifdef CONFIG_X86_64
6228 * If reserved bit is not supported, clear the present bit to disable
6231 if (maxphyaddr
== 52)
6235 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6238 #ifdef CONFIG_X86_64
6239 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6243 struct kvm_vcpu
*vcpu
;
6246 spin_lock(&kvm_lock
);
6247 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6248 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6249 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6250 atomic_set(&kvm_guest_has_master_clock
, 0);
6251 spin_unlock(&kvm_lock
);
6254 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6257 * Notification about pvclock gtod data update.
6259 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6262 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6263 struct timekeeper
*tk
= priv
;
6265 update_pvclock_gtod(tk
);
6267 /* disable master clock if host does not trust, or does not
6268 * use, TSC clocksource
6270 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6271 atomic_read(&kvm_guest_has_master_clock
) != 0)
6272 queue_work(system_long_wq
, &pvclock_gtod_work
);
6277 static struct notifier_block pvclock_gtod_notifier
= {
6278 .notifier_call
= pvclock_gtod_notify
,
6282 int kvm_arch_init(void *opaque
)
6285 struct kvm_x86_ops
*ops
= opaque
;
6288 printk(KERN_ERR
"kvm: already loaded the other module\n");
6293 if (!ops
->cpu_has_kvm_support()) {
6294 printk(KERN_ERR
"kvm: no hardware support\n");
6298 if (ops
->disabled_by_bios()) {
6299 printk(KERN_WARNING
"kvm: disabled by bios\n");
6305 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6307 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6311 r
= kvm_mmu_module_init();
6313 goto out_free_percpu
;
6315 kvm_set_mmio_spte_mask();
6319 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6320 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6321 PT_PRESENT_MASK
, 0, sme_me_mask
);
6324 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6326 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6327 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6330 #ifdef CONFIG_X86_64
6331 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6337 free_percpu(shared_msrs
);
6342 void kvm_arch_exit(void)
6345 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6347 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6348 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6349 CPUFREQ_TRANSITION_NOTIFIER
);
6350 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6351 #ifdef CONFIG_X86_64
6352 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6355 kvm_mmu_module_exit();
6356 free_percpu(shared_msrs
);
6359 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6361 ++vcpu
->stat
.halt_exits
;
6362 if (lapic_in_kernel(vcpu
)) {
6363 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6366 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6370 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6372 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6374 int ret
= kvm_skip_emulated_instruction(vcpu
);
6376 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6377 * KVM_EXIT_DEBUG here.
6379 return kvm_vcpu_halt(vcpu
) && ret
;
6381 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6383 #ifdef CONFIG_X86_64
6384 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6385 unsigned long clock_type
)
6387 struct kvm_clock_pairing clock_pairing
;
6392 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6393 return -KVM_EOPNOTSUPP
;
6395 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6396 return -KVM_EOPNOTSUPP
;
6398 clock_pairing
.sec
= ts
.tv_sec
;
6399 clock_pairing
.nsec
= ts
.tv_nsec
;
6400 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6401 clock_pairing
.flags
= 0;
6404 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6405 sizeof(struct kvm_clock_pairing
)))
6413 * kvm_pv_kick_cpu_op: Kick a vcpu.
6415 * @apicid - apicid of vcpu to be kicked.
6417 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6419 struct kvm_lapic_irq lapic_irq
;
6421 lapic_irq
.shorthand
= 0;
6422 lapic_irq
.dest_mode
= 0;
6423 lapic_irq
.level
= 0;
6424 lapic_irq
.dest_id
= apicid
;
6425 lapic_irq
.msi_redir_hint
= false;
6427 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6428 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6431 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6433 vcpu
->arch
.apicv_active
= false;
6434 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6437 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6439 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6442 if (kvm_hv_hypercall_enabled(vcpu
->kvm
)) {
6443 if (!kvm_hv_hypercall(vcpu
))
6448 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6449 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6450 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6451 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6452 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6454 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6456 op_64_bit
= is_64_bit_mode(vcpu
);
6465 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6471 case KVM_HC_VAPIC_POLL_IRQ
:
6474 case KVM_HC_KICK_CPU
:
6475 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6478 #ifdef CONFIG_X86_64
6479 case KVM_HC_CLOCK_PAIRING
:
6480 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6490 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6493 ++vcpu
->stat
.hypercalls
;
6494 return kvm_skip_emulated_instruction(vcpu
);
6496 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6498 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6500 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6501 char instruction
[3];
6502 unsigned long rip
= kvm_rip_read(vcpu
);
6504 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6506 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6510 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6512 return vcpu
->run
->request_interrupt_window
&&
6513 likely(!pic_in_kernel(vcpu
->kvm
));
6516 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6518 struct kvm_run
*kvm_run
= vcpu
->run
;
6520 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6521 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6522 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6523 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6524 kvm_run
->ready_for_interrupt_injection
=
6525 pic_in_kernel(vcpu
->kvm
) ||
6526 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6529 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6533 if (!kvm_x86_ops
->update_cr8_intercept
)
6536 if (!lapic_in_kernel(vcpu
))
6539 if (vcpu
->arch
.apicv_active
)
6542 if (!vcpu
->arch
.apic
->vapic_addr
)
6543 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6550 tpr
= kvm_lapic_get_cr8(vcpu
);
6552 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6555 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6559 /* try to reinject previous events if any */
6560 if (vcpu
->arch
.exception
.injected
) {
6561 kvm_x86_ops
->queue_exception(vcpu
);
6566 * Exceptions must be injected immediately, or the exception
6567 * frame will have the address of the NMI or interrupt handler.
6569 if (!vcpu
->arch
.exception
.pending
) {
6570 if (vcpu
->arch
.nmi_injected
) {
6571 kvm_x86_ops
->set_nmi(vcpu
);
6575 if (vcpu
->arch
.interrupt
.pending
) {
6576 kvm_x86_ops
->set_irq(vcpu
);
6581 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6582 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6587 /* try to inject new event if pending */
6588 if (vcpu
->arch
.exception
.pending
) {
6589 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6590 vcpu
->arch
.exception
.has_error_code
,
6591 vcpu
->arch
.exception
.error_code
);
6593 vcpu
->arch
.exception
.pending
= false;
6594 vcpu
->arch
.exception
.injected
= true;
6596 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6597 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6600 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6601 (vcpu
->arch
.dr7
& DR7_GD
)) {
6602 vcpu
->arch
.dr7
&= ~DR7_GD
;
6603 kvm_update_dr7(vcpu
);
6606 kvm_x86_ops
->queue_exception(vcpu
);
6607 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6608 vcpu
->arch
.smi_pending
= false;
6610 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6611 --vcpu
->arch
.nmi_pending
;
6612 vcpu
->arch
.nmi_injected
= true;
6613 kvm_x86_ops
->set_nmi(vcpu
);
6614 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6616 * Because interrupts can be injected asynchronously, we are
6617 * calling check_nested_events again here to avoid a race condition.
6618 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6619 * proposal and current concerns. Perhaps we should be setting
6620 * KVM_REQ_EVENT only on certain events and not unconditionally?
6622 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6623 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6627 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6628 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6630 kvm_x86_ops
->set_irq(vcpu
);
6637 static void process_nmi(struct kvm_vcpu
*vcpu
)
6642 * x86 is limited to one NMI running, and one NMI pending after it.
6643 * If an NMI is already in progress, limit further NMIs to just one.
6644 * Otherwise, allow two (and we'll inject the first one immediately).
6646 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6649 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6650 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6651 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6654 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6657 flags
|= seg
->g
<< 23;
6658 flags
|= seg
->db
<< 22;
6659 flags
|= seg
->l
<< 21;
6660 flags
|= seg
->avl
<< 20;
6661 flags
|= seg
->present
<< 15;
6662 flags
|= seg
->dpl
<< 13;
6663 flags
|= seg
->s
<< 12;
6664 flags
|= seg
->type
<< 8;
6668 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6670 struct kvm_segment seg
;
6673 kvm_get_segment(vcpu
, &seg
, n
);
6674 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6677 offset
= 0x7f84 + n
* 12;
6679 offset
= 0x7f2c + (n
- 3) * 12;
6681 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6682 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6683 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6686 #ifdef CONFIG_X86_64
6687 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6689 struct kvm_segment seg
;
6693 kvm_get_segment(vcpu
, &seg
, n
);
6694 offset
= 0x7e00 + n
* 16;
6696 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6697 put_smstate(u16
, buf
, offset
, seg
.selector
);
6698 put_smstate(u16
, buf
, offset
+ 2, flags
);
6699 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6700 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6704 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6707 struct kvm_segment seg
;
6711 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6712 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6713 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6714 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6716 for (i
= 0; i
< 8; i
++)
6717 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6719 kvm_get_dr(vcpu
, 6, &val
);
6720 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6721 kvm_get_dr(vcpu
, 7, &val
);
6722 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6724 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6725 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6726 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6727 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6728 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6730 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6731 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6732 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6733 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6734 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6736 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6737 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6738 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6740 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6741 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6742 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6744 for (i
= 0; i
< 6; i
++)
6745 enter_smm_save_seg_32(vcpu
, buf
, i
);
6747 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6750 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6751 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6754 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6756 #ifdef CONFIG_X86_64
6758 struct kvm_segment seg
;
6762 for (i
= 0; i
< 16; i
++)
6763 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6765 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6766 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6768 kvm_get_dr(vcpu
, 6, &val
);
6769 put_smstate(u64
, buf
, 0x7f68, val
);
6770 kvm_get_dr(vcpu
, 7, &val
);
6771 put_smstate(u64
, buf
, 0x7f60, val
);
6773 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6774 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6775 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6777 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6780 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6782 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6784 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6785 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6786 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6787 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6788 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6790 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6791 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6792 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6794 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6795 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6796 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6797 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6798 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6800 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6801 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6802 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6804 for (i
= 0; i
< 6; i
++)
6805 enter_smm_save_seg_64(vcpu
, buf
, i
);
6811 static void enter_smm(struct kvm_vcpu
*vcpu
)
6813 struct kvm_segment cs
, ds
;
6818 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6819 memset(buf
, 0, 512);
6820 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6821 enter_smm_save_state_64(vcpu
, buf
);
6823 enter_smm_save_state_32(vcpu
, buf
);
6826 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6827 * vCPU state (e.g. leave guest mode) after we've saved the state into
6828 * the SMM state-save area.
6830 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6832 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6833 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6835 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6836 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6838 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6840 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6841 kvm_rip_write(vcpu
, 0x8000);
6843 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6844 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6845 vcpu
->arch
.cr0
= cr0
;
6847 kvm_x86_ops
->set_cr4(vcpu
, 0);
6849 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6850 dt
.address
= dt
.size
= 0;
6851 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6853 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6855 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6856 cs
.base
= vcpu
->arch
.smbase
;
6861 cs
.limit
= ds
.limit
= 0xffffffff;
6862 cs
.type
= ds
.type
= 0x3;
6863 cs
.dpl
= ds
.dpl
= 0;
6868 cs
.avl
= ds
.avl
= 0;
6869 cs
.present
= ds
.present
= 1;
6870 cs
.unusable
= ds
.unusable
= 0;
6871 cs
.padding
= ds
.padding
= 0;
6873 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6874 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6875 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6876 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6877 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6878 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6880 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6881 kvm_x86_ops
->set_efer(vcpu
, 0);
6883 kvm_update_cpuid(vcpu
);
6884 kvm_mmu_reset_context(vcpu
);
6887 static void process_smi(struct kvm_vcpu
*vcpu
)
6889 vcpu
->arch
.smi_pending
= true;
6890 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6893 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6895 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6898 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6900 u64 eoi_exit_bitmap
[4];
6902 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6905 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6907 if (irqchip_split(vcpu
->kvm
))
6908 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6910 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6911 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6912 if (ioapic_in_kernel(vcpu
->kvm
))
6913 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6915 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6916 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6917 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6920 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6922 ++vcpu
->stat
.tlb_flush
;
6923 kvm_x86_ops
->tlb_flush(vcpu
);
6926 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6927 unsigned long start
, unsigned long end
)
6929 unsigned long apic_address
;
6932 * The physical address of apic access page is stored in the VMCS.
6933 * Update it when it becomes invalid.
6935 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6936 if (start
<= apic_address
&& apic_address
< end
)
6937 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6940 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6942 struct page
*page
= NULL
;
6944 if (!lapic_in_kernel(vcpu
))
6947 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6950 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6951 if (is_error_page(page
))
6953 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6956 * Do not pin apic access page in memory, the MMU notifier
6957 * will call us again if it is migrated or swapped out.
6961 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6964 * Returns 1 to let vcpu_run() continue the guest execution loop without
6965 * exiting to the userspace. Otherwise, the value will be returned to the
6968 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6972 dm_request_for_irq_injection(vcpu
) &&
6973 kvm_cpu_accept_dm_intr(vcpu
);
6975 bool req_immediate_exit
= false;
6977 if (kvm_request_pending(vcpu
)) {
6978 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6979 kvm_mmu_unload(vcpu
);
6980 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6981 __kvm_migrate_timers(vcpu
);
6982 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6983 kvm_gen_update_masterclock(vcpu
->kvm
);
6984 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6985 kvm_gen_kvmclock_update(vcpu
);
6986 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6987 r
= kvm_guest_time_update(vcpu
);
6991 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6992 kvm_mmu_sync_roots(vcpu
);
6993 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6994 kvm_vcpu_flush_tlb(vcpu
);
6995 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6996 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
7000 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
7001 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
7002 vcpu
->mmio_needed
= 0;
7006 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
7007 /* Page is swapped out. Do synthetic halt */
7008 vcpu
->arch
.apf
.halted
= true;
7012 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
7013 record_steal_time(vcpu
);
7014 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
7016 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
7018 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
7019 kvm_pmu_handle_event(vcpu
);
7020 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
7021 kvm_pmu_deliver_pmi(vcpu
);
7022 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
7023 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
7024 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
7025 vcpu
->arch
.ioapic_handled_vectors
)) {
7026 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
7027 vcpu
->run
->eoi
.vector
=
7028 vcpu
->arch
.pending_ioapic_eoi
;
7033 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7034 vcpu_scan_ioapic(vcpu
);
7035 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7036 kvm_vcpu_reload_apic_access_page(vcpu
);
7037 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7038 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7039 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7043 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7044 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7045 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7049 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7050 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7051 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7057 * KVM_REQ_HV_STIMER has to be processed after
7058 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7059 * depend on the guest clock being up-to-date
7061 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7062 kvm_hv_process_stimers(vcpu
);
7065 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7066 ++vcpu
->stat
.req_event
;
7067 kvm_apic_accept_events(vcpu
);
7068 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7073 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7074 req_immediate_exit
= true;
7076 /* Enable SMI/NMI/IRQ window open exits if needed.
7078 * SMIs have three cases:
7079 * 1) They can be nested, and then there is nothing to
7080 * do here because RSM will cause a vmexit anyway.
7081 * 2) There is an ISA-specific reason why SMI cannot be
7082 * injected, and the moment when this changes can be
7084 * 3) Or the SMI can be pending because
7085 * inject_pending_event has completed the injection
7086 * of an IRQ or NMI from the previous vmexit, and
7087 * then we request an immediate exit to inject the
7090 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7091 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7092 req_immediate_exit
= true;
7093 if (vcpu
->arch
.nmi_pending
)
7094 kvm_x86_ops
->enable_nmi_window(vcpu
);
7095 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7096 kvm_x86_ops
->enable_irq_window(vcpu
);
7097 WARN_ON(vcpu
->arch
.exception
.pending
);
7100 if (kvm_lapic_enabled(vcpu
)) {
7101 update_cr8_intercept(vcpu
);
7102 kvm_lapic_sync_to_vapic(vcpu
);
7106 r
= kvm_mmu_reload(vcpu
);
7108 goto cancel_injection
;
7113 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7116 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7117 * IPI are then delayed after guest entry, which ensures that they
7118 * result in virtual interrupt delivery.
7120 local_irq_disable();
7121 vcpu
->mode
= IN_GUEST_MODE
;
7123 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7126 * 1) We should set ->mode before checking ->requests. Please see
7127 * the comment in kvm_vcpu_exiting_guest_mode().
7129 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7130 * pairs with the memory barrier implicit in pi_test_and_set_on
7131 * (see vmx_deliver_posted_interrupt).
7133 * 3) This also orders the write to mode from any reads to the page
7134 * tables done while the VCPU is running. Please see the comment
7135 * in kvm_flush_remote_tlbs.
7137 smp_mb__after_srcu_read_unlock();
7140 * This handles the case where a posted interrupt was
7141 * notified with kvm_vcpu_kick.
7143 if (kvm_lapic_enabled(vcpu
)) {
7144 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
7145 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7148 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7149 || need_resched() || signal_pending(current
)) {
7150 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7154 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7156 goto cancel_injection
;
7159 kvm_load_guest_xcr0(vcpu
);
7161 if (req_immediate_exit
) {
7162 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7163 smp_send_reschedule(vcpu
->cpu
);
7166 trace_kvm_entry(vcpu
->vcpu_id
);
7167 wait_lapic_expire(vcpu
);
7168 guest_enter_irqoff();
7170 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7172 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7173 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7174 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7175 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7176 set_debugreg(vcpu
->arch
.dr6
, 6);
7177 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7180 kvm_x86_ops
->run(vcpu
);
7183 * Do this here before restoring debug registers on the host. And
7184 * since we do this before handling the vmexit, a DR access vmexit
7185 * can (a) read the correct value of the debug registers, (b) set
7186 * KVM_DEBUGREG_WONT_EXIT again.
7188 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7189 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7190 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7191 kvm_update_dr0123(vcpu
);
7192 kvm_update_dr6(vcpu
);
7193 kvm_update_dr7(vcpu
);
7194 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7198 * If the guest has used debug registers, at least dr7
7199 * will be disabled while returning to the host.
7200 * If we don't have active breakpoints in the host, we don't
7201 * care about the messed up debug address registers. But if
7202 * we have some of them active, restore the old state.
7204 if (hw_breakpoint_active())
7205 hw_breakpoint_restore();
7207 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7209 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7212 kvm_put_guest_xcr0(vcpu
);
7214 kvm_x86_ops
->handle_external_intr(vcpu
);
7218 guest_exit_irqoff();
7223 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7226 * Profile KVM exit RIPs:
7228 if (unlikely(prof_on
== KVM_PROFILING
)) {
7229 unsigned long rip
= kvm_rip_read(vcpu
);
7230 profile_hit(KVM_PROFILING
, (void *)rip
);
7233 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7234 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7236 if (vcpu
->arch
.apic_attention
)
7237 kvm_lapic_sync_from_vapic(vcpu
);
7239 vcpu
->arch
.gpa_available
= false;
7240 r
= kvm_x86_ops
->handle_exit(vcpu
);
7244 kvm_x86_ops
->cancel_injection(vcpu
);
7245 if (unlikely(vcpu
->arch
.apic_attention
))
7246 kvm_lapic_sync_from_vapic(vcpu
);
7251 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7253 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7254 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7255 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7256 kvm_vcpu_block(vcpu
);
7257 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7259 if (kvm_x86_ops
->post_block
)
7260 kvm_x86_ops
->post_block(vcpu
);
7262 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7266 kvm_apic_accept_events(vcpu
);
7267 switch(vcpu
->arch
.mp_state
) {
7268 case KVM_MP_STATE_HALTED
:
7269 vcpu
->arch
.pv
.pv_unhalted
= false;
7270 vcpu
->arch
.mp_state
=
7271 KVM_MP_STATE_RUNNABLE
;
7272 case KVM_MP_STATE_RUNNABLE
:
7273 vcpu
->arch
.apf
.halted
= false;
7275 case KVM_MP_STATE_INIT_RECEIVED
:
7284 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7286 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7287 kvm_x86_ops
->check_nested_events(vcpu
, false);
7289 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7290 !vcpu
->arch
.apf
.halted
);
7293 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7296 struct kvm
*kvm
= vcpu
->kvm
;
7298 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7299 vcpu
->arch
.l1tf_flush_l1d
= true;
7302 if (kvm_vcpu_running(vcpu
)) {
7303 r
= vcpu_enter_guest(vcpu
);
7305 r
= vcpu_block(kvm
, vcpu
);
7311 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7312 if (kvm_cpu_has_pending_timer(vcpu
))
7313 kvm_inject_pending_timer_irqs(vcpu
);
7315 if (dm_request_for_irq_injection(vcpu
) &&
7316 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7318 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7319 ++vcpu
->stat
.request_irq_exits
;
7323 kvm_check_async_pf_completion(vcpu
);
7325 if (signal_pending(current
)) {
7327 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7328 ++vcpu
->stat
.signal_exits
;
7331 if (need_resched()) {
7332 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7334 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7338 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7343 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7346 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7347 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7348 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7349 if (r
!= EMULATE_DONE
)
7354 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7356 BUG_ON(!vcpu
->arch
.pio
.count
);
7358 return complete_emulated_io(vcpu
);
7362 * Implements the following, as a state machine:
7366 * for each mmio piece in the fragment
7374 * for each mmio piece in the fragment
7379 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7381 struct kvm_run
*run
= vcpu
->run
;
7382 struct kvm_mmio_fragment
*frag
;
7385 BUG_ON(!vcpu
->mmio_needed
);
7387 /* Complete previous fragment */
7388 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7389 len
= min(8u, frag
->len
);
7390 if (!vcpu
->mmio_is_write
)
7391 memcpy(frag
->data
, run
->mmio
.data
, len
);
7393 if (frag
->len
<= 8) {
7394 /* Switch to the next fragment. */
7396 vcpu
->mmio_cur_fragment
++;
7398 /* Go forward to the next mmio piece. */
7404 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7405 vcpu
->mmio_needed
= 0;
7407 /* FIXME: return into emulator if single-stepping. */
7408 if (vcpu
->mmio_is_write
)
7410 vcpu
->mmio_read_completed
= 1;
7411 return complete_emulated_io(vcpu
);
7414 run
->exit_reason
= KVM_EXIT_MMIO
;
7415 run
->mmio
.phys_addr
= frag
->gpa
;
7416 if (vcpu
->mmio_is_write
)
7417 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7418 run
->mmio
.len
= min(8u, frag
->len
);
7419 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7420 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7425 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7429 kvm_sigset_activate(vcpu
);
7431 kvm_load_guest_fpu(vcpu
);
7433 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7434 if (kvm_run
->immediate_exit
) {
7438 kvm_vcpu_block(vcpu
);
7439 kvm_apic_accept_events(vcpu
);
7440 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7442 if (signal_pending(current
)) {
7444 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7445 ++vcpu
->stat
.signal_exits
;
7450 /* re-sync apic's tpr */
7451 if (!lapic_in_kernel(vcpu
)) {
7452 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7458 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7459 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7460 vcpu
->arch
.complete_userspace_io
= NULL
;
7465 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7467 if (kvm_run
->immediate_exit
)
7473 kvm_put_guest_fpu(vcpu
);
7474 post_kvm_run_save(vcpu
);
7475 kvm_sigset_deactivate(vcpu
);
7480 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7482 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7484 * We are here if userspace calls get_regs() in the middle of
7485 * instruction emulation. Registers state needs to be copied
7486 * back from emulation context to vcpu. Userspace shouldn't do
7487 * that usually, but some bad designed PV devices (vmware
7488 * backdoor interface) need this to work
7490 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7491 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7493 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7494 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7495 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7496 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7497 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7498 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7499 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7500 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7501 #ifdef CONFIG_X86_64
7502 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7503 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7504 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7505 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7506 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7507 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7508 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7509 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7512 regs
->rip
= kvm_rip_read(vcpu
);
7513 regs
->rflags
= kvm_get_rflags(vcpu
);
7518 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7520 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7521 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7523 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7524 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7525 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7526 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7527 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7528 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7529 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7530 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7531 #ifdef CONFIG_X86_64
7532 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7533 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7534 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7535 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7536 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7537 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7538 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7539 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7542 kvm_rip_write(vcpu
, regs
->rip
);
7543 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7545 vcpu
->arch
.exception
.pending
= false;
7547 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7552 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7554 struct kvm_segment cs
;
7556 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7560 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7562 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7563 struct kvm_sregs
*sregs
)
7567 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7568 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7569 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7570 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7571 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7572 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7574 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7575 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7577 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7578 sregs
->idt
.limit
= dt
.size
;
7579 sregs
->idt
.base
= dt
.address
;
7580 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7581 sregs
->gdt
.limit
= dt
.size
;
7582 sregs
->gdt
.base
= dt
.address
;
7584 sregs
->cr0
= kvm_read_cr0(vcpu
);
7585 sregs
->cr2
= vcpu
->arch
.cr2
;
7586 sregs
->cr3
= kvm_read_cr3(vcpu
);
7587 sregs
->cr4
= kvm_read_cr4(vcpu
);
7588 sregs
->cr8
= kvm_get_cr8(vcpu
);
7589 sregs
->efer
= vcpu
->arch
.efer
;
7590 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7592 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7594 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7595 set_bit(vcpu
->arch
.interrupt
.nr
,
7596 (unsigned long *)sregs
->interrupt_bitmap
);
7601 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7602 struct kvm_mp_state
*mp_state
)
7604 kvm_apic_accept_events(vcpu
);
7605 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7606 vcpu
->arch
.pv
.pv_unhalted
)
7607 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7609 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7614 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7615 struct kvm_mp_state
*mp_state
)
7617 if (!lapic_in_kernel(vcpu
) &&
7618 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7621 /* INITs are latched while in SMM */
7622 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7623 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7624 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7627 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7628 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7629 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7631 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7632 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7636 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7637 int reason
, bool has_error_code
, u32 error_code
)
7639 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7642 init_emulate_ctxt(vcpu
);
7644 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7645 has_error_code
, error_code
);
7648 return EMULATE_FAIL
;
7650 kvm_rip_write(vcpu
, ctxt
->eip
);
7651 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7652 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7653 return EMULATE_DONE
;
7655 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7657 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7659 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7661 * When EFER.LME and CR0.PG are set, the processor is in
7662 * 64-bit mode (though maybe in a 32-bit code segment).
7663 * CR4.PAE and EFER.LMA must be set.
7665 if (!(sregs
->cr4
& X86_CR4_PAE
)
7666 || !(sregs
->efer
& EFER_LMA
))
7670 * Not in 64-bit mode: EFER.LMA is clear and the code
7671 * segment cannot be 64-bit.
7673 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7680 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7681 struct kvm_sregs
*sregs
)
7683 struct msr_data apic_base_msr
;
7684 int mmu_reset_needed
= 0;
7685 int cpuid_update_needed
= 0;
7686 int pending_vec
, max_bits
, idx
;
7689 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7690 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7693 if (kvm_valid_sregs(vcpu
, sregs
))
7696 apic_base_msr
.data
= sregs
->apic_base
;
7697 apic_base_msr
.host_initiated
= true;
7698 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7701 dt
.size
= sregs
->idt
.limit
;
7702 dt
.address
= sregs
->idt
.base
;
7703 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7704 dt
.size
= sregs
->gdt
.limit
;
7705 dt
.address
= sregs
->gdt
.base
;
7706 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7708 vcpu
->arch
.cr2
= sregs
->cr2
;
7709 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7710 vcpu
->arch
.cr3
= sregs
->cr3
;
7711 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7713 kvm_set_cr8(vcpu
, sregs
->cr8
);
7715 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7716 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7718 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7719 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7720 vcpu
->arch
.cr0
= sregs
->cr0
;
7722 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7723 cpuid_update_needed
|= ((kvm_read_cr4(vcpu
) ^ sregs
->cr4
) &
7724 (X86_CR4_OSXSAVE
| X86_CR4_PKE
));
7725 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7726 if (cpuid_update_needed
)
7727 kvm_update_cpuid(vcpu
);
7729 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7730 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7731 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7732 mmu_reset_needed
= 1;
7734 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7736 if (mmu_reset_needed
)
7737 kvm_mmu_reset_context(vcpu
);
7739 max_bits
= KVM_NR_INTERRUPTS
;
7740 pending_vec
= find_first_bit(
7741 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7742 if (pending_vec
< max_bits
) {
7743 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7744 pr_debug("Set back pending irq %d\n", pending_vec
);
7747 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7748 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7749 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7750 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7751 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7752 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7754 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7755 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7757 update_cr8_intercept(vcpu
);
7759 /* Older userspace won't unhalt the vcpu on reset. */
7760 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7761 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7763 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7765 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7770 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7771 struct kvm_guest_debug
*dbg
)
7773 unsigned long rflags
;
7776 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7778 if (vcpu
->arch
.exception
.pending
)
7780 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7781 kvm_queue_exception(vcpu
, DB_VECTOR
);
7783 kvm_queue_exception(vcpu
, BP_VECTOR
);
7787 * Read rflags as long as potentially injected trace flags are still
7790 rflags
= kvm_get_rflags(vcpu
);
7792 vcpu
->guest_debug
= dbg
->control
;
7793 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7794 vcpu
->guest_debug
= 0;
7796 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7797 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7798 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7799 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7801 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7802 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7804 kvm_update_dr7(vcpu
);
7806 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7807 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7808 get_segment_base(vcpu
, VCPU_SREG_CS
);
7811 * Trigger an rflags update that will inject or remove the trace
7814 kvm_set_rflags(vcpu
, rflags
);
7816 kvm_x86_ops
->update_bp_intercept(vcpu
);
7826 * Translate a guest virtual address to a guest physical address.
7828 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7829 struct kvm_translation
*tr
)
7831 unsigned long vaddr
= tr
->linear_address
;
7835 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7836 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7837 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7838 tr
->physical_address
= gpa
;
7839 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7846 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7848 struct fxregs_state
*fxsave
=
7849 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7851 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7852 fpu
->fcw
= fxsave
->cwd
;
7853 fpu
->fsw
= fxsave
->swd
;
7854 fpu
->ftwx
= fxsave
->twd
;
7855 fpu
->last_opcode
= fxsave
->fop
;
7856 fpu
->last_ip
= fxsave
->rip
;
7857 fpu
->last_dp
= fxsave
->rdp
;
7858 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7863 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7865 struct fxregs_state
*fxsave
=
7866 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7868 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7869 fxsave
->cwd
= fpu
->fcw
;
7870 fxsave
->swd
= fpu
->fsw
;
7871 fxsave
->twd
= fpu
->ftwx
;
7872 fxsave
->fop
= fpu
->last_opcode
;
7873 fxsave
->rip
= fpu
->last_ip
;
7874 fxsave
->rdp
= fpu
->last_dp
;
7875 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7880 static void fx_init(struct kvm_vcpu
*vcpu
)
7882 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7883 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7884 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7885 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7888 * Ensure guest xcr0 is valid for loading
7890 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7892 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7895 /* Swap (qemu) user FPU context for the guest FPU context. */
7896 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7899 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
7900 /* PKRU is separately restored in kvm_x86_ops->run. */
7901 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7902 ~XFEATURE_MASK_PKRU
);
7907 /* When vcpu_run ends, restore user space FPU context. */
7908 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7911 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7912 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
7914 ++vcpu
->stat
.fpu_reload
;
7918 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7920 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7922 kvmclock_reset(vcpu
);
7924 kvm_x86_ops
->vcpu_free(vcpu
);
7925 free_cpumask_var(wbinvd_dirty_mask
);
7928 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7931 struct kvm_vcpu
*vcpu
;
7933 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7934 printk_once(KERN_WARNING
7935 "kvm: SMP vm created on host with unstable TSC; "
7936 "guest TSC will not be reliable\n");
7938 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7943 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7947 kvm_vcpu_mtrr_init(vcpu
);
7948 r
= vcpu_load(vcpu
);
7951 kvm_vcpu_reset(vcpu
, false);
7952 kvm_mmu_setup(vcpu
);
7957 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7959 struct msr_data msr
;
7960 struct kvm
*kvm
= vcpu
->kvm
;
7962 kvm_hv_vcpu_postcreate(vcpu
);
7964 if (vcpu_load(vcpu
))
7967 msr
.index
= MSR_IA32_TSC
;
7968 msr
.host_initiated
= true;
7969 kvm_write_tsc(vcpu
, &msr
);
7972 if (!kvmclock_periodic_sync
)
7975 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7976 KVMCLOCK_SYNC_PERIOD
);
7979 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7982 vcpu
->arch
.apf
.msr_val
= 0;
7984 r
= vcpu_load(vcpu
);
7986 kvm_mmu_unload(vcpu
);
7989 kvm_x86_ops
->vcpu_free(vcpu
);
7992 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7994 kvm_lapic_reset(vcpu
, init_event
);
7996 vcpu
->arch
.hflags
= 0;
7998 vcpu
->arch
.smi_pending
= 0;
7999 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
8000 vcpu
->arch
.nmi_pending
= 0;
8001 vcpu
->arch
.nmi_injected
= false;
8002 kvm_clear_interrupt_queue(vcpu
);
8003 kvm_clear_exception_queue(vcpu
);
8004 vcpu
->arch
.exception
.pending
= false;
8006 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
8007 kvm_update_dr0123(vcpu
);
8008 vcpu
->arch
.dr6
= DR6_INIT
;
8009 kvm_update_dr6(vcpu
);
8010 vcpu
->arch
.dr7
= DR7_FIXED_1
;
8011 kvm_update_dr7(vcpu
);
8015 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8016 vcpu
->arch
.apf
.msr_val
= 0;
8017 vcpu
->arch
.st
.msr_val
= 0;
8019 kvmclock_reset(vcpu
);
8021 kvm_clear_async_pf_completion_queue(vcpu
);
8022 kvm_async_pf_hash_reset(vcpu
);
8023 vcpu
->arch
.apf
.halted
= false;
8025 if (kvm_mpx_supported()) {
8026 void *mpx_state_buffer
;
8029 * To avoid have the INIT path from kvm_apic_has_events() that be
8030 * called with loaded FPU and does not let userspace fix the state.
8033 kvm_put_guest_fpu(vcpu
);
8034 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8035 XFEATURE_MASK_BNDREGS
);
8036 if (mpx_state_buffer
)
8037 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8038 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
8039 XFEATURE_MASK_BNDCSR
);
8040 if (mpx_state_buffer
)
8041 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8043 kvm_load_guest_fpu(vcpu
);
8047 kvm_pmu_reset(vcpu
);
8048 vcpu
->arch
.smbase
= 0x30000;
8050 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8051 vcpu
->arch
.msr_misc_features_enables
= 0;
8053 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8056 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8057 vcpu
->arch
.regs_avail
= ~0;
8058 vcpu
->arch
.regs_dirty
= ~0;
8060 vcpu
->arch
.ia32_xss
= 0;
8062 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8065 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8067 struct kvm_segment cs
;
8069 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8070 cs
.selector
= vector
<< 8;
8071 cs
.base
= vector
<< 12;
8072 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8073 kvm_rip_write(vcpu
, 0);
8076 int kvm_arch_hardware_enable(void)
8079 struct kvm_vcpu
*vcpu
;
8084 bool stable
, backwards_tsc
= false;
8086 kvm_shared_msr_cpu_online();
8087 ret
= kvm_x86_ops
->hardware_enable();
8091 local_tsc
= rdtsc();
8092 stable
= !check_tsc_unstable();
8093 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8094 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8095 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8096 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8097 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8098 backwards_tsc
= true;
8099 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8100 max_tsc
= vcpu
->arch
.last_host_tsc
;
8106 * Sometimes, even reliable TSCs go backwards. This happens on
8107 * platforms that reset TSC during suspend or hibernate actions, but
8108 * maintain synchronization. We must compensate. Fortunately, we can
8109 * detect that condition here, which happens early in CPU bringup,
8110 * before any KVM threads can be running. Unfortunately, we can't
8111 * bring the TSCs fully up to date with real time, as we aren't yet far
8112 * enough into CPU bringup that we know how much real time has actually
8113 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8114 * variables that haven't been updated yet.
8116 * So we simply find the maximum observed TSC above, then record the
8117 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8118 * the adjustment will be applied. Note that we accumulate
8119 * adjustments, in case multiple suspend cycles happen before some VCPU
8120 * gets a chance to run again. In the event that no KVM threads get a
8121 * chance to run, we will miss the entire elapsed period, as we'll have
8122 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8123 * loose cycle time. This isn't too big a deal, since the loss will be
8124 * uniform across all VCPUs (not to mention the scenario is extremely
8125 * unlikely). It is possible that a second hibernate recovery happens
8126 * much faster than a first, causing the observed TSC here to be
8127 * smaller; this would require additional padding adjustment, which is
8128 * why we set last_host_tsc to the local tsc observed here.
8130 * N.B. - this code below runs only on platforms with reliable TSC,
8131 * as that is the only way backwards_tsc is set above. Also note
8132 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8133 * have the same delta_cyc adjustment applied if backwards_tsc
8134 * is detected. Note further, this adjustment is only done once,
8135 * as we reset last_host_tsc on all VCPUs to stop this from being
8136 * called multiple times (one for each physical CPU bringup).
8138 * Platforms with unreliable TSCs don't have to deal with this, they
8139 * will be compensated by the logic in vcpu_load, which sets the TSC to
8140 * catchup mode. This will catchup all VCPUs to real time, but cannot
8141 * guarantee that they stay in perfect synchronization.
8143 if (backwards_tsc
) {
8144 u64 delta_cyc
= max_tsc
- local_tsc
;
8145 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8146 kvm
->arch
.backwards_tsc_observed
= true;
8147 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8148 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8149 vcpu
->arch
.last_host_tsc
= local_tsc
;
8150 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8154 * We have to disable TSC offset matching.. if you were
8155 * booting a VM while issuing an S4 host suspend....
8156 * you may have some problem. Solving this issue is
8157 * left as an exercise to the reader.
8159 kvm
->arch
.last_tsc_nsec
= 0;
8160 kvm
->arch
.last_tsc_write
= 0;
8167 void kvm_arch_hardware_disable(void)
8169 kvm_x86_ops
->hardware_disable();
8170 drop_user_return_notifiers();
8173 int kvm_arch_hardware_setup(void)
8177 r
= kvm_x86_ops
->hardware_setup();
8181 if (kvm_has_tsc_control
) {
8183 * Make sure the user can only configure tsc_khz values that
8184 * fit into a signed integer.
8185 * A min value is not calculated needed because it will always
8186 * be 1 on all machines.
8188 u64 max
= min(0x7fffffffULL
,
8189 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8190 kvm_max_guest_tsc_khz
= max
;
8192 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8195 kvm_init_msr_list();
8199 void kvm_arch_hardware_unsetup(void)
8201 kvm_x86_ops
->hardware_unsetup();
8204 void kvm_arch_check_processor_compat(void *rtn
)
8206 kvm_x86_ops
->check_processor_compatibility(rtn
);
8209 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8211 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8213 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8215 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8217 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8220 struct static_key kvm_no_apic_vcpu __read_mostly
;
8221 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8223 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8228 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8229 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8230 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8231 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8233 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8235 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8240 vcpu
->arch
.pio_data
= page_address(page
);
8242 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8244 r
= kvm_mmu_create(vcpu
);
8246 goto fail_free_pio_data
;
8248 if (irqchip_in_kernel(vcpu
->kvm
)) {
8249 r
= kvm_create_lapic(vcpu
);
8251 goto fail_mmu_destroy
;
8253 static_key_slow_inc(&kvm_no_apic_vcpu
);
8255 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8257 if (!vcpu
->arch
.mce_banks
) {
8259 goto fail_free_lapic
;
8261 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8263 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8265 goto fail_free_mce_banks
;
8270 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8272 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8274 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8276 kvm_async_pf_hash_reset(vcpu
);
8279 vcpu
->arch
.pending_external_vector
= -1;
8280 vcpu
->arch
.preempted_in_kernel
= false;
8282 kvm_hv_vcpu_init(vcpu
);
8286 fail_free_mce_banks
:
8287 kfree(vcpu
->arch
.mce_banks
);
8289 kvm_free_lapic(vcpu
);
8291 kvm_mmu_destroy(vcpu
);
8293 free_page((unsigned long)vcpu
->arch
.pio_data
);
8298 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8302 kvm_hv_vcpu_uninit(vcpu
);
8303 kvm_pmu_destroy(vcpu
);
8304 kfree(vcpu
->arch
.mce_banks
);
8305 kvm_free_lapic(vcpu
);
8306 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8307 kvm_mmu_destroy(vcpu
);
8308 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8309 free_page((unsigned long)vcpu
->arch
.pio_data
);
8310 if (!lapic_in_kernel(vcpu
))
8311 static_key_slow_dec(&kvm_no_apic_vcpu
);
8314 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8316 vcpu
->arch
.l1tf_flush_l1d
= true;
8317 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8320 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8325 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8326 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8327 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8328 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8329 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8331 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8332 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8333 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8334 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8335 &kvm
->arch
.irq_sources_bitmap
);
8337 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8338 mutex_init(&kvm
->arch
.apic_map_lock
);
8339 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8340 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8342 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8343 pvclock_update_vm_gtod_copy(kvm
);
8345 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8346 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8348 kvm_page_track_init(kvm
);
8349 kvm_mmu_init_vm(kvm
);
8351 if (kvm_x86_ops
->vm_init
)
8352 return kvm_x86_ops
->vm_init(kvm
);
8357 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8360 r
= vcpu_load(vcpu
);
8362 kvm_mmu_unload(vcpu
);
8366 static void kvm_free_vcpus(struct kvm
*kvm
)
8369 struct kvm_vcpu
*vcpu
;
8372 * Unpin any mmu pages first.
8374 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8375 kvm_clear_async_pf_completion_queue(vcpu
);
8376 kvm_unload_vcpu_mmu(vcpu
);
8378 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8379 kvm_arch_vcpu_free(vcpu
);
8381 mutex_lock(&kvm
->lock
);
8382 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8383 kvm
->vcpus
[i
] = NULL
;
8385 atomic_set(&kvm
->online_vcpus
, 0);
8386 mutex_unlock(&kvm
->lock
);
8389 void kvm_arch_sync_events(struct kvm
*kvm
)
8391 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8392 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8396 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8400 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8401 struct kvm_memory_slot
*slot
, old
;
8403 /* Called with kvm->slots_lock held. */
8404 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8407 slot
= id_to_memslot(slots
, id
);
8413 * MAP_SHARED to prevent internal slot pages from being moved
8416 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8417 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8418 if (IS_ERR((void *)hva
))
8419 return PTR_ERR((void *)hva
);
8428 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8429 struct kvm_userspace_memory_region m
;
8431 m
.slot
= id
| (i
<< 16);
8433 m
.guest_phys_addr
= gpa
;
8434 m
.userspace_addr
= hva
;
8435 m
.memory_size
= size
;
8436 r
= __kvm_set_memory_region(kvm
, &m
);
8442 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8446 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8448 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8452 mutex_lock(&kvm
->slots_lock
);
8453 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8454 mutex_unlock(&kvm
->slots_lock
);
8458 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8460 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8462 if (current
->mm
== kvm
->mm
) {
8464 * Free memory regions allocated on behalf of userspace,
8465 * unless the the memory map has changed due to process exit
8468 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8469 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8470 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8472 if (kvm_x86_ops
->vm_destroy
)
8473 kvm_x86_ops
->vm_destroy(kvm
);
8474 kvm_pic_destroy(kvm
);
8475 kvm_ioapic_destroy(kvm
);
8476 kvm_free_vcpus(kvm
);
8477 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8478 kvm_mmu_uninit_vm(kvm
);
8479 kvm_page_track_cleanup(kvm
);
8482 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8483 struct kvm_memory_slot
*dont
)
8487 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8488 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8489 kvfree(free
->arch
.rmap
[i
]);
8490 free
->arch
.rmap
[i
] = NULL
;
8495 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8496 dont
->arch
.lpage_info
[i
- 1]) {
8497 kvfree(free
->arch
.lpage_info
[i
- 1]);
8498 free
->arch
.lpage_info
[i
- 1] = NULL
;
8502 kvm_page_track_free_memslot(free
, dont
);
8505 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8506 unsigned long npages
)
8510 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8511 struct kvm_lpage_info
*linfo
;
8516 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8517 slot
->base_gfn
, level
) + 1;
8519 slot
->arch
.rmap
[i
] =
8520 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8521 if (!slot
->arch
.rmap
[i
])
8526 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8530 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8532 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8533 linfo
[0].disallow_lpage
= 1;
8534 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8535 linfo
[lpages
- 1].disallow_lpage
= 1;
8536 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8538 * If the gfn and userspace address are not aligned wrt each
8539 * other, or if explicitly asked to, disable large page
8540 * support for this slot
8542 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8543 !kvm_largepages_enabled()) {
8546 for (j
= 0; j
< lpages
; ++j
)
8547 linfo
[j
].disallow_lpage
= 1;
8551 if (kvm_page_track_create_memslot(slot
, npages
))
8557 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8558 kvfree(slot
->arch
.rmap
[i
]);
8559 slot
->arch
.rmap
[i
] = NULL
;
8563 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8564 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8569 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8572 * memslots->generation has been incremented.
8573 * mmio generation may have reached its maximum value.
8575 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8578 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8579 struct kvm_memory_slot
*memslot
,
8580 const struct kvm_userspace_memory_region
*mem
,
8581 enum kvm_mr_change change
)
8586 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8587 struct kvm_memory_slot
*new)
8589 /* Still write protect RO slot */
8590 if (new->flags
& KVM_MEM_READONLY
) {
8591 kvm_mmu_slot_remove_write_access(kvm
, new);
8596 * Call kvm_x86_ops dirty logging hooks when they are valid.
8598 * kvm_x86_ops->slot_disable_log_dirty is called when:
8600 * - KVM_MR_CREATE with dirty logging is disabled
8601 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8603 * The reason is, in case of PML, we need to set D-bit for any slots
8604 * with dirty logging disabled in order to eliminate unnecessary GPA
8605 * logging in PML buffer (and potential PML buffer full VMEXT). This
8606 * guarantees leaving PML enabled during guest's lifetime won't have
8607 * any additonal overhead from PML when guest is running with dirty
8608 * logging disabled for memory slots.
8610 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8611 * to dirty logging mode.
8613 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8615 * In case of write protect:
8617 * Write protect all pages for dirty logging.
8619 * All the sptes including the large sptes which point to this
8620 * slot are set to readonly. We can not create any new large
8621 * spte on this slot until the end of the logging.
8623 * See the comments in fast_page_fault().
8625 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8626 if (kvm_x86_ops
->slot_enable_log_dirty
)
8627 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8629 kvm_mmu_slot_remove_write_access(kvm
, new);
8631 if (kvm_x86_ops
->slot_disable_log_dirty
)
8632 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8636 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8637 const struct kvm_userspace_memory_region
*mem
,
8638 const struct kvm_memory_slot
*old
,
8639 const struct kvm_memory_slot
*new,
8640 enum kvm_mr_change change
)
8642 int nr_mmu_pages
= 0;
8644 if (!kvm
->arch
.n_requested_mmu_pages
)
8645 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8648 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8651 * Dirty logging tracks sptes in 4k granularity, meaning that large
8652 * sptes have to be split. If live migration is successful, the guest
8653 * in the source machine will be destroyed and large sptes will be
8654 * created in the destination. However, if the guest continues to run
8655 * in the source machine (for example if live migration fails), small
8656 * sptes will remain around and cause bad performance.
8658 * Scan sptes if dirty logging has been stopped, dropping those
8659 * which can be collapsed into a single large-page spte. Later
8660 * page faults will create the large-page sptes.
8662 if ((change
!= KVM_MR_DELETE
) &&
8663 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8664 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8665 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8668 * Set up write protection and/or dirty logging for the new slot.
8670 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8671 * been zapped so no dirty logging staff is needed for old slot. For
8672 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8673 * new and it's also covered when dealing with the new slot.
8675 * FIXME: const-ify all uses of struct kvm_memory_slot.
8677 if (change
!= KVM_MR_DELETE
)
8678 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8681 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8683 kvm_mmu_invalidate_zap_all_pages(kvm
);
8686 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8687 struct kvm_memory_slot
*slot
)
8689 kvm_page_track_flush_slot(kvm
, slot
);
8692 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8694 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8697 if (kvm_apic_has_events(vcpu
))
8700 if (vcpu
->arch
.pv
.pv_unhalted
)
8703 if (vcpu
->arch
.exception
.pending
)
8706 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8707 (vcpu
->arch
.nmi_pending
&&
8708 kvm_x86_ops
->nmi_allowed(vcpu
)))
8711 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8712 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8715 if (kvm_arch_interrupt_allowed(vcpu
) &&
8716 kvm_cpu_has_interrupt(vcpu
))
8719 if (kvm_hv_has_stimer_pending(vcpu
))
8725 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8727 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8730 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8732 return vcpu
->arch
.preempted_in_kernel
;
8735 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8737 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8740 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8742 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8745 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8747 if (is_64_bit_mode(vcpu
))
8748 return kvm_rip_read(vcpu
);
8749 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8750 kvm_rip_read(vcpu
));
8752 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8754 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8756 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8758 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8760 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8762 unsigned long rflags
;
8764 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8765 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8766 rflags
&= ~X86_EFLAGS_TF
;
8769 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8771 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8773 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8774 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8775 rflags
|= X86_EFLAGS_TF
;
8776 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8779 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8781 __kvm_set_rflags(vcpu
, rflags
);
8782 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8784 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8786 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8790 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8794 r
= kvm_mmu_reload(vcpu
);
8798 if (!vcpu
->arch
.mmu
.direct_map
&&
8799 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8802 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8805 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8807 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8810 static inline u32
kvm_async_pf_next_probe(u32 key
)
8812 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8815 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8817 u32 key
= kvm_async_pf_hash_fn(gfn
);
8819 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8820 key
= kvm_async_pf_next_probe(key
);
8822 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8825 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8828 u32 key
= kvm_async_pf_hash_fn(gfn
);
8830 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8831 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8832 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8833 key
= kvm_async_pf_next_probe(key
);
8838 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8840 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8843 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8847 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8849 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8851 j
= kvm_async_pf_next_probe(j
);
8852 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8854 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8856 * k lies cyclically in ]i,j]
8858 * |....j i.k.| or |.k..j i...|
8860 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8861 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8866 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8869 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8873 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8876 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8880 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8881 struct kvm_async_pf
*work
)
8883 struct x86_exception fault
;
8885 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8886 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8888 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8889 (vcpu
->arch
.apf
.send_user_only
&&
8890 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8891 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8892 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8893 fault
.vector
= PF_VECTOR
;
8894 fault
.error_code_valid
= true;
8895 fault
.error_code
= 0;
8896 fault
.nested_page_fault
= false;
8897 fault
.address
= work
->arch
.token
;
8898 fault
.async_page_fault
= true;
8899 kvm_inject_page_fault(vcpu
, &fault
);
8903 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8904 struct kvm_async_pf
*work
)
8906 struct x86_exception fault
;
8909 if (work
->wakeup_all
)
8910 work
->arch
.token
= ~0; /* broadcast wakeup */
8912 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8913 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8915 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8916 !apf_get_user(vcpu
, &val
)) {
8917 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8918 vcpu
->arch
.exception
.pending
&&
8919 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8920 !apf_put_user(vcpu
, 0)) {
8921 vcpu
->arch
.exception
.injected
= false;
8922 vcpu
->arch
.exception
.pending
= false;
8923 vcpu
->arch
.exception
.nr
= 0;
8924 vcpu
->arch
.exception
.has_error_code
= false;
8925 vcpu
->arch
.exception
.error_code
= 0;
8926 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8927 fault
.vector
= PF_VECTOR
;
8928 fault
.error_code_valid
= true;
8929 fault
.error_code
= 0;
8930 fault
.nested_page_fault
= false;
8931 fault
.address
= work
->arch
.token
;
8932 fault
.async_page_fault
= true;
8933 kvm_inject_page_fault(vcpu
, &fault
);
8936 vcpu
->arch
.apf
.halted
= false;
8937 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8940 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8942 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8945 return kvm_can_do_async_pf(vcpu
);
8948 void kvm_arch_start_assignment(struct kvm
*kvm
)
8950 atomic_inc(&kvm
->arch
.assigned_device_count
);
8952 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8954 void kvm_arch_end_assignment(struct kvm
*kvm
)
8956 atomic_dec(&kvm
->arch
.assigned_device_count
);
8958 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8960 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8962 return atomic_read(&kvm
->arch
.assigned_device_count
);
8964 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8966 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8968 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8970 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8972 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8974 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8976 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8978 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8980 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8982 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8984 bool kvm_arch_has_irq_bypass(void)
8986 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8989 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8990 struct irq_bypass_producer
*prod
)
8992 struct kvm_kernel_irqfd
*irqfd
=
8993 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8995 irqfd
->producer
= prod
;
8997 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8998 prod
->irq
, irqfd
->gsi
, 1);
9001 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
9002 struct irq_bypass_producer
*prod
)
9005 struct kvm_kernel_irqfd
*irqfd
=
9006 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9008 WARN_ON(irqfd
->producer
!= prod
);
9009 irqfd
->producer
= NULL
;
9012 * When producer of consumer is unregistered, we change back to
9013 * remapped mode, so we can re-use the current implementation
9014 * when the irq is masked/disabled or the consumer side (KVM
9015 * int this case doesn't want to receive the interrupts.
9017 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
9019 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
9020 " fails: %d\n", irqfd
->consumer
.token
, ret
);
9023 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
9024 uint32_t guest_irq
, bool set
)
9026 if (!kvm_x86_ops
->update_pi_irte
)
9029 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9032 bool kvm_vector_hashing_enabled(void)
9034 return vector_hashing
;
9036 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9038 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9039 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9040 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9041 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9042 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9043 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9044 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9045 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9046 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9047 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9048 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9049 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9050 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9051 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9052 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9053 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9054 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9055 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9056 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);