2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
57 #include <linux/mem_encrypt.h>
59 #include <trace/events/kvm.h>
61 #include <asm/debugreg.h>
65 #include <linux/kernel_stat.h>
66 #include <asm/fpu/internal.h> /* Ugh! */
67 #include <asm/pvclock.h>
68 #include <asm/div64.h>
69 #include <asm/irq_remapping.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
104 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
105 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
107 static bool __read_mostly ignore_msrs
= 0;
108 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
110 static bool __read_mostly report_ignored_msrs
= true;
111 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
113 unsigned int min_timer_period_us
= 500;
114 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
116 static bool __read_mostly kvmclock_periodic_sync
= true;
117 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
119 bool __read_mostly kvm_has_tsc_control
;
120 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
121 u32 __read_mostly kvm_max_guest_tsc_khz
;
122 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
123 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
124 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
125 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
126 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
127 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
130 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
131 static u32 __read_mostly tsc_tolerance_ppm
= 250;
132 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
134 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
135 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
136 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly vector_hashing
= true;
139 module_param(vector_hashing
, bool, S_IRUGO
);
141 #define KVM_NR_SHARED_MSRS 16
143 struct kvm_shared_msrs_global
{
145 u32 msrs
[KVM_NR_SHARED_MSRS
];
148 struct kvm_shared_msrs
{
149 struct user_return_notifier urn
;
151 struct kvm_shared_msr_values
{
154 } values
[KVM_NR_SHARED_MSRS
];
157 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
158 static struct kvm_shared_msrs __percpu
*shared_msrs
;
160 struct kvm_stats_debugfs_item debugfs_entries
[] = {
161 { "pf_fixed", VCPU_STAT(pf_fixed
) },
162 { "pf_guest", VCPU_STAT(pf_guest
) },
163 { "tlb_flush", VCPU_STAT(tlb_flush
) },
164 { "invlpg", VCPU_STAT(invlpg
) },
165 { "exits", VCPU_STAT(exits
) },
166 { "io_exits", VCPU_STAT(io_exits
) },
167 { "mmio_exits", VCPU_STAT(mmio_exits
) },
168 { "signal_exits", VCPU_STAT(signal_exits
) },
169 { "irq_window", VCPU_STAT(irq_window_exits
) },
170 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
171 { "halt_exits", VCPU_STAT(halt_exits
) },
172 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
173 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
174 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
175 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
176 { "hypercalls", VCPU_STAT(hypercalls
) },
177 { "request_irq", VCPU_STAT(request_irq_exits
) },
178 { "irq_exits", VCPU_STAT(irq_exits
) },
179 { "host_state_reload", VCPU_STAT(host_state_reload
) },
180 { "efer_reload", VCPU_STAT(efer_reload
) },
181 { "fpu_reload", VCPU_STAT(fpu_reload
) },
182 { "insn_emulation", VCPU_STAT(insn_emulation
) },
183 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
184 { "irq_injections", VCPU_STAT(irq_injections
) },
185 { "nmi_injections", VCPU_STAT(nmi_injections
) },
186 { "req_event", VCPU_STAT(req_event
) },
187 { "l1d_flush", VCPU_STAT(l1d_flush
) },
188 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
189 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
190 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
191 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
192 { "mmu_flooded", VM_STAT(mmu_flooded
) },
193 { "mmu_recycled", VM_STAT(mmu_recycled
) },
194 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
195 { "mmu_unsync", VM_STAT(mmu_unsync
) },
196 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
197 { "largepages", VM_STAT(lpages
) },
198 { "max_mmu_page_hash_collisions",
199 VM_STAT(max_mmu_page_hash_collisions
) },
203 u64 __read_mostly host_xcr0
;
205 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
207 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
210 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
211 vcpu
->arch
.apf
.gfns
[i
] = ~0;
214 static void kvm_on_user_return(struct user_return_notifier
*urn
)
217 struct kvm_shared_msrs
*locals
218 = container_of(urn
, struct kvm_shared_msrs
, urn
);
219 struct kvm_shared_msr_values
*values
;
223 * Disabling irqs at this point since the following code could be
224 * interrupted and executed through kvm_arch_hardware_disable()
226 local_irq_save(flags
);
227 if (locals
->registered
) {
228 locals
->registered
= false;
229 user_return_notifier_unregister(urn
);
231 local_irq_restore(flags
);
232 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
233 values
= &locals
->values
[slot
];
234 if (values
->host
!= values
->curr
) {
235 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
236 values
->curr
= values
->host
;
241 static void shared_msr_update(unsigned slot
, u32 msr
)
244 unsigned int cpu
= smp_processor_id();
245 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
247 /* only read, and nobody should modify it at this time,
248 * so don't need lock */
249 if (slot
>= shared_msrs_global
.nr
) {
250 printk(KERN_ERR
"kvm: invalid MSR slot!");
253 rdmsrl_safe(msr
, &value
);
254 smsr
->values
[slot
].host
= value
;
255 smsr
->values
[slot
].curr
= value
;
258 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
260 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
261 shared_msrs_global
.msrs
[slot
] = msr
;
262 if (slot
>= shared_msrs_global
.nr
)
263 shared_msrs_global
.nr
= slot
+ 1;
265 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
267 static void kvm_shared_msr_cpu_online(void)
271 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
272 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
275 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
277 unsigned int cpu
= smp_processor_id();
278 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
281 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
283 smsr
->values
[slot
].curr
= value
;
284 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
288 if (!smsr
->registered
) {
289 smsr
->urn
.on_user_return
= kvm_on_user_return
;
290 user_return_notifier_register(&smsr
->urn
);
291 smsr
->registered
= true;
295 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
297 static void drop_user_return_notifiers(void)
299 unsigned int cpu
= smp_processor_id();
300 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
302 if (smsr
->registered
)
303 kvm_on_user_return(&smsr
->urn
);
306 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
308 return vcpu
->arch
.apic_base
;
310 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
312 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
314 u64 old_state
= vcpu
->arch
.apic_base
&
315 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
316 u64 new_state
= msr_info
->data
&
317 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
318 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
319 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
321 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
323 if (!msr_info
->host_initiated
&&
324 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
325 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
326 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
330 kvm_lapic_set_base(vcpu
, msr_info
->data
);
333 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
335 asmlinkage __visible
void kvm_spurious_fault(void)
337 /* Fault while not rebooting. We want the trace. */
340 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
342 #define EXCPT_BENIGN 0
343 #define EXCPT_CONTRIBUTORY 1
346 static int exception_class(int vector
)
356 return EXCPT_CONTRIBUTORY
;
363 #define EXCPT_FAULT 0
365 #define EXCPT_ABORT 2
366 #define EXCPT_INTERRUPT 3
368 static int exception_type(int vector
)
372 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
373 return EXCPT_INTERRUPT
;
377 /* #DB is trap, as instruction watchpoints are handled elsewhere */
378 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
381 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
384 /* Reserved exceptions will result in fault */
388 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
389 unsigned nr
, bool has_error
, u32 error_code
,
395 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
397 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
399 if (has_error
&& !is_protmode(vcpu
))
403 * On vmentry, vcpu->arch.exception.pending is only
404 * true if an event injection was blocked by
405 * nested_run_pending. In that case, however,
406 * vcpu_enter_guest requests an immediate exit,
407 * and the guest shouldn't proceed far enough to
410 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
411 vcpu
->arch
.exception
.injected
= true;
413 vcpu
->arch
.exception
.pending
= true;
414 vcpu
->arch
.exception
.injected
= false;
416 vcpu
->arch
.exception
.has_error_code
= has_error
;
417 vcpu
->arch
.exception
.nr
= nr
;
418 vcpu
->arch
.exception
.error_code
= error_code
;
422 /* to check exception */
423 prev_nr
= vcpu
->arch
.exception
.nr
;
424 if (prev_nr
== DF_VECTOR
) {
425 /* triple fault -> shutdown */
426 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
429 class1
= exception_class(prev_nr
);
430 class2
= exception_class(nr
);
431 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
432 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
434 * Generate double fault per SDM Table 5-5. Set
435 * exception.pending = true so that the double fault
436 * can trigger a nested vmexit.
438 vcpu
->arch
.exception
.pending
= true;
439 vcpu
->arch
.exception
.injected
= false;
440 vcpu
->arch
.exception
.has_error_code
= true;
441 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
442 vcpu
->arch
.exception
.error_code
= 0;
444 /* replace previous exception with a new one in a hope
445 that instruction re-execution will regenerate lost
450 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
452 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
454 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
456 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
458 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
460 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
462 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
465 kvm_inject_gp(vcpu
, 0);
467 return kvm_skip_emulated_instruction(vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
473 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
475 ++vcpu
->stat
.pf_guest
;
476 vcpu
->arch
.exception
.nested_apf
=
477 is_guest_mode(vcpu
) && fault
->async_page_fault
;
478 if (vcpu
->arch
.exception
.nested_apf
)
479 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
481 vcpu
->arch
.cr2
= fault
->address
;
482 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
484 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
486 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
488 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
489 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
491 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
493 return fault
->nested_page_fault
;
496 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
498 atomic_inc(&vcpu
->arch
.nmi_queued
);
499 kvm_make_request(KVM_REQ_NMI
, vcpu
);
501 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
503 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
505 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
507 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
509 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
511 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
513 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
516 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
517 * a #GP and return false.
519 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
521 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
523 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
526 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
528 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
530 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
533 kvm_queue_exception(vcpu
, UD_VECTOR
);
536 EXPORT_SYMBOL_GPL(kvm_require_dr
);
539 * This function will be used to read from the physical memory of the currently
540 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
541 * can read from guest physical or from the guest's guest physical memory.
543 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
544 gfn_t ngfn
, void *data
, int offset
, int len
,
547 struct x86_exception exception
;
551 ngpa
= gfn_to_gpa(ngfn
);
552 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
553 if (real_gfn
== UNMAPPED_GVA
)
556 real_gfn
= gpa_to_gfn(real_gfn
);
558 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
560 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
562 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
563 void *data
, int offset
, int len
, u32 access
)
565 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
566 data
, offset
, len
, access
);
570 * Load the pae pdptrs. Return true is they are all valid.
572 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
574 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
575 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
578 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
580 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
581 offset
* sizeof(u64
), sizeof(pdpte
),
582 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
587 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
588 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
590 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
597 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
598 __set_bit(VCPU_EXREG_PDPTR
,
599 (unsigned long *)&vcpu
->arch
.regs_avail
);
600 __set_bit(VCPU_EXREG_PDPTR
,
601 (unsigned long *)&vcpu
->arch
.regs_dirty
);
606 EXPORT_SYMBOL_GPL(load_pdptrs
);
608 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
610 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
616 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
619 if (!test_bit(VCPU_EXREG_PDPTR
,
620 (unsigned long *)&vcpu
->arch
.regs_avail
))
623 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
624 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
625 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
626 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
629 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
634 EXPORT_SYMBOL_GPL(pdptrs_changed
);
636 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
638 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
639 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
644 if (cr0
& 0xffffffff00000000UL
)
648 cr0
&= ~CR0_RESERVED_BITS
;
650 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
653 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
656 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
658 if ((vcpu
->arch
.efer
& EFER_LME
)) {
663 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
668 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
673 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
676 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
678 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
679 kvm_clear_async_pf_completion_queue(vcpu
);
680 kvm_async_pf_hash_reset(vcpu
);
683 if ((cr0
^ old_cr0
) & update_bits
)
684 kvm_mmu_reset_context(vcpu
);
686 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
687 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
688 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
689 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
693 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
695 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
697 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
699 EXPORT_SYMBOL_GPL(kvm_lmsw
);
701 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
703 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
704 !vcpu
->guest_xcr0_loaded
) {
705 /* kvm_set_xcr() also depends on this */
706 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
707 vcpu
->guest_xcr0_loaded
= 1;
711 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
713 if (vcpu
->guest_xcr0_loaded
) {
714 if (vcpu
->arch
.xcr0
!= host_xcr0
)
715 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
716 vcpu
->guest_xcr0_loaded
= 0;
720 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
723 u64 old_xcr0
= vcpu
->arch
.xcr0
;
726 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
727 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
729 if (!(xcr0
& XFEATURE_MASK_FP
))
731 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
735 * Do not allow the guest to set bits that we do not support
736 * saving. However, xcr0 bit 0 is always set, even if the
737 * emulated CPU does not support XSAVE (see fx_init).
739 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
740 if (xcr0
& ~valid_bits
)
743 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
744 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
747 if (xcr0
& XFEATURE_MASK_AVX512
) {
748 if (!(xcr0
& XFEATURE_MASK_YMM
))
750 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
753 vcpu
->arch
.xcr0
= xcr0
;
755 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
756 kvm_update_cpuid(vcpu
);
760 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
762 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
763 __kvm_set_xcr(vcpu
, index
, xcr
)) {
764 kvm_inject_gp(vcpu
, 0);
769 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
771 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
773 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
774 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
775 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
777 if (cr4
& CR4_RESERVED_BITS
)
780 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
783 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
786 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
789 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
792 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
795 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
798 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
801 if (is_long_mode(vcpu
)) {
802 if (!(cr4
& X86_CR4_PAE
))
804 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
805 && ((cr4
^ old_cr4
) & pdptr_bits
)
806 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
810 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
811 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
814 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
815 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
819 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
822 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
823 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
824 kvm_mmu_reset_context(vcpu
);
826 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
827 kvm_update_cpuid(vcpu
);
831 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
833 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
836 cr3
&= ~CR3_PCID_INVD
;
839 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
840 kvm_mmu_sync_roots(vcpu
);
841 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
845 if (is_long_mode(vcpu
) &&
846 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 62)))
848 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
849 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
852 vcpu
->arch
.cr3
= cr3
;
853 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
854 kvm_mmu_new_cr3(vcpu
);
857 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
859 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
861 if (cr8
& CR8_RESERVED_BITS
)
863 if (lapic_in_kernel(vcpu
))
864 kvm_lapic_set_tpr(vcpu
, cr8
);
866 vcpu
->arch
.cr8
= cr8
;
869 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
871 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
873 if (lapic_in_kernel(vcpu
))
874 return kvm_lapic_get_cr8(vcpu
);
876 return vcpu
->arch
.cr8
;
878 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
880 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
884 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
885 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
886 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
887 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
891 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
893 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
894 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
897 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
901 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
902 dr7
= vcpu
->arch
.guest_debug_dr7
;
904 dr7
= vcpu
->arch
.dr7
;
905 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
906 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
907 if (dr7
& DR7_BP_EN_MASK
)
908 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
911 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
913 u64 fixed
= DR6_FIXED_1
;
915 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
920 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
924 vcpu
->arch
.db
[dr
] = val
;
925 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
926 vcpu
->arch
.eff_db
[dr
] = val
;
931 if (val
& 0xffffffff00000000ULL
)
933 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
934 kvm_update_dr6(vcpu
);
939 if (val
& 0xffffffff00000000ULL
)
941 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
942 kvm_update_dr7(vcpu
);
949 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
951 if (__kvm_set_dr(vcpu
, dr
, val
)) {
952 kvm_inject_gp(vcpu
, 0);
957 EXPORT_SYMBOL_GPL(kvm_set_dr
);
959 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
963 *val
= vcpu
->arch
.db
[dr
];
968 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
969 *val
= vcpu
->arch
.dr6
;
971 *val
= kvm_x86_ops
->get_dr6(vcpu
);
976 *val
= vcpu
->arch
.dr7
;
981 EXPORT_SYMBOL_GPL(kvm_get_dr
);
983 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
985 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
989 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
992 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
993 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
996 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
999 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1000 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1002 * This list is modified at module load time to reflect the
1003 * capabilities of the host cpu. This capabilities test skips MSRs that are
1004 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1005 * may depend on host virtualization features rather than host cpu features.
1008 static u32 msrs_to_save
[] = {
1009 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1011 #ifdef CONFIG_X86_64
1012 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1014 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1015 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1016 MSR_IA32_SPEC_CTRL
, MSR_IA32_ARCH_CAPABILITIES
1019 static unsigned num_msrs_to_save
;
1021 static u32 emulated_msrs
[] = {
1022 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1023 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1024 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1025 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1026 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1027 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1028 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1030 HV_X64_MSR_VP_INDEX
,
1031 HV_X64_MSR_VP_RUNTIME
,
1032 HV_X64_MSR_SCONTROL
,
1033 HV_X64_MSR_STIMER0_CONFIG
,
1034 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1037 MSR_IA32_TSC_ADJUST
,
1038 MSR_IA32_TSCDEADLINE
,
1039 MSR_IA32_MISC_ENABLE
,
1040 MSR_IA32_MCG_STATUS
,
1042 MSR_IA32_MCG_EXT_CTL
,
1045 MSR_MISC_FEATURES_ENABLES
,
1046 MSR_AMD64_VIRT_SPEC_CTRL
,
1049 static unsigned num_emulated_msrs
;
1052 * List of msr numbers which are used to expose MSR-based features that
1053 * can be used by a hypervisor to validate requested CPU features.
1055 static u32 msr_based_features
[] = {
1056 MSR_IA32_ARCH_CAPABILITIES
,
1059 static unsigned int num_msr_based_features
;
1061 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1063 switch (msr
->index
) {
1064 case MSR_IA32_ARCH_CAPABILITIES
:
1065 rdmsrl_safe(msr
->index
, &msr
->data
);
1068 if (kvm_x86_ops
->get_msr_feature(msr
))
1074 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1076 struct kvm_msr_entry msr
;
1080 r
= kvm_get_msr_feature(&msr
);
1089 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1091 if (efer
& efer_reserved_bits
)
1094 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1097 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1102 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1104 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1106 u64 old_efer
= vcpu
->arch
.efer
;
1108 if (!kvm_valid_efer(vcpu
, efer
))
1112 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1116 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1118 kvm_x86_ops
->set_efer(vcpu
, efer
);
1120 /* Update reserved bits */
1121 if ((efer
^ old_efer
) & EFER_NX
)
1122 kvm_mmu_reset_context(vcpu
);
1127 void kvm_enable_efer_bits(u64 mask
)
1129 efer_reserved_bits
&= ~mask
;
1131 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1134 * Writes msr value into into the appropriate "register".
1135 * Returns 0 on success, non-0 otherwise.
1136 * Assumes vcpu_load() was already called.
1138 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1140 switch (msr
->index
) {
1143 case MSR_KERNEL_GS_BASE
:
1146 if (is_noncanonical_address(msr
->data
, vcpu
))
1149 case MSR_IA32_SYSENTER_EIP
:
1150 case MSR_IA32_SYSENTER_ESP
:
1152 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1153 * non-canonical address is written on Intel but not on
1154 * AMD (which ignores the top 32-bits, because it does
1155 * not implement 64-bit SYSENTER).
1157 * 64-bit code should hence be able to write a non-canonical
1158 * value on AMD. Making the address canonical ensures that
1159 * vmentry does not fail on Intel after writing a non-canonical
1160 * value, and that something deterministic happens if the guest
1161 * invokes 64-bit SYSENTER.
1163 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1165 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1167 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1170 * Adapt set_msr() to msr_io()'s calling convention
1172 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1174 struct msr_data msr
;
1178 msr
.host_initiated
= true;
1179 r
= kvm_get_msr(vcpu
, &msr
);
1187 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1189 struct msr_data msr
;
1193 msr
.host_initiated
= true;
1194 return kvm_set_msr(vcpu
, &msr
);
1197 #ifdef CONFIG_X86_64
1198 struct pvclock_gtod_data
{
1201 struct { /* extract of a clocksource struct */
1214 static struct pvclock_gtod_data pvclock_gtod_data
;
1216 static void update_pvclock_gtod(struct timekeeper
*tk
)
1218 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1221 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1223 write_seqcount_begin(&vdata
->seq
);
1225 /* copy pvclock gtod data */
1226 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1227 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1228 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1229 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1230 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1232 vdata
->boot_ns
= boot_ns
;
1233 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1235 vdata
->wall_time_sec
= tk
->xtime_sec
;
1237 write_seqcount_end(&vdata
->seq
);
1241 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1244 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1245 * vcpu_enter_guest. This function is only called from
1246 * the physical CPU that is running vcpu.
1248 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1251 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1255 struct pvclock_wall_clock wc
;
1256 struct timespec64 boot
;
1261 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1266 ++version
; /* first time write, random junk */
1270 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1274 * The guest calculates current wall clock time by adding
1275 * system time (updated by kvm_guest_time_update below) to the
1276 * wall clock specified here. guest system time equals host
1277 * system time for us, thus we must fill in host boot time here.
1279 getboottime64(&boot
);
1281 if (kvm
->arch
.kvmclock_offset
) {
1282 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1283 boot
= timespec64_sub(boot
, ts
);
1285 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1286 wc
.nsec
= boot
.tv_nsec
;
1287 wc
.version
= version
;
1289 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1292 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1295 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1297 do_shl32_div32(dividend
, divisor
);
1301 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1302 s8
*pshift
, u32
*pmultiplier
)
1310 scaled64
= scaled_hz
;
1311 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1316 tps32
= (uint32_t)tps64
;
1317 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1318 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1326 *pmultiplier
= div_frac(scaled64
, tps32
);
1328 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1329 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1332 #ifdef CONFIG_X86_64
1333 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1336 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1337 static unsigned long max_tsc_khz
;
1339 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1341 u64 v
= (u64
)khz
* (1000000 + ppm
);
1346 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1350 /* Guest TSC same frequency as host TSC? */
1352 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1356 /* TSC scaling supported? */
1357 if (!kvm_has_tsc_control
) {
1358 if (user_tsc_khz
> tsc_khz
) {
1359 vcpu
->arch
.tsc_catchup
= 1;
1360 vcpu
->arch
.tsc_always_catchup
= 1;
1363 WARN(1, "user requested TSC rate below hardware speed\n");
1368 /* TSC scaling required - calculate ratio */
1369 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1370 user_tsc_khz
, tsc_khz
);
1372 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1373 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1378 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1382 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1384 u32 thresh_lo
, thresh_hi
;
1385 int use_scaling
= 0;
1387 /* tsc_khz can be zero if TSC calibration fails */
1388 if (user_tsc_khz
== 0) {
1389 /* set tsc_scaling_ratio to a safe value */
1390 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1394 /* Compute a scale to convert nanoseconds in TSC cycles */
1395 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1396 &vcpu
->arch
.virtual_tsc_shift
,
1397 &vcpu
->arch
.virtual_tsc_mult
);
1398 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1401 * Compute the variation in TSC rate which is acceptable
1402 * within the range of tolerance and decide if the
1403 * rate being applied is within that bounds of the hardware
1404 * rate. If so, no scaling or compensation need be done.
1406 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1407 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1408 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1409 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1412 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1415 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1417 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1418 vcpu
->arch
.virtual_tsc_mult
,
1419 vcpu
->arch
.virtual_tsc_shift
);
1420 tsc
+= vcpu
->arch
.this_tsc_write
;
1424 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1426 #ifdef CONFIG_X86_64
1428 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1429 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1431 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1432 atomic_read(&vcpu
->kvm
->online_vcpus
));
1435 * Once the masterclock is enabled, always perform request in
1436 * order to update it.
1438 * In order to enable masterclock, the host clocksource must be TSC
1439 * and the vcpus need to have matched TSCs. When that happens,
1440 * perform request to enable masterclock.
1442 if (ka
->use_master_clock
||
1443 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1444 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1446 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1447 atomic_read(&vcpu
->kvm
->online_vcpus
),
1448 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1452 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1454 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1455 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1459 * Multiply tsc by a fixed point number represented by ratio.
1461 * The most significant 64-N bits (mult) of ratio represent the
1462 * integral part of the fixed point number; the remaining N bits
1463 * (frac) represent the fractional part, ie. ratio represents a fixed
1464 * point number (mult + frac * 2^(-N)).
1466 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1468 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1470 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1473 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1476 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1478 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1479 _tsc
= __scale_tsc(ratio
, tsc
);
1483 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1485 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1489 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1491 return target_tsc
- tsc
;
1494 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1496 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1498 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1500 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1502 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1503 vcpu
->arch
.tsc_offset
= offset
;
1506 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1508 struct kvm
*kvm
= vcpu
->kvm
;
1509 u64 offset
, ns
, elapsed
;
1510 unsigned long flags
;
1512 bool already_matched
;
1513 u64 data
= msr
->data
;
1514 bool synchronizing
= false;
1516 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1517 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1518 ns
= ktime_get_boot_ns();
1519 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1521 if (vcpu
->arch
.virtual_tsc_khz
) {
1522 if (data
== 0 && msr
->host_initiated
) {
1524 * detection of vcpu initialization -- need to sync
1525 * with other vCPUs. This particularly helps to keep
1526 * kvm_clock stable after CPU hotplug
1528 synchronizing
= true;
1530 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1531 nsec_to_cycles(vcpu
, elapsed
);
1532 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1534 * Special case: TSC write with a small delta (1 second)
1535 * of virtual cycle time against real time is
1536 * interpreted as an attempt to synchronize the CPU.
1538 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1539 data
+ tsc_hz
> tsc_exp
;
1544 * For a reliable TSC, we can match TSC offsets, and for an unstable
1545 * TSC, we add elapsed time in this computation. We could let the
1546 * compensation code attempt to catch up if we fall behind, but
1547 * it's better to try to match offsets from the beginning.
1549 if (synchronizing
&&
1550 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1551 if (!check_tsc_unstable()) {
1552 offset
= kvm
->arch
.cur_tsc_offset
;
1553 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1555 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1557 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1558 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1561 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1564 * We split periods of matched TSC writes into generations.
1565 * For each generation, we track the original measured
1566 * nanosecond time, offset, and write, so if TSCs are in
1567 * sync, we can match exact offset, and if not, we can match
1568 * exact software computation in compute_guest_tsc()
1570 * These values are tracked in kvm->arch.cur_xxx variables.
1572 kvm
->arch
.cur_tsc_generation
++;
1573 kvm
->arch
.cur_tsc_nsec
= ns
;
1574 kvm
->arch
.cur_tsc_write
= data
;
1575 kvm
->arch
.cur_tsc_offset
= offset
;
1577 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1578 kvm
->arch
.cur_tsc_generation
, data
);
1582 * We also track th most recent recorded KHZ, write and time to
1583 * allow the matching interval to be extended at each write.
1585 kvm
->arch
.last_tsc_nsec
= ns
;
1586 kvm
->arch
.last_tsc_write
= data
;
1587 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1589 vcpu
->arch
.last_guest_tsc
= data
;
1591 /* Keep track of which generation this VCPU has synchronized to */
1592 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1593 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1594 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1596 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1597 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1599 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1600 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1602 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1604 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1605 } else if (!already_matched
) {
1606 kvm
->arch
.nr_vcpus_matched_tsc
++;
1609 kvm_track_tsc_matching(vcpu
);
1610 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1613 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1615 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1618 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1621 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1623 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1624 WARN_ON(adjustment
< 0);
1625 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1626 adjust_tsc_offset_guest(vcpu
, adjustment
);
1629 #ifdef CONFIG_X86_64
1631 static u64
read_tsc(void)
1633 u64 ret
= (u64
)rdtsc_ordered();
1634 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1636 if (likely(ret
>= last
))
1640 * GCC likes to generate cmov here, but this branch is extremely
1641 * predictable (it's just a function of time and the likely is
1642 * very likely) and there's a data dependence, so force GCC
1643 * to generate a branch instead. I don't barrier() because
1644 * we don't actually need a barrier, and if this function
1645 * ever gets inlined it will generate worse code.
1651 static inline u64
vgettsc(u64
*cycle_now
)
1654 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1656 *cycle_now
= read_tsc();
1658 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1659 return v
* gtod
->clock
.mult
;
1662 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1664 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1670 seq
= read_seqcount_begin(>od
->seq
);
1671 mode
= gtod
->clock
.vclock_mode
;
1672 ns
= gtod
->nsec_base
;
1673 ns
+= vgettsc(cycle_now
);
1674 ns
>>= gtod
->clock
.shift
;
1675 ns
+= gtod
->boot_ns
;
1676 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1682 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1684 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1690 seq
= read_seqcount_begin(>od
->seq
);
1691 mode
= gtod
->clock
.vclock_mode
;
1692 ts
->tv_sec
= gtod
->wall_time_sec
;
1693 ns
= gtod
->nsec_base
;
1694 ns
+= vgettsc(cycle_now
);
1695 ns
>>= gtod
->clock
.shift
;
1696 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1698 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1704 /* returns true if host is using tsc clocksource */
1705 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1707 /* checked again under seqlock below */
1708 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1711 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1714 /* returns true if host is using tsc clocksource */
1715 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1718 /* checked again under seqlock below */
1719 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1722 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1728 * Assuming a stable TSC across physical CPUS, and a stable TSC
1729 * across virtual CPUs, the following condition is possible.
1730 * Each numbered line represents an event visible to both
1731 * CPUs at the next numbered event.
1733 * "timespecX" represents host monotonic time. "tscX" represents
1736 * VCPU0 on CPU0 | VCPU1 on CPU1
1738 * 1. read timespec0,tsc0
1739 * 2. | timespec1 = timespec0 + N
1741 * 3. transition to guest | transition to guest
1742 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1743 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1744 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1746 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1749 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1751 * - 0 < N - M => M < N
1753 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1754 * always the case (the difference between two distinct xtime instances
1755 * might be smaller then the difference between corresponding TSC reads,
1756 * when updating guest vcpus pvclock areas).
1758 * To avoid that problem, do not allow visibility of distinct
1759 * system_timestamp/tsc_timestamp values simultaneously: use a master
1760 * copy of host monotonic time values. Update that master copy
1763 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1767 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1769 #ifdef CONFIG_X86_64
1770 struct kvm_arch
*ka
= &kvm
->arch
;
1772 bool host_tsc_clocksource
, vcpus_matched
;
1774 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1775 atomic_read(&kvm
->online_vcpus
));
1778 * If the host uses TSC clock, then passthrough TSC as stable
1781 host_tsc_clocksource
= kvm_get_time_and_clockread(
1782 &ka
->master_kernel_ns
,
1783 &ka
->master_cycle_now
);
1785 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1786 && !ka
->backwards_tsc_observed
1787 && !ka
->boot_vcpu_runs_old_kvmclock
;
1789 if (ka
->use_master_clock
)
1790 atomic_set(&kvm_guest_has_master_clock
, 1);
1792 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1793 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1798 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1800 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1803 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1805 #ifdef CONFIG_X86_64
1807 struct kvm_vcpu
*vcpu
;
1808 struct kvm_arch
*ka
= &kvm
->arch
;
1810 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1811 kvm_make_mclock_inprogress_request(kvm
);
1812 /* no guest entries from this point */
1813 pvclock_update_vm_gtod_copy(kvm
);
1815 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1816 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1818 /* guest entries allowed */
1819 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1820 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1822 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1826 u64
get_kvmclock_ns(struct kvm
*kvm
)
1828 struct kvm_arch
*ka
= &kvm
->arch
;
1829 struct pvclock_vcpu_time_info hv_clock
;
1832 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1833 if (!ka
->use_master_clock
) {
1834 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1835 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1838 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1839 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1840 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1842 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1845 if (__this_cpu_read(cpu_tsc_khz
)) {
1846 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1847 &hv_clock
.tsc_shift
,
1848 &hv_clock
.tsc_to_system_mul
);
1849 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1851 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
1858 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1860 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1861 struct pvclock_vcpu_time_info guest_hv_clock
;
1863 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1864 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1867 /* This VCPU is paused, but it's legal for a guest to read another
1868 * VCPU's kvmclock, so we really have to follow the specification where
1869 * it says that version is odd if data is being modified, and even after
1872 * Version field updates must be kept separate. This is because
1873 * kvm_write_guest_cached might use a "rep movs" instruction, and
1874 * writes within a string instruction are weakly ordered. So there
1875 * are three writes overall.
1877 * As a small optimization, only write the version field in the first
1878 * and third write. The vcpu->pv_time cache is still valid, because the
1879 * version field is the first in the struct.
1881 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1883 if (guest_hv_clock
.version
& 1)
1884 ++guest_hv_clock
.version
; /* first time write, random junk */
1886 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1887 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1889 sizeof(vcpu
->hv_clock
.version
));
1893 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1894 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1896 if (vcpu
->pvclock_set_guest_stopped_request
) {
1897 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1898 vcpu
->pvclock_set_guest_stopped_request
= false;
1901 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1903 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1905 sizeof(vcpu
->hv_clock
));
1909 vcpu
->hv_clock
.version
++;
1910 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1912 sizeof(vcpu
->hv_clock
.version
));
1915 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1917 unsigned long flags
, tgt_tsc_khz
;
1918 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1919 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1921 u64 tsc_timestamp
, host_tsc
;
1923 bool use_master_clock
;
1929 * If the host uses TSC clock, then passthrough TSC as stable
1932 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1933 use_master_clock
= ka
->use_master_clock
;
1934 if (use_master_clock
) {
1935 host_tsc
= ka
->master_cycle_now
;
1936 kernel_ns
= ka
->master_kernel_ns
;
1938 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1940 /* Keep irq disabled to prevent changes to the clock */
1941 local_irq_save(flags
);
1942 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1943 if (unlikely(tgt_tsc_khz
== 0)) {
1944 local_irq_restore(flags
);
1945 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1948 if (!use_master_clock
) {
1950 kernel_ns
= ktime_get_boot_ns();
1953 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1956 * We may have to catch up the TSC to match elapsed wall clock
1957 * time for two reasons, even if kvmclock is used.
1958 * 1) CPU could have been running below the maximum TSC rate
1959 * 2) Broken TSC compensation resets the base at each VCPU
1960 * entry to avoid unknown leaps of TSC even when running
1961 * again on the same CPU. This may cause apparent elapsed
1962 * time to disappear, and the guest to stand still or run
1965 if (vcpu
->tsc_catchup
) {
1966 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1967 if (tsc
> tsc_timestamp
) {
1968 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1969 tsc_timestamp
= tsc
;
1973 local_irq_restore(flags
);
1975 /* With all the info we got, fill in the values */
1977 if (kvm_has_tsc_control
)
1978 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1980 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1981 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1982 &vcpu
->hv_clock
.tsc_shift
,
1983 &vcpu
->hv_clock
.tsc_to_system_mul
);
1984 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1987 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1988 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1989 vcpu
->last_guest_tsc
= tsc_timestamp
;
1991 /* If the host uses TSC clocksource, then it is stable */
1993 if (use_master_clock
)
1994 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1996 vcpu
->hv_clock
.flags
= pvclock_flags
;
1998 if (vcpu
->pv_time_enabled
)
1999 kvm_setup_pvclock_page(v
);
2000 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2001 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2006 * kvmclock updates which are isolated to a given vcpu, such as
2007 * vcpu->cpu migration, should not allow system_timestamp from
2008 * the rest of the vcpus to remain static. Otherwise ntp frequency
2009 * correction applies to one vcpu's system_timestamp but not
2012 * So in those cases, request a kvmclock update for all vcpus.
2013 * We need to rate-limit these requests though, as they can
2014 * considerably slow guests that have a large number of vcpus.
2015 * The time for a remote vcpu to update its kvmclock is bound
2016 * by the delay we use to rate-limit the updates.
2019 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2021 static void kvmclock_update_fn(struct work_struct
*work
)
2024 struct delayed_work
*dwork
= to_delayed_work(work
);
2025 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2026 kvmclock_update_work
);
2027 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2028 struct kvm_vcpu
*vcpu
;
2030 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2031 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2032 kvm_vcpu_kick(vcpu
);
2036 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2038 struct kvm
*kvm
= v
->kvm
;
2040 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2041 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2042 KVMCLOCK_UPDATE_DELAY
);
2045 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2047 static void kvmclock_sync_fn(struct work_struct
*work
)
2049 struct delayed_work
*dwork
= to_delayed_work(work
);
2050 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2051 kvmclock_sync_work
);
2052 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2054 if (!kvmclock_periodic_sync
)
2057 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2058 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2059 KVMCLOCK_SYNC_PERIOD
);
2062 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2064 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2065 unsigned bank_num
= mcg_cap
& 0xff;
2066 u32 msr
= msr_info
->index
;
2067 u64 data
= msr_info
->data
;
2070 case MSR_IA32_MCG_STATUS
:
2071 vcpu
->arch
.mcg_status
= data
;
2073 case MSR_IA32_MCG_CTL
:
2074 if (!(mcg_cap
& MCG_CTL_P
))
2076 if (data
!= 0 && data
!= ~(u64
)0)
2078 vcpu
->arch
.mcg_ctl
= data
;
2081 if (msr
>= MSR_IA32_MC0_CTL
&&
2082 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2083 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2084 /* only 0 or all 1s can be written to IA32_MCi_CTL
2085 * some Linux kernels though clear bit 10 in bank 4 to
2086 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2087 * this to avoid an uncatched #GP in the guest
2089 if ((offset
& 0x3) == 0 &&
2090 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2092 if (!msr_info
->host_initiated
&&
2093 (offset
& 0x3) == 1 && data
!= 0)
2095 vcpu
->arch
.mce_banks
[offset
] = data
;
2103 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2105 struct kvm
*kvm
= vcpu
->kvm
;
2106 int lm
= is_long_mode(vcpu
);
2107 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2108 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2109 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2110 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2111 u32 page_num
= data
& ~PAGE_MASK
;
2112 u64 page_addr
= data
& PAGE_MASK
;
2117 if (page_num
>= blob_size
)
2120 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2125 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2134 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2136 gpa_t gpa
= data
& ~0x3f;
2138 /* Bits 3:5 are reserved, Should be zero */
2142 vcpu
->arch
.apf
.msr_val
= data
;
2144 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2145 kvm_clear_async_pf_completion_queue(vcpu
);
2146 kvm_async_pf_hash_reset(vcpu
);
2150 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2154 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2155 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2156 kvm_async_pf_wakeup_all(vcpu
);
2160 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2162 vcpu
->arch
.pv_time_enabled
= false;
2165 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2167 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2170 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2171 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2174 vcpu
->arch
.st
.steal
.preempted
= 0;
2176 if (vcpu
->arch
.st
.steal
.version
& 1)
2177 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2179 vcpu
->arch
.st
.steal
.version
+= 1;
2181 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2182 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2186 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2187 vcpu
->arch
.st
.last_steal
;
2188 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2190 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2191 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2195 vcpu
->arch
.st
.steal
.version
+= 1;
2197 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2198 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2201 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2204 u32 msr
= msr_info
->index
;
2205 u64 data
= msr_info
->data
;
2208 case MSR_AMD64_NB_CFG
:
2209 case MSR_IA32_UCODE_REV
:
2210 case MSR_IA32_UCODE_WRITE
:
2211 case MSR_VM_HSAVE_PA
:
2212 case MSR_AMD64_PATCH_LOADER
:
2213 case MSR_AMD64_BU_CFG2
:
2214 case MSR_AMD64_DC_CFG
:
2218 return set_efer(vcpu
, data
);
2220 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2221 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2222 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2223 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2225 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2230 case MSR_FAM10H_MMIO_CONF_BASE
:
2232 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2237 case MSR_IA32_DEBUGCTLMSR
:
2239 /* We support the non-activated case already */
2241 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2242 /* Values other than LBR and BTF are vendor-specific,
2243 thus reserved and should throw a #GP */
2246 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2249 case 0x200 ... 0x2ff:
2250 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2251 case MSR_IA32_APICBASE
:
2252 return kvm_set_apic_base(vcpu
, msr_info
);
2253 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2254 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2255 case MSR_IA32_TSCDEADLINE
:
2256 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2258 case MSR_IA32_TSC_ADJUST
:
2259 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2260 if (!msr_info
->host_initiated
) {
2261 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2262 adjust_tsc_offset_guest(vcpu
, adj
);
2264 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2267 case MSR_IA32_MISC_ENABLE
:
2268 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2270 case MSR_IA32_SMBASE
:
2271 if (!msr_info
->host_initiated
)
2273 vcpu
->arch
.smbase
= data
;
2275 case MSR_KVM_WALL_CLOCK_NEW
:
2276 case MSR_KVM_WALL_CLOCK
:
2277 vcpu
->kvm
->arch
.wall_clock
= data
;
2278 kvm_write_wall_clock(vcpu
->kvm
, data
);
2280 case MSR_KVM_SYSTEM_TIME_NEW
:
2281 case MSR_KVM_SYSTEM_TIME
: {
2282 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2284 kvmclock_reset(vcpu
);
2286 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2287 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2289 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2290 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2292 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2295 vcpu
->arch
.time
= data
;
2296 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2298 /* we verify if the enable bit is set... */
2302 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2303 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2304 sizeof(struct pvclock_vcpu_time_info
)))
2305 vcpu
->arch
.pv_time_enabled
= false;
2307 vcpu
->arch
.pv_time_enabled
= true;
2311 case MSR_KVM_ASYNC_PF_EN
:
2312 if (kvm_pv_enable_async_pf(vcpu
, data
))
2315 case MSR_KVM_STEAL_TIME
:
2317 if (unlikely(!sched_info_on()))
2320 if (data
& KVM_STEAL_RESERVED_MASK
)
2323 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2324 data
& KVM_STEAL_VALID_BITS
,
2325 sizeof(struct kvm_steal_time
)))
2328 vcpu
->arch
.st
.msr_val
= data
;
2330 if (!(data
& KVM_MSR_ENABLED
))
2333 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2336 case MSR_KVM_PV_EOI_EN
:
2337 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2341 case MSR_IA32_MCG_CTL
:
2342 case MSR_IA32_MCG_STATUS
:
2343 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2344 return set_msr_mce(vcpu
, msr_info
);
2346 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2347 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2348 pr
= true; /* fall through */
2349 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2350 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2351 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2352 return kvm_pmu_set_msr(vcpu
, msr_info
);
2354 if (pr
|| data
!= 0)
2355 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2356 "0x%x data 0x%llx\n", msr
, data
);
2358 case MSR_K7_CLK_CTL
:
2360 * Ignore all writes to this no longer documented MSR.
2361 * Writes are only relevant for old K7 processors,
2362 * all pre-dating SVM, but a recommended workaround from
2363 * AMD for these chips. It is possible to specify the
2364 * affected processor models on the command line, hence
2365 * the need to ignore the workaround.
2368 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2369 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2370 case HV_X64_MSR_CRASH_CTL
:
2371 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2372 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2373 msr_info
->host_initiated
);
2374 case MSR_IA32_BBL_CR_CTL3
:
2375 /* Drop writes to this legacy MSR -- see rdmsr
2376 * counterpart for further detail.
2378 if (report_ignored_msrs
)
2379 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2382 case MSR_AMD64_OSVW_ID_LENGTH
:
2383 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2385 vcpu
->arch
.osvw
.length
= data
;
2387 case MSR_AMD64_OSVW_STATUS
:
2388 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2390 vcpu
->arch
.osvw
.status
= data
;
2392 case MSR_PLATFORM_INFO
:
2393 if (!msr_info
->host_initiated
||
2394 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2395 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2396 cpuid_fault_enabled(vcpu
)))
2398 vcpu
->arch
.msr_platform_info
= data
;
2400 case MSR_MISC_FEATURES_ENABLES
:
2401 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2402 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2403 !supports_cpuid_fault(vcpu
)))
2405 vcpu
->arch
.msr_misc_features_enables
= data
;
2408 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2409 return xen_hvm_config(vcpu
, data
);
2410 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2411 return kvm_pmu_set_msr(vcpu
, msr_info
);
2413 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2417 if (report_ignored_msrs
)
2419 "ignored wrmsr: 0x%x data 0x%llx\n",
2426 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2430 * Reads an msr value (of 'msr_index') into 'pdata'.
2431 * Returns 0 on success, non-0 otherwise.
2432 * Assumes vcpu_load() was already called.
2434 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2436 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2438 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2440 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2443 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2444 unsigned bank_num
= mcg_cap
& 0xff;
2447 case MSR_IA32_P5_MC_ADDR
:
2448 case MSR_IA32_P5_MC_TYPE
:
2451 case MSR_IA32_MCG_CAP
:
2452 data
= vcpu
->arch
.mcg_cap
;
2454 case MSR_IA32_MCG_CTL
:
2455 if (!(mcg_cap
& MCG_CTL_P
))
2457 data
= vcpu
->arch
.mcg_ctl
;
2459 case MSR_IA32_MCG_STATUS
:
2460 data
= vcpu
->arch
.mcg_status
;
2463 if (msr
>= MSR_IA32_MC0_CTL
&&
2464 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2465 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2466 data
= vcpu
->arch
.mce_banks
[offset
];
2475 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2477 switch (msr_info
->index
) {
2478 case MSR_IA32_PLATFORM_ID
:
2479 case MSR_IA32_EBL_CR_POWERON
:
2480 case MSR_IA32_DEBUGCTLMSR
:
2481 case MSR_IA32_LASTBRANCHFROMIP
:
2482 case MSR_IA32_LASTBRANCHTOIP
:
2483 case MSR_IA32_LASTINTFROMIP
:
2484 case MSR_IA32_LASTINTTOIP
:
2486 case MSR_K8_TSEG_ADDR
:
2487 case MSR_K8_TSEG_MASK
:
2489 case MSR_VM_HSAVE_PA
:
2490 case MSR_K8_INT_PENDING_MSG
:
2491 case MSR_AMD64_NB_CFG
:
2492 case MSR_FAM10H_MMIO_CONF_BASE
:
2493 case MSR_AMD64_BU_CFG2
:
2494 case MSR_IA32_PERF_CTL
:
2495 case MSR_AMD64_DC_CFG
:
2498 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2499 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2500 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2501 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2502 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2503 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2506 case MSR_IA32_UCODE_REV
:
2507 msr_info
->data
= 0x100000000ULL
;
2510 case 0x200 ... 0x2ff:
2511 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2512 case 0xcd: /* fsb frequency */
2516 * MSR_EBC_FREQUENCY_ID
2517 * Conservative value valid for even the basic CPU models.
2518 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2519 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2520 * and 266MHz for model 3, or 4. Set Core Clock
2521 * Frequency to System Bus Frequency Ratio to 1 (bits
2522 * 31:24) even though these are only valid for CPU
2523 * models > 2, however guests may end up dividing or
2524 * multiplying by zero otherwise.
2526 case MSR_EBC_FREQUENCY_ID
:
2527 msr_info
->data
= 1 << 24;
2529 case MSR_IA32_APICBASE
:
2530 msr_info
->data
= kvm_get_apic_base(vcpu
);
2532 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2533 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2535 case MSR_IA32_TSCDEADLINE
:
2536 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2538 case MSR_IA32_TSC_ADJUST
:
2539 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2541 case MSR_IA32_MISC_ENABLE
:
2542 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2544 case MSR_IA32_SMBASE
:
2545 if (!msr_info
->host_initiated
)
2547 msr_info
->data
= vcpu
->arch
.smbase
;
2549 case MSR_IA32_PERF_STATUS
:
2550 /* TSC increment by tick */
2551 msr_info
->data
= 1000ULL;
2552 /* CPU multiplier */
2553 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2556 msr_info
->data
= vcpu
->arch
.efer
;
2558 case MSR_KVM_WALL_CLOCK
:
2559 case MSR_KVM_WALL_CLOCK_NEW
:
2560 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2562 case MSR_KVM_SYSTEM_TIME
:
2563 case MSR_KVM_SYSTEM_TIME_NEW
:
2564 msr_info
->data
= vcpu
->arch
.time
;
2566 case MSR_KVM_ASYNC_PF_EN
:
2567 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2569 case MSR_KVM_STEAL_TIME
:
2570 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2572 case MSR_KVM_PV_EOI_EN
:
2573 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2575 case MSR_IA32_P5_MC_ADDR
:
2576 case MSR_IA32_P5_MC_TYPE
:
2577 case MSR_IA32_MCG_CAP
:
2578 case MSR_IA32_MCG_CTL
:
2579 case MSR_IA32_MCG_STATUS
:
2580 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2581 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2582 case MSR_K7_CLK_CTL
:
2584 * Provide expected ramp-up count for K7. All other
2585 * are set to zero, indicating minimum divisors for
2588 * This prevents guest kernels on AMD host with CPU
2589 * type 6, model 8 and higher from exploding due to
2590 * the rdmsr failing.
2592 msr_info
->data
= 0x20000000;
2594 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2595 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2596 case HV_X64_MSR_CRASH_CTL
:
2597 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2598 return kvm_hv_get_msr_common(vcpu
,
2599 msr_info
->index
, &msr_info
->data
);
2601 case MSR_IA32_BBL_CR_CTL3
:
2602 /* This legacy MSR exists but isn't fully documented in current
2603 * silicon. It is however accessed by winxp in very narrow
2604 * scenarios where it sets bit #19, itself documented as
2605 * a "reserved" bit. Best effort attempt to source coherent
2606 * read data here should the balance of the register be
2607 * interpreted by the guest:
2609 * L2 cache control register 3: 64GB range, 256KB size,
2610 * enabled, latency 0x1, configured
2612 msr_info
->data
= 0xbe702111;
2614 case MSR_AMD64_OSVW_ID_LENGTH
:
2615 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2617 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2619 case MSR_AMD64_OSVW_STATUS
:
2620 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2622 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2624 case MSR_PLATFORM_INFO
:
2625 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2627 case MSR_MISC_FEATURES_ENABLES
:
2628 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2631 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2632 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2634 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2638 if (report_ignored_msrs
)
2639 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2647 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2650 * Read or write a bunch of msrs. All parameters are kernel addresses.
2652 * @return number of msrs set successfully.
2654 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2655 struct kvm_msr_entry
*entries
,
2656 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2657 unsigned index
, u64
*data
))
2661 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2662 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2669 * Read or write a bunch of msrs. Parameters are user addresses.
2671 * @return number of msrs set successfully.
2673 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2674 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2675 unsigned index
, u64
*data
),
2678 struct kvm_msrs msrs
;
2679 struct kvm_msr_entry
*entries
;
2684 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2688 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2691 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2692 entries
= memdup_user(user_msrs
->entries
, size
);
2693 if (IS_ERR(entries
)) {
2694 r
= PTR_ERR(entries
);
2698 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2703 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2714 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2719 case KVM_CAP_IRQCHIP
:
2721 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2722 case KVM_CAP_SET_TSS_ADDR
:
2723 case KVM_CAP_EXT_CPUID
:
2724 case KVM_CAP_EXT_EMUL_CPUID
:
2725 case KVM_CAP_CLOCKSOURCE
:
2727 case KVM_CAP_NOP_IO_DELAY
:
2728 case KVM_CAP_MP_STATE
:
2729 case KVM_CAP_SYNC_MMU
:
2730 case KVM_CAP_USER_NMI
:
2731 case KVM_CAP_REINJECT_CONTROL
:
2732 case KVM_CAP_IRQ_INJECT_STATUS
:
2733 case KVM_CAP_IOEVENTFD
:
2734 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2736 case KVM_CAP_PIT_STATE2
:
2737 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2738 case KVM_CAP_XEN_HVM
:
2739 case KVM_CAP_VCPU_EVENTS
:
2740 case KVM_CAP_HYPERV
:
2741 case KVM_CAP_HYPERV_VAPIC
:
2742 case KVM_CAP_HYPERV_SPIN
:
2743 case KVM_CAP_HYPERV_SYNIC
:
2744 case KVM_CAP_HYPERV_SYNIC2
:
2745 case KVM_CAP_HYPERV_VP_INDEX
:
2746 case KVM_CAP_PCI_SEGMENT
:
2747 case KVM_CAP_DEBUGREGS
:
2748 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2750 case KVM_CAP_ASYNC_PF
:
2751 case KVM_CAP_GET_TSC_KHZ
:
2752 case KVM_CAP_KVMCLOCK_CTRL
:
2753 case KVM_CAP_READONLY_MEM
:
2754 case KVM_CAP_HYPERV_TIME
:
2755 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2756 case KVM_CAP_TSC_DEADLINE_TIMER
:
2757 case KVM_CAP_ENABLE_CAP_VM
:
2758 case KVM_CAP_DISABLE_QUIRKS
:
2759 case KVM_CAP_SET_BOOT_CPU_ID
:
2760 case KVM_CAP_SPLIT_IRQCHIP
:
2761 case KVM_CAP_IMMEDIATE_EXIT
:
2762 case KVM_CAP_GET_MSR_FEATURES
:
2765 case KVM_CAP_ADJUST_CLOCK
:
2766 r
= KVM_CLOCK_TSC_STABLE
;
2768 case KVM_CAP_X86_GUEST_MWAIT
:
2769 r
= kvm_mwait_in_guest();
2771 case KVM_CAP_X86_SMM
:
2772 /* SMBASE is usually relocated above 1M on modern chipsets,
2773 * and SMM handlers might indeed rely on 4G segment limits,
2774 * so do not report SMM to be available if real mode is
2775 * emulated via vm86 mode. Still, do not go to great lengths
2776 * to avoid userspace's usage of the feature, because it is a
2777 * fringe case that is not enabled except via specific settings
2778 * of the module parameters.
2780 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
2783 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2785 case KVM_CAP_NR_VCPUS
:
2786 r
= KVM_SOFT_MAX_VCPUS
;
2788 case KVM_CAP_MAX_VCPUS
:
2791 case KVM_CAP_NR_MEMSLOTS
:
2792 r
= KVM_USER_MEM_SLOTS
;
2794 case KVM_CAP_PV_MMU
: /* obsolete */
2798 r
= KVM_MAX_MCE_BANKS
;
2801 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2803 case KVM_CAP_TSC_CONTROL
:
2804 r
= kvm_has_tsc_control
;
2806 case KVM_CAP_X2APIC_API
:
2807 r
= KVM_X2APIC_API_VALID_FLAGS
;
2817 long kvm_arch_dev_ioctl(struct file
*filp
,
2818 unsigned int ioctl
, unsigned long arg
)
2820 void __user
*argp
= (void __user
*)arg
;
2824 case KVM_GET_MSR_INDEX_LIST
: {
2825 struct kvm_msr_list __user
*user_msr_list
= argp
;
2826 struct kvm_msr_list msr_list
;
2830 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2833 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2834 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2837 if (n
< msr_list
.nmsrs
)
2840 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2841 num_msrs_to_save
* sizeof(u32
)))
2843 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2845 num_emulated_msrs
* sizeof(u32
)))
2850 case KVM_GET_SUPPORTED_CPUID
:
2851 case KVM_GET_EMULATED_CPUID
: {
2852 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2853 struct kvm_cpuid2 cpuid
;
2856 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2859 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2865 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2870 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2872 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2873 sizeof(kvm_mce_cap_supported
)))
2877 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
2878 struct kvm_msr_list __user
*user_msr_list
= argp
;
2879 struct kvm_msr_list msr_list
;
2883 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
2886 msr_list
.nmsrs
= num_msr_based_features
;
2887 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
2890 if (n
< msr_list
.nmsrs
)
2893 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
2894 num_msr_based_features
* sizeof(u32
)))
2900 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
2910 static void wbinvd_ipi(void *garbage
)
2915 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2917 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2920 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2922 /* Address WBINVD may be executed by guest */
2923 if (need_emulate_wbinvd(vcpu
)) {
2924 if (kvm_x86_ops
->has_wbinvd_exit())
2925 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2926 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2927 smp_call_function_single(vcpu
->cpu
,
2928 wbinvd_ipi
, NULL
, 1);
2931 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2933 /* Apply any externally detected TSC adjustments (due to suspend) */
2934 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2935 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2936 vcpu
->arch
.tsc_offset_adjustment
= 0;
2937 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2940 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2941 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2942 rdtsc() - vcpu
->arch
.last_host_tsc
;
2944 mark_tsc_unstable("KVM discovered backwards TSC");
2946 if (check_tsc_unstable()) {
2947 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2948 vcpu
->arch
.last_guest_tsc
);
2949 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2950 vcpu
->arch
.tsc_catchup
= 1;
2953 if (kvm_lapic_hv_timer_in_use(vcpu
))
2954 kvm_lapic_restart_hv_timer(vcpu
);
2957 * On a host with synchronized TSC, there is no need to update
2958 * kvmclock on vcpu->cpu migration
2960 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2961 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2962 if (vcpu
->cpu
!= cpu
)
2963 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2967 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2970 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2972 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2975 vcpu
->arch
.st
.steal
.preempted
= 1;
2977 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2978 &vcpu
->arch
.st
.steal
.preempted
,
2979 offsetof(struct kvm_steal_time
, preempted
),
2980 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2983 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2987 if (vcpu
->preempted
)
2988 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
2991 * Disable page faults because we're in atomic context here.
2992 * kvm_write_guest_offset_cached() would call might_fault()
2993 * that relies on pagefault_disable() to tell if there's a
2994 * bug. NOTE: the write to guest memory may not go through if
2995 * during postcopy live migration or if there's heavy guest
2998 pagefault_disable();
3000 * kvm_memslots() will be called by
3001 * kvm_write_guest_offset_cached() so take the srcu lock.
3003 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3004 kvm_steal_time_set_preempted(vcpu
);
3005 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3007 kvm_x86_ops
->vcpu_put(vcpu
);
3008 vcpu
->arch
.last_host_tsc
= rdtsc();
3010 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3011 * on every vmexit, but if not, we might have a stale dr6 from the
3012 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3017 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3018 struct kvm_lapic_state
*s
)
3020 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
3021 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3023 return kvm_apic_get_state(vcpu
, s
);
3026 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3027 struct kvm_lapic_state
*s
)
3031 r
= kvm_apic_set_state(vcpu
, s
);
3034 update_cr8_intercept(vcpu
);
3039 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3041 return (!lapic_in_kernel(vcpu
) ||
3042 kvm_apic_accept_pic_intr(vcpu
));
3046 * if userspace requested an interrupt window, check that the
3047 * interrupt window is open.
3049 * No need to exit to userspace if we already have an interrupt queued.
3051 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3053 return kvm_arch_interrupt_allowed(vcpu
) &&
3054 !kvm_cpu_has_interrupt(vcpu
) &&
3055 !kvm_event_needs_reinjection(vcpu
) &&
3056 kvm_cpu_accept_dm_intr(vcpu
);
3059 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3060 struct kvm_interrupt
*irq
)
3062 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3065 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3066 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3067 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3072 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3073 * fail for in-kernel 8259.
3075 if (pic_in_kernel(vcpu
->kvm
))
3078 if (vcpu
->arch
.pending_external_vector
!= -1)
3081 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3082 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3086 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3088 kvm_inject_nmi(vcpu
);
3093 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3095 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3100 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3101 struct kvm_tpr_access_ctl
*tac
)
3105 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3109 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3113 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3116 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3118 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3121 vcpu
->arch
.mcg_cap
= mcg_cap
;
3122 /* Init IA32_MCG_CTL to all 1s */
3123 if (mcg_cap
& MCG_CTL_P
)
3124 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3125 /* Init IA32_MCi_CTL to all 1s */
3126 for (bank
= 0; bank
< bank_num
; bank
++)
3127 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3129 if (kvm_x86_ops
->setup_mce
)
3130 kvm_x86_ops
->setup_mce(vcpu
);
3135 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3136 struct kvm_x86_mce
*mce
)
3138 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3139 unsigned bank_num
= mcg_cap
& 0xff;
3140 u64
*banks
= vcpu
->arch
.mce_banks
;
3142 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3145 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3146 * reporting is disabled
3148 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3149 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3151 banks
+= 4 * mce
->bank
;
3153 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3154 * reporting is disabled for the bank
3156 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3158 if (mce
->status
& MCI_STATUS_UC
) {
3159 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3160 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3161 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3164 if (banks
[1] & MCI_STATUS_VAL
)
3165 mce
->status
|= MCI_STATUS_OVER
;
3166 banks
[2] = mce
->addr
;
3167 banks
[3] = mce
->misc
;
3168 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3169 banks
[1] = mce
->status
;
3170 kvm_queue_exception(vcpu
, MC_VECTOR
);
3171 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3172 || !(banks
[1] & MCI_STATUS_UC
)) {
3173 if (banks
[1] & MCI_STATUS_VAL
)
3174 mce
->status
|= MCI_STATUS_OVER
;
3175 banks
[2] = mce
->addr
;
3176 banks
[3] = mce
->misc
;
3177 banks
[1] = mce
->status
;
3179 banks
[1] |= MCI_STATUS_OVER
;
3183 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3184 struct kvm_vcpu_events
*events
)
3188 * FIXME: pass injected and pending separately. This is only
3189 * needed for nested virtualization, whose state cannot be
3190 * migrated yet. For now we can combine them.
3192 events
->exception
.injected
=
3193 (vcpu
->arch
.exception
.pending
||
3194 vcpu
->arch
.exception
.injected
) &&
3195 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3196 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3197 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3198 events
->exception
.pad
= 0;
3199 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3201 events
->interrupt
.injected
=
3202 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3203 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3204 events
->interrupt
.soft
= 0;
3205 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3207 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3208 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3209 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3210 events
->nmi
.pad
= 0;
3212 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3214 events
->smi
.smm
= is_smm(vcpu
);
3215 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3216 events
->smi
.smm_inside_nmi
=
3217 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3218 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3220 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3221 | KVM_VCPUEVENT_VALID_SHADOW
3222 | KVM_VCPUEVENT_VALID_SMM
);
3223 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3226 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3228 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3229 struct kvm_vcpu_events
*events
)
3231 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3232 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3233 | KVM_VCPUEVENT_VALID_SHADOW
3234 | KVM_VCPUEVENT_VALID_SMM
))
3237 if (events
->exception
.injected
&&
3238 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3239 is_guest_mode(vcpu
)))
3242 /* INITs are latched while in SMM */
3243 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3244 (events
->smi
.smm
|| events
->smi
.pending
) &&
3245 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3249 vcpu
->arch
.exception
.injected
= false;
3250 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3251 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3252 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3253 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3255 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3256 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3257 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3258 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3259 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3260 events
->interrupt
.shadow
);
3262 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3263 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3264 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3265 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3267 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3268 lapic_in_kernel(vcpu
))
3269 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3271 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3272 u32 hflags
= vcpu
->arch
.hflags
;
3273 if (events
->smi
.smm
)
3274 hflags
|= HF_SMM_MASK
;
3276 hflags
&= ~HF_SMM_MASK
;
3277 kvm_set_hflags(vcpu
, hflags
);
3279 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3281 if (events
->smi
.smm
) {
3282 if (events
->smi
.smm_inside_nmi
)
3283 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3285 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3286 if (lapic_in_kernel(vcpu
)) {
3287 if (events
->smi
.latched_init
)
3288 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3290 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3295 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3300 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3301 struct kvm_debugregs
*dbgregs
)
3305 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3306 kvm_get_dr(vcpu
, 6, &val
);
3308 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3310 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3313 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3314 struct kvm_debugregs
*dbgregs
)
3319 if (dbgregs
->dr6
& ~0xffffffffull
)
3321 if (dbgregs
->dr7
& ~0xffffffffull
)
3324 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3325 kvm_update_dr0123(vcpu
);
3326 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3327 kvm_update_dr6(vcpu
);
3328 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3329 kvm_update_dr7(vcpu
);
3334 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3336 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3338 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3339 u64 xstate_bv
= xsave
->header
.xfeatures
;
3343 * Copy legacy XSAVE area, to avoid complications with CPUID
3344 * leaves 0 and 1 in the loop below.
3346 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3349 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3350 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3353 * Copy each region from the possibly compacted offset to the
3354 * non-compacted offset.
3356 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3358 u64 feature
= valid
& -valid
;
3359 int index
= fls64(feature
) - 1;
3360 void *src
= get_xsave_addr(xsave
, feature
);
3363 u32 size
, offset
, ecx
, edx
;
3364 cpuid_count(XSTATE_CPUID
, index
,
3365 &size
, &offset
, &ecx
, &edx
);
3366 if (feature
== XFEATURE_MASK_PKRU
)
3367 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3368 sizeof(vcpu
->arch
.pkru
));
3370 memcpy(dest
+ offset
, src
, size
);
3378 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3380 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3381 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3385 * Copy legacy XSAVE area, to avoid complications with CPUID
3386 * leaves 0 and 1 in the loop below.
3388 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3390 /* Set XSTATE_BV and possibly XCOMP_BV. */
3391 xsave
->header
.xfeatures
= xstate_bv
;
3392 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3393 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3396 * Copy each region from the non-compacted offset to the
3397 * possibly compacted offset.
3399 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3401 u64 feature
= valid
& -valid
;
3402 int index
= fls64(feature
) - 1;
3403 void *dest
= get_xsave_addr(xsave
, feature
);
3406 u32 size
, offset
, ecx
, edx
;
3407 cpuid_count(XSTATE_CPUID
, index
,
3408 &size
, &offset
, &ecx
, &edx
);
3409 if (feature
== XFEATURE_MASK_PKRU
)
3410 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3411 sizeof(vcpu
->arch
.pkru
));
3413 memcpy(dest
, src
+ offset
, size
);
3420 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3421 struct kvm_xsave
*guest_xsave
)
3423 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3424 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3425 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3427 memcpy(guest_xsave
->region
,
3428 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3429 sizeof(struct fxregs_state
));
3430 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3431 XFEATURE_MASK_FPSSE
;
3435 #define XSAVE_MXCSR_OFFSET 24
3437 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3438 struct kvm_xsave
*guest_xsave
)
3441 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3442 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3444 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3446 * Here we allow setting states that are not present in
3447 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3448 * with old userspace.
3450 if (xstate_bv
& ~kvm_supported_xcr0() ||
3451 mxcsr
& ~mxcsr_feature_mask
)
3453 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3455 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3456 mxcsr
& ~mxcsr_feature_mask
)
3458 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3459 guest_xsave
->region
, sizeof(struct fxregs_state
));
3464 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3465 struct kvm_xcrs
*guest_xcrs
)
3467 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3468 guest_xcrs
->nr_xcrs
= 0;
3472 guest_xcrs
->nr_xcrs
= 1;
3473 guest_xcrs
->flags
= 0;
3474 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3475 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3478 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3479 struct kvm_xcrs
*guest_xcrs
)
3483 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3486 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3489 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3490 /* Only support XCR0 currently */
3491 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3492 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3493 guest_xcrs
->xcrs
[i
].value
);
3502 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3503 * stopped by the hypervisor. This function will be called from the host only.
3504 * EINVAL is returned when the host attempts to set the flag for a guest that
3505 * does not support pv clocks.
3507 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3509 if (!vcpu
->arch
.pv_time_enabled
)
3511 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3512 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3516 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3517 struct kvm_enable_cap
*cap
)
3523 case KVM_CAP_HYPERV_SYNIC2
:
3526 case KVM_CAP_HYPERV_SYNIC
:
3527 if (!irqchip_in_kernel(vcpu
->kvm
))
3529 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3530 KVM_CAP_HYPERV_SYNIC2
);
3536 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3537 unsigned int ioctl
, unsigned long arg
)
3539 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3540 void __user
*argp
= (void __user
*)arg
;
3543 struct kvm_lapic_state
*lapic
;
3544 struct kvm_xsave
*xsave
;
3545 struct kvm_xcrs
*xcrs
;
3551 case KVM_GET_LAPIC
: {
3553 if (!lapic_in_kernel(vcpu
))
3555 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3560 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3564 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3569 case KVM_SET_LAPIC
: {
3571 if (!lapic_in_kernel(vcpu
))
3573 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3574 if (IS_ERR(u
.lapic
))
3575 return PTR_ERR(u
.lapic
);
3577 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3580 case KVM_INTERRUPT
: {
3581 struct kvm_interrupt irq
;
3584 if (copy_from_user(&irq
, argp
, sizeof irq
))
3586 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3590 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3594 r
= kvm_vcpu_ioctl_smi(vcpu
);
3597 case KVM_SET_CPUID
: {
3598 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3599 struct kvm_cpuid cpuid
;
3602 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3604 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3607 case KVM_SET_CPUID2
: {
3608 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3609 struct kvm_cpuid2 cpuid
;
3612 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3614 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3615 cpuid_arg
->entries
);
3618 case KVM_GET_CPUID2
: {
3619 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3620 struct kvm_cpuid2 cpuid
;
3623 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3625 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3626 cpuid_arg
->entries
);
3630 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3635 case KVM_GET_MSRS
: {
3636 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3637 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3638 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3641 case KVM_SET_MSRS
: {
3642 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3643 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3644 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3647 case KVM_TPR_ACCESS_REPORTING
: {
3648 struct kvm_tpr_access_ctl tac
;
3651 if (copy_from_user(&tac
, argp
, sizeof tac
))
3653 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3657 if (copy_to_user(argp
, &tac
, sizeof tac
))
3662 case KVM_SET_VAPIC_ADDR
: {
3663 struct kvm_vapic_addr va
;
3667 if (!lapic_in_kernel(vcpu
))
3670 if (copy_from_user(&va
, argp
, sizeof va
))
3672 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3673 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3674 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3677 case KVM_X86_SETUP_MCE
: {
3681 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3683 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3686 case KVM_X86_SET_MCE
: {
3687 struct kvm_x86_mce mce
;
3690 if (copy_from_user(&mce
, argp
, sizeof mce
))
3692 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3695 case KVM_GET_VCPU_EVENTS
: {
3696 struct kvm_vcpu_events events
;
3698 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3701 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3706 case KVM_SET_VCPU_EVENTS
: {
3707 struct kvm_vcpu_events events
;
3710 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3713 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3716 case KVM_GET_DEBUGREGS
: {
3717 struct kvm_debugregs dbgregs
;
3719 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3722 if (copy_to_user(argp
, &dbgregs
,
3723 sizeof(struct kvm_debugregs
)))
3728 case KVM_SET_DEBUGREGS
: {
3729 struct kvm_debugregs dbgregs
;
3732 if (copy_from_user(&dbgregs
, argp
,
3733 sizeof(struct kvm_debugregs
)))
3736 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3739 case KVM_GET_XSAVE
: {
3740 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3745 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3748 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3753 case KVM_SET_XSAVE
: {
3754 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3755 if (IS_ERR(u
.xsave
))
3756 return PTR_ERR(u
.xsave
);
3758 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3761 case KVM_GET_XCRS
: {
3762 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3767 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3770 if (copy_to_user(argp
, u
.xcrs
,
3771 sizeof(struct kvm_xcrs
)))
3776 case KVM_SET_XCRS
: {
3777 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3779 return PTR_ERR(u
.xcrs
);
3781 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3784 case KVM_SET_TSC_KHZ
: {
3788 user_tsc_khz
= (u32
)arg
;
3790 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3793 if (user_tsc_khz
== 0)
3794 user_tsc_khz
= tsc_khz
;
3796 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3801 case KVM_GET_TSC_KHZ
: {
3802 r
= vcpu
->arch
.virtual_tsc_khz
;
3805 case KVM_KVMCLOCK_CTRL
: {
3806 r
= kvm_set_guest_paused(vcpu
);
3809 case KVM_ENABLE_CAP
: {
3810 struct kvm_enable_cap cap
;
3813 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3815 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3826 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3828 return VM_FAULT_SIGBUS
;
3831 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3835 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3837 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3841 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3844 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3848 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3849 u32 kvm_nr_mmu_pages
)
3851 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3854 mutex_lock(&kvm
->slots_lock
);
3856 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3857 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3859 mutex_unlock(&kvm
->slots_lock
);
3863 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3865 return kvm
->arch
.n_max_mmu_pages
;
3868 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3870 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3874 switch (chip
->chip_id
) {
3875 case KVM_IRQCHIP_PIC_MASTER
:
3876 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3877 sizeof(struct kvm_pic_state
));
3879 case KVM_IRQCHIP_PIC_SLAVE
:
3880 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3881 sizeof(struct kvm_pic_state
));
3883 case KVM_IRQCHIP_IOAPIC
:
3884 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3893 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3895 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3899 switch (chip
->chip_id
) {
3900 case KVM_IRQCHIP_PIC_MASTER
:
3901 spin_lock(&pic
->lock
);
3902 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3903 sizeof(struct kvm_pic_state
));
3904 spin_unlock(&pic
->lock
);
3906 case KVM_IRQCHIP_PIC_SLAVE
:
3907 spin_lock(&pic
->lock
);
3908 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3909 sizeof(struct kvm_pic_state
));
3910 spin_unlock(&pic
->lock
);
3912 case KVM_IRQCHIP_IOAPIC
:
3913 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3919 kvm_pic_update_irq(pic
);
3923 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3925 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3927 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3929 mutex_lock(&kps
->lock
);
3930 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3931 mutex_unlock(&kps
->lock
);
3935 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3938 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3940 mutex_lock(&pit
->pit_state
.lock
);
3941 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3942 for (i
= 0; i
< 3; i
++)
3943 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3944 mutex_unlock(&pit
->pit_state
.lock
);
3948 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3950 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3951 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3952 sizeof(ps
->channels
));
3953 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3954 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3955 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3959 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3963 u32 prev_legacy
, cur_legacy
;
3964 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3966 mutex_lock(&pit
->pit_state
.lock
);
3967 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3968 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3969 if (!prev_legacy
&& cur_legacy
)
3971 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3972 sizeof(pit
->pit_state
.channels
));
3973 pit
->pit_state
.flags
= ps
->flags
;
3974 for (i
= 0; i
< 3; i
++)
3975 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3977 mutex_unlock(&pit
->pit_state
.lock
);
3981 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3982 struct kvm_reinject_control
*control
)
3984 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3989 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3990 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3991 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3993 mutex_lock(&pit
->pit_state
.lock
);
3994 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3995 mutex_unlock(&pit
->pit_state
.lock
);
4001 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4002 * @kvm: kvm instance
4003 * @log: slot id and address to which we copy the log
4005 * Steps 1-4 below provide general overview of dirty page logging. See
4006 * kvm_get_dirty_log_protect() function description for additional details.
4008 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4009 * always flush the TLB (step 4) even if previous step failed and the dirty
4010 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4011 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4012 * writes will be marked dirty for next log read.
4014 * 1. Take a snapshot of the bit and clear it if needed.
4015 * 2. Write protect the corresponding page.
4016 * 3. Copy the snapshot to the userspace.
4017 * 4. Flush TLB's if needed.
4019 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4021 bool is_dirty
= false;
4024 mutex_lock(&kvm
->slots_lock
);
4027 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4029 if (kvm_x86_ops
->flush_log_dirty
)
4030 kvm_x86_ops
->flush_log_dirty(kvm
);
4032 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
4035 * All the TLBs can be flushed out of mmu lock, see the comments in
4036 * kvm_mmu_slot_remove_write_access().
4038 lockdep_assert_held(&kvm
->slots_lock
);
4040 kvm_flush_remote_tlbs(kvm
);
4042 mutex_unlock(&kvm
->slots_lock
);
4046 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4049 if (!irqchip_in_kernel(kvm
))
4052 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4053 irq_event
->irq
, irq_event
->level
,
4058 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4059 struct kvm_enable_cap
*cap
)
4067 case KVM_CAP_DISABLE_QUIRKS
:
4068 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4071 case KVM_CAP_SPLIT_IRQCHIP
: {
4072 mutex_lock(&kvm
->lock
);
4074 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4075 goto split_irqchip_unlock
;
4077 if (irqchip_in_kernel(kvm
))
4078 goto split_irqchip_unlock
;
4079 if (kvm
->created_vcpus
)
4080 goto split_irqchip_unlock
;
4081 r
= kvm_setup_empty_irq_routing(kvm
);
4083 goto split_irqchip_unlock
;
4084 /* Pairs with irqchip_in_kernel. */
4086 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4087 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4089 split_irqchip_unlock
:
4090 mutex_unlock(&kvm
->lock
);
4093 case KVM_CAP_X2APIC_API
:
4095 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4098 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4099 kvm
->arch
.x2apic_format
= true;
4100 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4101 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4112 long kvm_arch_vm_ioctl(struct file
*filp
,
4113 unsigned int ioctl
, unsigned long arg
)
4115 struct kvm
*kvm
= filp
->private_data
;
4116 void __user
*argp
= (void __user
*)arg
;
4119 * This union makes it completely explicit to gcc-3.x
4120 * that these two variables' stack usage should be
4121 * combined, not added together.
4124 struct kvm_pit_state ps
;
4125 struct kvm_pit_state2 ps2
;
4126 struct kvm_pit_config pit_config
;
4130 case KVM_SET_TSS_ADDR
:
4131 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4133 case KVM_SET_IDENTITY_MAP_ADDR
: {
4136 mutex_lock(&kvm
->lock
);
4138 if (kvm
->created_vcpus
)
4139 goto set_identity_unlock
;
4141 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4142 goto set_identity_unlock
;
4143 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4144 set_identity_unlock
:
4145 mutex_unlock(&kvm
->lock
);
4148 case KVM_SET_NR_MMU_PAGES
:
4149 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4151 case KVM_GET_NR_MMU_PAGES
:
4152 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4154 case KVM_CREATE_IRQCHIP
: {
4155 mutex_lock(&kvm
->lock
);
4158 if (irqchip_in_kernel(kvm
))
4159 goto create_irqchip_unlock
;
4162 if (kvm
->created_vcpus
)
4163 goto create_irqchip_unlock
;
4165 r
= kvm_pic_init(kvm
);
4167 goto create_irqchip_unlock
;
4169 r
= kvm_ioapic_init(kvm
);
4171 kvm_pic_destroy(kvm
);
4172 goto create_irqchip_unlock
;
4175 r
= kvm_setup_default_irq_routing(kvm
);
4177 kvm_ioapic_destroy(kvm
);
4178 kvm_pic_destroy(kvm
);
4179 goto create_irqchip_unlock
;
4181 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4183 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4184 create_irqchip_unlock
:
4185 mutex_unlock(&kvm
->lock
);
4188 case KVM_CREATE_PIT
:
4189 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4191 case KVM_CREATE_PIT2
:
4193 if (copy_from_user(&u
.pit_config
, argp
,
4194 sizeof(struct kvm_pit_config
)))
4197 mutex_lock(&kvm
->lock
);
4200 goto create_pit_unlock
;
4202 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4206 mutex_unlock(&kvm
->lock
);
4208 case KVM_GET_IRQCHIP
: {
4209 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4210 struct kvm_irqchip
*chip
;
4212 chip
= memdup_user(argp
, sizeof(*chip
));
4219 if (!irqchip_kernel(kvm
))
4220 goto get_irqchip_out
;
4221 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4223 goto get_irqchip_out
;
4225 if (copy_to_user(argp
, chip
, sizeof *chip
))
4226 goto get_irqchip_out
;
4232 case KVM_SET_IRQCHIP
: {
4233 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4234 struct kvm_irqchip
*chip
;
4236 chip
= memdup_user(argp
, sizeof(*chip
));
4243 if (!irqchip_kernel(kvm
))
4244 goto set_irqchip_out
;
4245 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4247 goto set_irqchip_out
;
4255 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4258 if (!kvm
->arch
.vpit
)
4260 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4264 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4271 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4274 if (!kvm
->arch
.vpit
)
4276 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4279 case KVM_GET_PIT2
: {
4281 if (!kvm
->arch
.vpit
)
4283 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4287 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4292 case KVM_SET_PIT2
: {
4294 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4297 if (!kvm
->arch
.vpit
)
4299 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4302 case KVM_REINJECT_CONTROL
: {
4303 struct kvm_reinject_control control
;
4305 if (copy_from_user(&control
, argp
, sizeof(control
)))
4307 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4310 case KVM_SET_BOOT_CPU_ID
:
4312 mutex_lock(&kvm
->lock
);
4313 if (kvm
->created_vcpus
)
4316 kvm
->arch
.bsp_vcpu_id
= arg
;
4317 mutex_unlock(&kvm
->lock
);
4319 case KVM_XEN_HVM_CONFIG
: {
4320 struct kvm_xen_hvm_config xhc
;
4322 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4327 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4331 case KVM_SET_CLOCK
: {
4332 struct kvm_clock_data user_ns
;
4336 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4345 * TODO: userspace has to take care of races with VCPU_RUN, so
4346 * kvm_gen_update_masterclock() can be cut down to locked
4347 * pvclock_update_vm_gtod_copy().
4349 kvm_gen_update_masterclock(kvm
);
4350 now_ns
= get_kvmclock_ns(kvm
);
4351 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4352 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4355 case KVM_GET_CLOCK
: {
4356 struct kvm_clock_data user_ns
;
4359 now_ns
= get_kvmclock_ns(kvm
);
4360 user_ns
.clock
= now_ns
;
4361 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4362 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4365 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4370 case KVM_ENABLE_CAP
: {
4371 struct kvm_enable_cap cap
;
4374 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4376 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4386 static void kvm_init_msr_list(void)
4391 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4392 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4396 * Even MSRs that are valid in the host may not be exposed
4397 * to the guests in some cases.
4399 switch (msrs_to_save
[i
]) {
4400 case MSR_IA32_BNDCFGS
:
4401 if (!kvm_x86_ops
->mpx_supported())
4405 if (!kvm_x86_ops
->rdtscp_supported())
4413 msrs_to_save
[j
] = msrs_to_save
[i
];
4416 num_msrs_to_save
= j
;
4418 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4419 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4423 emulated_msrs
[j
] = emulated_msrs
[i
];
4426 num_emulated_msrs
= j
;
4428 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
4429 struct kvm_msr_entry msr
;
4431 msr
.index
= msr_based_features
[i
];
4432 if (kvm_get_msr_feature(&msr
))
4436 msr_based_features
[j
] = msr_based_features
[i
];
4439 num_msr_based_features
= j
;
4442 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4450 if (!(lapic_in_kernel(vcpu
) &&
4451 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4452 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4463 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4470 if (!(lapic_in_kernel(vcpu
) &&
4471 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4473 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4475 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
4485 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4486 struct kvm_segment
*var
, int seg
)
4488 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4491 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4492 struct kvm_segment
*var
, int seg
)
4494 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4497 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4498 struct x86_exception
*exception
)
4502 BUG_ON(!mmu_is_nested(vcpu
));
4504 /* NPT walks are always user-walks */
4505 access
|= PFERR_USER_MASK
;
4506 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4511 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4512 struct x86_exception
*exception
)
4514 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4515 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4518 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4519 struct x86_exception
*exception
)
4521 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4522 access
|= PFERR_FETCH_MASK
;
4523 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4526 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4527 struct x86_exception
*exception
)
4529 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4530 access
|= PFERR_WRITE_MASK
;
4531 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4534 /* uses this to access any guest's mapped memory without checking CPL */
4535 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4536 struct x86_exception
*exception
)
4538 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4541 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4542 struct kvm_vcpu
*vcpu
, u32 access
,
4543 struct x86_exception
*exception
)
4546 int r
= X86EMUL_CONTINUE
;
4549 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4551 unsigned offset
= addr
& (PAGE_SIZE
-1);
4552 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4555 if (gpa
== UNMAPPED_GVA
)
4556 return X86EMUL_PROPAGATE_FAULT
;
4557 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4560 r
= X86EMUL_IO_NEEDED
;
4572 /* used for instruction fetching */
4573 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4574 gva_t addr
, void *val
, unsigned int bytes
,
4575 struct x86_exception
*exception
)
4577 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4578 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4582 /* Inline kvm_read_guest_virt_helper for speed. */
4583 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4585 if (unlikely(gpa
== UNMAPPED_GVA
))
4586 return X86EMUL_PROPAGATE_FAULT
;
4588 offset
= addr
& (PAGE_SIZE
-1);
4589 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4590 bytes
= (unsigned)PAGE_SIZE
- offset
;
4591 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4593 if (unlikely(ret
< 0))
4594 return X86EMUL_IO_NEEDED
;
4596 return X86EMUL_CONTINUE
;
4599 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4600 gva_t addr
, void *val
, unsigned int bytes
,
4601 struct x86_exception
*exception
)
4603 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4604 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4606 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4609 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4611 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4612 gva_t addr
, void *val
, unsigned int bytes
,
4613 struct x86_exception
*exception
)
4615 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4616 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4619 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4620 unsigned long addr
, void *val
, unsigned int bytes
)
4622 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4623 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4625 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4628 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4629 gva_t addr
, void *val
,
4631 struct x86_exception
*exception
)
4633 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4635 int r
= X86EMUL_CONTINUE
;
4637 /* kvm_write_guest_virt_system can pull in tons of pages. */
4638 vcpu
->arch
.l1tf_flush_l1d
= true;
4641 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4644 unsigned offset
= addr
& (PAGE_SIZE
-1);
4645 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4648 if (gpa
== UNMAPPED_GVA
)
4649 return X86EMUL_PROPAGATE_FAULT
;
4650 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4652 r
= X86EMUL_IO_NEEDED
;
4663 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4665 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4666 gpa_t gpa
, bool write
)
4668 /* For APIC access vmexit */
4669 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4672 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4673 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4680 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4681 gpa_t
*gpa
, struct x86_exception
*exception
,
4684 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4685 | (write
? PFERR_WRITE_MASK
: 0);
4688 * currently PKRU is only applied to ept enabled guest so
4689 * there is no pkey in EPT page table for L1 guest or EPT
4690 * shadow page table for L2 guest.
4692 if (vcpu_match_mmio_gva(vcpu
, gva
)
4693 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4694 vcpu
->arch
.access
, 0, access
)) {
4695 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4696 (gva
& (PAGE_SIZE
- 1));
4697 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4701 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4703 if (*gpa
== UNMAPPED_GVA
)
4706 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4709 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4710 const void *val
, int bytes
)
4714 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4717 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4721 struct read_write_emulator_ops
{
4722 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4724 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4725 void *val
, int bytes
);
4726 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4727 int bytes
, void *val
);
4728 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4729 void *val
, int bytes
);
4733 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4735 if (vcpu
->mmio_read_completed
) {
4736 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4737 vcpu
->mmio_fragments
[0].gpa
, val
);
4738 vcpu
->mmio_read_completed
= 0;
4745 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4746 void *val
, int bytes
)
4748 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4751 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4752 void *val
, int bytes
)
4754 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4757 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4759 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
4760 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4763 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4764 void *val
, int bytes
)
4766 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
4767 return X86EMUL_IO_NEEDED
;
4770 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4771 void *val
, int bytes
)
4773 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4775 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4776 return X86EMUL_CONTINUE
;
4779 static const struct read_write_emulator_ops read_emultor
= {
4780 .read_write_prepare
= read_prepare
,
4781 .read_write_emulate
= read_emulate
,
4782 .read_write_mmio
= vcpu_mmio_read
,
4783 .read_write_exit_mmio
= read_exit_mmio
,
4786 static const struct read_write_emulator_ops write_emultor
= {
4787 .read_write_emulate
= write_emulate
,
4788 .read_write_mmio
= write_mmio
,
4789 .read_write_exit_mmio
= write_exit_mmio
,
4793 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4795 struct x86_exception
*exception
,
4796 struct kvm_vcpu
*vcpu
,
4797 const struct read_write_emulator_ops
*ops
)
4801 bool write
= ops
->write
;
4802 struct kvm_mmio_fragment
*frag
;
4803 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4806 * If the exit was due to a NPF we may already have a GPA.
4807 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4808 * Note, this cannot be used on string operations since string
4809 * operation using rep will only have the initial GPA from the NPF
4812 if (vcpu
->arch
.gpa_available
&&
4813 emulator_can_use_gpa(ctxt
) &&
4814 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4815 gpa
= vcpu
->arch
.gpa_val
;
4816 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4818 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4820 return X86EMUL_PROPAGATE_FAULT
;
4823 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4824 return X86EMUL_CONTINUE
;
4827 * Is this MMIO handled locally?
4829 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4830 if (handled
== bytes
)
4831 return X86EMUL_CONTINUE
;
4837 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4838 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4842 return X86EMUL_CONTINUE
;
4845 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4847 void *val
, unsigned int bytes
,
4848 struct x86_exception
*exception
,
4849 const struct read_write_emulator_ops
*ops
)
4851 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4855 if (ops
->read_write_prepare
&&
4856 ops
->read_write_prepare(vcpu
, val
, bytes
))
4857 return X86EMUL_CONTINUE
;
4859 vcpu
->mmio_nr_fragments
= 0;
4861 /* Crossing a page boundary? */
4862 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4865 now
= -addr
& ~PAGE_MASK
;
4866 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4869 if (rc
!= X86EMUL_CONTINUE
)
4872 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4878 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4880 if (rc
!= X86EMUL_CONTINUE
)
4883 if (!vcpu
->mmio_nr_fragments
)
4886 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4888 vcpu
->mmio_needed
= 1;
4889 vcpu
->mmio_cur_fragment
= 0;
4891 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4892 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4893 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4894 vcpu
->run
->mmio
.phys_addr
= gpa
;
4896 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4899 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4903 struct x86_exception
*exception
)
4905 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4906 exception
, &read_emultor
);
4909 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4913 struct x86_exception
*exception
)
4915 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4916 exception
, &write_emultor
);
4919 #define CMPXCHG_TYPE(t, ptr, old, new) \
4920 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4922 #ifdef CONFIG_X86_64
4923 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4925 # define CMPXCHG64(ptr, old, new) \
4926 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4929 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4934 struct x86_exception
*exception
)
4936 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4942 /* guests cmpxchg8b have to be emulated atomically */
4943 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4946 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4948 if (gpa
== UNMAPPED_GVA
||
4949 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4952 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4955 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4956 if (is_error_page(page
))
4959 kaddr
= kmap_atomic(page
);
4960 kaddr
+= offset_in_page(gpa
);
4963 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4966 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4969 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4972 exchanged
= CMPXCHG64(kaddr
, old
, new);
4977 kunmap_atomic(kaddr
);
4978 kvm_release_page_dirty(page
);
4981 return X86EMUL_CMPXCHG_FAILED
;
4983 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4984 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4986 return X86EMUL_CONTINUE
;
4989 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4991 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4994 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4998 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4999 if (vcpu
->arch
.pio
.in
)
5000 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5001 vcpu
->arch
.pio
.size
, pd
);
5003 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5004 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5008 pd
+= vcpu
->arch
.pio
.size
;
5013 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5014 unsigned short port
, void *val
,
5015 unsigned int count
, bool in
)
5017 vcpu
->arch
.pio
.port
= port
;
5018 vcpu
->arch
.pio
.in
= in
;
5019 vcpu
->arch
.pio
.count
= count
;
5020 vcpu
->arch
.pio
.size
= size
;
5022 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5023 vcpu
->arch
.pio
.count
= 0;
5027 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5028 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5029 vcpu
->run
->io
.size
= size
;
5030 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5031 vcpu
->run
->io
.count
= count
;
5032 vcpu
->run
->io
.port
= port
;
5037 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5038 int size
, unsigned short port
, void *val
,
5041 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5044 if (vcpu
->arch
.pio
.count
)
5047 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5049 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5052 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5053 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5054 vcpu
->arch
.pio
.count
= 0;
5061 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5062 int size
, unsigned short port
,
5063 const void *val
, unsigned int count
)
5065 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5067 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5068 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5069 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5072 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5074 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5077 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5079 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5082 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5084 if (!need_emulate_wbinvd(vcpu
))
5085 return X86EMUL_CONTINUE
;
5087 if (kvm_x86_ops
->has_wbinvd_exit()) {
5088 int cpu
= get_cpu();
5090 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5091 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5092 wbinvd_ipi
, NULL
, 1);
5094 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5097 return X86EMUL_CONTINUE
;
5100 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5102 kvm_emulate_wbinvd_noskip(vcpu
);
5103 return kvm_skip_emulated_instruction(vcpu
);
5105 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5109 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5111 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5114 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5115 unsigned long *dest
)
5117 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5120 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5121 unsigned long value
)
5124 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5127 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5129 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5132 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5134 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5135 unsigned long value
;
5139 value
= kvm_read_cr0(vcpu
);
5142 value
= vcpu
->arch
.cr2
;
5145 value
= kvm_read_cr3(vcpu
);
5148 value
= kvm_read_cr4(vcpu
);
5151 value
= kvm_get_cr8(vcpu
);
5154 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5161 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5163 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5168 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5171 vcpu
->arch
.cr2
= val
;
5174 res
= kvm_set_cr3(vcpu
, val
);
5177 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5180 res
= kvm_set_cr8(vcpu
, val
);
5183 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5190 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5192 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5195 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5197 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5200 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5202 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5205 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5207 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5210 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5212 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5215 static unsigned long emulator_get_cached_segment_base(
5216 struct x86_emulate_ctxt
*ctxt
, int seg
)
5218 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5221 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5222 struct desc_struct
*desc
, u32
*base3
,
5225 struct kvm_segment var
;
5227 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5228 *selector
= var
.selector
;
5231 memset(desc
, 0, sizeof(*desc
));
5239 set_desc_limit(desc
, var
.limit
);
5240 set_desc_base(desc
, (unsigned long)var
.base
);
5241 #ifdef CONFIG_X86_64
5243 *base3
= var
.base
>> 32;
5245 desc
->type
= var
.type
;
5247 desc
->dpl
= var
.dpl
;
5248 desc
->p
= var
.present
;
5249 desc
->avl
= var
.avl
;
5257 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5258 struct desc_struct
*desc
, u32 base3
,
5261 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5262 struct kvm_segment var
;
5264 var
.selector
= selector
;
5265 var
.base
= get_desc_base(desc
);
5266 #ifdef CONFIG_X86_64
5267 var
.base
|= ((u64
)base3
) << 32;
5269 var
.limit
= get_desc_limit(desc
);
5271 var
.limit
= (var
.limit
<< 12) | 0xfff;
5272 var
.type
= desc
->type
;
5273 var
.dpl
= desc
->dpl
;
5278 var
.avl
= desc
->avl
;
5279 var
.present
= desc
->p
;
5280 var
.unusable
= !var
.present
;
5283 kvm_set_segment(vcpu
, &var
, seg
);
5287 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5288 u32 msr_index
, u64
*pdata
)
5290 struct msr_data msr
;
5293 msr
.index
= msr_index
;
5294 msr
.host_initiated
= false;
5295 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5303 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5304 u32 msr_index
, u64 data
)
5306 struct msr_data msr
;
5309 msr
.index
= msr_index
;
5310 msr
.host_initiated
= false;
5311 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5314 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5316 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5318 return vcpu
->arch
.smbase
;
5321 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5323 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5325 vcpu
->arch
.smbase
= smbase
;
5328 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5331 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5334 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5335 u32 pmc
, u64
*pdata
)
5337 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5340 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5342 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5345 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5346 struct x86_instruction_info
*info
,
5347 enum x86_intercept_stage stage
)
5349 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5352 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5353 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5355 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5358 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5360 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5363 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5365 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5368 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5370 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5373 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5375 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5378 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5380 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5383 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5385 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smbase
);
5388 static const struct x86_emulate_ops emulate_ops
= {
5389 .read_gpr
= emulator_read_gpr
,
5390 .write_gpr
= emulator_write_gpr
,
5391 .read_std
= kvm_read_guest_virt_system
,
5392 .write_std
= kvm_write_guest_virt_system
,
5393 .read_phys
= kvm_read_guest_phys_system
,
5394 .fetch
= kvm_fetch_guest_virt
,
5395 .read_emulated
= emulator_read_emulated
,
5396 .write_emulated
= emulator_write_emulated
,
5397 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5398 .invlpg
= emulator_invlpg
,
5399 .pio_in_emulated
= emulator_pio_in_emulated
,
5400 .pio_out_emulated
= emulator_pio_out_emulated
,
5401 .get_segment
= emulator_get_segment
,
5402 .set_segment
= emulator_set_segment
,
5403 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5404 .get_gdt
= emulator_get_gdt
,
5405 .get_idt
= emulator_get_idt
,
5406 .set_gdt
= emulator_set_gdt
,
5407 .set_idt
= emulator_set_idt
,
5408 .get_cr
= emulator_get_cr
,
5409 .set_cr
= emulator_set_cr
,
5410 .cpl
= emulator_get_cpl
,
5411 .get_dr
= emulator_get_dr
,
5412 .set_dr
= emulator_set_dr
,
5413 .get_smbase
= emulator_get_smbase
,
5414 .set_smbase
= emulator_set_smbase
,
5415 .set_msr
= emulator_set_msr
,
5416 .get_msr
= emulator_get_msr
,
5417 .check_pmc
= emulator_check_pmc
,
5418 .read_pmc
= emulator_read_pmc
,
5419 .halt
= emulator_halt
,
5420 .wbinvd
= emulator_wbinvd
,
5421 .fix_hypercall
= emulator_fix_hypercall
,
5422 .intercept
= emulator_intercept
,
5423 .get_cpuid
= emulator_get_cpuid
,
5424 .set_nmi_mask
= emulator_set_nmi_mask
,
5425 .get_hflags
= emulator_get_hflags
,
5426 .set_hflags
= emulator_set_hflags
,
5427 .pre_leave_smm
= emulator_pre_leave_smm
,
5430 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5432 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5434 * an sti; sti; sequence only disable interrupts for the first
5435 * instruction. So, if the last instruction, be it emulated or
5436 * not, left the system with the INT_STI flag enabled, it
5437 * means that the last instruction is an sti. We should not
5438 * leave the flag on in this case. The same goes for mov ss
5440 if (int_shadow
& mask
)
5442 if (unlikely(int_shadow
|| mask
)) {
5443 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5445 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5449 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5451 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5452 if (ctxt
->exception
.vector
== PF_VECTOR
)
5453 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5455 if (ctxt
->exception
.error_code_valid
)
5456 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5457 ctxt
->exception
.error_code
);
5459 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5463 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5465 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5468 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5470 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5471 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5473 ctxt
->eip
= kvm_rip_read(vcpu
);
5474 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5475 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5476 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5477 cs_db
? X86EMUL_MODE_PROT32
:
5478 X86EMUL_MODE_PROT16
;
5479 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5480 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5481 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5483 init_decode_cache(ctxt
);
5484 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5487 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5489 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5492 init_emulate_ctxt(vcpu
);
5496 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5497 ret
= emulate_int_real(ctxt
, irq
);
5499 if (ret
!= X86EMUL_CONTINUE
)
5500 return EMULATE_FAIL
;
5502 ctxt
->eip
= ctxt
->_eip
;
5503 kvm_rip_write(vcpu
, ctxt
->eip
);
5504 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5506 if (irq
== NMI_VECTOR
)
5507 vcpu
->arch
.nmi_pending
= 0;
5509 vcpu
->arch
.interrupt
.pending
= false;
5511 return EMULATE_DONE
;
5513 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5515 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5517 int r
= EMULATE_DONE
;
5519 ++vcpu
->stat
.insn_emulation_fail
;
5520 trace_kvm_emulate_insn_failed(vcpu
);
5521 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5522 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5523 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5524 vcpu
->run
->internal
.ndata
= 0;
5525 r
= EMULATE_USER_EXIT
;
5527 kvm_queue_exception(vcpu
, UD_VECTOR
);
5532 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5533 bool write_fault_to_shadow_pgtable
,
5539 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5542 if (!vcpu
->arch
.mmu
.direct_map
) {
5544 * Write permission should be allowed since only
5545 * write access need to be emulated.
5547 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5550 * If the mapping is invalid in guest, let cpu retry
5551 * it to generate fault.
5553 if (gpa
== UNMAPPED_GVA
)
5558 * Do not retry the unhandleable instruction if it faults on the
5559 * readonly host memory, otherwise it will goto a infinite loop:
5560 * retry instruction -> write #PF -> emulation fail -> retry
5561 * instruction -> ...
5563 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5566 * If the instruction failed on the error pfn, it can not be fixed,
5567 * report the error to userspace.
5569 if (is_error_noslot_pfn(pfn
))
5572 kvm_release_pfn_clean(pfn
);
5574 /* The instructions are well-emulated on direct mmu. */
5575 if (vcpu
->arch
.mmu
.direct_map
) {
5576 unsigned int indirect_shadow_pages
;
5578 spin_lock(&vcpu
->kvm
->mmu_lock
);
5579 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5580 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5582 if (indirect_shadow_pages
)
5583 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5589 * if emulation was due to access to shadowed page table
5590 * and it failed try to unshadow page and re-enter the
5591 * guest to let CPU execute the instruction.
5593 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5596 * If the access faults on its page table, it can not
5597 * be fixed by unprotecting shadow page and it should
5598 * be reported to userspace.
5600 return !write_fault_to_shadow_pgtable
;
5603 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5604 unsigned long cr2
, int emulation_type
)
5606 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5607 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5609 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5610 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5613 * If the emulation is caused by #PF and it is non-page_table
5614 * writing instruction, it means the VM-EXIT is caused by shadow
5615 * page protected, we can zap the shadow page and retry this
5616 * instruction directly.
5618 * Note: if the guest uses a non-page-table modifying instruction
5619 * on the PDE that points to the instruction, then we will unmap
5620 * the instruction and go to an infinite loop. So, we cache the
5621 * last retried eip and the last fault address, if we meet the eip
5622 * and the address again, we can break out of the potential infinite
5625 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5627 if (!(emulation_type
& EMULTYPE_RETRY
))
5630 if (x86_page_table_writing_insn(ctxt
))
5633 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5636 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5637 vcpu
->arch
.last_retry_addr
= cr2
;
5639 if (!vcpu
->arch
.mmu
.direct_map
)
5640 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5642 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5647 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5648 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5650 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5652 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5653 /* This is a good place to trace that we are exiting SMM. */
5654 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5656 /* Process a latched INIT or SMI, if any. */
5657 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5660 kvm_mmu_reset_context(vcpu
);
5663 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5665 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5667 vcpu
->arch
.hflags
= emul_flags
;
5669 if (changed
& HF_SMM_MASK
)
5670 kvm_smm_changed(vcpu
);
5673 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5682 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5683 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5688 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5690 struct kvm_run
*kvm_run
= vcpu
->run
;
5692 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5693 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5694 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5695 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5696 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5697 *r
= EMULATE_USER_EXIT
;
5700 * "Certain debug exceptions may clear bit 0-3. The
5701 * remaining contents of the DR6 register are never
5702 * cleared by the processor".
5704 vcpu
->arch
.dr6
&= ~15;
5705 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5706 kvm_queue_exception(vcpu
, DB_VECTOR
);
5710 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5712 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5713 int r
= EMULATE_DONE
;
5715 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5718 * rflags is the old, "raw" value of the flags. The new value has
5719 * not been saved yet.
5721 * This is correct even for TF set by the guest, because "the
5722 * processor will not generate this exception after the instruction
5723 * that sets the TF flag".
5725 if (unlikely(rflags
& X86_EFLAGS_TF
))
5726 kvm_vcpu_do_singlestep(vcpu
, &r
);
5727 return r
== EMULATE_DONE
;
5729 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5731 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5733 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5734 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5735 struct kvm_run
*kvm_run
= vcpu
->run
;
5736 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5737 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5738 vcpu
->arch
.guest_debug_dr7
,
5742 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5743 kvm_run
->debug
.arch
.pc
= eip
;
5744 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5745 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5746 *r
= EMULATE_USER_EXIT
;
5751 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5752 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5753 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5754 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5759 vcpu
->arch
.dr6
&= ~15;
5760 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5761 kvm_queue_exception(vcpu
, DB_VECTOR
);
5770 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5777 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5778 bool writeback
= true;
5779 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5781 vcpu
->arch
.l1tf_flush_l1d
= true;
5784 * Clear write_fault_to_shadow_pgtable here to ensure it is
5787 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5788 kvm_clear_exception_queue(vcpu
);
5790 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5791 init_emulate_ctxt(vcpu
);
5794 * We will reenter on the same instruction since
5795 * we do not set complete_userspace_io. This does not
5796 * handle watchpoints yet, those would be handled in
5799 if (!(emulation_type
& EMULTYPE_SKIP
) &&
5800 kvm_vcpu_check_breakpoint(vcpu
, &r
))
5803 ctxt
->interruptibility
= 0;
5804 ctxt
->have_exception
= false;
5805 ctxt
->exception
.vector
= -1;
5806 ctxt
->perm_ok
= false;
5808 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5810 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5812 trace_kvm_emulate_insn_start(vcpu
);
5813 ++vcpu
->stat
.insn_emulation
;
5814 if (r
!= EMULATION_OK
) {
5815 if (emulation_type
& EMULTYPE_TRAP_UD
)
5816 return EMULATE_FAIL
;
5817 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5819 return EMULATE_DONE
;
5820 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
5821 return EMULATE_DONE
;
5822 if (emulation_type
& EMULTYPE_SKIP
)
5823 return EMULATE_FAIL
;
5824 return handle_emulation_failure(vcpu
);
5828 if (emulation_type
& EMULTYPE_SKIP
) {
5829 kvm_rip_write(vcpu
, ctxt
->_eip
);
5830 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5831 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5832 return EMULATE_DONE
;
5835 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5836 return EMULATE_DONE
;
5838 /* this is needed for vmware backdoor interface to work since it
5839 changes registers values during IO operation */
5840 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5841 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5842 emulator_invalidate_register_cache(ctxt
);
5846 /* Save the faulting GPA (cr2) in the address field */
5847 ctxt
->exception
.address
= cr2
;
5849 r
= x86_emulate_insn(ctxt
);
5851 if (r
== EMULATION_INTERCEPTED
)
5852 return EMULATE_DONE
;
5854 if (r
== EMULATION_FAILED
) {
5855 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5857 return EMULATE_DONE
;
5859 return handle_emulation_failure(vcpu
);
5862 if (ctxt
->have_exception
) {
5864 if (inject_emulated_exception(vcpu
))
5866 } else if (vcpu
->arch
.pio
.count
) {
5867 if (!vcpu
->arch
.pio
.in
) {
5868 /* FIXME: return into emulator if single-stepping. */
5869 vcpu
->arch
.pio
.count
= 0;
5872 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5874 r
= EMULATE_USER_EXIT
;
5875 } else if (vcpu
->mmio_needed
) {
5876 if (!vcpu
->mmio_is_write
)
5878 r
= EMULATE_USER_EXIT
;
5879 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5880 } else if (r
== EMULATION_RESTART
)
5886 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5887 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5888 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5889 kvm_rip_write(vcpu
, ctxt
->eip
);
5890 if (r
== EMULATE_DONE
&&
5891 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5892 kvm_vcpu_do_singlestep(vcpu
, &r
);
5893 if (!ctxt
->have_exception
||
5894 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5895 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5898 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5899 * do nothing, and it will be requested again as soon as
5900 * the shadow expires. But we still need to check here,
5901 * because POPF has no interrupt shadow.
5903 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5904 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5906 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5910 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5912 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5914 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5915 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5916 size
, port
, &val
, 1);
5917 /* do not return to emulator after return from userspace */
5918 vcpu
->arch
.pio
.count
= 0;
5921 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5923 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5927 /* We should only ever be called with arch.pio.count equal to 1 */
5928 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5930 /* For size less than 4 we merge, else we zero extend */
5931 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5935 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5936 * the copy and tracing
5938 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5939 vcpu
->arch
.pio
.port
, &val
, 1);
5940 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5945 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5950 /* For size less than 4 we merge, else we zero extend */
5951 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5953 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5956 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5960 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5964 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5966 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5968 __this_cpu_write(cpu_tsc_khz
, 0);
5972 static void tsc_khz_changed(void *data
)
5974 struct cpufreq_freqs
*freq
= data
;
5975 unsigned long khz
= 0;
5979 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5980 khz
= cpufreq_quick_get(raw_smp_processor_id());
5983 __this_cpu_write(cpu_tsc_khz
, khz
);
5986 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5989 struct cpufreq_freqs
*freq
= data
;
5991 struct kvm_vcpu
*vcpu
;
5992 int i
, send_ipi
= 0;
5995 * We allow guests to temporarily run on slowing clocks,
5996 * provided we notify them after, or to run on accelerating
5997 * clocks, provided we notify them before. Thus time never
6000 * However, we have a problem. We can't atomically update
6001 * the frequency of a given CPU from this function; it is
6002 * merely a notifier, which can be called from any CPU.
6003 * Changing the TSC frequency at arbitrary points in time
6004 * requires a recomputation of local variables related to
6005 * the TSC for each VCPU. We must flag these local variables
6006 * to be updated and be sure the update takes place with the
6007 * new frequency before any guests proceed.
6009 * Unfortunately, the combination of hotplug CPU and frequency
6010 * change creates an intractable locking scenario; the order
6011 * of when these callouts happen is undefined with respect to
6012 * CPU hotplug, and they can race with each other. As such,
6013 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6014 * undefined; you can actually have a CPU frequency change take
6015 * place in between the computation of X and the setting of the
6016 * variable. To protect against this problem, all updates of
6017 * the per_cpu tsc_khz variable are done in an interrupt
6018 * protected IPI, and all callers wishing to update the value
6019 * must wait for a synchronous IPI to complete (which is trivial
6020 * if the caller is on the CPU already). This establishes the
6021 * necessary total order on variable updates.
6023 * Note that because a guest time update may take place
6024 * anytime after the setting of the VCPU's request bit, the
6025 * correct TSC value must be set before the request. However,
6026 * to ensure the update actually makes it to any guest which
6027 * starts running in hardware virtualization between the set
6028 * and the acquisition of the spinlock, we must also ping the
6029 * CPU after setting the request bit.
6033 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6035 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6038 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6040 spin_lock(&kvm_lock
);
6041 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6042 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6043 if (vcpu
->cpu
!= freq
->cpu
)
6045 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6046 if (vcpu
->cpu
!= smp_processor_id())
6050 spin_unlock(&kvm_lock
);
6052 if (freq
->old
< freq
->new && send_ipi
) {
6054 * We upscale the frequency. Must make the guest
6055 * doesn't see old kvmclock values while running with
6056 * the new frequency, otherwise we risk the guest sees
6057 * time go backwards.
6059 * In case we update the frequency for another cpu
6060 * (which might be in guest context) send an interrupt
6061 * to kick the cpu out of guest context. Next time
6062 * guest context is entered kvmclock will be updated,
6063 * so the guest will not see stale values.
6065 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
6070 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6071 .notifier_call
= kvmclock_cpufreq_notifier
6074 static int kvmclock_cpu_online(unsigned int cpu
)
6076 tsc_khz_changed(NULL
);
6080 static void kvm_timer_init(void)
6082 max_tsc_khz
= tsc_khz
;
6084 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6085 #ifdef CONFIG_CPU_FREQ
6086 struct cpufreq_policy policy
;
6089 memset(&policy
, 0, sizeof(policy
));
6091 cpufreq_get_policy(&policy
, cpu
);
6092 if (policy
.cpuinfo
.max_freq
)
6093 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6096 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6097 CPUFREQ_TRANSITION_NOTIFIER
);
6099 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6101 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6102 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6105 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6107 int kvm_is_in_guest(void)
6109 return __this_cpu_read(current_vcpu
) != NULL
;
6112 static int kvm_is_user_mode(void)
6116 if (__this_cpu_read(current_vcpu
))
6117 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6119 return user_mode
!= 0;
6122 static unsigned long kvm_get_guest_ip(void)
6124 unsigned long ip
= 0;
6126 if (__this_cpu_read(current_vcpu
))
6127 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6132 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6133 .is_in_guest
= kvm_is_in_guest
,
6134 .is_user_mode
= kvm_is_user_mode
,
6135 .get_guest_ip
= kvm_get_guest_ip
,
6138 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
6140 __this_cpu_write(current_vcpu
, vcpu
);
6142 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
6144 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
6146 __this_cpu_write(current_vcpu
, NULL
);
6148 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
6150 static void kvm_set_mmio_spte_mask(void)
6153 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6156 * Set the reserved bits and the present bit of an paging-structure
6157 * entry to generate page fault with PFER.RSV = 1.
6159 /* Mask the reserved physical address bits. */
6160 mask
= rsvd_bits(maxphyaddr
, 51);
6162 /* Set the present bit. */
6165 #ifdef CONFIG_X86_64
6167 * If reserved bit is not supported, clear the present bit to disable
6170 if (maxphyaddr
== 52)
6174 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6177 #ifdef CONFIG_X86_64
6178 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6182 struct kvm_vcpu
*vcpu
;
6185 spin_lock(&kvm_lock
);
6186 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6187 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6188 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6189 atomic_set(&kvm_guest_has_master_clock
, 0);
6190 spin_unlock(&kvm_lock
);
6193 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6196 * Notification about pvclock gtod data update.
6198 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6201 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6202 struct timekeeper
*tk
= priv
;
6204 update_pvclock_gtod(tk
);
6206 /* disable master clock if host does not trust, or does not
6207 * use, TSC clocksource
6209 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6210 atomic_read(&kvm_guest_has_master_clock
) != 0)
6211 queue_work(system_long_wq
, &pvclock_gtod_work
);
6216 static struct notifier_block pvclock_gtod_notifier
= {
6217 .notifier_call
= pvclock_gtod_notify
,
6221 int kvm_arch_init(void *opaque
)
6224 struct kvm_x86_ops
*ops
= opaque
;
6227 printk(KERN_ERR
"kvm: already loaded the other module\n");
6232 if (!ops
->cpu_has_kvm_support()) {
6233 printk(KERN_ERR
"kvm: no hardware support\n");
6237 if (ops
->disabled_by_bios()) {
6238 printk(KERN_WARNING
"kvm: disabled by bios\n");
6244 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6246 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6250 r
= kvm_mmu_module_init();
6252 goto out_free_percpu
;
6254 kvm_set_mmio_spte_mask();
6258 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6259 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6260 PT_PRESENT_MASK
, 0, sme_me_mask
);
6263 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6265 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6266 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6269 #ifdef CONFIG_X86_64
6270 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6276 free_percpu(shared_msrs
);
6281 void kvm_arch_exit(void)
6284 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6286 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6287 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6288 CPUFREQ_TRANSITION_NOTIFIER
);
6289 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6290 #ifdef CONFIG_X86_64
6291 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6294 kvm_mmu_module_exit();
6295 free_percpu(shared_msrs
);
6298 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6300 ++vcpu
->stat
.halt_exits
;
6301 if (lapic_in_kernel(vcpu
)) {
6302 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6305 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6309 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6311 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6313 int ret
= kvm_skip_emulated_instruction(vcpu
);
6315 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6316 * KVM_EXIT_DEBUG here.
6318 return kvm_vcpu_halt(vcpu
) && ret
;
6320 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6322 #ifdef CONFIG_X86_64
6323 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6324 unsigned long clock_type
)
6326 struct kvm_clock_pairing clock_pairing
;
6331 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6332 return -KVM_EOPNOTSUPP
;
6334 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6335 return -KVM_EOPNOTSUPP
;
6337 clock_pairing
.sec
= ts
.tv_sec
;
6338 clock_pairing
.nsec
= ts
.tv_nsec
;
6339 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6340 clock_pairing
.flags
= 0;
6343 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6344 sizeof(struct kvm_clock_pairing
)))
6352 * kvm_pv_kick_cpu_op: Kick a vcpu.
6354 * @apicid - apicid of vcpu to be kicked.
6356 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6358 struct kvm_lapic_irq lapic_irq
;
6360 lapic_irq
.shorthand
= 0;
6361 lapic_irq
.dest_mode
= 0;
6362 lapic_irq
.level
= 0;
6363 lapic_irq
.dest_id
= apicid
;
6364 lapic_irq
.msi_redir_hint
= false;
6366 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6367 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6370 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6372 vcpu
->arch
.apicv_active
= false;
6373 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6376 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6378 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6381 r
= kvm_skip_emulated_instruction(vcpu
);
6383 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6384 return kvm_hv_hypercall(vcpu
);
6386 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6387 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6388 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6389 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6390 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6392 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6394 op_64_bit
= is_64_bit_mode(vcpu
);
6403 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6409 case KVM_HC_VAPIC_POLL_IRQ
:
6412 case KVM_HC_KICK_CPU
:
6413 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6416 #ifdef CONFIG_X86_64
6417 case KVM_HC_CLOCK_PAIRING
:
6418 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6428 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6429 ++vcpu
->stat
.hypercalls
;
6432 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6434 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6436 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6437 char instruction
[3];
6438 unsigned long rip
= kvm_rip_read(vcpu
);
6440 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6442 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6446 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6448 return vcpu
->run
->request_interrupt_window
&&
6449 likely(!pic_in_kernel(vcpu
->kvm
));
6452 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6454 struct kvm_run
*kvm_run
= vcpu
->run
;
6456 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6457 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6458 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6459 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6460 kvm_run
->ready_for_interrupt_injection
=
6461 pic_in_kernel(vcpu
->kvm
) ||
6462 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6465 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6469 if (!kvm_x86_ops
->update_cr8_intercept
)
6472 if (!lapic_in_kernel(vcpu
))
6475 if (vcpu
->arch
.apicv_active
)
6478 if (!vcpu
->arch
.apic
->vapic_addr
)
6479 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6486 tpr
= kvm_lapic_get_cr8(vcpu
);
6488 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6491 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6495 /* try to reinject previous events if any */
6496 if (vcpu
->arch
.exception
.injected
) {
6497 kvm_x86_ops
->queue_exception(vcpu
);
6502 * Exceptions must be injected immediately, or the exception
6503 * frame will have the address of the NMI or interrupt handler.
6505 if (!vcpu
->arch
.exception
.pending
) {
6506 if (vcpu
->arch
.nmi_injected
) {
6507 kvm_x86_ops
->set_nmi(vcpu
);
6511 if (vcpu
->arch
.interrupt
.pending
) {
6512 kvm_x86_ops
->set_irq(vcpu
);
6517 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6518 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6523 /* try to inject new event if pending */
6524 if (vcpu
->arch
.exception
.pending
) {
6525 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6526 vcpu
->arch
.exception
.has_error_code
,
6527 vcpu
->arch
.exception
.error_code
);
6529 vcpu
->arch
.exception
.pending
= false;
6530 vcpu
->arch
.exception
.injected
= true;
6532 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6533 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6536 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6537 (vcpu
->arch
.dr7
& DR7_GD
)) {
6538 vcpu
->arch
.dr7
&= ~DR7_GD
;
6539 kvm_update_dr7(vcpu
);
6542 kvm_x86_ops
->queue_exception(vcpu
);
6543 } else if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) && kvm_x86_ops
->smi_allowed(vcpu
)) {
6544 vcpu
->arch
.smi_pending
= false;
6546 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6547 --vcpu
->arch
.nmi_pending
;
6548 vcpu
->arch
.nmi_injected
= true;
6549 kvm_x86_ops
->set_nmi(vcpu
);
6550 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6552 * Because interrupts can be injected asynchronously, we are
6553 * calling check_nested_events again here to avoid a race condition.
6554 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6555 * proposal and current concerns. Perhaps we should be setting
6556 * KVM_REQ_EVENT only on certain events and not unconditionally?
6558 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6559 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6563 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6564 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6566 kvm_x86_ops
->set_irq(vcpu
);
6573 static void process_nmi(struct kvm_vcpu
*vcpu
)
6578 * x86 is limited to one NMI running, and one NMI pending after it.
6579 * If an NMI is already in progress, limit further NMIs to just one.
6580 * Otherwise, allow two (and we'll inject the first one immediately).
6582 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6585 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6586 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6587 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6590 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6593 flags
|= seg
->g
<< 23;
6594 flags
|= seg
->db
<< 22;
6595 flags
|= seg
->l
<< 21;
6596 flags
|= seg
->avl
<< 20;
6597 flags
|= seg
->present
<< 15;
6598 flags
|= seg
->dpl
<< 13;
6599 flags
|= seg
->s
<< 12;
6600 flags
|= seg
->type
<< 8;
6604 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6606 struct kvm_segment seg
;
6609 kvm_get_segment(vcpu
, &seg
, n
);
6610 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6613 offset
= 0x7f84 + n
* 12;
6615 offset
= 0x7f2c + (n
- 3) * 12;
6617 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6618 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6619 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6622 #ifdef CONFIG_X86_64
6623 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6625 struct kvm_segment seg
;
6629 kvm_get_segment(vcpu
, &seg
, n
);
6630 offset
= 0x7e00 + n
* 16;
6632 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6633 put_smstate(u16
, buf
, offset
, seg
.selector
);
6634 put_smstate(u16
, buf
, offset
+ 2, flags
);
6635 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6636 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6640 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6643 struct kvm_segment seg
;
6647 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6648 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6649 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6650 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6652 for (i
= 0; i
< 8; i
++)
6653 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6655 kvm_get_dr(vcpu
, 6, &val
);
6656 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6657 kvm_get_dr(vcpu
, 7, &val
);
6658 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6660 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6661 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6662 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6663 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6664 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6666 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6667 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6668 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6669 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6670 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6672 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6673 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6674 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6676 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6677 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6678 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6680 for (i
= 0; i
< 6; i
++)
6681 enter_smm_save_seg_32(vcpu
, buf
, i
);
6683 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6686 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6687 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6690 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6692 #ifdef CONFIG_X86_64
6694 struct kvm_segment seg
;
6698 for (i
= 0; i
< 16; i
++)
6699 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6701 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6702 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6704 kvm_get_dr(vcpu
, 6, &val
);
6705 put_smstate(u64
, buf
, 0x7f68, val
);
6706 kvm_get_dr(vcpu
, 7, &val
);
6707 put_smstate(u64
, buf
, 0x7f60, val
);
6709 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6710 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6711 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6713 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6716 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6718 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6720 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6721 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6722 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6723 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6724 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6726 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6727 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6728 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6730 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6731 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6732 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6733 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6734 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6736 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6737 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6738 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6740 for (i
= 0; i
< 6; i
++)
6741 enter_smm_save_seg_64(vcpu
, buf
, i
);
6747 static void enter_smm(struct kvm_vcpu
*vcpu
)
6749 struct kvm_segment cs
, ds
;
6754 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6755 memset(buf
, 0, 512);
6756 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6757 enter_smm_save_state_64(vcpu
, buf
);
6759 enter_smm_save_state_32(vcpu
, buf
);
6762 * Give pre_enter_smm() a chance to make ISA-specific changes to the
6763 * vCPU state (e.g. leave guest mode) after we've saved the state into
6764 * the SMM state-save area.
6766 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
6768 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6769 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6771 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6772 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6774 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6776 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6777 kvm_rip_write(vcpu
, 0x8000);
6779 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6780 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6781 vcpu
->arch
.cr0
= cr0
;
6783 kvm_x86_ops
->set_cr4(vcpu
, 0);
6785 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6786 dt
.address
= dt
.size
= 0;
6787 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6789 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6791 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6792 cs
.base
= vcpu
->arch
.smbase
;
6797 cs
.limit
= ds
.limit
= 0xffffffff;
6798 cs
.type
= ds
.type
= 0x3;
6799 cs
.dpl
= ds
.dpl
= 0;
6804 cs
.avl
= ds
.avl
= 0;
6805 cs
.present
= ds
.present
= 1;
6806 cs
.unusable
= ds
.unusable
= 0;
6807 cs
.padding
= ds
.padding
= 0;
6809 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6810 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6811 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6812 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6813 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6814 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6816 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6817 kvm_x86_ops
->set_efer(vcpu
, 0);
6819 kvm_update_cpuid(vcpu
);
6820 kvm_mmu_reset_context(vcpu
);
6823 static void process_smi(struct kvm_vcpu
*vcpu
)
6825 vcpu
->arch
.smi_pending
= true;
6826 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6829 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6831 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6834 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6836 u64 eoi_exit_bitmap
[4];
6838 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6841 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6843 if (irqchip_split(vcpu
->kvm
))
6844 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6846 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6847 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6848 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6850 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6851 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6852 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6855 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6857 ++vcpu
->stat
.tlb_flush
;
6858 kvm_x86_ops
->tlb_flush(vcpu
);
6861 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
6862 unsigned long start
, unsigned long end
)
6864 unsigned long apic_address
;
6867 * The physical address of apic access page is stored in the VMCS.
6868 * Update it when it becomes invalid.
6870 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6871 if (start
<= apic_address
&& apic_address
< end
)
6872 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6875 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6877 struct page
*page
= NULL
;
6879 if (!lapic_in_kernel(vcpu
))
6882 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6885 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6886 if (is_error_page(page
))
6888 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6891 * Do not pin apic access page in memory, the MMU notifier
6892 * will call us again if it is migrated or swapped out.
6896 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6899 * Returns 1 to let vcpu_run() continue the guest execution loop without
6900 * exiting to the userspace. Otherwise, the value will be returned to the
6903 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6907 dm_request_for_irq_injection(vcpu
) &&
6908 kvm_cpu_accept_dm_intr(vcpu
);
6910 bool req_immediate_exit
= false;
6912 if (kvm_request_pending(vcpu
)) {
6913 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6914 kvm_mmu_unload(vcpu
);
6915 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6916 __kvm_migrate_timers(vcpu
);
6917 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6918 kvm_gen_update_masterclock(vcpu
->kvm
);
6919 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6920 kvm_gen_kvmclock_update(vcpu
);
6921 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6922 r
= kvm_guest_time_update(vcpu
);
6926 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6927 kvm_mmu_sync_roots(vcpu
);
6928 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6929 kvm_vcpu_flush_tlb(vcpu
);
6930 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6931 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6935 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6936 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6937 vcpu
->mmio_needed
= 0;
6941 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6942 /* Page is swapped out. Do synthetic halt */
6943 vcpu
->arch
.apf
.halted
= true;
6947 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6948 record_steal_time(vcpu
);
6949 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6951 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6953 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6954 kvm_pmu_handle_event(vcpu
);
6955 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6956 kvm_pmu_deliver_pmi(vcpu
);
6957 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6958 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6959 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6960 vcpu
->arch
.ioapic_handled_vectors
)) {
6961 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6962 vcpu
->run
->eoi
.vector
=
6963 vcpu
->arch
.pending_ioapic_eoi
;
6968 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6969 vcpu_scan_ioapic(vcpu
);
6970 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6971 kvm_vcpu_reload_apic_access_page(vcpu
);
6972 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6973 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6974 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6978 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6979 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6980 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6984 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6985 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6986 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6992 * KVM_REQ_HV_STIMER has to be processed after
6993 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6994 * depend on the guest clock being up-to-date
6996 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6997 kvm_hv_process_stimers(vcpu
);
7000 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7001 ++vcpu
->stat
.req_event
;
7002 kvm_apic_accept_events(vcpu
);
7003 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7008 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7009 req_immediate_exit
= true;
7011 /* Enable SMI/NMI/IRQ window open exits if needed.
7013 * SMIs have three cases:
7014 * 1) They can be nested, and then there is nothing to
7015 * do here because RSM will cause a vmexit anyway.
7016 * 2) There is an ISA-specific reason why SMI cannot be
7017 * injected, and the moment when this changes can be
7019 * 3) Or the SMI can be pending because
7020 * inject_pending_event has completed the injection
7021 * of an IRQ or NMI from the previous vmexit, and
7022 * then we request an immediate exit to inject the
7025 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7026 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7027 req_immediate_exit
= true;
7028 if (vcpu
->arch
.nmi_pending
)
7029 kvm_x86_ops
->enable_nmi_window(vcpu
);
7030 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7031 kvm_x86_ops
->enable_irq_window(vcpu
);
7032 WARN_ON(vcpu
->arch
.exception
.pending
);
7035 if (kvm_lapic_enabled(vcpu
)) {
7036 update_cr8_intercept(vcpu
);
7037 kvm_lapic_sync_to_vapic(vcpu
);
7041 r
= kvm_mmu_reload(vcpu
);
7043 goto cancel_injection
;
7048 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7051 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7052 * IPI are then delayed after guest entry, which ensures that they
7053 * result in virtual interrupt delivery.
7055 local_irq_disable();
7056 vcpu
->mode
= IN_GUEST_MODE
;
7058 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7061 * 1) We should set ->mode before checking ->requests. Please see
7062 * the comment in kvm_vcpu_exiting_guest_mode().
7064 * 2) For APICv, we should set ->mode before checking PIR.ON. This
7065 * pairs with the memory barrier implicit in pi_test_and_set_on
7066 * (see vmx_deliver_posted_interrupt).
7068 * 3) This also orders the write to mode from any reads to the page
7069 * tables done while the VCPU is running. Please see the comment
7070 * in kvm_flush_remote_tlbs.
7072 smp_mb__after_srcu_read_unlock();
7075 * This handles the case where a posted interrupt was
7076 * notified with kvm_vcpu_kick.
7078 if (kvm_lapic_enabled(vcpu
)) {
7079 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
7080 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7083 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7084 || need_resched() || signal_pending(current
)) {
7085 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7089 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7091 goto cancel_injection
;
7094 kvm_load_guest_xcr0(vcpu
);
7096 if (req_immediate_exit
) {
7097 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7098 smp_send_reschedule(vcpu
->cpu
);
7101 trace_kvm_entry(vcpu
->vcpu_id
);
7102 wait_lapic_expire(vcpu
);
7103 guest_enter_irqoff();
7105 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7107 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7108 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7109 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7110 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7111 set_debugreg(vcpu
->arch
.dr6
, 6);
7112 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7115 kvm_x86_ops
->run(vcpu
);
7118 * Do this here before restoring debug registers on the host. And
7119 * since we do this before handling the vmexit, a DR access vmexit
7120 * can (a) read the correct value of the debug registers, (b) set
7121 * KVM_DEBUGREG_WONT_EXIT again.
7123 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7124 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7125 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7126 kvm_update_dr0123(vcpu
);
7127 kvm_update_dr6(vcpu
);
7128 kvm_update_dr7(vcpu
);
7129 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7133 * If the guest has used debug registers, at least dr7
7134 * will be disabled while returning to the host.
7135 * If we don't have active breakpoints in the host, we don't
7136 * care about the messed up debug address registers. But if
7137 * we have some of them active, restore the old state.
7139 if (hw_breakpoint_active())
7140 hw_breakpoint_restore();
7142 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
7144 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7147 kvm_put_guest_xcr0(vcpu
);
7149 kvm_x86_ops
->handle_external_intr(vcpu
);
7153 guest_exit_irqoff();
7158 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7161 * Profile KVM exit RIPs:
7163 if (unlikely(prof_on
== KVM_PROFILING
)) {
7164 unsigned long rip
= kvm_rip_read(vcpu
);
7165 profile_hit(KVM_PROFILING
, (void *)rip
);
7168 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
7169 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7171 if (vcpu
->arch
.apic_attention
)
7172 kvm_lapic_sync_from_vapic(vcpu
);
7174 vcpu
->arch
.gpa_available
= false;
7175 r
= kvm_x86_ops
->handle_exit(vcpu
);
7179 kvm_x86_ops
->cancel_injection(vcpu
);
7180 if (unlikely(vcpu
->arch
.apic_attention
))
7181 kvm_lapic_sync_from_vapic(vcpu
);
7186 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7188 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7189 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7190 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7191 kvm_vcpu_block(vcpu
);
7192 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7194 if (kvm_x86_ops
->post_block
)
7195 kvm_x86_ops
->post_block(vcpu
);
7197 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7201 kvm_apic_accept_events(vcpu
);
7202 switch(vcpu
->arch
.mp_state
) {
7203 case KVM_MP_STATE_HALTED
:
7204 vcpu
->arch
.pv
.pv_unhalted
= false;
7205 vcpu
->arch
.mp_state
=
7206 KVM_MP_STATE_RUNNABLE
;
7207 case KVM_MP_STATE_RUNNABLE
:
7208 vcpu
->arch
.apf
.halted
= false;
7210 case KVM_MP_STATE_INIT_RECEIVED
:
7219 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7221 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7222 kvm_x86_ops
->check_nested_events(vcpu
, false);
7224 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7225 !vcpu
->arch
.apf
.halted
);
7228 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7231 struct kvm
*kvm
= vcpu
->kvm
;
7233 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7234 vcpu
->arch
.l1tf_flush_l1d
= true;
7237 if (kvm_vcpu_running(vcpu
)) {
7238 r
= vcpu_enter_guest(vcpu
);
7240 r
= vcpu_block(kvm
, vcpu
);
7246 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7247 if (kvm_cpu_has_pending_timer(vcpu
))
7248 kvm_inject_pending_timer_irqs(vcpu
);
7250 if (dm_request_for_irq_injection(vcpu
) &&
7251 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7253 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7254 ++vcpu
->stat
.request_irq_exits
;
7258 kvm_check_async_pf_completion(vcpu
);
7260 if (signal_pending(current
)) {
7262 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7263 ++vcpu
->stat
.signal_exits
;
7266 if (need_resched()) {
7267 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7269 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7273 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7278 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7281 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7282 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7283 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7284 if (r
!= EMULATE_DONE
)
7289 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7291 BUG_ON(!vcpu
->arch
.pio
.count
);
7293 return complete_emulated_io(vcpu
);
7297 * Implements the following, as a state machine:
7301 * for each mmio piece in the fragment
7309 * for each mmio piece in the fragment
7314 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7316 struct kvm_run
*run
= vcpu
->run
;
7317 struct kvm_mmio_fragment
*frag
;
7320 BUG_ON(!vcpu
->mmio_needed
);
7322 /* Complete previous fragment */
7323 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7324 len
= min(8u, frag
->len
);
7325 if (!vcpu
->mmio_is_write
)
7326 memcpy(frag
->data
, run
->mmio
.data
, len
);
7328 if (frag
->len
<= 8) {
7329 /* Switch to the next fragment. */
7331 vcpu
->mmio_cur_fragment
++;
7333 /* Go forward to the next mmio piece. */
7339 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7340 vcpu
->mmio_needed
= 0;
7342 /* FIXME: return into emulator if single-stepping. */
7343 if (vcpu
->mmio_is_write
)
7345 vcpu
->mmio_read_completed
= 1;
7346 return complete_emulated_io(vcpu
);
7349 run
->exit_reason
= KVM_EXIT_MMIO
;
7350 run
->mmio
.phys_addr
= frag
->gpa
;
7351 if (vcpu
->mmio_is_write
)
7352 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7353 run
->mmio
.len
= min(8u, frag
->len
);
7354 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7355 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7360 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7364 kvm_sigset_activate(vcpu
);
7366 kvm_load_guest_fpu(vcpu
);
7368 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7369 if (kvm_run
->immediate_exit
) {
7373 kvm_vcpu_block(vcpu
);
7374 kvm_apic_accept_events(vcpu
);
7375 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7377 if (signal_pending(current
)) {
7379 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7380 ++vcpu
->stat
.signal_exits
;
7385 /* re-sync apic's tpr */
7386 if (!lapic_in_kernel(vcpu
)) {
7387 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7393 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7394 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7395 vcpu
->arch
.complete_userspace_io
= NULL
;
7400 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7402 if (kvm_run
->immediate_exit
)
7408 kvm_put_guest_fpu(vcpu
);
7409 post_kvm_run_save(vcpu
);
7410 kvm_sigset_deactivate(vcpu
);
7415 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7417 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7419 * We are here if userspace calls get_regs() in the middle of
7420 * instruction emulation. Registers state needs to be copied
7421 * back from emulation context to vcpu. Userspace shouldn't do
7422 * that usually, but some bad designed PV devices (vmware
7423 * backdoor interface) need this to work
7425 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7426 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7428 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7429 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7430 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7431 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7432 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7433 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7434 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7435 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7436 #ifdef CONFIG_X86_64
7437 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7438 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7439 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7440 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7441 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7442 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7443 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7444 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7447 regs
->rip
= kvm_rip_read(vcpu
);
7448 regs
->rflags
= kvm_get_rflags(vcpu
);
7453 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7455 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7456 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7458 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7459 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7460 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7461 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7462 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7463 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7464 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7465 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7466 #ifdef CONFIG_X86_64
7467 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7468 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7469 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7470 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7471 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7472 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7473 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7474 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7477 kvm_rip_write(vcpu
, regs
->rip
);
7478 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
7480 vcpu
->arch
.exception
.pending
= false;
7482 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7487 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7489 struct kvm_segment cs
;
7491 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7495 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7497 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7498 struct kvm_sregs
*sregs
)
7502 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7503 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7504 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7505 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7506 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7507 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7509 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7510 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7512 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7513 sregs
->idt
.limit
= dt
.size
;
7514 sregs
->idt
.base
= dt
.address
;
7515 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7516 sregs
->gdt
.limit
= dt
.size
;
7517 sregs
->gdt
.base
= dt
.address
;
7519 sregs
->cr0
= kvm_read_cr0(vcpu
);
7520 sregs
->cr2
= vcpu
->arch
.cr2
;
7521 sregs
->cr3
= kvm_read_cr3(vcpu
);
7522 sregs
->cr4
= kvm_read_cr4(vcpu
);
7523 sregs
->cr8
= kvm_get_cr8(vcpu
);
7524 sregs
->efer
= vcpu
->arch
.efer
;
7525 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7527 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7529 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7530 set_bit(vcpu
->arch
.interrupt
.nr
,
7531 (unsigned long *)sregs
->interrupt_bitmap
);
7536 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7537 struct kvm_mp_state
*mp_state
)
7539 kvm_apic_accept_events(vcpu
);
7540 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7541 vcpu
->arch
.pv
.pv_unhalted
)
7542 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7544 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7549 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7550 struct kvm_mp_state
*mp_state
)
7552 if (!lapic_in_kernel(vcpu
) &&
7553 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7556 /* INITs are latched while in SMM */
7557 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7558 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7559 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7562 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7563 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7564 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7566 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7567 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7571 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7572 int reason
, bool has_error_code
, u32 error_code
)
7574 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7577 init_emulate_ctxt(vcpu
);
7579 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7580 has_error_code
, error_code
);
7583 return EMULATE_FAIL
;
7585 kvm_rip_write(vcpu
, ctxt
->eip
);
7586 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7587 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7588 return EMULATE_DONE
;
7590 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7592 int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
7594 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
7596 * When EFER.LME and CR0.PG are set, the processor is in
7597 * 64-bit mode (though maybe in a 32-bit code segment).
7598 * CR4.PAE and EFER.LMA must be set.
7600 if (!(sregs
->cr4
& X86_CR4_PAE
)
7601 || !(sregs
->efer
& EFER_LMA
))
7605 * Not in 64-bit mode: EFER.LMA is clear and the code
7606 * segment cannot be 64-bit.
7608 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
7615 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7616 struct kvm_sregs
*sregs
)
7618 struct msr_data apic_base_msr
;
7619 int mmu_reset_needed
= 0;
7620 int pending_vec
, max_bits
, idx
;
7623 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7624 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7627 if (kvm_valid_sregs(vcpu
, sregs
))
7630 apic_base_msr
.data
= sregs
->apic_base
;
7631 apic_base_msr
.host_initiated
= true;
7632 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7635 dt
.size
= sregs
->idt
.limit
;
7636 dt
.address
= sregs
->idt
.base
;
7637 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7638 dt
.size
= sregs
->gdt
.limit
;
7639 dt
.address
= sregs
->gdt
.base
;
7640 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7642 vcpu
->arch
.cr2
= sregs
->cr2
;
7643 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7644 vcpu
->arch
.cr3
= sregs
->cr3
;
7645 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7647 kvm_set_cr8(vcpu
, sregs
->cr8
);
7649 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7650 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7652 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7653 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7654 vcpu
->arch
.cr0
= sregs
->cr0
;
7656 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7657 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7658 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7659 kvm_update_cpuid(vcpu
);
7661 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7662 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7663 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7664 mmu_reset_needed
= 1;
7666 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7668 if (mmu_reset_needed
)
7669 kvm_mmu_reset_context(vcpu
);
7671 max_bits
= KVM_NR_INTERRUPTS
;
7672 pending_vec
= find_first_bit(
7673 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7674 if (pending_vec
< max_bits
) {
7675 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7676 pr_debug("Set back pending irq %d\n", pending_vec
);
7679 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7680 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7681 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7682 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7683 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7684 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7686 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7687 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7689 update_cr8_intercept(vcpu
);
7691 /* Older userspace won't unhalt the vcpu on reset. */
7692 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7693 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7695 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7697 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7702 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7703 struct kvm_guest_debug
*dbg
)
7705 unsigned long rflags
;
7708 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7710 if (vcpu
->arch
.exception
.pending
)
7712 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7713 kvm_queue_exception(vcpu
, DB_VECTOR
);
7715 kvm_queue_exception(vcpu
, BP_VECTOR
);
7719 * Read rflags as long as potentially injected trace flags are still
7722 rflags
= kvm_get_rflags(vcpu
);
7724 vcpu
->guest_debug
= dbg
->control
;
7725 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7726 vcpu
->guest_debug
= 0;
7728 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7729 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7730 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7731 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7733 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7734 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7736 kvm_update_dr7(vcpu
);
7738 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7739 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7740 get_segment_base(vcpu
, VCPU_SREG_CS
);
7743 * Trigger an rflags update that will inject or remove the trace
7746 kvm_set_rflags(vcpu
, rflags
);
7748 kvm_x86_ops
->update_bp_intercept(vcpu
);
7758 * Translate a guest virtual address to a guest physical address.
7760 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7761 struct kvm_translation
*tr
)
7763 unsigned long vaddr
= tr
->linear_address
;
7767 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7768 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7769 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7770 tr
->physical_address
= gpa
;
7771 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7778 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7780 struct fxregs_state
*fxsave
=
7781 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7783 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7784 fpu
->fcw
= fxsave
->cwd
;
7785 fpu
->fsw
= fxsave
->swd
;
7786 fpu
->ftwx
= fxsave
->twd
;
7787 fpu
->last_opcode
= fxsave
->fop
;
7788 fpu
->last_ip
= fxsave
->rip
;
7789 fpu
->last_dp
= fxsave
->rdp
;
7790 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7795 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7797 struct fxregs_state
*fxsave
=
7798 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7800 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7801 fxsave
->cwd
= fpu
->fcw
;
7802 fxsave
->swd
= fpu
->fsw
;
7803 fxsave
->twd
= fpu
->ftwx
;
7804 fxsave
->fop
= fpu
->last_opcode
;
7805 fxsave
->rip
= fpu
->last_ip
;
7806 fxsave
->rdp
= fpu
->last_dp
;
7807 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7812 static void fx_init(struct kvm_vcpu
*vcpu
)
7814 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7815 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7816 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7817 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7820 * Ensure guest xcr0 is valid for loading
7822 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7824 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7827 /* Swap (qemu) user FPU context for the guest FPU context. */
7828 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7831 copy_fpregs_to_fpstate(&vcpu
->arch
.user_fpu
);
7832 /* PKRU is separately restored in kvm_x86_ops->run. */
7833 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
,
7834 ~XFEATURE_MASK_PKRU
);
7839 /* When vcpu_run ends, restore user space FPU context. */
7840 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7843 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7844 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
.state
);
7846 ++vcpu
->stat
.fpu_reload
;
7850 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7852 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7854 kvmclock_reset(vcpu
);
7856 kvm_x86_ops
->vcpu_free(vcpu
);
7857 free_cpumask_var(wbinvd_dirty_mask
);
7860 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7863 struct kvm_vcpu
*vcpu
;
7865 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7866 printk_once(KERN_WARNING
7867 "kvm: SMP vm created on host with unstable TSC; "
7868 "guest TSC will not be reliable\n");
7870 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7875 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7879 kvm_vcpu_mtrr_init(vcpu
);
7880 r
= vcpu_load(vcpu
);
7883 kvm_vcpu_reset(vcpu
, false);
7884 kvm_mmu_setup(vcpu
);
7889 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7891 struct msr_data msr
;
7892 struct kvm
*kvm
= vcpu
->kvm
;
7894 kvm_hv_vcpu_postcreate(vcpu
);
7896 if (vcpu_load(vcpu
))
7899 msr
.index
= MSR_IA32_TSC
;
7900 msr
.host_initiated
= true;
7901 kvm_write_tsc(vcpu
, &msr
);
7904 if (!kvmclock_periodic_sync
)
7907 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7908 KVMCLOCK_SYNC_PERIOD
);
7911 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7914 vcpu
->arch
.apf
.msr_val
= 0;
7916 r
= vcpu_load(vcpu
);
7918 kvm_mmu_unload(vcpu
);
7921 kvm_x86_ops
->vcpu_free(vcpu
);
7924 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7926 kvm_lapic_reset(vcpu
, init_event
);
7928 vcpu
->arch
.hflags
= 0;
7930 vcpu
->arch
.smi_pending
= 0;
7931 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7932 vcpu
->arch
.nmi_pending
= 0;
7933 vcpu
->arch
.nmi_injected
= false;
7934 kvm_clear_interrupt_queue(vcpu
);
7935 kvm_clear_exception_queue(vcpu
);
7936 vcpu
->arch
.exception
.pending
= false;
7938 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7939 kvm_update_dr0123(vcpu
);
7940 vcpu
->arch
.dr6
= DR6_INIT
;
7941 kvm_update_dr6(vcpu
);
7942 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7943 kvm_update_dr7(vcpu
);
7947 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7948 vcpu
->arch
.apf
.msr_val
= 0;
7949 vcpu
->arch
.st
.msr_val
= 0;
7951 kvmclock_reset(vcpu
);
7953 kvm_clear_async_pf_completion_queue(vcpu
);
7954 kvm_async_pf_hash_reset(vcpu
);
7955 vcpu
->arch
.apf
.halted
= false;
7957 if (kvm_mpx_supported()) {
7958 void *mpx_state_buffer
;
7961 * To avoid have the INIT path from kvm_apic_has_events() that be
7962 * called with loaded FPU and does not let userspace fix the state.
7965 kvm_put_guest_fpu(vcpu
);
7966 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
7967 XFEATURE_MASK_BNDREGS
);
7968 if (mpx_state_buffer
)
7969 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
7970 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
.state
.xsave
,
7971 XFEATURE_MASK_BNDCSR
);
7972 if (mpx_state_buffer
)
7973 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
7975 kvm_load_guest_fpu(vcpu
);
7979 kvm_pmu_reset(vcpu
);
7980 vcpu
->arch
.smbase
= 0x30000;
7982 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7983 vcpu
->arch
.msr_misc_features_enables
= 0;
7985 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7988 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7989 vcpu
->arch
.regs_avail
= ~0;
7990 vcpu
->arch
.regs_dirty
= ~0;
7992 vcpu
->arch
.ia32_xss
= 0;
7994 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7997 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7999 struct kvm_segment cs
;
8001 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8002 cs
.selector
= vector
<< 8;
8003 cs
.base
= vector
<< 12;
8004 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8005 kvm_rip_write(vcpu
, 0);
8008 int kvm_arch_hardware_enable(void)
8011 struct kvm_vcpu
*vcpu
;
8016 bool stable
, backwards_tsc
= false;
8018 kvm_shared_msr_cpu_online();
8019 ret
= kvm_x86_ops
->hardware_enable();
8023 local_tsc
= rdtsc();
8024 stable
= !check_tsc_unstable();
8025 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8026 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8027 if (!stable
&& vcpu
->cpu
== smp_processor_id())
8028 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8029 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
8030 backwards_tsc
= true;
8031 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
8032 max_tsc
= vcpu
->arch
.last_host_tsc
;
8038 * Sometimes, even reliable TSCs go backwards. This happens on
8039 * platforms that reset TSC during suspend or hibernate actions, but
8040 * maintain synchronization. We must compensate. Fortunately, we can
8041 * detect that condition here, which happens early in CPU bringup,
8042 * before any KVM threads can be running. Unfortunately, we can't
8043 * bring the TSCs fully up to date with real time, as we aren't yet far
8044 * enough into CPU bringup that we know how much real time has actually
8045 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8046 * variables that haven't been updated yet.
8048 * So we simply find the maximum observed TSC above, then record the
8049 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
8050 * the adjustment will be applied. Note that we accumulate
8051 * adjustments, in case multiple suspend cycles happen before some VCPU
8052 * gets a chance to run again. In the event that no KVM threads get a
8053 * chance to run, we will miss the entire elapsed period, as we'll have
8054 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8055 * loose cycle time. This isn't too big a deal, since the loss will be
8056 * uniform across all VCPUs (not to mention the scenario is extremely
8057 * unlikely). It is possible that a second hibernate recovery happens
8058 * much faster than a first, causing the observed TSC here to be
8059 * smaller; this would require additional padding adjustment, which is
8060 * why we set last_host_tsc to the local tsc observed here.
8062 * N.B. - this code below runs only on platforms with reliable TSC,
8063 * as that is the only way backwards_tsc is set above. Also note
8064 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8065 * have the same delta_cyc adjustment applied if backwards_tsc
8066 * is detected. Note further, this adjustment is only done once,
8067 * as we reset last_host_tsc on all VCPUs to stop this from being
8068 * called multiple times (one for each physical CPU bringup).
8070 * Platforms with unreliable TSCs don't have to deal with this, they
8071 * will be compensated by the logic in vcpu_load, which sets the TSC to
8072 * catchup mode. This will catchup all VCPUs to real time, but cannot
8073 * guarantee that they stay in perfect synchronization.
8075 if (backwards_tsc
) {
8076 u64 delta_cyc
= max_tsc
- local_tsc
;
8077 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8078 kvm
->arch
.backwards_tsc_observed
= true;
8079 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8080 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
8081 vcpu
->arch
.last_host_tsc
= local_tsc
;
8082 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8086 * We have to disable TSC offset matching.. if you were
8087 * booting a VM while issuing an S4 host suspend....
8088 * you may have some problem. Solving this issue is
8089 * left as an exercise to the reader.
8091 kvm
->arch
.last_tsc_nsec
= 0;
8092 kvm
->arch
.last_tsc_write
= 0;
8099 void kvm_arch_hardware_disable(void)
8101 kvm_x86_ops
->hardware_disable();
8102 drop_user_return_notifiers();
8105 int kvm_arch_hardware_setup(void)
8109 r
= kvm_x86_ops
->hardware_setup();
8113 if (kvm_has_tsc_control
) {
8115 * Make sure the user can only configure tsc_khz values that
8116 * fit into a signed integer.
8117 * A min value is not calculated needed because it will always
8118 * be 1 on all machines.
8120 u64 max
= min(0x7fffffffULL
,
8121 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
8122 kvm_max_guest_tsc_khz
= max
;
8124 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
8127 kvm_init_msr_list();
8131 void kvm_arch_hardware_unsetup(void)
8133 kvm_x86_ops
->hardware_unsetup();
8136 void kvm_arch_check_processor_compat(void *rtn
)
8138 kvm_x86_ops
->check_processor_compatibility(rtn
);
8141 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
8143 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
8145 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
8147 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
8149 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
8152 struct static_key kvm_no_apic_vcpu __read_mostly
;
8153 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
8155 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
8160 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
8161 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
8162 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
8163 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8165 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
8167 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
8172 vcpu
->arch
.pio_data
= page_address(page
);
8174 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
8176 r
= kvm_mmu_create(vcpu
);
8178 goto fail_free_pio_data
;
8180 if (irqchip_in_kernel(vcpu
->kvm
)) {
8181 r
= kvm_create_lapic(vcpu
);
8183 goto fail_mmu_destroy
;
8185 static_key_slow_inc(&kvm_no_apic_vcpu
);
8187 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
8189 if (!vcpu
->arch
.mce_banks
) {
8191 goto fail_free_lapic
;
8193 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
8195 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
8197 goto fail_free_mce_banks
;
8202 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
8204 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
8206 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
8208 kvm_async_pf_hash_reset(vcpu
);
8211 vcpu
->arch
.pending_external_vector
= -1;
8212 vcpu
->arch
.preempted_in_kernel
= false;
8214 kvm_hv_vcpu_init(vcpu
);
8218 fail_free_mce_banks
:
8219 kfree(vcpu
->arch
.mce_banks
);
8221 kvm_free_lapic(vcpu
);
8223 kvm_mmu_destroy(vcpu
);
8225 free_page((unsigned long)vcpu
->arch
.pio_data
);
8230 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8234 kvm_hv_vcpu_uninit(vcpu
);
8235 kvm_pmu_destroy(vcpu
);
8236 kfree(vcpu
->arch
.mce_banks
);
8237 kvm_free_lapic(vcpu
);
8238 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8239 kvm_mmu_destroy(vcpu
);
8240 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8241 free_page((unsigned long)vcpu
->arch
.pio_data
);
8242 if (!lapic_in_kernel(vcpu
))
8243 static_key_slow_dec(&kvm_no_apic_vcpu
);
8246 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8248 vcpu
->arch
.l1tf_flush_l1d
= true;
8249 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8252 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8257 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8258 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8259 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8260 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8261 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8263 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8264 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8265 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8266 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8267 &kvm
->arch
.irq_sources_bitmap
);
8269 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8270 mutex_init(&kvm
->arch
.apic_map_lock
);
8271 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8272 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8274 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8275 pvclock_update_vm_gtod_copy(kvm
);
8277 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8278 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8280 kvm_page_track_init(kvm
);
8281 kvm_mmu_init_vm(kvm
);
8283 if (kvm_x86_ops
->vm_init
)
8284 return kvm_x86_ops
->vm_init(kvm
);
8289 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8292 r
= vcpu_load(vcpu
);
8294 kvm_mmu_unload(vcpu
);
8298 static void kvm_free_vcpus(struct kvm
*kvm
)
8301 struct kvm_vcpu
*vcpu
;
8304 * Unpin any mmu pages first.
8306 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8307 kvm_clear_async_pf_completion_queue(vcpu
);
8308 kvm_unload_vcpu_mmu(vcpu
);
8310 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8311 kvm_arch_vcpu_free(vcpu
);
8313 mutex_lock(&kvm
->lock
);
8314 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8315 kvm
->vcpus
[i
] = NULL
;
8317 atomic_set(&kvm
->online_vcpus
, 0);
8318 mutex_unlock(&kvm
->lock
);
8321 void kvm_arch_sync_events(struct kvm
*kvm
)
8323 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8324 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8328 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8332 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8333 struct kvm_memory_slot
*slot
, old
;
8335 /* Called with kvm->slots_lock held. */
8336 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8339 slot
= id_to_memslot(slots
, id
);
8345 * MAP_SHARED to prevent internal slot pages from being moved
8348 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8349 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8350 if (IS_ERR((void *)hva
))
8351 return PTR_ERR((void *)hva
);
8360 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8361 struct kvm_userspace_memory_region m
;
8363 m
.slot
= id
| (i
<< 16);
8365 m
.guest_phys_addr
= gpa
;
8366 m
.userspace_addr
= hva
;
8367 m
.memory_size
= size
;
8368 r
= __kvm_set_memory_region(kvm
, &m
);
8374 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8378 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8380 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8384 mutex_lock(&kvm
->slots_lock
);
8385 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8386 mutex_unlock(&kvm
->slots_lock
);
8390 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8392 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8394 if (current
->mm
== kvm
->mm
) {
8396 * Free memory regions allocated on behalf of userspace,
8397 * unless the the memory map has changed due to process exit
8400 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8401 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8402 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8404 if (kvm_x86_ops
->vm_destroy
)
8405 kvm_x86_ops
->vm_destroy(kvm
);
8406 kvm_pic_destroy(kvm
);
8407 kvm_ioapic_destroy(kvm
);
8408 kvm_free_vcpus(kvm
);
8409 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8410 kvm_mmu_uninit_vm(kvm
);
8411 kvm_page_track_cleanup(kvm
);
8414 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8415 struct kvm_memory_slot
*dont
)
8419 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8420 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8421 kvfree(free
->arch
.rmap
[i
]);
8422 free
->arch
.rmap
[i
] = NULL
;
8427 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8428 dont
->arch
.lpage_info
[i
- 1]) {
8429 kvfree(free
->arch
.lpage_info
[i
- 1]);
8430 free
->arch
.lpage_info
[i
- 1] = NULL
;
8434 kvm_page_track_free_memslot(free
, dont
);
8437 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8438 unsigned long npages
)
8442 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8443 struct kvm_lpage_info
*linfo
;
8448 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8449 slot
->base_gfn
, level
) + 1;
8451 slot
->arch
.rmap
[i
] =
8452 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8453 if (!slot
->arch
.rmap
[i
])
8458 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8462 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8464 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8465 linfo
[0].disallow_lpage
= 1;
8466 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8467 linfo
[lpages
- 1].disallow_lpage
= 1;
8468 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8470 * If the gfn and userspace address are not aligned wrt each
8471 * other, or if explicitly asked to, disable large page
8472 * support for this slot
8474 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8475 !kvm_largepages_enabled()) {
8478 for (j
= 0; j
< lpages
; ++j
)
8479 linfo
[j
].disallow_lpage
= 1;
8483 if (kvm_page_track_create_memslot(slot
, npages
))
8489 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8490 kvfree(slot
->arch
.rmap
[i
]);
8491 slot
->arch
.rmap
[i
] = NULL
;
8495 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8496 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8501 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8504 * memslots->generation has been incremented.
8505 * mmio generation may have reached its maximum value.
8507 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8510 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8511 struct kvm_memory_slot
*memslot
,
8512 const struct kvm_userspace_memory_region
*mem
,
8513 enum kvm_mr_change change
)
8518 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8519 struct kvm_memory_slot
*new)
8521 /* Still write protect RO slot */
8522 if (new->flags
& KVM_MEM_READONLY
) {
8523 kvm_mmu_slot_remove_write_access(kvm
, new);
8528 * Call kvm_x86_ops dirty logging hooks when they are valid.
8530 * kvm_x86_ops->slot_disable_log_dirty is called when:
8532 * - KVM_MR_CREATE with dirty logging is disabled
8533 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8535 * The reason is, in case of PML, we need to set D-bit for any slots
8536 * with dirty logging disabled in order to eliminate unnecessary GPA
8537 * logging in PML buffer (and potential PML buffer full VMEXT). This
8538 * guarantees leaving PML enabled during guest's lifetime won't have
8539 * any additonal overhead from PML when guest is running with dirty
8540 * logging disabled for memory slots.
8542 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8543 * to dirty logging mode.
8545 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8547 * In case of write protect:
8549 * Write protect all pages for dirty logging.
8551 * All the sptes including the large sptes which point to this
8552 * slot are set to readonly. We can not create any new large
8553 * spte on this slot until the end of the logging.
8555 * See the comments in fast_page_fault().
8557 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8558 if (kvm_x86_ops
->slot_enable_log_dirty
)
8559 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8561 kvm_mmu_slot_remove_write_access(kvm
, new);
8563 if (kvm_x86_ops
->slot_disable_log_dirty
)
8564 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8568 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8569 const struct kvm_userspace_memory_region
*mem
,
8570 const struct kvm_memory_slot
*old
,
8571 const struct kvm_memory_slot
*new,
8572 enum kvm_mr_change change
)
8574 int nr_mmu_pages
= 0;
8576 if (!kvm
->arch
.n_requested_mmu_pages
)
8577 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8580 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8583 * Dirty logging tracks sptes in 4k granularity, meaning that large
8584 * sptes have to be split. If live migration is successful, the guest
8585 * in the source machine will be destroyed and large sptes will be
8586 * created in the destination. However, if the guest continues to run
8587 * in the source machine (for example if live migration fails), small
8588 * sptes will remain around and cause bad performance.
8590 * Scan sptes if dirty logging has been stopped, dropping those
8591 * which can be collapsed into a single large-page spte. Later
8592 * page faults will create the large-page sptes.
8594 if ((change
!= KVM_MR_DELETE
) &&
8595 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8596 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8597 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8600 * Set up write protection and/or dirty logging for the new slot.
8602 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8603 * been zapped so no dirty logging staff is needed for old slot. For
8604 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8605 * new and it's also covered when dealing with the new slot.
8607 * FIXME: const-ify all uses of struct kvm_memory_slot.
8609 if (change
!= KVM_MR_DELETE
)
8610 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8613 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8615 kvm_mmu_invalidate_zap_all_pages(kvm
);
8618 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8619 struct kvm_memory_slot
*slot
)
8621 kvm_page_track_flush_slot(kvm
, slot
);
8624 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8626 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8629 if (kvm_apic_has_events(vcpu
))
8632 if (vcpu
->arch
.pv
.pv_unhalted
)
8635 if (vcpu
->arch
.exception
.pending
)
8638 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8639 (vcpu
->arch
.nmi_pending
&&
8640 kvm_x86_ops
->nmi_allowed(vcpu
)))
8643 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8644 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8647 if (kvm_arch_interrupt_allowed(vcpu
) &&
8648 kvm_cpu_has_interrupt(vcpu
))
8651 if (kvm_hv_has_stimer_pending(vcpu
))
8657 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8659 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8662 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8664 return vcpu
->arch
.preempted_in_kernel
;
8667 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8669 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8672 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8674 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8677 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8679 if (is_64_bit_mode(vcpu
))
8680 return kvm_rip_read(vcpu
);
8681 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8682 kvm_rip_read(vcpu
));
8684 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8686 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8688 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8690 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8692 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8694 unsigned long rflags
;
8696 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8697 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8698 rflags
&= ~X86_EFLAGS_TF
;
8701 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8703 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8705 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8706 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8707 rflags
|= X86_EFLAGS_TF
;
8708 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8711 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8713 __kvm_set_rflags(vcpu
, rflags
);
8714 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8716 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8718 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8722 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8726 r
= kvm_mmu_reload(vcpu
);
8730 if (!vcpu
->arch
.mmu
.direct_map
&&
8731 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8734 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8737 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8739 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8742 static inline u32
kvm_async_pf_next_probe(u32 key
)
8744 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8747 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8749 u32 key
= kvm_async_pf_hash_fn(gfn
);
8751 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8752 key
= kvm_async_pf_next_probe(key
);
8754 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8757 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8760 u32 key
= kvm_async_pf_hash_fn(gfn
);
8762 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8763 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8764 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8765 key
= kvm_async_pf_next_probe(key
);
8770 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8772 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8775 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8779 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8781 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8783 j
= kvm_async_pf_next_probe(j
);
8784 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8786 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8788 * k lies cyclically in ]i,j]
8790 * |....j i.k.| or |.k..j i...|
8792 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8793 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8798 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8801 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8805 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
8808 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
8812 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8813 struct kvm_async_pf
*work
)
8815 struct x86_exception fault
;
8817 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8818 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8820 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8821 (vcpu
->arch
.apf
.send_user_only
&&
8822 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8823 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8824 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8825 fault
.vector
= PF_VECTOR
;
8826 fault
.error_code_valid
= true;
8827 fault
.error_code
= 0;
8828 fault
.nested_page_fault
= false;
8829 fault
.address
= work
->arch
.token
;
8830 fault
.async_page_fault
= true;
8831 kvm_inject_page_fault(vcpu
, &fault
);
8835 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8836 struct kvm_async_pf
*work
)
8838 struct x86_exception fault
;
8841 if (work
->wakeup_all
)
8842 work
->arch
.token
= ~0; /* broadcast wakeup */
8844 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8845 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8847 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
8848 !apf_get_user(vcpu
, &val
)) {
8849 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
8850 vcpu
->arch
.exception
.pending
&&
8851 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
8852 !apf_put_user(vcpu
, 0)) {
8853 vcpu
->arch
.exception
.injected
= false;
8854 vcpu
->arch
.exception
.pending
= false;
8855 vcpu
->arch
.exception
.nr
= 0;
8856 vcpu
->arch
.exception
.has_error_code
= false;
8857 vcpu
->arch
.exception
.error_code
= 0;
8858 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8859 fault
.vector
= PF_VECTOR
;
8860 fault
.error_code_valid
= true;
8861 fault
.error_code
= 0;
8862 fault
.nested_page_fault
= false;
8863 fault
.address
= work
->arch
.token
;
8864 fault
.async_page_fault
= true;
8865 kvm_inject_page_fault(vcpu
, &fault
);
8868 vcpu
->arch
.apf
.halted
= false;
8869 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8872 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8874 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8877 return kvm_can_do_async_pf(vcpu
);
8880 void kvm_arch_start_assignment(struct kvm
*kvm
)
8882 atomic_inc(&kvm
->arch
.assigned_device_count
);
8884 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8886 void kvm_arch_end_assignment(struct kvm
*kvm
)
8888 atomic_dec(&kvm
->arch
.assigned_device_count
);
8890 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8892 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8894 return atomic_read(&kvm
->arch
.assigned_device_count
);
8896 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8898 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8900 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8902 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8904 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8906 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8908 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8910 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8912 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8914 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8916 bool kvm_arch_has_irq_bypass(void)
8918 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8921 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8922 struct irq_bypass_producer
*prod
)
8924 struct kvm_kernel_irqfd
*irqfd
=
8925 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8927 irqfd
->producer
= prod
;
8929 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8930 prod
->irq
, irqfd
->gsi
, 1);
8933 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8934 struct irq_bypass_producer
*prod
)
8937 struct kvm_kernel_irqfd
*irqfd
=
8938 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8940 WARN_ON(irqfd
->producer
!= prod
);
8941 irqfd
->producer
= NULL
;
8944 * When producer of consumer is unregistered, we change back to
8945 * remapped mode, so we can re-use the current implementation
8946 * when the irq is masked/disabled or the consumer side (KVM
8947 * int this case doesn't want to receive the interrupts.
8949 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8951 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8952 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8955 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8956 uint32_t guest_irq
, bool set
)
8958 if (!kvm_x86_ops
->update_pi_irte
)
8961 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8964 bool kvm_vector_hashing_enabled(void)
8966 return vector_hashing
;
8968 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8970 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8971 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8972 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8973 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8974 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8975 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8976 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8977 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8978 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8979 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8980 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8981 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8982 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8983 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8984 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8985 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8986 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8987 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8988 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);