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UBUNTU: Ubuntu-4.15.0-46.49
[mirror_ubuntu-bionic-kernel.git] / drivers / scsi / hpsa.c
1 /*
2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
15 *
16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include <linux/fs.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
35 #include <linux/io.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
56 #include "hpsa_cmd.h"
57 #include "hpsa.h"
58
59 /*
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
62 */
63 #define HPSA_DRIVER_VERSION "3.4.20-125"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
65 #define HPSA "hpsa"
66
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
73
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
76
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
80 HPSA_DRIVER_VERSION);
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("cciss");
85
86 static int hpsa_simple_mode;
87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
88 MODULE_PARM_DESC(hpsa_simple_mode,
89 "Use 'simple mode' rather than 'performant mode'");
90
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id hpsa_pci_device_id[] = {
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
150 {0,}
151 };
152
153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
154
155 /* board_id = Subsystem Device ID & Vendor ID
156 * product = Marketing Name for the board
157 * access = Address of the struct of function pointers
158 */
159 static struct board_type products[] = {
160 {0x40700E11, "Smart Array 5300", &SA5A_access},
161 {0x40800E11, "Smart Array 5i", &SA5B_access},
162 {0x40820E11, "Smart Array 532", &SA5B_access},
163 {0x40830E11, "Smart Array 5312", &SA5B_access},
164 {0x409A0E11, "Smart Array 641", &SA5A_access},
165 {0x409B0E11, "Smart Array 642", &SA5A_access},
166 {0x409C0E11, "Smart Array 6400", &SA5A_access},
167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
168 {0x40910E11, "Smart Array 6i", &SA5A_access},
169 {0x3225103C, "Smart Array P600", &SA5A_access},
170 {0x3223103C, "Smart Array P800", &SA5A_access},
171 {0x3234103C, "Smart Array P400", &SA5A_access},
172 {0x3235103C, "Smart Array P400i", &SA5A_access},
173 {0x3211103C, "Smart Array E200i", &SA5A_access},
174 {0x3212103C, "Smart Array E200", &SA5A_access},
175 {0x3213103C, "Smart Array E200i", &SA5A_access},
176 {0x3214103C, "Smart Array E200i", &SA5A_access},
177 {0x3215103C, "Smart Array E200i", &SA5A_access},
178 {0x3237103C, "Smart Array E500", &SA5A_access},
179 {0x323D103C, "Smart Array P700m", &SA5A_access},
180 {0x3241103C, "Smart Array P212", &SA5_access},
181 {0x3243103C, "Smart Array P410", &SA5_access},
182 {0x3245103C, "Smart Array P410i", &SA5_access},
183 {0x3247103C, "Smart Array P411", &SA5_access},
184 {0x3249103C, "Smart Array P812", &SA5_access},
185 {0x324A103C, "Smart Array P712m", &SA5_access},
186 {0x324B103C, "Smart Array P711m", &SA5_access},
187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
188 {0x3350103C, "Smart Array P222", &SA5_access},
189 {0x3351103C, "Smart Array P420", &SA5_access},
190 {0x3352103C, "Smart Array P421", &SA5_access},
191 {0x3353103C, "Smart Array P822", &SA5_access},
192 {0x3354103C, "Smart Array P420i", &SA5_access},
193 {0x3355103C, "Smart Array P220i", &SA5_access},
194 {0x3356103C, "Smart Array P721m", &SA5_access},
195 {0x1920103C, "Smart Array P430i", &SA5_access},
196 {0x1921103C, "Smart Array P830i", &SA5_access},
197 {0x1922103C, "Smart Array P430", &SA5_access},
198 {0x1923103C, "Smart Array P431", &SA5_access},
199 {0x1924103C, "Smart Array P830", &SA5_access},
200 {0x1925103C, "Smart Array P831", &SA5_access},
201 {0x1926103C, "Smart Array P731m", &SA5_access},
202 {0x1928103C, "Smart Array P230i", &SA5_access},
203 {0x1929103C, "Smart Array P530", &SA5_access},
204 {0x21BD103C, "Smart Array P244br", &SA5_access},
205 {0x21BE103C, "Smart Array P741m", &SA5_access},
206 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
207 {0x21C0103C, "Smart Array P440ar", &SA5_access},
208 {0x21C1103C, "Smart Array P840ar", &SA5_access},
209 {0x21C2103C, "Smart Array P440", &SA5_access},
210 {0x21C3103C, "Smart Array P441", &SA5_access},
211 {0x21C4103C, "Smart Array", &SA5_access},
212 {0x21C5103C, "Smart Array P841", &SA5_access},
213 {0x21C6103C, "Smart HBA H244br", &SA5_access},
214 {0x21C7103C, "Smart HBA H240", &SA5_access},
215 {0x21C8103C, "Smart HBA H241", &SA5_access},
216 {0x21C9103C, "Smart Array", &SA5_access},
217 {0x21CA103C, "Smart Array P246br", &SA5_access},
218 {0x21CB103C, "Smart Array P840", &SA5_access},
219 {0x21CC103C, "Smart Array", &SA5_access},
220 {0x21CD103C, "Smart Array", &SA5_access},
221 {0x21CE103C, "Smart HBA", &SA5_access},
222 {0x05809005, "SmartHBA-SA", &SA5_access},
223 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
225 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
226 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
233 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
234 };
235
236 static struct scsi_transport_template *hpsa_sas_transport_template;
237 static int hpsa_add_sas_host(struct ctlr_info *h);
238 static void hpsa_delete_sas_host(struct ctlr_info *h);
239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
240 struct hpsa_scsi_dev_t *device);
241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
242 static struct hpsa_scsi_dev_t
243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
244 struct sas_rphy *rphy);
245
246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
247 static const struct scsi_cmnd hpsa_cmd_busy;
248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
249 static const struct scsi_cmnd hpsa_cmd_idle;
250 static int number_of_controllers;
251
252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
255
256 #ifdef CONFIG_COMPAT
257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
258 void __user *arg);
259 #endif
260
261 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
262 static struct CommandList *cmd_alloc(struct ctlr_info *h);
263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
265 struct scsi_cmnd *scmd);
266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
267 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
268 int cmd_type);
269 static void hpsa_free_cmd_pool(struct ctlr_info *h);
270 #define VPD_PAGE (1 << 8)
271 #define HPSA_SIMPLE_ERROR_BITS 0x03
272
273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
274 static void hpsa_scan_start(struct Scsi_Host *);
275 static int hpsa_scan_finished(struct Scsi_Host *sh,
276 unsigned long elapsed_time);
277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
278
279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
280 static int hpsa_slave_alloc(struct scsi_device *sdev);
281 static int hpsa_slave_configure(struct scsi_device *sdev);
282 static void hpsa_slave_destroy(struct scsi_device *sdev);
283
284 static void hpsa_update_scsi_devices(struct ctlr_info *h);
285 static int check_for_unit_attention(struct ctlr_info *h,
286 struct CommandList *c);
287 static void check_ioctl_unit_attention(struct ctlr_info *h,
288 struct CommandList *c);
289 /* performant mode helper functions */
290 static void calc_bucket_map(int *bucket, int num_buckets,
291 int nsgs, int min_blocks, u32 *bucket_map);
292 static void hpsa_free_performant_mode(struct ctlr_info *h);
293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
294 static inline u32 next_command(struct ctlr_info *h, u8 q);
295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
296 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
297 u64 *cfg_offset);
298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
299 unsigned long *memory_bar);
300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
301 bool *legacy_board);
302 static int wait_for_device_to_become_ready(struct ctlr_info *h,
303 unsigned char lunaddr[],
304 int reply_queue);
305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
306 int wait_for_ready);
307 static inline void finish_cmd(struct CommandList *c);
308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
309 #define BOARD_NOT_READY 0
310 #define BOARD_READY 1
311 static void hpsa_drain_accel_commands(struct ctlr_info *h);
312 static void hpsa_flush_cache(struct ctlr_info *h);
313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
314 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
315 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
316 static void hpsa_command_resubmit_worker(struct work_struct *work);
317 static u32 lockup_detected(struct ctlr_info *h);
318 static int detect_controller_lockup(struct ctlr_info *h);
319 static void hpsa_disable_rld_caching(struct ctlr_info *h);
320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
321 struct ReportExtendedLUNdata *buf, int bufsize);
322 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
323 unsigned char scsi3addr[], u8 page);
324 static int hpsa_luns_changed(struct ctlr_info *h);
325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
326 struct hpsa_scsi_dev_t *dev,
327 unsigned char *scsi3addr);
328
329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
330 {
331 unsigned long *priv = shost_priv(sdev->host);
332 return (struct ctlr_info *) *priv;
333 }
334
335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
336 {
337 unsigned long *priv = shost_priv(sh);
338 return (struct ctlr_info *) *priv;
339 }
340
341 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
342 {
343 return c->scsi_cmd == SCSI_CMD_IDLE;
344 }
345
346 static inline bool hpsa_is_pending_event(struct CommandList *c)
347 {
348 return c->reset_pending;
349 }
350
351 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
352 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
353 u8 *sense_key, u8 *asc, u8 *ascq)
354 {
355 struct scsi_sense_hdr sshdr;
356 bool rc;
357
358 *sense_key = -1;
359 *asc = -1;
360 *ascq = -1;
361
362 if (sense_data_len < 1)
363 return;
364
365 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
366 if (rc) {
367 *sense_key = sshdr.sense_key;
368 *asc = sshdr.asc;
369 *ascq = sshdr.ascq;
370 }
371 }
372
373 static int check_for_unit_attention(struct ctlr_info *h,
374 struct CommandList *c)
375 {
376 u8 sense_key, asc, ascq;
377 int sense_len;
378
379 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
380 sense_len = sizeof(c->err_info->SenseInfo);
381 else
382 sense_len = c->err_info->SenseLen;
383
384 decode_sense_data(c->err_info->SenseInfo, sense_len,
385 &sense_key, &asc, &ascq);
386 if (sense_key != UNIT_ATTENTION || asc == 0xff)
387 return 0;
388
389 switch (asc) {
390 case STATE_CHANGED:
391 dev_warn(&h->pdev->dev,
392 "%s: a state change detected, command retried\n",
393 h->devname);
394 break;
395 case LUN_FAILED:
396 dev_warn(&h->pdev->dev,
397 "%s: LUN failure detected\n", h->devname);
398 break;
399 case REPORT_LUNS_CHANGED:
400 dev_warn(&h->pdev->dev,
401 "%s: report LUN data changed\n", h->devname);
402 /*
403 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
404 * target (array) devices.
405 */
406 break;
407 case POWER_OR_RESET:
408 dev_warn(&h->pdev->dev,
409 "%s: a power on or device reset detected\n",
410 h->devname);
411 break;
412 case UNIT_ATTENTION_CLEARED:
413 dev_warn(&h->pdev->dev,
414 "%s: unit attention cleared by another initiator\n",
415 h->devname);
416 break;
417 default:
418 dev_warn(&h->pdev->dev,
419 "%s: unknown unit attention detected\n",
420 h->devname);
421 break;
422 }
423 return 1;
424 }
425
426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
427 {
428 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
429 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
430 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
431 return 0;
432 dev_warn(&h->pdev->dev, HPSA "device busy");
433 return 1;
434 }
435
436 static u32 lockup_detected(struct ctlr_info *h);
437 static ssize_t host_show_lockup_detected(struct device *dev,
438 struct device_attribute *attr, char *buf)
439 {
440 int ld;
441 struct ctlr_info *h;
442 struct Scsi_Host *shost = class_to_shost(dev);
443
444 h = shost_to_hba(shost);
445 ld = lockup_detected(h);
446
447 return sprintf(buf, "ld=%d\n", ld);
448 }
449
450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
451 struct device_attribute *attr,
452 const char *buf, size_t count)
453 {
454 int status, len;
455 struct ctlr_info *h;
456 struct Scsi_Host *shost = class_to_shost(dev);
457 char tmpbuf[10];
458
459 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
460 return -EACCES;
461 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
462 strncpy(tmpbuf, buf, len);
463 tmpbuf[len] = '\0';
464 if (sscanf(tmpbuf, "%d", &status) != 1)
465 return -EINVAL;
466 h = shost_to_hba(shost);
467 h->acciopath_status = !!status;
468 dev_warn(&h->pdev->dev,
469 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
470 h->acciopath_status ? "enabled" : "disabled");
471 return count;
472 }
473
474 static ssize_t host_store_raid_offload_debug(struct device *dev,
475 struct device_attribute *attr,
476 const char *buf, size_t count)
477 {
478 int debug_level, len;
479 struct ctlr_info *h;
480 struct Scsi_Host *shost = class_to_shost(dev);
481 char tmpbuf[10];
482
483 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
484 return -EACCES;
485 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
486 strncpy(tmpbuf, buf, len);
487 tmpbuf[len] = '\0';
488 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
489 return -EINVAL;
490 if (debug_level < 0)
491 debug_level = 0;
492 h = shost_to_hba(shost);
493 h->raid_offload_debug = debug_level;
494 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
495 h->raid_offload_debug);
496 return count;
497 }
498
499 static ssize_t host_store_rescan(struct device *dev,
500 struct device_attribute *attr,
501 const char *buf, size_t count)
502 {
503 struct ctlr_info *h;
504 struct Scsi_Host *shost = class_to_shost(dev);
505 h = shost_to_hba(shost);
506 hpsa_scan_start(h->scsi_host);
507 return count;
508 }
509
510 static ssize_t host_show_firmware_revision(struct device *dev,
511 struct device_attribute *attr, char *buf)
512 {
513 struct ctlr_info *h;
514 struct Scsi_Host *shost = class_to_shost(dev);
515 unsigned char *fwrev;
516
517 h = shost_to_hba(shost);
518 if (!h->hba_inquiry_data)
519 return 0;
520 fwrev = &h->hba_inquiry_data[32];
521 return snprintf(buf, 20, "%c%c%c%c\n",
522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
523 }
524
525 static ssize_t host_show_commands_outstanding(struct device *dev,
526 struct device_attribute *attr, char *buf)
527 {
528 struct Scsi_Host *shost = class_to_shost(dev);
529 struct ctlr_info *h = shost_to_hba(shost);
530
531 return snprintf(buf, 20, "%d\n",
532 atomic_read(&h->commands_outstanding));
533 }
534
535 static ssize_t host_show_transport_mode(struct device *dev,
536 struct device_attribute *attr, char *buf)
537 {
538 struct ctlr_info *h;
539 struct Scsi_Host *shost = class_to_shost(dev);
540
541 h = shost_to_hba(shost);
542 return snprintf(buf, 20, "%s\n",
543 h->transMethod & CFGTBL_Trans_Performant ?
544 "performant" : "simple");
545 }
546
547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
548 struct device_attribute *attr, char *buf)
549 {
550 struct ctlr_info *h;
551 struct Scsi_Host *shost = class_to_shost(dev);
552
553 h = shost_to_hba(shost);
554 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
555 (h->acciopath_status == 1) ? "enabled" : "disabled");
556 }
557
558 /* List of controllers which cannot be hard reset on kexec with reset_devices */
559 static u32 unresettable_controller[] = {
560 0x324a103C, /* Smart Array P712m */
561 0x324b103C, /* Smart Array P711m */
562 0x3223103C, /* Smart Array P800 */
563 0x3234103C, /* Smart Array P400 */
564 0x3235103C, /* Smart Array P400i */
565 0x3211103C, /* Smart Array E200i */
566 0x3212103C, /* Smart Array E200 */
567 0x3213103C, /* Smart Array E200i */
568 0x3214103C, /* Smart Array E200i */
569 0x3215103C, /* Smart Array E200i */
570 0x3237103C, /* Smart Array E500 */
571 0x323D103C, /* Smart Array P700m */
572 0x40800E11, /* Smart Array 5i */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 0x40700E11, /* Smart Array 5300 */
576 0x40820E11, /* Smart Array 532 */
577 0x40830E11, /* Smart Array 5312 */
578 0x409A0E11, /* Smart Array 641 */
579 0x409B0E11, /* Smart Array 642 */
580 0x40910E11, /* Smart Array 6i */
581 };
582
583 /* List of controllers which cannot even be soft reset */
584 static u32 soft_unresettable_controller[] = {
585 0x40800E11, /* Smart Array 5i */
586 0x40700E11, /* Smart Array 5300 */
587 0x40820E11, /* Smart Array 532 */
588 0x40830E11, /* Smart Array 5312 */
589 0x409A0E11, /* Smart Array 641 */
590 0x409B0E11, /* Smart Array 642 */
591 0x40910E11, /* Smart Array 6i */
592 /* Exclude 640x boards. These are two pci devices in one slot
593 * which share a battery backed cache module. One controls the
594 * cache, the other accesses the cache through the one that controls
595 * it. If we reset the one controlling the cache, the other will
596 * likely not be happy. Just forbid resetting this conjoined mess.
597 * The 640x isn't really supported by hpsa anyway.
598 */
599 0x409C0E11, /* Smart Array 6400 */
600 0x409D0E11, /* Smart Array 6400 EM */
601 };
602
603 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
604 {
605 int i;
606
607 for (i = 0; i < nelems; i++)
608 if (a[i] == board_id)
609 return 1;
610 return 0;
611 }
612
613 static int ctlr_is_hard_resettable(u32 board_id)
614 {
615 return !board_id_in_array(unresettable_controller,
616 ARRAY_SIZE(unresettable_controller), board_id);
617 }
618
619 static int ctlr_is_soft_resettable(u32 board_id)
620 {
621 return !board_id_in_array(soft_unresettable_controller,
622 ARRAY_SIZE(soft_unresettable_controller), board_id);
623 }
624
625 static int ctlr_is_resettable(u32 board_id)
626 {
627 return ctlr_is_hard_resettable(board_id) ||
628 ctlr_is_soft_resettable(board_id);
629 }
630
631 static ssize_t host_show_resettable(struct device *dev,
632 struct device_attribute *attr, char *buf)
633 {
634 struct ctlr_info *h;
635 struct Scsi_Host *shost = class_to_shost(dev);
636
637 h = shost_to_hba(shost);
638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
639 }
640
641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
642 {
643 return (scsi3addr[3] & 0xC0) == 0x40;
644 }
645
646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
647 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
648 };
649 #define HPSA_RAID_0 0
650 #define HPSA_RAID_4 1
651 #define HPSA_RAID_1 2 /* also used for RAID 10 */
652 #define HPSA_RAID_5 3 /* also used for RAID 50 */
653 #define HPSA_RAID_51 4
654 #define HPSA_RAID_6 5 /* also used for RAID 60 */
655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
658
659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
660 {
661 return !device->physical_device;
662 }
663
664 static ssize_t raid_level_show(struct device *dev,
665 struct device_attribute *attr, char *buf)
666 {
667 ssize_t l = 0;
668 unsigned char rlevel;
669 struct ctlr_info *h;
670 struct scsi_device *sdev;
671 struct hpsa_scsi_dev_t *hdev;
672 unsigned long flags;
673
674 sdev = to_scsi_device(dev);
675 h = sdev_to_hba(sdev);
676 spin_lock_irqsave(&h->lock, flags);
677 hdev = sdev->hostdata;
678 if (!hdev) {
679 spin_unlock_irqrestore(&h->lock, flags);
680 return -ENODEV;
681 }
682
683 /* Is this even a logical drive? */
684 if (!is_logical_device(hdev)) {
685 spin_unlock_irqrestore(&h->lock, flags);
686 l = snprintf(buf, PAGE_SIZE, "N/A\n");
687 return l;
688 }
689
690 rlevel = hdev->raid_level;
691 spin_unlock_irqrestore(&h->lock, flags);
692 if (rlevel > RAID_UNKNOWN)
693 rlevel = RAID_UNKNOWN;
694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
695 return l;
696 }
697
698 static ssize_t lunid_show(struct device *dev,
699 struct device_attribute *attr, char *buf)
700 {
701 struct ctlr_info *h;
702 struct scsi_device *sdev;
703 struct hpsa_scsi_dev_t *hdev;
704 unsigned long flags;
705 unsigned char lunid[8];
706
707 sdev = to_scsi_device(dev);
708 h = sdev_to_hba(sdev);
709 spin_lock_irqsave(&h->lock, flags);
710 hdev = sdev->hostdata;
711 if (!hdev) {
712 spin_unlock_irqrestore(&h->lock, flags);
713 return -ENODEV;
714 }
715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
716 spin_unlock_irqrestore(&h->lock, flags);
717 return snprintf(buf, 20, "0x%8phN\n", lunid);
718 }
719
720 static ssize_t unique_id_show(struct device *dev,
721 struct device_attribute *attr, char *buf)
722 {
723 struct ctlr_info *h;
724 struct scsi_device *sdev;
725 struct hpsa_scsi_dev_t *hdev;
726 unsigned long flags;
727 unsigned char sn[16];
728
729 sdev = to_scsi_device(dev);
730 h = sdev_to_hba(sdev);
731 spin_lock_irqsave(&h->lock, flags);
732 hdev = sdev->hostdata;
733 if (!hdev) {
734 spin_unlock_irqrestore(&h->lock, flags);
735 return -ENODEV;
736 }
737 memcpy(sn, hdev->device_id, sizeof(sn));
738 spin_unlock_irqrestore(&h->lock, flags);
739 return snprintf(buf, 16 * 2 + 2,
740 "%02X%02X%02X%02X%02X%02X%02X%02X"
741 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
742 sn[0], sn[1], sn[2], sn[3],
743 sn[4], sn[5], sn[6], sn[7],
744 sn[8], sn[9], sn[10], sn[11],
745 sn[12], sn[13], sn[14], sn[15]);
746 }
747
748 static ssize_t sas_address_show(struct device *dev,
749 struct device_attribute *attr, char *buf)
750 {
751 struct ctlr_info *h;
752 struct scsi_device *sdev;
753 struct hpsa_scsi_dev_t *hdev;
754 unsigned long flags;
755 u64 sas_address;
756
757 sdev = to_scsi_device(dev);
758 h = sdev_to_hba(sdev);
759 spin_lock_irqsave(&h->lock, flags);
760 hdev = sdev->hostdata;
761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
762 spin_unlock_irqrestore(&h->lock, flags);
763 return -ENODEV;
764 }
765 sas_address = hdev->sas_address;
766 spin_unlock_irqrestore(&h->lock, flags);
767
768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
769 }
770
771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
772 struct device_attribute *attr, char *buf)
773 {
774 struct ctlr_info *h;
775 struct scsi_device *sdev;
776 struct hpsa_scsi_dev_t *hdev;
777 unsigned long flags;
778 int offload_enabled;
779
780 sdev = to_scsi_device(dev);
781 h = sdev_to_hba(sdev);
782 spin_lock_irqsave(&h->lock, flags);
783 hdev = sdev->hostdata;
784 if (!hdev) {
785 spin_unlock_irqrestore(&h->lock, flags);
786 return -ENODEV;
787 }
788 offload_enabled = hdev->offload_enabled;
789 spin_unlock_irqrestore(&h->lock, flags);
790
791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
792 return snprintf(buf, 20, "%d\n", offload_enabled);
793 else
794 return snprintf(buf, 40, "%s\n",
795 "Not applicable for a controller");
796 }
797
798 #define MAX_PATHS 8
799 static ssize_t path_info_show(struct device *dev,
800 struct device_attribute *attr, char *buf)
801 {
802 struct ctlr_info *h;
803 struct scsi_device *sdev;
804 struct hpsa_scsi_dev_t *hdev;
805 unsigned long flags;
806 int i;
807 int output_len = 0;
808 u8 box;
809 u8 bay;
810 u8 path_map_index = 0;
811 char *active;
812 unsigned char phys_connector[2];
813
814 sdev = to_scsi_device(dev);
815 h = sdev_to_hba(sdev);
816 spin_lock_irqsave(&h->devlock, flags);
817 hdev = sdev->hostdata;
818 if (!hdev) {
819 spin_unlock_irqrestore(&h->devlock, flags);
820 return -ENODEV;
821 }
822
823 bay = hdev->bay;
824 for (i = 0; i < MAX_PATHS; i++) {
825 path_map_index = 1<<i;
826 if (i == hdev->active_path_index)
827 active = "Active";
828 else if (hdev->path_map & path_map_index)
829 active = "Inactive";
830 else
831 continue;
832
833 output_len += scnprintf(buf + output_len,
834 PAGE_SIZE - output_len,
835 "[%d:%d:%d:%d] %20.20s ",
836 h->scsi_host->host_no,
837 hdev->bus, hdev->target, hdev->lun,
838 scsi_device_type(hdev->devtype));
839
840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
841 output_len += scnprintf(buf + output_len,
842 PAGE_SIZE - output_len,
843 "%s\n", active);
844 continue;
845 }
846
847 box = hdev->box[i];
848 memcpy(&phys_connector, &hdev->phys_connector[i],
849 sizeof(phys_connector));
850 if (phys_connector[0] < '0')
851 phys_connector[0] = '0';
852 if (phys_connector[1] < '0')
853 phys_connector[1] = '0';
854 output_len += scnprintf(buf + output_len,
855 PAGE_SIZE - output_len,
856 "PORT: %.2s ",
857 phys_connector);
858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
859 hdev->expose_device) {
860 if (box == 0 || box == 0xFF) {
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
863 "BAY: %hhu %s\n",
864 bay, active);
865 } else {
866 output_len += scnprintf(buf + output_len,
867 PAGE_SIZE - output_len,
868 "BOX: %hhu BAY: %hhu %s\n",
869 box, bay, active);
870 }
871 } else if (box != 0 && box != 0xFF) {
872 output_len += scnprintf(buf + output_len,
873 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
874 box, active);
875 } else
876 output_len += scnprintf(buf + output_len,
877 PAGE_SIZE - output_len, "%s\n", active);
878 }
879
880 spin_unlock_irqrestore(&h->devlock, flags);
881 return output_len;
882 }
883
884 static ssize_t host_show_ctlr_num(struct device *dev,
885 struct device_attribute *attr, char *buf)
886 {
887 struct ctlr_info *h;
888 struct Scsi_Host *shost = class_to_shost(dev);
889
890 h = shost_to_hba(shost);
891 return snprintf(buf, 20, "%d\n", h->ctlr);
892 }
893
894 static ssize_t host_show_legacy_board(struct device *dev,
895 struct device_attribute *attr, char *buf)
896 {
897 struct ctlr_info *h;
898 struct Scsi_Host *shost = class_to_shost(dev);
899
900 h = shost_to_hba(shost);
901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
902 }
903
904 static DEVICE_ATTR_RO(raid_level);
905 static DEVICE_ATTR_RO(lunid);
906 static DEVICE_ATTR_RO(unique_id);
907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
908 static DEVICE_ATTR_RO(sas_address);
909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
910 host_show_hp_ssd_smart_path_enabled, NULL);
911 static DEVICE_ATTR_RO(path_info);
912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
913 host_show_hp_ssd_smart_path_status,
914 host_store_hp_ssd_smart_path_status);
915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
916 host_store_raid_offload_debug);
917 static DEVICE_ATTR(firmware_revision, S_IRUGO,
918 host_show_firmware_revision, NULL);
919 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
920 host_show_commands_outstanding, NULL);
921 static DEVICE_ATTR(transport_mode, S_IRUGO,
922 host_show_transport_mode, NULL);
923 static DEVICE_ATTR(resettable, S_IRUGO,
924 host_show_resettable, NULL);
925 static DEVICE_ATTR(lockup_detected, S_IRUGO,
926 host_show_lockup_detected, NULL);
927 static DEVICE_ATTR(ctlr_num, S_IRUGO,
928 host_show_ctlr_num, NULL);
929 static DEVICE_ATTR(legacy_board, S_IRUGO,
930 host_show_legacy_board, NULL);
931
932 static struct device_attribute *hpsa_sdev_attrs[] = {
933 &dev_attr_raid_level,
934 &dev_attr_lunid,
935 &dev_attr_unique_id,
936 &dev_attr_hp_ssd_smart_path_enabled,
937 &dev_attr_path_info,
938 &dev_attr_sas_address,
939 NULL,
940 };
941
942 static struct device_attribute *hpsa_shost_attrs[] = {
943 &dev_attr_rescan,
944 &dev_attr_firmware_revision,
945 &dev_attr_commands_outstanding,
946 &dev_attr_transport_mode,
947 &dev_attr_resettable,
948 &dev_attr_hp_ssd_smart_path_status,
949 &dev_attr_raid_offload_debug,
950 &dev_attr_lockup_detected,
951 &dev_attr_ctlr_num,
952 &dev_attr_legacy_board,
953 NULL,
954 };
955
956 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
957 HPSA_MAX_CONCURRENT_PASSTHRUS)
958
959 static struct scsi_host_template hpsa_driver_template = {
960 .module = THIS_MODULE,
961 .name = HPSA,
962 .proc_name = HPSA,
963 .queuecommand = hpsa_scsi_queue_command,
964 .scan_start = hpsa_scan_start,
965 .scan_finished = hpsa_scan_finished,
966 .change_queue_depth = hpsa_change_queue_depth,
967 .this_id = -1,
968 .use_clustering = ENABLE_CLUSTERING,
969 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
970 .ioctl = hpsa_ioctl,
971 .slave_alloc = hpsa_slave_alloc,
972 .slave_configure = hpsa_slave_configure,
973 .slave_destroy = hpsa_slave_destroy,
974 #ifdef CONFIG_COMPAT
975 .compat_ioctl = hpsa_compat_ioctl,
976 #endif
977 .sdev_attrs = hpsa_sdev_attrs,
978 .shost_attrs = hpsa_shost_attrs,
979 .max_sectors = 1024,
980 .no_write_same = 1,
981 };
982
983 static inline u32 next_command(struct ctlr_info *h, u8 q)
984 {
985 u32 a;
986 struct reply_queue_buffer *rq = &h->reply_queue[q];
987
988 if (h->transMethod & CFGTBL_Trans_io_accel1)
989 return h->access.command_completed(h, q);
990
991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
992 return h->access.command_completed(h, q);
993
994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
995 a = rq->head[rq->current_entry];
996 rq->current_entry++;
997 atomic_dec(&h->commands_outstanding);
998 } else {
999 a = FIFO_EMPTY;
1000 }
1001 /* Check for wraparound */
1002 if (rq->current_entry == h->max_commands) {
1003 rq->current_entry = 0;
1004 rq->wraparound ^= 1;
1005 }
1006 return a;
1007 }
1008
1009 /*
1010 * There are some special bits in the bus address of the
1011 * command that we have to set for the controller to know
1012 * how to process the command:
1013 *
1014 * Normal performant mode:
1015 * bit 0: 1 means performant mode, 0 means simple mode.
1016 * bits 1-3 = block fetch table entry
1017 * bits 4-6 = command type (== 0)
1018 *
1019 * ioaccel1 mode:
1020 * bit 0 = "performant mode" bit.
1021 * bits 1-3 = block fetch table entry
1022 * bits 4-6 = command type (== 110)
1023 * (command type is needed because ioaccel1 mode
1024 * commands are submitted through the same register as normal
1025 * mode commands, so this is how the controller knows whether
1026 * the command is normal mode or ioaccel1 mode.)
1027 *
1028 * ioaccel2 mode:
1029 * bit 0 = "performant mode" bit.
1030 * bits 1-4 = block fetch table entry (note extra bit)
1031 * bits 4-6 = not needed, because ioaccel2 mode has
1032 * a separate special register for submitting commands.
1033 */
1034
1035 /*
1036 * set_performant_mode: Modify the tag for cciss performant
1037 * set bit 0 for pull model, bits 3-1 for block fetch
1038 * register number
1039 */
1040 #define DEFAULT_REPLY_QUEUE (-1)
1041 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1042 int reply_queue)
1043 {
1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1046 if (unlikely(!h->msix_vectors))
1047 return;
1048 c->Header.ReplyQueue = reply_queue;
1049 }
1050 }
1051
1052 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1053 struct CommandList *c,
1054 int reply_queue)
1055 {
1056 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1057
1058 /*
1059 * Tell the controller to post the reply to the queue for this
1060 * processor. This seems to give the best I/O throughput.
1061 */
1062 cp->ReplyQueue = reply_queue;
1063 /*
1064 * Set the bits in the address sent down to include:
1065 * - performant mode bit (bit 0)
1066 * - pull count (bits 1-3)
1067 * - command type (bits 4-6)
1068 */
1069 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1070 IOACCEL1_BUSADDR_CMDTYPE;
1071 }
1072
1073 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1074 struct CommandList *c,
1075 int reply_queue)
1076 {
1077 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1078 &h->ioaccel2_cmd_pool[c->cmdindex];
1079
1080 /* Tell the controller to post the reply to the queue for this
1081 * processor. This seems to give the best I/O throughput.
1082 */
1083 cp->reply_queue = reply_queue;
1084 /* Set the bits in the address sent down to include:
1085 * - performant mode bit not used in ioaccel mode 2
1086 * - pull count (bits 0-3)
1087 * - command type isn't needed for ioaccel2
1088 */
1089 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1090 }
1091
1092 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1093 struct CommandList *c,
1094 int reply_queue)
1095 {
1096 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1097
1098 /*
1099 * Tell the controller to post the reply to the queue for this
1100 * processor. This seems to give the best I/O throughput.
1101 */
1102 cp->reply_queue = reply_queue;
1103 /*
1104 * Set the bits in the address sent down to include:
1105 * - performant mode bit not used in ioaccel mode 2
1106 * - pull count (bits 0-3)
1107 * - command type isn't needed for ioaccel2
1108 */
1109 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1110 }
1111
1112 static int is_firmware_flash_cmd(u8 *cdb)
1113 {
1114 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1115 }
1116
1117 /*
1118 * During firmware flash, the heartbeat register may not update as frequently
1119 * as it should. So we dial down lockup detection during firmware flash. and
1120 * dial it back up when firmware flash completes.
1121 */
1122 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1123 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1124 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1125 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1126 struct CommandList *c)
1127 {
1128 if (!is_firmware_flash_cmd(c->Request.CDB))
1129 return;
1130 atomic_inc(&h->firmware_flash_in_progress);
1131 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1132 }
1133
1134 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1135 struct CommandList *c)
1136 {
1137 if (is_firmware_flash_cmd(c->Request.CDB) &&
1138 atomic_dec_and_test(&h->firmware_flash_in_progress))
1139 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1140 }
1141
1142 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1143 struct CommandList *c, int reply_queue)
1144 {
1145 dial_down_lockup_detection_during_fw_flash(h, c);
1146 atomic_inc(&h->commands_outstanding);
1147
1148 reply_queue = h->reply_map[raw_smp_processor_id()];
1149 switch (c->cmd_type) {
1150 case CMD_IOACCEL1:
1151 set_ioaccel1_performant_mode(h, c, reply_queue);
1152 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1153 break;
1154 case CMD_IOACCEL2:
1155 set_ioaccel2_performant_mode(h, c, reply_queue);
1156 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1157 break;
1158 case IOACCEL2_TMF:
1159 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1161 break;
1162 default:
1163 set_performant_mode(h, c, reply_queue);
1164 h->access.submit_command(h, c);
1165 }
1166 }
1167
1168 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1169 {
1170 if (unlikely(hpsa_is_pending_event(c)))
1171 return finish_cmd(c);
1172
1173 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1174 }
1175
1176 static inline int is_hba_lunid(unsigned char scsi3addr[])
1177 {
1178 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1179 }
1180
1181 static inline int is_scsi_rev_5(struct ctlr_info *h)
1182 {
1183 if (!h->hba_inquiry_data)
1184 return 0;
1185 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1186 return 1;
1187 return 0;
1188 }
1189
1190 static int hpsa_find_target_lun(struct ctlr_info *h,
1191 unsigned char scsi3addr[], int bus, int *target, int *lun)
1192 {
1193 /* finds an unused bus, target, lun for a new physical device
1194 * assumes h->devlock is held
1195 */
1196 int i, found = 0;
1197 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1198
1199 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1200
1201 for (i = 0; i < h->ndevices; i++) {
1202 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1203 __set_bit(h->dev[i]->target, lun_taken);
1204 }
1205
1206 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1207 if (i < HPSA_MAX_DEVICES) {
1208 /* *bus = 1; */
1209 *target = i;
1210 *lun = 0;
1211 found = 1;
1212 }
1213 return !found;
1214 }
1215
1216 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1217 struct hpsa_scsi_dev_t *dev, char *description)
1218 {
1219 #define LABEL_SIZE 25
1220 char label[LABEL_SIZE];
1221
1222 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1223 return;
1224
1225 switch (dev->devtype) {
1226 case TYPE_RAID:
1227 snprintf(label, LABEL_SIZE, "controller");
1228 break;
1229 case TYPE_ENCLOSURE:
1230 snprintf(label, LABEL_SIZE, "enclosure");
1231 break;
1232 case TYPE_DISK:
1233 case TYPE_ZBC:
1234 if (dev->external)
1235 snprintf(label, LABEL_SIZE, "external");
1236 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1237 snprintf(label, LABEL_SIZE, "%s",
1238 raid_label[PHYSICAL_DRIVE]);
1239 else
1240 snprintf(label, LABEL_SIZE, "RAID-%s",
1241 dev->raid_level > RAID_UNKNOWN ? "?" :
1242 raid_label[dev->raid_level]);
1243 break;
1244 case TYPE_ROM:
1245 snprintf(label, LABEL_SIZE, "rom");
1246 break;
1247 case TYPE_TAPE:
1248 snprintf(label, LABEL_SIZE, "tape");
1249 break;
1250 case TYPE_MEDIUM_CHANGER:
1251 snprintf(label, LABEL_SIZE, "changer");
1252 break;
1253 default:
1254 snprintf(label, LABEL_SIZE, "UNKNOWN");
1255 break;
1256 }
1257
1258 dev_printk(level, &h->pdev->dev,
1259 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1261 description,
1262 scsi_device_type(dev->devtype),
1263 dev->vendor,
1264 dev->model,
1265 label,
1266 dev->offload_config ? '+' : '-',
1267 dev->offload_to_be_enabled ? '+' : '-',
1268 dev->expose_device);
1269 }
1270
1271 /* Add an entry into h->dev[] array. */
1272 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1273 struct hpsa_scsi_dev_t *device,
1274 struct hpsa_scsi_dev_t *added[], int *nadded)
1275 {
1276 /* assumes h->devlock is held */
1277 int n = h->ndevices;
1278 int i;
1279 unsigned char addr1[8], addr2[8];
1280 struct hpsa_scsi_dev_t *sd;
1281
1282 if (n >= HPSA_MAX_DEVICES) {
1283 dev_err(&h->pdev->dev, "too many devices, some will be "
1284 "inaccessible.\n");
1285 return -1;
1286 }
1287
1288 /* physical devices do not have lun or target assigned until now. */
1289 if (device->lun != -1)
1290 /* Logical device, lun is already assigned. */
1291 goto lun_assigned;
1292
1293 /* If this device a non-zero lun of a multi-lun device
1294 * byte 4 of the 8-byte LUN addr will contain the logical
1295 * unit no, zero otherwise.
1296 */
1297 if (device->scsi3addr[4] == 0) {
1298 /* This is not a non-zero lun of a multi-lun device */
1299 if (hpsa_find_target_lun(h, device->scsi3addr,
1300 device->bus, &device->target, &device->lun) != 0)
1301 return -1;
1302 goto lun_assigned;
1303 }
1304
1305 /* This is a non-zero lun of a multi-lun device.
1306 * Search through our list and find the device which
1307 * has the same 8 byte LUN address, excepting byte 4 and 5.
1308 * Assign the same bus and target for this new LUN.
1309 * Use the logical unit number from the firmware.
1310 */
1311 memcpy(addr1, device->scsi3addr, 8);
1312 addr1[4] = 0;
1313 addr1[5] = 0;
1314 for (i = 0; i < n; i++) {
1315 sd = h->dev[i];
1316 memcpy(addr2, sd->scsi3addr, 8);
1317 addr2[4] = 0;
1318 addr2[5] = 0;
1319 /* differ only in byte 4 and 5? */
1320 if (memcmp(addr1, addr2, 8) == 0) {
1321 device->bus = sd->bus;
1322 device->target = sd->target;
1323 device->lun = device->scsi3addr[4];
1324 break;
1325 }
1326 }
1327 if (device->lun == -1) {
1328 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1329 " suspect firmware bug or unsupported hardware "
1330 "configuration.\n");
1331 return -1;
1332 }
1333
1334 lun_assigned:
1335
1336 h->dev[n] = device;
1337 h->ndevices++;
1338 added[*nadded] = device;
1339 (*nadded)++;
1340 hpsa_show_dev_msg(KERN_INFO, h, device,
1341 device->expose_device ? "added" : "masked");
1342 return 0;
1343 }
1344
1345 /*
1346 * Called during a scan operation.
1347 *
1348 * Update an entry in h->dev[] array.
1349 */
1350 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1351 int entry, struct hpsa_scsi_dev_t *new_entry)
1352 {
1353 /* assumes h->devlock is held */
1354 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1355
1356 /* Raid level changed. */
1357 h->dev[entry]->raid_level = new_entry->raid_level;
1358
1359 /*
1360 * ioacccel_handle may have changed for a dual domain disk
1361 */
1362 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1363
1364 /* Raid offload parameters changed. Careful about the ordering. */
1365 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1366 /*
1367 * if drive is newly offload_enabled, we want to copy the
1368 * raid map data first. If previously offload_enabled and
1369 * offload_config were set, raid map data had better be
1370 * the same as it was before. If raid map data has changed
1371 * then it had better be the case that
1372 * h->dev[entry]->offload_enabled is currently 0.
1373 */
1374 h->dev[entry]->raid_map = new_entry->raid_map;
1375 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1376 }
1377 if (new_entry->offload_to_be_enabled) {
1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1379 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1380 }
1381 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1382 h->dev[entry]->offload_config = new_entry->offload_config;
1383 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1384 h->dev[entry]->queue_depth = new_entry->queue_depth;
1385
1386 /*
1387 * We can turn off ioaccel offload now, but need to delay turning
1388 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1389 * can't do that until all the devices are updated.
1390 */
1391 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1392
1393 /*
1394 * turn ioaccel off immediately if told to do so.
1395 */
1396 if (!new_entry->offload_to_be_enabled)
1397 h->dev[entry]->offload_enabled = 0;
1398
1399 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1400 }
1401
1402 /* Replace an entry from h->dev[] array. */
1403 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1404 int entry, struct hpsa_scsi_dev_t *new_entry,
1405 struct hpsa_scsi_dev_t *added[], int *nadded,
1406 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1407 {
1408 /* assumes h->devlock is held */
1409 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1410 removed[*nremoved] = h->dev[entry];
1411 (*nremoved)++;
1412
1413 /*
1414 * New physical devices won't have target/lun assigned yet
1415 * so we need to preserve the values in the slot we are replacing.
1416 */
1417 if (new_entry->target == -1) {
1418 new_entry->target = h->dev[entry]->target;
1419 new_entry->lun = h->dev[entry]->lun;
1420 }
1421
1422 h->dev[entry] = new_entry;
1423 added[*nadded] = new_entry;
1424 (*nadded)++;
1425
1426 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1427 }
1428
1429 /* Remove an entry from h->dev[] array. */
1430 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1431 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1432 {
1433 /* assumes h->devlock is held */
1434 int i;
1435 struct hpsa_scsi_dev_t *sd;
1436
1437 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1438
1439 sd = h->dev[entry];
1440 removed[*nremoved] = h->dev[entry];
1441 (*nremoved)++;
1442
1443 for (i = entry; i < h->ndevices-1; i++)
1444 h->dev[i] = h->dev[i+1];
1445 h->ndevices--;
1446 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1447 }
1448
1449 #define SCSI3ADDR_EQ(a, b) ( \
1450 (a)[7] == (b)[7] && \
1451 (a)[6] == (b)[6] && \
1452 (a)[5] == (b)[5] && \
1453 (a)[4] == (b)[4] && \
1454 (a)[3] == (b)[3] && \
1455 (a)[2] == (b)[2] && \
1456 (a)[1] == (b)[1] && \
1457 (a)[0] == (b)[0])
1458
1459 static void fixup_botched_add(struct ctlr_info *h,
1460 struct hpsa_scsi_dev_t *added)
1461 {
1462 /* called when scsi_add_device fails in order to re-adjust
1463 * h->dev[] to match the mid layer's view.
1464 */
1465 unsigned long flags;
1466 int i, j;
1467
1468 spin_lock_irqsave(&h->lock, flags);
1469 for (i = 0; i < h->ndevices; i++) {
1470 if (h->dev[i] == added) {
1471 for (j = i; j < h->ndevices-1; j++)
1472 h->dev[j] = h->dev[j+1];
1473 h->ndevices--;
1474 break;
1475 }
1476 }
1477 spin_unlock_irqrestore(&h->lock, flags);
1478 kfree(added);
1479 }
1480
1481 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1482 struct hpsa_scsi_dev_t *dev2)
1483 {
1484 /* we compare everything except lun and target as these
1485 * are not yet assigned. Compare parts likely
1486 * to differ first
1487 */
1488 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1489 sizeof(dev1->scsi3addr)) != 0)
1490 return 0;
1491 if (memcmp(dev1->device_id, dev2->device_id,
1492 sizeof(dev1->device_id)) != 0)
1493 return 0;
1494 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1495 return 0;
1496 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1497 return 0;
1498 if (dev1->devtype != dev2->devtype)
1499 return 0;
1500 if (dev1->bus != dev2->bus)
1501 return 0;
1502 return 1;
1503 }
1504
1505 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1506 struct hpsa_scsi_dev_t *dev2)
1507 {
1508 /* Device attributes that can change, but don't mean
1509 * that the device is a different device, nor that the OS
1510 * needs to be told anything about the change.
1511 */
1512 if (dev1->raid_level != dev2->raid_level)
1513 return 1;
1514 if (dev1->offload_config != dev2->offload_config)
1515 return 1;
1516 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1517 return 1;
1518 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1519 if (dev1->queue_depth != dev2->queue_depth)
1520 return 1;
1521 /*
1522 * This can happen for dual domain devices. An active
1523 * path change causes the ioaccel handle to change
1524 *
1525 * for example note the handle differences between p0 and p1
1526 * Device WWN ,WWN hash,Handle
1527 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1528 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1529 */
1530 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1531 return 1;
1532 return 0;
1533 }
1534
1535 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1536 * and return needle location in *index. If scsi3addr matches, but not
1537 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1538 * location in *index.
1539 * In the case of a minor device attribute change, such as RAID level, just
1540 * return DEVICE_UPDATED, along with the updated device's location in index.
1541 * If needle not found, return DEVICE_NOT_FOUND.
1542 */
1543 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1544 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1545 int *index)
1546 {
1547 int i;
1548 #define DEVICE_NOT_FOUND 0
1549 #define DEVICE_CHANGED 1
1550 #define DEVICE_SAME 2
1551 #define DEVICE_UPDATED 3
1552 if (needle == NULL)
1553 return DEVICE_NOT_FOUND;
1554
1555 for (i = 0; i < haystack_size; i++) {
1556 if (haystack[i] == NULL) /* previously removed. */
1557 continue;
1558 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1559 *index = i;
1560 if (device_is_the_same(needle, haystack[i])) {
1561 if (device_updated(needle, haystack[i]))
1562 return DEVICE_UPDATED;
1563 return DEVICE_SAME;
1564 } else {
1565 /* Keep offline devices offline */
1566 if (needle->volume_offline)
1567 return DEVICE_NOT_FOUND;
1568 return DEVICE_CHANGED;
1569 }
1570 }
1571 }
1572 *index = -1;
1573 return DEVICE_NOT_FOUND;
1574 }
1575
1576 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1577 unsigned char scsi3addr[])
1578 {
1579 struct offline_device_entry *device;
1580 unsigned long flags;
1581
1582 /* Check to see if device is already on the list */
1583 spin_lock_irqsave(&h->offline_device_lock, flags);
1584 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1585 if (memcmp(device->scsi3addr, scsi3addr,
1586 sizeof(device->scsi3addr)) == 0) {
1587 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1588 return;
1589 }
1590 }
1591 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1592
1593 /* Device is not on the list, add it. */
1594 device = kmalloc(sizeof(*device), GFP_KERNEL);
1595 if (!device)
1596 return;
1597
1598 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1599 spin_lock_irqsave(&h->offline_device_lock, flags);
1600 list_add_tail(&device->offline_list, &h->offline_device_list);
1601 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1602 }
1603
1604 /* Print a message explaining various offline volume states */
1605 static void hpsa_show_volume_status(struct ctlr_info *h,
1606 struct hpsa_scsi_dev_t *sd)
1607 {
1608 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1609 dev_info(&h->pdev->dev,
1610 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1611 h->scsi_host->host_no,
1612 sd->bus, sd->target, sd->lun);
1613 switch (sd->volume_offline) {
1614 case HPSA_LV_OK:
1615 break;
1616 case HPSA_LV_UNDERGOING_ERASE:
1617 dev_info(&h->pdev->dev,
1618 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1619 h->scsi_host->host_no,
1620 sd->bus, sd->target, sd->lun);
1621 break;
1622 case HPSA_LV_NOT_AVAILABLE:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1627 break;
1628 case HPSA_LV_UNDERGOING_RPI:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1633 break;
1634 case HPSA_LV_PENDING_RPI:
1635 dev_info(&h->pdev->dev,
1636 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1637 h->scsi_host->host_no,
1638 sd->bus, sd->target, sd->lun);
1639 break;
1640 case HPSA_LV_ENCRYPTED_NO_KEY:
1641 dev_info(&h->pdev->dev,
1642 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1643 h->scsi_host->host_no,
1644 sd->bus, sd->target, sd->lun);
1645 break;
1646 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1647 dev_info(&h->pdev->dev,
1648 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1649 h->scsi_host->host_no,
1650 sd->bus, sd->target, sd->lun);
1651 break;
1652 case HPSA_LV_UNDERGOING_ENCRYPTION:
1653 dev_info(&h->pdev->dev,
1654 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1655 h->scsi_host->host_no,
1656 sd->bus, sd->target, sd->lun);
1657 break;
1658 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1659 dev_info(&h->pdev->dev,
1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1661 h->scsi_host->host_no,
1662 sd->bus, sd->target, sd->lun);
1663 break;
1664 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1665 dev_info(&h->pdev->dev,
1666 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1667 h->scsi_host->host_no,
1668 sd->bus, sd->target, sd->lun);
1669 break;
1670 case HPSA_LV_PENDING_ENCRYPTION:
1671 dev_info(&h->pdev->dev,
1672 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1673 h->scsi_host->host_no,
1674 sd->bus, sd->target, sd->lun);
1675 break;
1676 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1677 dev_info(&h->pdev->dev,
1678 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1679 h->scsi_host->host_no,
1680 sd->bus, sd->target, sd->lun);
1681 break;
1682 }
1683 }
1684
1685 /*
1686 * Figure the list of physical drive pointers for a logical drive with
1687 * raid offload configured.
1688 */
1689 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1690 struct hpsa_scsi_dev_t *dev[], int ndevices,
1691 struct hpsa_scsi_dev_t *logical_drive)
1692 {
1693 struct raid_map_data *map = &logical_drive->raid_map;
1694 struct raid_map_disk_data *dd = &map->data[0];
1695 int i, j;
1696 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1697 le16_to_cpu(map->metadata_disks_per_row);
1698 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1699 le16_to_cpu(map->layout_map_count) *
1700 total_disks_per_row;
1701 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1702 total_disks_per_row;
1703 int qdepth;
1704
1705 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1706 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1707
1708 logical_drive->nphysical_disks = nraid_map_entries;
1709
1710 qdepth = 0;
1711 for (i = 0; i < nraid_map_entries; i++) {
1712 logical_drive->phys_disk[i] = NULL;
1713 if (!logical_drive->offload_config)
1714 continue;
1715 for (j = 0; j < ndevices; j++) {
1716 if (dev[j] == NULL)
1717 continue;
1718 if (dev[j]->devtype != TYPE_DISK &&
1719 dev[j]->devtype != TYPE_ZBC)
1720 continue;
1721 if (is_logical_device(dev[j]))
1722 continue;
1723 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1724 continue;
1725
1726 logical_drive->phys_disk[i] = dev[j];
1727 if (i < nphys_disk)
1728 qdepth = min(h->nr_cmds, qdepth +
1729 logical_drive->phys_disk[i]->queue_depth);
1730 break;
1731 }
1732
1733 /*
1734 * This can happen if a physical drive is removed and
1735 * the logical drive is degraded. In that case, the RAID
1736 * map data will refer to a physical disk which isn't actually
1737 * present. And in that case offload_enabled should already
1738 * be 0, but we'll turn it off here just in case
1739 */
1740 if (!logical_drive->phys_disk[i]) {
1741 dev_warn(&h->pdev->dev,
1742 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1743 __func__,
1744 h->scsi_host->host_no, logical_drive->bus,
1745 logical_drive->target, logical_drive->lun);
1746 logical_drive->offload_enabled = 0;
1747 logical_drive->offload_to_be_enabled = 0;
1748 logical_drive->queue_depth = 8;
1749 }
1750 }
1751 if (nraid_map_entries)
1752 /*
1753 * This is correct for reads, too high for full stripe writes,
1754 * way too high for partial stripe writes
1755 */
1756 logical_drive->queue_depth = qdepth;
1757 else {
1758 if (logical_drive->external)
1759 logical_drive->queue_depth = EXTERNAL_QD;
1760 else
1761 logical_drive->queue_depth = h->nr_cmds;
1762 }
1763 }
1764
1765 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1766 struct hpsa_scsi_dev_t *dev[], int ndevices)
1767 {
1768 int i;
1769
1770 for (i = 0; i < ndevices; i++) {
1771 if (dev[i] == NULL)
1772 continue;
1773 if (dev[i]->devtype != TYPE_DISK &&
1774 dev[i]->devtype != TYPE_ZBC)
1775 continue;
1776 if (!is_logical_device(dev[i]))
1777 continue;
1778
1779 /*
1780 * If offload is currently enabled, the RAID map and
1781 * phys_disk[] assignment *better* not be changing
1782 * because we would be changing ioaccel phsy_disk[] pointers
1783 * on a ioaccel volume processing I/O requests.
1784 *
1785 * If an ioaccel volume status changed, initially because it was
1786 * re-configured and thus underwent a transformation, or
1787 * a drive failed, we would have received a state change
1788 * request and ioaccel should have been turned off. When the
1789 * transformation completes, we get another state change
1790 * request to turn ioaccel back on. In this case, we need
1791 * to update the ioaccel information.
1792 *
1793 * Thus: If it is not currently enabled, but will be after
1794 * the scan completes, make sure the ioaccel pointers
1795 * are up to date.
1796 */
1797
1798 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1799 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1800 }
1801 }
1802
1803 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1804 {
1805 int rc = 0;
1806
1807 if (!h->scsi_host)
1808 return 1;
1809
1810 if (is_logical_device(device)) /* RAID */
1811 rc = scsi_add_device(h->scsi_host, device->bus,
1812 device->target, device->lun);
1813 else /* HBA */
1814 rc = hpsa_add_sas_device(h->sas_host, device);
1815
1816 return rc;
1817 }
1818
1819 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1820 struct hpsa_scsi_dev_t *dev)
1821 {
1822 int i;
1823 int count = 0;
1824
1825 for (i = 0; i < h->nr_cmds; i++) {
1826 struct CommandList *c = h->cmd_pool + i;
1827 int refcount = atomic_inc_return(&c->refcount);
1828
1829 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1830 dev->scsi3addr)) {
1831 unsigned long flags;
1832
1833 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1834 if (!hpsa_is_cmd_idle(c))
1835 ++count;
1836 spin_unlock_irqrestore(&h->lock, flags);
1837 }
1838
1839 cmd_free(h, c);
1840 }
1841
1842 return count;
1843 }
1844
1845 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1846 struct hpsa_scsi_dev_t *device)
1847 {
1848 int cmds = 0;
1849 int waits = 0;
1850
1851 while (1) {
1852 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1853 if (cmds == 0)
1854 break;
1855 if (++waits > 20)
1856 break;
1857 msleep(1000);
1858 }
1859
1860 if (waits > 20)
1861 dev_warn(&h->pdev->dev,
1862 "%s: removing device with %d outstanding commands!\n",
1863 __func__, cmds);
1864 }
1865
1866 static void hpsa_remove_device(struct ctlr_info *h,
1867 struct hpsa_scsi_dev_t *device)
1868 {
1869 struct scsi_device *sdev = NULL;
1870
1871 if (!h->scsi_host)
1872 return;
1873
1874 /*
1875 * Allow for commands to drain
1876 */
1877 device->removed = 1;
1878 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1879
1880 if (is_logical_device(device)) { /* RAID */
1881 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1882 device->target, device->lun);
1883 if (sdev) {
1884 scsi_remove_device(sdev);
1885 scsi_device_put(sdev);
1886 } else {
1887 /*
1888 * We don't expect to get here. Future commands
1889 * to this device will get a selection timeout as
1890 * if the device were gone.
1891 */
1892 hpsa_show_dev_msg(KERN_WARNING, h, device,
1893 "didn't find device for removal.");
1894 }
1895 } else { /* HBA */
1896
1897 hpsa_remove_sas_device(device);
1898 }
1899 }
1900
1901 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1902 struct hpsa_scsi_dev_t *sd[], int nsds)
1903 {
1904 /* sd contains scsi3 addresses and devtypes, and inquiry
1905 * data. This function takes what's in sd to be the current
1906 * reality and updates h->dev[] to reflect that reality.
1907 */
1908 int i, entry, device_change, changes = 0;
1909 struct hpsa_scsi_dev_t *csd;
1910 unsigned long flags;
1911 struct hpsa_scsi_dev_t **added, **removed;
1912 int nadded, nremoved;
1913
1914 /*
1915 * A reset can cause a device status to change
1916 * re-schedule the scan to see what happened.
1917 */
1918 spin_lock_irqsave(&h->reset_lock, flags);
1919 if (h->reset_in_progress) {
1920 h->drv_req_rescan = 1;
1921 spin_unlock_irqrestore(&h->reset_lock, flags);
1922 return;
1923 }
1924 spin_unlock_irqrestore(&h->reset_lock, flags);
1925
1926 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1927 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1928
1929 if (!added || !removed) {
1930 dev_warn(&h->pdev->dev, "out of memory in "
1931 "adjust_hpsa_scsi_table\n");
1932 goto free_and_out;
1933 }
1934
1935 spin_lock_irqsave(&h->devlock, flags);
1936
1937 /* find any devices in h->dev[] that are not in
1938 * sd[] and remove them from h->dev[], and for any
1939 * devices which have changed, remove the old device
1940 * info and add the new device info.
1941 * If minor device attributes change, just update
1942 * the existing device structure.
1943 */
1944 i = 0;
1945 nremoved = 0;
1946 nadded = 0;
1947 while (i < h->ndevices) {
1948 csd = h->dev[i];
1949 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1950 if (device_change == DEVICE_NOT_FOUND) {
1951 changes++;
1952 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1953 continue; /* remove ^^^, hence i not incremented */
1954 } else if (device_change == DEVICE_CHANGED) {
1955 changes++;
1956 hpsa_scsi_replace_entry(h, i, sd[entry],
1957 added, &nadded, removed, &nremoved);
1958 /* Set it to NULL to prevent it from being freed
1959 * at the bottom of hpsa_update_scsi_devices()
1960 */
1961 sd[entry] = NULL;
1962 } else if (device_change == DEVICE_UPDATED) {
1963 hpsa_scsi_update_entry(h, i, sd[entry]);
1964 }
1965 i++;
1966 }
1967
1968 /* Now, make sure every device listed in sd[] is also
1969 * listed in h->dev[], adding them if they aren't found
1970 */
1971
1972 for (i = 0; i < nsds; i++) {
1973 if (!sd[i]) /* if already added above. */
1974 continue;
1975
1976 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1977 * as the SCSI mid-layer does not handle such devices well.
1978 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1979 * at 160Hz, and prevents the system from coming up.
1980 */
1981 if (sd[i]->volume_offline) {
1982 hpsa_show_volume_status(h, sd[i]);
1983 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1984 continue;
1985 }
1986
1987 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1988 h->ndevices, &entry);
1989 if (device_change == DEVICE_NOT_FOUND) {
1990 changes++;
1991 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1992 break;
1993 sd[i] = NULL; /* prevent from being freed later. */
1994 } else if (device_change == DEVICE_CHANGED) {
1995 /* should never happen... */
1996 changes++;
1997 dev_warn(&h->pdev->dev,
1998 "device unexpectedly changed.\n");
1999 /* but if it does happen, we just ignore that device */
2000 }
2001 }
2002 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2003
2004 /*
2005 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2006 * any logical drives that need it enabled.
2007 *
2008 * The raid map should be current by now.
2009 *
2010 * We are updating the device list used for I/O requests.
2011 */
2012 for (i = 0; i < h->ndevices; i++) {
2013 if (h->dev[i] == NULL)
2014 continue;
2015 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2016 }
2017
2018 spin_unlock_irqrestore(&h->devlock, flags);
2019
2020 /* Monitor devices which are in one of several NOT READY states to be
2021 * brought online later. This must be done without holding h->devlock,
2022 * so don't touch h->dev[]
2023 */
2024 for (i = 0; i < nsds; i++) {
2025 if (!sd[i]) /* if already added above. */
2026 continue;
2027 if (sd[i]->volume_offline)
2028 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2029 }
2030
2031 /* Don't notify scsi mid layer of any changes the first time through
2032 * (or if there are no changes) scsi_scan_host will do it later the
2033 * first time through.
2034 */
2035 if (!changes)
2036 goto free_and_out;
2037
2038 /* Notify scsi mid layer of any removed devices */
2039 for (i = 0; i < nremoved; i++) {
2040 if (removed[i] == NULL)
2041 continue;
2042 if (removed[i]->expose_device)
2043 hpsa_remove_device(h, removed[i]);
2044 kfree(removed[i]);
2045 removed[i] = NULL;
2046 }
2047
2048 /* Notify scsi mid layer of any added devices */
2049 for (i = 0; i < nadded; i++) {
2050 int rc = 0;
2051
2052 if (added[i] == NULL)
2053 continue;
2054 if (!(added[i]->expose_device))
2055 continue;
2056 rc = hpsa_add_device(h, added[i]);
2057 if (!rc)
2058 continue;
2059 dev_warn(&h->pdev->dev,
2060 "addition failed %d, device not added.", rc);
2061 /* now we have to remove it from h->dev,
2062 * since it didn't get added to scsi mid layer
2063 */
2064 fixup_botched_add(h, added[i]);
2065 h->drv_req_rescan = 1;
2066 }
2067
2068 free_and_out:
2069 kfree(added);
2070 kfree(removed);
2071 }
2072
2073 /*
2074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2075 * Assume's h->devlock is held.
2076 */
2077 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2078 int bus, int target, int lun)
2079 {
2080 int i;
2081 struct hpsa_scsi_dev_t *sd;
2082
2083 for (i = 0; i < h->ndevices; i++) {
2084 sd = h->dev[i];
2085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2086 return sd;
2087 }
2088 return NULL;
2089 }
2090
2091 static int hpsa_slave_alloc(struct scsi_device *sdev)
2092 {
2093 struct hpsa_scsi_dev_t *sd = NULL;
2094 unsigned long flags;
2095 struct ctlr_info *h;
2096
2097 h = sdev_to_hba(sdev);
2098 spin_lock_irqsave(&h->devlock, flags);
2099 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2100 struct scsi_target *starget;
2101 struct sas_rphy *rphy;
2102
2103 starget = scsi_target(sdev);
2104 rphy = target_to_rphy(starget);
2105 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2106 if (sd) {
2107 sd->target = sdev_id(sdev);
2108 sd->lun = sdev->lun;
2109 }
2110 }
2111 if (!sd)
2112 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2113 sdev_id(sdev), sdev->lun);
2114
2115 if (sd && sd->expose_device) {
2116 atomic_set(&sd->ioaccel_cmds_out, 0);
2117 sdev->hostdata = sd;
2118 } else
2119 sdev->hostdata = NULL;
2120 spin_unlock_irqrestore(&h->devlock, flags);
2121 return 0;
2122 }
2123
2124 /* configure scsi device based on internal per-device structure */
2125 static int hpsa_slave_configure(struct scsi_device *sdev)
2126 {
2127 struct hpsa_scsi_dev_t *sd;
2128 int queue_depth;
2129
2130 sd = sdev->hostdata;
2131 sdev->no_uld_attach = !sd || !sd->expose_device;
2132
2133 if (sd) {
2134 if (sd->external)
2135 queue_depth = EXTERNAL_QD;
2136 else
2137 queue_depth = sd->queue_depth != 0 ?
2138 sd->queue_depth : sdev->host->can_queue;
2139 } else
2140 queue_depth = sdev->host->can_queue;
2141
2142 scsi_change_queue_depth(sdev, queue_depth);
2143
2144 return 0;
2145 }
2146
2147 static void hpsa_slave_destroy(struct scsi_device *sdev)
2148 {
2149 /* nothing to do. */
2150 }
2151
2152 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2153 {
2154 int i;
2155
2156 if (!h->ioaccel2_cmd_sg_list)
2157 return;
2158 for (i = 0; i < h->nr_cmds; i++) {
2159 kfree(h->ioaccel2_cmd_sg_list[i]);
2160 h->ioaccel2_cmd_sg_list[i] = NULL;
2161 }
2162 kfree(h->ioaccel2_cmd_sg_list);
2163 h->ioaccel2_cmd_sg_list = NULL;
2164 }
2165
2166 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2167 {
2168 int i;
2169
2170 if (h->chainsize <= 0)
2171 return 0;
2172
2173 h->ioaccel2_cmd_sg_list =
2174 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2175 GFP_KERNEL);
2176 if (!h->ioaccel2_cmd_sg_list)
2177 return -ENOMEM;
2178 for (i = 0; i < h->nr_cmds; i++) {
2179 h->ioaccel2_cmd_sg_list[i] =
2180 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) *
2181 h->maxsgentries, GFP_KERNEL);
2182 if (!h->ioaccel2_cmd_sg_list[i])
2183 goto clean;
2184 }
2185 return 0;
2186
2187 clean:
2188 hpsa_free_ioaccel2_sg_chain_blocks(h);
2189 return -ENOMEM;
2190 }
2191
2192 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2193 {
2194 int i;
2195
2196 if (!h->cmd_sg_list)
2197 return;
2198 for (i = 0; i < h->nr_cmds; i++) {
2199 kfree(h->cmd_sg_list[i]);
2200 h->cmd_sg_list[i] = NULL;
2201 }
2202 kfree(h->cmd_sg_list);
2203 h->cmd_sg_list = NULL;
2204 }
2205
2206 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2207 {
2208 int i;
2209
2210 if (h->chainsize <= 0)
2211 return 0;
2212
2213 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2214 GFP_KERNEL);
2215 if (!h->cmd_sg_list)
2216 return -ENOMEM;
2217
2218 for (i = 0; i < h->nr_cmds; i++) {
2219 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
2220 h->chainsize, GFP_KERNEL);
2221 if (!h->cmd_sg_list[i])
2222 goto clean;
2223
2224 }
2225 return 0;
2226
2227 clean:
2228 hpsa_free_sg_chain_blocks(h);
2229 return -ENOMEM;
2230 }
2231
2232 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2233 struct io_accel2_cmd *cp, struct CommandList *c)
2234 {
2235 struct ioaccel2_sg_element *chain_block;
2236 u64 temp64;
2237 u32 chain_size;
2238
2239 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2240 chain_size = le32_to_cpu(cp->sg[0].length);
2241 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2242 PCI_DMA_TODEVICE);
2243 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2244 /* prevent subsequent unmapping */
2245 cp->sg->address = 0;
2246 return -1;
2247 }
2248 cp->sg->address = cpu_to_le64(temp64);
2249 return 0;
2250 }
2251
2252 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2253 struct io_accel2_cmd *cp)
2254 {
2255 struct ioaccel2_sg_element *chain_sg;
2256 u64 temp64;
2257 u32 chain_size;
2258
2259 chain_sg = cp->sg;
2260 temp64 = le64_to_cpu(chain_sg->address);
2261 chain_size = le32_to_cpu(cp->sg[0].length);
2262 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2263 }
2264
2265 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2266 struct CommandList *c)
2267 {
2268 struct SGDescriptor *chain_sg, *chain_block;
2269 u64 temp64;
2270 u32 chain_len;
2271
2272 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2273 chain_block = h->cmd_sg_list[c->cmdindex];
2274 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2275 chain_len = sizeof(*chain_sg) *
2276 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2277 chain_sg->Len = cpu_to_le32(chain_len);
2278 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2279 PCI_DMA_TODEVICE);
2280 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2281 /* prevent subsequent unmapping */
2282 chain_sg->Addr = cpu_to_le64(0);
2283 return -1;
2284 }
2285 chain_sg->Addr = cpu_to_le64(temp64);
2286 return 0;
2287 }
2288
2289 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2290 struct CommandList *c)
2291 {
2292 struct SGDescriptor *chain_sg;
2293
2294 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2295 return;
2296
2297 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2298 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2299 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2300 }
2301
2302
2303 /* Decode the various types of errors on ioaccel2 path.
2304 * Return 1 for any error that should generate a RAID path retry.
2305 * Return 0 for errors that don't require a RAID path retry.
2306 */
2307 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2308 struct CommandList *c,
2309 struct scsi_cmnd *cmd,
2310 struct io_accel2_cmd *c2,
2311 struct hpsa_scsi_dev_t *dev)
2312 {
2313 int data_len;
2314 int retry = 0;
2315 u32 ioaccel2_resid = 0;
2316
2317 switch (c2->error_data.serv_response) {
2318 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2319 switch (c2->error_data.status) {
2320 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2321 break;
2322 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2323 cmd->result |= SAM_STAT_CHECK_CONDITION;
2324 if (c2->error_data.data_present !=
2325 IOACCEL2_SENSE_DATA_PRESENT) {
2326 memset(cmd->sense_buffer, 0,
2327 SCSI_SENSE_BUFFERSIZE);
2328 break;
2329 }
2330 /* copy the sense data */
2331 data_len = c2->error_data.sense_data_len;
2332 if (data_len > SCSI_SENSE_BUFFERSIZE)
2333 data_len = SCSI_SENSE_BUFFERSIZE;
2334 if (data_len > sizeof(c2->error_data.sense_data_buff))
2335 data_len =
2336 sizeof(c2->error_data.sense_data_buff);
2337 memcpy(cmd->sense_buffer,
2338 c2->error_data.sense_data_buff, data_len);
2339 retry = 1;
2340 break;
2341 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2342 retry = 1;
2343 break;
2344 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2345 retry = 1;
2346 break;
2347 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2348 retry = 1;
2349 break;
2350 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2351 retry = 1;
2352 break;
2353 default:
2354 retry = 1;
2355 break;
2356 }
2357 break;
2358 case IOACCEL2_SERV_RESPONSE_FAILURE:
2359 switch (c2->error_data.status) {
2360 case IOACCEL2_STATUS_SR_IO_ERROR:
2361 case IOACCEL2_STATUS_SR_IO_ABORTED:
2362 case IOACCEL2_STATUS_SR_OVERRUN:
2363 retry = 1;
2364 break;
2365 case IOACCEL2_STATUS_SR_UNDERRUN:
2366 cmd->result = (DID_OK << 16); /* host byte */
2367 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2368 ioaccel2_resid = get_unaligned_le32(
2369 &c2->error_data.resid_cnt[0]);
2370 scsi_set_resid(cmd, ioaccel2_resid);
2371 break;
2372 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2373 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2374 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2375 /*
2376 * Did an HBA disk disappear? We will eventually
2377 * get a state change event from the controller but
2378 * in the meantime, we need to tell the OS that the
2379 * HBA disk is no longer there and stop I/O
2380 * from going down. This allows the potential re-insert
2381 * of the disk to get the same device node.
2382 */
2383 if (dev->physical_device && dev->expose_device) {
2384 cmd->result = DID_NO_CONNECT << 16;
2385 dev->removed = 1;
2386 h->drv_req_rescan = 1;
2387 dev_warn(&h->pdev->dev,
2388 "%s: device is gone!\n", __func__);
2389 } else
2390 /*
2391 * Retry by sending down the RAID path.
2392 * We will get an event from ctlr to
2393 * trigger rescan regardless.
2394 */
2395 retry = 1;
2396 break;
2397 default:
2398 retry = 1;
2399 }
2400 break;
2401 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2402 break;
2403 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2404 break;
2405 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2406 retry = 1;
2407 break;
2408 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2409 break;
2410 default:
2411 retry = 1;
2412 break;
2413 }
2414
2415 return retry; /* retry on raid path? */
2416 }
2417
2418 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2419 struct CommandList *c)
2420 {
2421 bool do_wake = false;
2422
2423 /*
2424 * Reset c->scsi_cmd here so that the reset handler will know
2425 * this command has completed. Then, check to see if the handler is
2426 * waiting for this command, and, if so, wake it.
2427 */
2428 c->scsi_cmd = SCSI_CMD_IDLE;
2429 mb(); /* Declare command idle before checking for pending events. */
2430 if (c->reset_pending) {
2431 unsigned long flags;
2432 struct hpsa_scsi_dev_t *dev;
2433
2434 /*
2435 * There appears to be a reset pending; lock the lock and
2436 * reconfirm. If so, then decrement the count of outstanding
2437 * commands and wake the reset command if this is the last one.
2438 */
2439 spin_lock_irqsave(&h->lock, flags);
2440 dev = c->reset_pending; /* Re-fetch under the lock. */
2441 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2442 do_wake = true;
2443 c->reset_pending = NULL;
2444 spin_unlock_irqrestore(&h->lock, flags);
2445 }
2446
2447 if (do_wake)
2448 wake_up_all(&h->event_sync_wait_queue);
2449 }
2450
2451 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2452 struct CommandList *c)
2453 {
2454 hpsa_cmd_resolve_events(h, c);
2455 cmd_tagged_free(h, c);
2456 }
2457
2458 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2459 struct CommandList *c, struct scsi_cmnd *cmd)
2460 {
2461 hpsa_cmd_resolve_and_free(h, c);
2462 if (cmd && cmd->scsi_done)
2463 cmd->scsi_done(cmd);
2464 }
2465
2466 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2467 {
2468 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2469 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2470 }
2471
2472 static void process_ioaccel2_completion(struct ctlr_info *h,
2473 struct CommandList *c, struct scsi_cmnd *cmd,
2474 struct hpsa_scsi_dev_t *dev)
2475 {
2476 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2477
2478 /* check for good status */
2479 if (likely(c2->error_data.serv_response == 0 &&
2480 c2->error_data.status == 0))
2481 return hpsa_cmd_free_and_done(h, c, cmd);
2482
2483 /*
2484 * Any RAID offload error results in retry which will use
2485 * the normal I/O path so the controller can handle whatever is
2486 * wrong.
2487 */
2488 if (is_logical_device(dev) &&
2489 c2->error_data.serv_response ==
2490 IOACCEL2_SERV_RESPONSE_FAILURE) {
2491 if (c2->error_data.status ==
2492 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2493 dev->offload_enabled = 0;
2494 dev->offload_to_be_enabled = 0;
2495 }
2496
2497 return hpsa_retry_cmd(h, c);
2498 }
2499
2500 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2501 return hpsa_retry_cmd(h, c);
2502
2503 return hpsa_cmd_free_and_done(h, c, cmd);
2504 }
2505
2506 /* Returns 0 on success, < 0 otherwise. */
2507 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2508 struct CommandList *cp)
2509 {
2510 u8 tmf_status = cp->err_info->ScsiStatus;
2511
2512 switch (tmf_status) {
2513 case CISS_TMF_COMPLETE:
2514 /*
2515 * CISS_TMF_COMPLETE never happens, instead,
2516 * ei->CommandStatus == 0 for this case.
2517 */
2518 case CISS_TMF_SUCCESS:
2519 return 0;
2520 case CISS_TMF_INVALID_FRAME:
2521 case CISS_TMF_NOT_SUPPORTED:
2522 case CISS_TMF_FAILED:
2523 case CISS_TMF_WRONG_LUN:
2524 case CISS_TMF_OVERLAPPED_TAG:
2525 break;
2526 default:
2527 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2528 tmf_status);
2529 break;
2530 }
2531 return -tmf_status;
2532 }
2533
2534 static void complete_scsi_command(struct CommandList *cp)
2535 {
2536 struct scsi_cmnd *cmd;
2537 struct ctlr_info *h;
2538 struct ErrorInfo *ei;
2539 struct hpsa_scsi_dev_t *dev;
2540 struct io_accel2_cmd *c2;
2541
2542 u8 sense_key;
2543 u8 asc; /* additional sense code */
2544 u8 ascq; /* additional sense code qualifier */
2545 unsigned long sense_data_size;
2546
2547 ei = cp->err_info;
2548 cmd = cp->scsi_cmd;
2549 h = cp->h;
2550
2551 if (!cmd->device) {
2552 cmd->result = DID_NO_CONNECT << 16;
2553 return hpsa_cmd_free_and_done(h, cp, cmd);
2554 }
2555
2556 dev = cmd->device->hostdata;
2557 if (!dev) {
2558 cmd->result = DID_NO_CONNECT << 16;
2559 return hpsa_cmd_free_and_done(h, cp, cmd);
2560 }
2561 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2562
2563 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2564 if ((cp->cmd_type == CMD_SCSI) &&
2565 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2566 hpsa_unmap_sg_chain_block(h, cp);
2567
2568 if ((cp->cmd_type == CMD_IOACCEL2) &&
2569 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2570 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2571
2572 cmd->result = (DID_OK << 16); /* host byte */
2573 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2574
2575 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2576 if (dev->physical_device && dev->expose_device &&
2577 dev->removed) {
2578 cmd->result = DID_NO_CONNECT << 16;
2579 return hpsa_cmd_free_and_done(h, cp, cmd);
2580 }
2581 if (likely(cp->phys_disk != NULL))
2582 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2583 }
2584
2585 /*
2586 * We check for lockup status here as it may be set for
2587 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2588 * fail_all_oustanding_cmds()
2589 */
2590 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2591 /* DID_NO_CONNECT will prevent a retry */
2592 cmd->result = DID_NO_CONNECT << 16;
2593 return hpsa_cmd_free_and_done(h, cp, cmd);
2594 }
2595
2596 if ((unlikely(hpsa_is_pending_event(cp))))
2597 if (cp->reset_pending)
2598 return hpsa_cmd_free_and_done(h, cp, cmd);
2599
2600 if (cp->cmd_type == CMD_IOACCEL2)
2601 return process_ioaccel2_completion(h, cp, cmd, dev);
2602
2603 scsi_set_resid(cmd, ei->ResidualCnt);
2604 if (ei->CommandStatus == 0)
2605 return hpsa_cmd_free_and_done(h, cp, cmd);
2606
2607 /* For I/O accelerator commands, copy over some fields to the normal
2608 * CISS header used below for error handling.
2609 */
2610 if (cp->cmd_type == CMD_IOACCEL1) {
2611 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2612 cp->Header.SGList = scsi_sg_count(cmd);
2613 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2614 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2615 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2616 cp->Header.tag = c->tag;
2617 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2618 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2619
2620 /* Any RAID offload error results in retry which will use
2621 * the normal I/O path so the controller can handle whatever's
2622 * wrong.
2623 */
2624 if (is_logical_device(dev)) {
2625 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2626 dev->offload_enabled = 0;
2627 return hpsa_retry_cmd(h, cp);
2628 }
2629 }
2630
2631 /* an error has occurred */
2632 switch (ei->CommandStatus) {
2633
2634 case CMD_TARGET_STATUS:
2635 cmd->result |= ei->ScsiStatus;
2636 /* copy the sense data */
2637 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2638 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2639 else
2640 sense_data_size = sizeof(ei->SenseInfo);
2641 if (ei->SenseLen < sense_data_size)
2642 sense_data_size = ei->SenseLen;
2643 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2644 if (ei->ScsiStatus)
2645 decode_sense_data(ei->SenseInfo, sense_data_size,
2646 &sense_key, &asc, &ascq);
2647 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2648 if (sense_key == ABORTED_COMMAND) {
2649 cmd->result |= DID_SOFT_ERROR << 16;
2650 break;
2651 }
2652 break;
2653 }
2654 /* Problem was not a check condition
2655 * Pass it up to the upper layers...
2656 */
2657 if (ei->ScsiStatus) {
2658 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2659 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2660 "Returning result: 0x%x\n",
2661 cp, ei->ScsiStatus,
2662 sense_key, asc, ascq,
2663 cmd->result);
2664 } else { /* scsi status is zero??? How??? */
2665 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2666 "Returning no connection.\n", cp),
2667
2668 /* Ordinarily, this case should never happen,
2669 * but there is a bug in some released firmware
2670 * revisions that allows it to happen if, for
2671 * example, a 4100 backplane loses power and
2672 * the tape drive is in it. We assume that
2673 * it's a fatal error of some kind because we
2674 * can't show that it wasn't. We will make it
2675 * look like selection timeout since that is
2676 * the most common reason for this to occur,
2677 * and it's severe enough.
2678 */
2679
2680 cmd->result = DID_NO_CONNECT << 16;
2681 }
2682 break;
2683
2684 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2685 break;
2686 case CMD_DATA_OVERRUN:
2687 dev_warn(&h->pdev->dev,
2688 "CDB %16phN data overrun\n", cp->Request.CDB);
2689 break;
2690 case CMD_INVALID: {
2691 /* print_bytes(cp, sizeof(*cp), 1, 0);
2692 print_cmd(cp); */
2693 /* We get CMD_INVALID if you address a non-existent device
2694 * instead of a selection timeout (no response). You will
2695 * see this if you yank out a drive, then try to access it.
2696 * This is kind of a shame because it means that any other
2697 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2698 * missing target. */
2699 cmd->result = DID_NO_CONNECT << 16;
2700 }
2701 break;
2702 case CMD_PROTOCOL_ERR:
2703 cmd->result = DID_ERROR << 16;
2704 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2705 cp->Request.CDB);
2706 break;
2707 case CMD_HARDWARE_ERR:
2708 cmd->result = DID_ERROR << 16;
2709 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2710 cp->Request.CDB);
2711 break;
2712 case CMD_CONNECTION_LOST:
2713 cmd->result = DID_ERROR << 16;
2714 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2715 cp->Request.CDB);
2716 break;
2717 case CMD_ABORTED:
2718 cmd->result = DID_ABORT << 16;
2719 break;
2720 case CMD_ABORT_FAILED:
2721 cmd->result = DID_ERROR << 16;
2722 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2723 cp->Request.CDB);
2724 break;
2725 case CMD_UNSOLICITED_ABORT:
2726 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2727 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2728 cp->Request.CDB);
2729 break;
2730 case CMD_TIMEOUT:
2731 cmd->result = DID_TIME_OUT << 16;
2732 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2733 cp->Request.CDB);
2734 break;
2735 case CMD_UNABORTABLE:
2736 cmd->result = DID_ERROR << 16;
2737 dev_warn(&h->pdev->dev, "Command unabortable\n");
2738 break;
2739 case CMD_TMF_STATUS:
2740 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2741 cmd->result = DID_ERROR << 16;
2742 break;
2743 case CMD_IOACCEL_DISABLED:
2744 /* This only handles the direct pass-through case since RAID
2745 * offload is handled above. Just attempt a retry.
2746 */
2747 cmd->result = DID_SOFT_ERROR << 16;
2748 dev_warn(&h->pdev->dev,
2749 "cp %p had HP SSD Smart Path error\n", cp);
2750 break;
2751 default:
2752 cmd->result = DID_ERROR << 16;
2753 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2754 cp, ei->CommandStatus);
2755 }
2756
2757 return hpsa_cmd_free_and_done(h, cp, cmd);
2758 }
2759
2760 static void hpsa_pci_unmap(struct pci_dev *pdev,
2761 struct CommandList *c, int sg_used, int data_direction)
2762 {
2763 int i;
2764
2765 for (i = 0; i < sg_used; i++)
2766 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2767 le32_to_cpu(c->SG[i].Len),
2768 data_direction);
2769 }
2770
2771 static int hpsa_map_one(struct pci_dev *pdev,
2772 struct CommandList *cp,
2773 unsigned char *buf,
2774 size_t buflen,
2775 int data_direction)
2776 {
2777 u64 addr64;
2778
2779 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2780 cp->Header.SGList = 0;
2781 cp->Header.SGTotal = cpu_to_le16(0);
2782 return 0;
2783 }
2784
2785 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2786 if (dma_mapping_error(&pdev->dev, addr64)) {
2787 /* Prevent subsequent unmap of something never mapped */
2788 cp->Header.SGList = 0;
2789 cp->Header.SGTotal = cpu_to_le16(0);
2790 return -1;
2791 }
2792 cp->SG[0].Addr = cpu_to_le64(addr64);
2793 cp->SG[0].Len = cpu_to_le32(buflen);
2794 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2795 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2796 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2797 return 0;
2798 }
2799
2800 #define NO_TIMEOUT ((unsigned long) -1)
2801 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2802 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2803 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2804 {
2805 DECLARE_COMPLETION_ONSTACK(wait);
2806
2807 c->waiting = &wait;
2808 __enqueue_cmd_and_start_io(h, c, reply_queue);
2809 if (timeout_msecs == NO_TIMEOUT) {
2810 /* TODO: get rid of this no-timeout thing */
2811 wait_for_completion_io(&wait);
2812 return IO_OK;
2813 }
2814 if (!wait_for_completion_io_timeout(&wait,
2815 msecs_to_jiffies(timeout_msecs))) {
2816 dev_warn(&h->pdev->dev, "Command timed out.\n");
2817 return -ETIMEDOUT;
2818 }
2819 return IO_OK;
2820 }
2821
2822 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2823 int reply_queue, unsigned long timeout_msecs)
2824 {
2825 if (unlikely(lockup_detected(h))) {
2826 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2827 return IO_OK;
2828 }
2829 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2830 }
2831
2832 static u32 lockup_detected(struct ctlr_info *h)
2833 {
2834 int cpu;
2835 u32 rc, *lockup_detected;
2836
2837 cpu = get_cpu();
2838 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2839 rc = *lockup_detected;
2840 put_cpu();
2841 return rc;
2842 }
2843
2844 #define MAX_DRIVER_CMD_RETRIES 25
2845 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2846 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2847 {
2848 int backoff_time = 10, retry_count = 0;
2849 int rc;
2850
2851 do {
2852 memset(c->err_info, 0, sizeof(*c->err_info));
2853 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2854 timeout_msecs);
2855 if (rc)
2856 break;
2857 retry_count++;
2858 if (retry_count > 3) {
2859 msleep(backoff_time);
2860 if (backoff_time < 1000)
2861 backoff_time *= 2;
2862 }
2863 } while ((check_for_unit_attention(h, c) ||
2864 check_for_busy(h, c)) &&
2865 retry_count <= MAX_DRIVER_CMD_RETRIES);
2866 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2867 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2868 rc = -EIO;
2869 return rc;
2870 }
2871
2872 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2873 struct CommandList *c)
2874 {
2875 const u8 *cdb = c->Request.CDB;
2876 const u8 *lun = c->Header.LUN.LunAddrBytes;
2877
2878 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2879 txt, lun, cdb);
2880 }
2881
2882 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2883 struct CommandList *cp)
2884 {
2885 const struct ErrorInfo *ei = cp->err_info;
2886 struct device *d = &cp->h->pdev->dev;
2887 u8 sense_key, asc, ascq;
2888 int sense_len;
2889
2890 switch (ei->CommandStatus) {
2891 case CMD_TARGET_STATUS:
2892 if (ei->SenseLen > sizeof(ei->SenseInfo))
2893 sense_len = sizeof(ei->SenseInfo);
2894 else
2895 sense_len = ei->SenseLen;
2896 decode_sense_data(ei->SenseInfo, sense_len,
2897 &sense_key, &asc, &ascq);
2898 hpsa_print_cmd(h, "SCSI status", cp);
2899 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2900 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2901 sense_key, asc, ascq);
2902 else
2903 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2904 if (ei->ScsiStatus == 0)
2905 dev_warn(d, "SCSI status is abnormally zero. "
2906 "(probably indicates selection timeout "
2907 "reported incorrectly due to a known "
2908 "firmware bug, circa July, 2001.)\n");
2909 break;
2910 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2911 break;
2912 case CMD_DATA_OVERRUN:
2913 hpsa_print_cmd(h, "overrun condition", cp);
2914 break;
2915 case CMD_INVALID: {
2916 /* controller unfortunately reports SCSI passthru's
2917 * to non-existent targets as invalid commands.
2918 */
2919 hpsa_print_cmd(h, "invalid command", cp);
2920 dev_warn(d, "probably means device no longer present\n");
2921 }
2922 break;
2923 case CMD_PROTOCOL_ERR:
2924 hpsa_print_cmd(h, "protocol error", cp);
2925 break;
2926 case CMD_HARDWARE_ERR:
2927 hpsa_print_cmd(h, "hardware error", cp);
2928 break;
2929 case CMD_CONNECTION_LOST:
2930 hpsa_print_cmd(h, "connection lost", cp);
2931 break;
2932 case CMD_ABORTED:
2933 hpsa_print_cmd(h, "aborted", cp);
2934 break;
2935 case CMD_ABORT_FAILED:
2936 hpsa_print_cmd(h, "abort failed", cp);
2937 break;
2938 case CMD_UNSOLICITED_ABORT:
2939 hpsa_print_cmd(h, "unsolicited abort", cp);
2940 break;
2941 case CMD_TIMEOUT:
2942 hpsa_print_cmd(h, "timed out", cp);
2943 break;
2944 case CMD_UNABORTABLE:
2945 hpsa_print_cmd(h, "unabortable", cp);
2946 break;
2947 case CMD_CTLR_LOCKUP:
2948 hpsa_print_cmd(h, "controller lockup detected", cp);
2949 break;
2950 default:
2951 hpsa_print_cmd(h, "unknown status", cp);
2952 dev_warn(d, "Unknown command status %x\n",
2953 ei->CommandStatus);
2954 }
2955 }
2956
2957 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2958 u8 page, u8 *buf, size_t bufsize)
2959 {
2960 int rc = IO_OK;
2961 struct CommandList *c;
2962 struct ErrorInfo *ei;
2963
2964 c = cmd_alloc(h);
2965 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
2966 page, scsi3addr, TYPE_CMD)) {
2967 rc = -1;
2968 goto out;
2969 }
2970 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2971 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2972 if (rc)
2973 goto out;
2974 ei = c->err_info;
2975 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2976 hpsa_scsi_interpret_error(h, c);
2977 rc = -1;
2978 }
2979 out:
2980 cmd_free(h, c);
2981 return rc;
2982 }
2983
2984 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
2985 u8 *scsi3addr)
2986 {
2987 u8 *buf;
2988 u64 sa = 0;
2989 int rc = 0;
2990
2991 buf = kzalloc(1024, GFP_KERNEL);
2992 if (!buf)
2993 return 0;
2994
2995 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
2996 buf, 1024);
2997
2998 if (rc)
2999 goto out;
3000
3001 sa = get_unaligned_be64(buf+12);
3002
3003 out:
3004 kfree(buf);
3005 return sa;
3006 }
3007
3008 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3009 u16 page, unsigned char *buf,
3010 unsigned char bufsize)
3011 {
3012 int rc = IO_OK;
3013 struct CommandList *c;
3014 struct ErrorInfo *ei;
3015
3016 c = cmd_alloc(h);
3017
3018 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3019 page, scsi3addr, TYPE_CMD)) {
3020 rc = -1;
3021 goto out;
3022 }
3023 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3024 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3025 if (rc)
3026 goto out;
3027 ei = c->err_info;
3028 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3029 hpsa_scsi_interpret_error(h, c);
3030 rc = -1;
3031 }
3032 out:
3033 cmd_free(h, c);
3034 return rc;
3035 }
3036
3037 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3038 u8 reset_type, int reply_queue)
3039 {
3040 int rc = IO_OK;
3041 struct CommandList *c;
3042 struct ErrorInfo *ei;
3043
3044 c = cmd_alloc(h);
3045
3046
3047 /* fill_cmd can't fail here, no data buffer to map. */
3048 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
3049 scsi3addr, TYPE_MSG);
3050 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3051 if (rc) {
3052 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3053 goto out;
3054 }
3055 /* no unmap needed here because no data xfer. */
3056
3057 ei = c->err_info;
3058 if (ei->CommandStatus != 0) {
3059 hpsa_scsi_interpret_error(h, c);
3060 rc = -1;
3061 }
3062 out:
3063 cmd_free(h, c);
3064 return rc;
3065 }
3066
3067 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3068 struct hpsa_scsi_dev_t *dev,
3069 unsigned char *scsi3addr)
3070 {
3071 int i;
3072 bool match = false;
3073 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3074 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3075
3076 if (hpsa_is_cmd_idle(c))
3077 return false;
3078
3079 switch (c->cmd_type) {
3080 case CMD_SCSI:
3081 case CMD_IOCTL_PEND:
3082 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3083 sizeof(c->Header.LUN.LunAddrBytes));
3084 break;
3085
3086 case CMD_IOACCEL1:
3087 case CMD_IOACCEL2:
3088 if (c->phys_disk == dev) {
3089 /* HBA mode match */
3090 match = true;
3091 } else {
3092 /* Possible RAID mode -- check each phys dev. */
3093 /* FIXME: Do we need to take out a lock here? If
3094 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3095 * instead. */
3096 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3097 /* FIXME: an alternate test might be
3098 *
3099 * match = dev->phys_disk[i]->ioaccel_handle
3100 * == c2->scsi_nexus; */
3101 match = dev->phys_disk[i] == c->phys_disk;
3102 }
3103 }
3104 break;
3105
3106 case IOACCEL2_TMF:
3107 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3108 match = dev->phys_disk[i]->ioaccel_handle ==
3109 le32_to_cpu(ac->it_nexus);
3110 }
3111 break;
3112
3113 case 0: /* The command is in the middle of being initialized. */
3114 match = false;
3115 break;
3116
3117 default:
3118 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3119 c->cmd_type);
3120 BUG();
3121 }
3122
3123 return match;
3124 }
3125
3126 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3127 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3128 {
3129 int i;
3130 int rc = 0;
3131
3132 /* We can really only handle one reset at a time */
3133 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3134 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3135 return -EINTR;
3136 }
3137
3138 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3139
3140 for (i = 0; i < h->nr_cmds; i++) {
3141 struct CommandList *c = h->cmd_pool + i;
3142 int refcount = atomic_inc_return(&c->refcount);
3143
3144 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3145 unsigned long flags;
3146
3147 /*
3148 * Mark the target command as having a reset pending,
3149 * then lock a lock so that the command cannot complete
3150 * while we're considering it. If the command is not
3151 * idle then count it; otherwise revoke the event.
3152 */
3153 c->reset_pending = dev;
3154 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3155 if (!hpsa_is_cmd_idle(c))
3156 atomic_inc(&dev->reset_cmds_out);
3157 else
3158 c->reset_pending = NULL;
3159 spin_unlock_irqrestore(&h->lock, flags);
3160 }
3161
3162 cmd_free(h, c);
3163 }
3164
3165 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3166 if (!rc)
3167 wait_event(h->event_sync_wait_queue,
3168 atomic_read(&dev->reset_cmds_out) == 0 ||
3169 lockup_detected(h));
3170
3171 if (unlikely(lockup_detected(h))) {
3172 dev_warn(&h->pdev->dev,
3173 "Controller lockup detected during reset wait\n");
3174 rc = -ENODEV;
3175 }
3176
3177 if (unlikely(rc))
3178 atomic_set(&dev->reset_cmds_out, 0);
3179 else
3180 rc = wait_for_device_to_become_ready(h, scsi3addr, 0);
3181
3182 mutex_unlock(&h->reset_mutex);
3183 return rc;
3184 }
3185
3186 static void hpsa_get_raid_level(struct ctlr_info *h,
3187 unsigned char *scsi3addr, unsigned char *raid_level)
3188 {
3189 int rc;
3190 unsigned char *buf;
3191
3192 *raid_level = RAID_UNKNOWN;
3193 buf = kzalloc(64, GFP_KERNEL);
3194 if (!buf)
3195 return;
3196
3197 if (!hpsa_vpd_page_supported(h, scsi3addr,
3198 HPSA_VPD_LV_DEVICE_GEOMETRY))
3199 goto exit;
3200
3201 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3202 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3203
3204 if (rc == 0)
3205 *raid_level = buf[8];
3206 if (*raid_level > RAID_UNKNOWN)
3207 *raid_level = RAID_UNKNOWN;
3208 exit:
3209 kfree(buf);
3210 return;
3211 }
3212
3213 #define HPSA_MAP_DEBUG
3214 #ifdef HPSA_MAP_DEBUG
3215 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3216 struct raid_map_data *map_buff)
3217 {
3218 struct raid_map_disk_data *dd = &map_buff->data[0];
3219 int map, row, col;
3220 u16 map_cnt, row_cnt, disks_per_row;
3221
3222 if (rc != 0)
3223 return;
3224
3225 /* Show details only if debugging has been activated. */
3226 if (h->raid_offload_debug < 2)
3227 return;
3228
3229 dev_info(&h->pdev->dev, "structure_size = %u\n",
3230 le32_to_cpu(map_buff->structure_size));
3231 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3232 le32_to_cpu(map_buff->volume_blk_size));
3233 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3234 le64_to_cpu(map_buff->volume_blk_cnt));
3235 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3236 map_buff->phys_blk_shift);
3237 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3238 map_buff->parity_rotation_shift);
3239 dev_info(&h->pdev->dev, "strip_size = %u\n",
3240 le16_to_cpu(map_buff->strip_size));
3241 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3242 le64_to_cpu(map_buff->disk_starting_blk));
3243 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3244 le64_to_cpu(map_buff->disk_blk_cnt));
3245 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3246 le16_to_cpu(map_buff->data_disks_per_row));
3247 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3248 le16_to_cpu(map_buff->metadata_disks_per_row));
3249 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3250 le16_to_cpu(map_buff->row_cnt));
3251 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3252 le16_to_cpu(map_buff->layout_map_count));
3253 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3254 le16_to_cpu(map_buff->flags));
3255 dev_info(&h->pdev->dev, "encryption = %s\n",
3256 le16_to_cpu(map_buff->flags) &
3257 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3258 dev_info(&h->pdev->dev, "dekindex = %u\n",
3259 le16_to_cpu(map_buff->dekindex));
3260 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3261 for (map = 0; map < map_cnt; map++) {
3262 dev_info(&h->pdev->dev, "Map%u:\n", map);
3263 row_cnt = le16_to_cpu(map_buff->row_cnt);
3264 for (row = 0; row < row_cnt; row++) {
3265 dev_info(&h->pdev->dev, " Row%u:\n", row);
3266 disks_per_row =
3267 le16_to_cpu(map_buff->data_disks_per_row);
3268 for (col = 0; col < disks_per_row; col++, dd++)
3269 dev_info(&h->pdev->dev,
3270 " D%02u: h=0x%04x xor=%u,%u\n",
3271 col, dd->ioaccel_handle,
3272 dd->xor_mult[0], dd->xor_mult[1]);
3273 disks_per_row =
3274 le16_to_cpu(map_buff->metadata_disks_per_row);
3275 for (col = 0; col < disks_per_row; col++, dd++)
3276 dev_info(&h->pdev->dev,
3277 " M%02u: h=0x%04x xor=%u,%u\n",
3278 col, dd->ioaccel_handle,
3279 dd->xor_mult[0], dd->xor_mult[1]);
3280 }
3281 }
3282 }
3283 #else
3284 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3285 __attribute__((unused)) int rc,
3286 __attribute__((unused)) struct raid_map_data *map_buff)
3287 {
3288 }
3289 #endif
3290
3291 static int hpsa_get_raid_map(struct ctlr_info *h,
3292 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3293 {
3294 int rc = 0;
3295 struct CommandList *c;
3296 struct ErrorInfo *ei;
3297
3298 c = cmd_alloc(h);
3299
3300 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3301 sizeof(this_device->raid_map), 0,
3302 scsi3addr, TYPE_CMD)) {
3303 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3304 cmd_free(h, c);
3305 return -1;
3306 }
3307 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3308 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3309 if (rc)
3310 goto out;
3311 ei = c->err_info;
3312 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3313 hpsa_scsi_interpret_error(h, c);
3314 rc = -1;
3315 goto out;
3316 }
3317 cmd_free(h, c);
3318
3319 /* @todo in the future, dynamically allocate RAID map memory */
3320 if (le32_to_cpu(this_device->raid_map.structure_size) >
3321 sizeof(this_device->raid_map)) {
3322 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3323 rc = -1;
3324 }
3325 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3326 return rc;
3327 out:
3328 cmd_free(h, c);
3329 return rc;
3330 }
3331
3332 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3333 unsigned char scsi3addr[], u16 bmic_device_index,
3334 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3335 {
3336 int rc = IO_OK;
3337 struct CommandList *c;
3338 struct ErrorInfo *ei;
3339
3340 c = cmd_alloc(h);
3341
3342 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3343 0, RAID_CTLR_LUNID, TYPE_CMD);
3344 if (rc)
3345 goto out;
3346
3347 c->Request.CDB[2] = bmic_device_index & 0xff;
3348 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3349
3350 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3351 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3352 if (rc)
3353 goto out;
3354 ei = c->err_info;
3355 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3356 hpsa_scsi_interpret_error(h, c);
3357 rc = -1;
3358 }
3359 out:
3360 cmd_free(h, c);
3361 return rc;
3362 }
3363
3364 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3365 struct bmic_identify_controller *buf, size_t bufsize)
3366 {
3367 int rc = IO_OK;
3368 struct CommandList *c;
3369 struct ErrorInfo *ei;
3370
3371 c = cmd_alloc(h);
3372
3373 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3374 0, RAID_CTLR_LUNID, TYPE_CMD);
3375 if (rc)
3376 goto out;
3377
3378 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3379 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3380 if (rc)
3381 goto out;
3382 ei = c->err_info;
3383 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3384 hpsa_scsi_interpret_error(h, c);
3385 rc = -1;
3386 }
3387 out:
3388 cmd_free(h, c);
3389 return rc;
3390 }
3391
3392 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3393 unsigned char scsi3addr[], u16 bmic_device_index,
3394 struct bmic_identify_physical_device *buf, size_t bufsize)
3395 {
3396 int rc = IO_OK;
3397 struct CommandList *c;
3398 struct ErrorInfo *ei;
3399
3400 c = cmd_alloc(h);
3401 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3402 0, RAID_CTLR_LUNID, TYPE_CMD);
3403 if (rc)
3404 goto out;
3405
3406 c->Request.CDB[2] = bmic_device_index & 0xff;
3407 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3408
3409 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3410 NO_TIMEOUT);
3411 ei = c->err_info;
3412 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3413 hpsa_scsi_interpret_error(h, c);
3414 rc = -1;
3415 }
3416 out:
3417 cmd_free(h, c);
3418
3419 return rc;
3420 }
3421
3422 /*
3423 * get enclosure information
3424 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3425 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3426 * Uses id_physical_device to determine the box_index.
3427 */
3428 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3429 unsigned char *scsi3addr,
3430 struct ReportExtendedLUNdata *rlep, int rle_index,
3431 struct hpsa_scsi_dev_t *encl_dev)
3432 {
3433 int rc = -1;
3434 struct CommandList *c = NULL;
3435 struct ErrorInfo *ei = NULL;
3436 struct bmic_sense_storage_box_params *bssbp = NULL;
3437 struct bmic_identify_physical_device *id_phys = NULL;
3438 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3439 u16 bmic_device_index = 0;
3440
3441 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3442
3443 encl_dev->sas_address =
3444 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3445
3446 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3447 rc = IO_OK;
3448 goto out;
3449 }
3450
3451 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3452 rc = IO_OK;
3453 goto out;
3454 }
3455
3456 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3457 if (!bssbp)
3458 goto out;
3459
3460 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3461 if (!id_phys)
3462 goto out;
3463
3464 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3465 id_phys, sizeof(*id_phys));
3466 if (rc) {
3467 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3468 __func__, encl_dev->external, bmic_device_index);
3469 goto out;
3470 }
3471
3472 c = cmd_alloc(h);
3473
3474 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3475 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3476
3477 if (rc)
3478 goto out;
3479
3480 if (id_phys->phys_connector[1] == 'E')
3481 c->Request.CDB[5] = id_phys->box_index;
3482 else
3483 c->Request.CDB[5] = 0;
3484
3485 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3486 NO_TIMEOUT);
3487 if (rc)
3488 goto out;
3489
3490 ei = c->err_info;
3491 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3492 rc = -1;
3493 goto out;
3494 }
3495
3496 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3497 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3498 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3499
3500 rc = IO_OK;
3501 out:
3502 kfree(bssbp);
3503 kfree(id_phys);
3504
3505 if (c)
3506 cmd_free(h, c);
3507
3508 if (rc != IO_OK)
3509 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3510 "Error, could not get enclosure information\n");
3511 }
3512
3513 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3514 unsigned char *scsi3addr)
3515 {
3516 struct ReportExtendedLUNdata *physdev;
3517 u32 nphysicals;
3518 u64 sa = 0;
3519 int i;
3520
3521 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3522 if (!physdev)
3523 return 0;
3524
3525 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3526 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3527 kfree(physdev);
3528 return 0;
3529 }
3530 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3531
3532 for (i = 0; i < nphysicals; i++)
3533 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3534 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3535 break;
3536 }
3537
3538 kfree(physdev);
3539
3540 return sa;
3541 }
3542
3543 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3544 struct hpsa_scsi_dev_t *dev)
3545 {
3546 int rc;
3547 u64 sa = 0;
3548
3549 if (is_hba_lunid(scsi3addr)) {
3550 struct bmic_sense_subsystem_info *ssi;
3551
3552 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3553 if (!ssi)
3554 return;
3555
3556 rc = hpsa_bmic_sense_subsystem_information(h,
3557 scsi3addr, 0, ssi, sizeof(*ssi));
3558 if (rc == 0) {
3559 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3560 h->sas_address = sa;
3561 }
3562
3563 kfree(ssi);
3564 } else
3565 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3566
3567 dev->sas_address = sa;
3568 }
3569
3570 static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3571 struct ReportExtendedLUNdata *physdev)
3572 {
3573 u32 nphysicals;
3574 int i;
3575
3576 if (h->discovery_polling)
3577 return;
3578
3579 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3580
3581 for (i = 0; i < nphysicals; i++) {
3582 if (physdev->LUN[i].device_type ==
3583 BMIC_DEVICE_TYPE_CONTROLLER
3584 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3585 dev_info(&h->pdev->dev,
3586 "External controller present, activate discovery polling and disable rld caching\n");
3587 hpsa_disable_rld_caching(h);
3588 h->discovery_polling = 1;
3589 break;
3590 }
3591 }
3592 }
3593
3594 /* Get a device id from inquiry page 0x83 */
3595 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3596 unsigned char scsi3addr[], u8 page)
3597 {
3598 int rc;
3599 int i;
3600 int pages;
3601 unsigned char *buf, bufsize;
3602
3603 buf = kzalloc(256, GFP_KERNEL);
3604 if (!buf)
3605 return false;
3606
3607 /* Get the size of the page list first */
3608 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3609 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3610 buf, HPSA_VPD_HEADER_SZ);
3611 if (rc != 0)
3612 goto exit_unsupported;
3613 pages = buf[3];
3614 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3615 bufsize = pages + HPSA_VPD_HEADER_SZ;
3616 else
3617 bufsize = 255;
3618
3619 /* Get the whole VPD page list */
3620 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3621 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3622 buf, bufsize);
3623 if (rc != 0)
3624 goto exit_unsupported;
3625
3626 pages = buf[3];
3627 for (i = 1; i <= pages; i++)
3628 if (buf[3 + i] == page)
3629 goto exit_supported;
3630 exit_unsupported:
3631 kfree(buf);
3632 return false;
3633 exit_supported:
3634 kfree(buf);
3635 return true;
3636 }
3637
3638 /*
3639 * Called during a scan operation.
3640 * Sets ioaccel status on the new device list, not the existing device list
3641 *
3642 * The device list used during I/O will be updated later in
3643 * adjust_hpsa_scsi_table.
3644 */
3645 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3646 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3647 {
3648 int rc;
3649 unsigned char *buf;
3650 u8 ioaccel_status;
3651
3652 this_device->offload_config = 0;
3653 this_device->offload_enabled = 0;
3654 this_device->offload_to_be_enabled = 0;
3655
3656 buf = kzalloc(64, GFP_KERNEL);
3657 if (!buf)
3658 return;
3659 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3660 goto out;
3661 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3662 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3663 if (rc != 0)
3664 goto out;
3665
3666 #define IOACCEL_STATUS_BYTE 4
3667 #define OFFLOAD_CONFIGURED_BIT 0x01
3668 #define OFFLOAD_ENABLED_BIT 0x02
3669 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3670 this_device->offload_config =
3671 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3672 if (this_device->offload_config) {
3673 this_device->offload_to_be_enabled =
3674 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3675 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3676 this_device->offload_to_be_enabled = 0;
3677 }
3678
3679 out:
3680 kfree(buf);
3681 return;
3682 }
3683
3684 /* Get the device id from inquiry page 0x83 */
3685 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3686 unsigned char *device_id, int index, int buflen)
3687 {
3688 int rc;
3689 unsigned char *buf;
3690
3691 /* Does controller have VPD for device id? */
3692 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3693 return 1; /* not supported */
3694
3695 buf = kzalloc(64, GFP_KERNEL);
3696 if (!buf)
3697 return -ENOMEM;
3698
3699 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3700 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3701 if (rc == 0) {
3702 if (buflen > 16)
3703 buflen = 16;
3704 memcpy(device_id, &buf[8], buflen);
3705 }
3706
3707 kfree(buf);
3708
3709 return rc; /*0 - got id, otherwise, didn't */
3710 }
3711
3712 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3713 void *buf, int bufsize,
3714 int extended_response)
3715 {
3716 int rc = IO_OK;
3717 struct CommandList *c;
3718 unsigned char scsi3addr[8];
3719 struct ErrorInfo *ei;
3720
3721 c = cmd_alloc(h);
3722
3723 /* address the controller */
3724 memset(scsi3addr, 0, sizeof(scsi3addr));
3725 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3726 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3727 rc = -EAGAIN;
3728 goto out;
3729 }
3730 if (extended_response)
3731 c->Request.CDB[1] = extended_response;
3732 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3733 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3734 if (rc)
3735 goto out;
3736 ei = c->err_info;
3737 if (ei->CommandStatus != 0 &&
3738 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3739 hpsa_scsi_interpret_error(h, c);
3740 rc = -EIO;
3741 } else {
3742 struct ReportLUNdata *rld = buf;
3743
3744 if (rld->extended_response_flag != extended_response) {
3745 if (!h->legacy_board) {
3746 dev_err(&h->pdev->dev,
3747 "report luns requested format %u, got %u\n",
3748 extended_response,
3749 rld->extended_response_flag);
3750 rc = -EINVAL;
3751 } else
3752 rc = -EOPNOTSUPP;
3753 }
3754 }
3755 out:
3756 cmd_free(h, c);
3757 return rc;
3758 }
3759
3760 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3761 struct ReportExtendedLUNdata *buf, int bufsize)
3762 {
3763 int rc;
3764 struct ReportLUNdata *lbuf;
3765
3766 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3767 HPSA_REPORT_PHYS_EXTENDED);
3768 if (!rc || rc != -EOPNOTSUPP)
3769 return rc;
3770
3771 /* REPORT PHYS EXTENDED is not supported */
3772 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3773 if (!lbuf)
3774 return -ENOMEM;
3775
3776 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3777 if (!rc) {
3778 int i;
3779 u32 nphys;
3780
3781 /* Copy ReportLUNdata header */
3782 memcpy(buf, lbuf, 8);
3783 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3784 for (i = 0; i < nphys; i++)
3785 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3786 }
3787 kfree(lbuf);
3788 return rc;
3789 }
3790
3791 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3792 struct ReportLUNdata *buf, int bufsize)
3793 {
3794 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3795 }
3796
3797 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3798 int bus, int target, int lun)
3799 {
3800 device->bus = bus;
3801 device->target = target;
3802 device->lun = lun;
3803 }
3804
3805 /* Use VPD inquiry to get details of volume status */
3806 static int hpsa_get_volume_status(struct ctlr_info *h,
3807 unsigned char scsi3addr[])
3808 {
3809 int rc;
3810 int status;
3811 int size;
3812 unsigned char *buf;
3813
3814 buf = kzalloc(64, GFP_KERNEL);
3815 if (!buf)
3816 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3817
3818 /* Does controller have VPD for logical volume status? */
3819 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3820 goto exit_failed;
3821
3822 /* Get the size of the VPD return buffer */
3823 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3824 buf, HPSA_VPD_HEADER_SZ);
3825 if (rc != 0)
3826 goto exit_failed;
3827 size = buf[3];
3828
3829 /* Now get the whole VPD buffer */
3830 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3831 buf, size + HPSA_VPD_HEADER_SZ);
3832 if (rc != 0)
3833 goto exit_failed;
3834 status = buf[4]; /* status byte */
3835
3836 kfree(buf);
3837 return status;
3838 exit_failed:
3839 kfree(buf);
3840 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3841 }
3842
3843 /* Determine offline status of a volume.
3844 * Return either:
3845 * 0 (not offline)
3846 * 0xff (offline for unknown reasons)
3847 * # (integer code indicating one of several NOT READY states
3848 * describing why a volume is to be kept offline)
3849 */
3850 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3851 unsigned char scsi3addr[])
3852 {
3853 struct CommandList *c;
3854 unsigned char *sense;
3855 u8 sense_key, asc, ascq;
3856 int sense_len;
3857 int rc, ldstat = 0;
3858 u16 cmd_status;
3859 u8 scsi_status;
3860 #define ASC_LUN_NOT_READY 0x04
3861 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3862 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3863
3864 c = cmd_alloc(h);
3865
3866 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3867 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3868 NO_TIMEOUT);
3869 if (rc) {
3870 cmd_free(h, c);
3871 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3872 }
3873 sense = c->err_info->SenseInfo;
3874 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3875 sense_len = sizeof(c->err_info->SenseInfo);
3876 else
3877 sense_len = c->err_info->SenseLen;
3878 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3879 cmd_status = c->err_info->CommandStatus;
3880 scsi_status = c->err_info->ScsiStatus;
3881 cmd_free(h, c);
3882
3883 /* Determine the reason for not ready state */
3884 ldstat = hpsa_get_volume_status(h, scsi3addr);
3885
3886 /* Keep volume offline in certain cases: */
3887 switch (ldstat) {
3888 case HPSA_LV_FAILED:
3889 case HPSA_LV_UNDERGOING_ERASE:
3890 case HPSA_LV_NOT_AVAILABLE:
3891 case HPSA_LV_UNDERGOING_RPI:
3892 case HPSA_LV_PENDING_RPI:
3893 case HPSA_LV_ENCRYPTED_NO_KEY:
3894 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3895 case HPSA_LV_UNDERGOING_ENCRYPTION:
3896 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3897 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3898 return ldstat;
3899 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3900 /* If VPD status page isn't available,
3901 * use ASC/ASCQ to determine state
3902 */
3903 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3904 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3905 return ldstat;
3906 break;
3907 default:
3908 break;
3909 }
3910 return HPSA_LV_OK;
3911 }
3912
3913 static int hpsa_update_device_info(struct ctlr_info *h,
3914 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3915 unsigned char *is_OBDR_device)
3916 {
3917
3918 #define OBDR_SIG_OFFSET 43
3919 #define OBDR_TAPE_SIG "$DR-10"
3920 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3921 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3922
3923 unsigned char *inq_buff;
3924 unsigned char *obdr_sig;
3925 int rc = 0;
3926
3927 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3928 if (!inq_buff) {
3929 rc = -ENOMEM;
3930 goto bail_out;
3931 }
3932
3933 /* Do an inquiry to the device to see what it is. */
3934 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3935 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3936 dev_err(&h->pdev->dev,
3937 "%s: inquiry failed, device will be skipped.\n",
3938 __func__);
3939 rc = HPSA_INQUIRY_FAILED;
3940 goto bail_out;
3941 }
3942
3943 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3944 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3945
3946 this_device->devtype = (inq_buff[0] & 0x1f);
3947 memcpy(this_device->scsi3addr, scsi3addr, 8);
3948 memcpy(this_device->vendor, &inq_buff[8],
3949 sizeof(this_device->vendor));
3950 memcpy(this_device->model, &inq_buff[16],
3951 sizeof(this_device->model));
3952 this_device->rev = inq_buff[2];
3953 memset(this_device->device_id, 0,
3954 sizeof(this_device->device_id));
3955 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3956 sizeof(this_device->device_id)) < 0)
3957 dev_err(&h->pdev->dev,
3958 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3959 h->ctlr, __func__,
3960 h->scsi_host->host_no,
3961 this_device->target, this_device->lun,
3962 scsi_device_type(this_device->devtype),
3963 this_device->model);
3964
3965 if ((this_device->devtype == TYPE_DISK ||
3966 this_device->devtype == TYPE_ZBC) &&
3967 is_logical_dev_addr_mode(scsi3addr)) {
3968 unsigned char volume_offline;
3969
3970 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3971 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3972 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3973 volume_offline = hpsa_volume_offline(h, scsi3addr);
3974 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3975 h->legacy_board) {
3976 /*
3977 * Legacy boards might not support volume status
3978 */
3979 dev_info(&h->pdev->dev,
3980 "C0:T%d:L%d Volume status not available, assuming online.\n",
3981 this_device->target, this_device->lun);
3982 volume_offline = 0;
3983 }
3984 this_device->volume_offline = volume_offline;
3985 if (volume_offline == HPSA_LV_FAILED) {
3986 rc = HPSA_LV_FAILED;
3987 dev_err(&h->pdev->dev,
3988 "%s: LV failed, device will be skipped.\n",
3989 __func__);
3990 goto bail_out;
3991 }
3992 } else {
3993 this_device->raid_level = RAID_UNKNOWN;
3994 this_device->offload_config = 0;
3995 this_device->offload_enabled = 0;
3996 this_device->offload_to_be_enabled = 0;
3997 this_device->hba_ioaccel_enabled = 0;
3998 this_device->volume_offline = 0;
3999 this_device->queue_depth = h->nr_cmds;
4000 }
4001
4002 if (this_device->external)
4003 this_device->queue_depth = EXTERNAL_QD;
4004
4005 if (is_OBDR_device) {
4006 /* See if this is a One-Button-Disaster-Recovery device
4007 * by looking for "$DR-10" at offset 43 in inquiry data.
4008 */
4009 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4010 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4011 strncmp(obdr_sig, OBDR_TAPE_SIG,
4012 OBDR_SIG_LEN) == 0);
4013 }
4014 kfree(inq_buff);
4015 return 0;
4016
4017 bail_out:
4018 kfree(inq_buff);
4019 return rc;
4020 }
4021
4022 /*
4023 * Helper function to assign bus, target, lun mapping of devices.
4024 * Logical drive target and lun are assigned at this time, but
4025 * physical device lun and target assignment are deferred (assigned
4026 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4027 */
4028 static void figure_bus_target_lun(struct ctlr_info *h,
4029 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4030 {
4031 u32 lunid = get_unaligned_le32(lunaddrbytes);
4032
4033 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4034 /* physical device, target and lun filled in later */
4035 if (is_hba_lunid(lunaddrbytes)) {
4036 int bus = HPSA_HBA_BUS;
4037
4038 if (!device->rev)
4039 bus = HPSA_LEGACY_HBA_BUS;
4040 hpsa_set_bus_target_lun(device,
4041 bus, 0, lunid & 0x3fff);
4042 } else
4043 /* defer target, lun assignment for physical devices */
4044 hpsa_set_bus_target_lun(device,
4045 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4046 return;
4047 }
4048 /* It's a logical device */
4049 if (device->external) {
4050 hpsa_set_bus_target_lun(device,
4051 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4052 lunid & 0x00ff);
4053 return;
4054 }
4055 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4056 0, lunid & 0x3fff);
4057 }
4058
4059 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4060 int i, int nphysicals, int nlocal_logicals)
4061 {
4062 /* In report logicals, local logicals are listed first,
4063 * then any externals.
4064 */
4065 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4066
4067 if (i == raid_ctlr_position)
4068 return 0;
4069
4070 if (i < logicals_start)
4071 return 0;
4072
4073 /* i is in logicals range, but still within local logicals */
4074 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4075 return 0;
4076
4077 return 1; /* it's an external lun */
4078 }
4079
4080 /*
4081 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4082 * logdev. The number of luns in physdev and logdev are returned in
4083 * *nphysicals and *nlogicals, respectively.
4084 * Returns 0 on success, -1 otherwise.
4085 */
4086 static int hpsa_gather_lun_info(struct ctlr_info *h,
4087 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4088 struct ReportLUNdata *logdev, u32 *nlogicals)
4089 {
4090 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4091 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4092 return -1;
4093 }
4094 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4095 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4096 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4097 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4098 *nphysicals = HPSA_MAX_PHYS_LUN;
4099 }
4100 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4101 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4102 return -1;
4103 }
4104 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4105 /* Reject Logicals in excess of our max capability. */
4106 if (*nlogicals > HPSA_MAX_LUN) {
4107 dev_warn(&h->pdev->dev,
4108 "maximum logical LUNs (%d) exceeded. "
4109 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4110 *nlogicals - HPSA_MAX_LUN);
4111 *nlogicals = HPSA_MAX_LUN;
4112 }
4113 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4114 dev_warn(&h->pdev->dev,
4115 "maximum logical + physical LUNs (%d) exceeded. "
4116 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4117 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4118 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4119 }
4120 return 0;
4121 }
4122
4123 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4124 int i, int nphysicals, int nlogicals,
4125 struct ReportExtendedLUNdata *physdev_list,
4126 struct ReportLUNdata *logdev_list)
4127 {
4128 /* Helper function, figure out where the LUN ID info is coming from
4129 * given index i, lists of physical and logical devices, where in
4130 * the list the raid controller is supposed to appear (first or last)
4131 */
4132
4133 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4134 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4135
4136 if (i == raid_ctlr_position)
4137 return RAID_CTLR_LUNID;
4138
4139 if (i < logicals_start)
4140 return &physdev_list->LUN[i -
4141 (raid_ctlr_position == 0)].lunid[0];
4142
4143 if (i < last_device)
4144 return &logdev_list->LUN[i - nphysicals -
4145 (raid_ctlr_position == 0)][0];
4146 BUG();
4147 return NULL;
4148 }
4149
4150 /* get physical drive ioaccel handle and queue depth */
4151 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4152 struct hpsa_scsi_dev_t *dev,
4153 struct ReportExtendedLUNdata *rlep, int rle_index,
4154 struct bmic_identify_physical_device *id_phys)
4155 {
4156 int rc;
4157 struct ext_report_lun_entry *rle;
4158
4159 rle = &rlep->LUN[rle_index];
4160
4161 dev->ioaccel_handle = rle->ioaccel_handle;
4162 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4163 dev->hba_ioaccel_enabled = 1;
4164 memset(id_phys, 0, sizeof(*id_phys));
4165 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4166 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4167 sizeof(*id_phys));
4168 if (!rc)
4169 /* Reserve space for FW operations */
4170 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4171 #define DRIVE_QUEUE_DEPTH 7
4172 dev->queue_depth =
4173 le16_to_cpu(id_phys->current_queue_depth_limit) -
4174 DRIVE_CMDS_RESERVED_FOR_FW;
4175 else
4176 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4177 }
4178
4179 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4180 struct ReportExtendedLUNdata *rlep, int rle_index,
4181 struct bmic_identify_physical_device *id_phys)
4182 {
4183 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4184
4185 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4186 this_device->hba_ioaccel_enabled = 1;
4187
4188 memcpy(&this_device->active_path_index,
4189 &id_phys->active_path_number,
4190 sizeof(this_device->active_path_index));
4191 memcpy(&this_device->path_map,
4192 &id_phys->redundant_path_present_map,
4193 sizeof(this_device->path_map));
4194 memcpy(&this_device->box,
4195 &id_phys->alternate_paths_phys_box_on_port,
4196 sizeof(this_device->box));
4197 memcpy(&this_device->phys_connector,
4198 &id_phys->alternate_paths_phys_connector,
4199 sizeof(this_device->phys_connector));
4200 memcpy(&this_device->bay,
4201 &id_phys->phys_bay_in_box,
4202 sizeof(this_device->bay));
4203 }
4204
4205 /* get number of local logical disks. */
4206 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4207 struct bmic_identify_controller *id_ctlr,
4208 u32 *nlocals)
4209 {
4210 int rc;
4211
4212 if (!id_ctlr) {
4213 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4214 __func__);
4215 return -ENOMEM;
4216 }
4217 memset(id_ctlr, 0, sizeof(*id_ctlr));
4218 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4219 if (!rc)
4220 if (id_ctlr->configured_logical_drive_count < 255)
4221 *nlocals = id_ctlr->configured_logical_drive_count;
4222 else
4223 *nlocals = le16_to_cpu(
4224 id_ctlr->extended_logical_unit_count);
4225 else
4226 *nlocals = -1;
4227 return rc;
4228 }
4229
4230 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4231 {
4232 struct bmic_identify_physical_device *id_phys;
4233 bool is_spare = false;
4234 int rc;
4235
4236 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4237 if (!id_phys)
4238 return false;
4239
4240 rc = hpsa_bmic_id_physical_device(h,
4241 lunaddrbytes,
4242 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4243 id_phys, sizeof(*id_phys));
4244 if (rc == 0)
4245 is_spare = (id_phys->more_flags >> 6) & 0x01;
4246
4247 kfree(id_phys);
4248 return is_spare;
4249 }
4250
4251 #define RPL_DEV_FLAG_NON_DISK 0x1
4252 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4253 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4254
4255 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4256
4257 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4258 struct ext_report_lun_entry *rle)
4259 {
4260 u8 device_flags;
4261 u8 device_type;
4262
4263 if (!MASKED_DEVICE(lunaddrbytes))
4264 return false;
4265
4266 device_flags = rle->device_flags;
4267 device_type = rle->device_type;
4268
4269 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4270 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4271 return false;
4272 return true;
4273 }
4274
4275 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4276 return false;
4277
4278 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4279 return false;
4280
4281 /*
4282 * Spares may be spun down, we do not want to
4283 * do an Inquiry to a RAID set spare drive as
4284 * that would have them spun up, that is a
4285 * performance hit because I/O to the RAID device
4286 * stops while the spin up occurs which can take
4287 * over 50 seconds.
4288 */
4289 if (hpsa_is_disk_spare(h, lunaddrbytes))
4290 return true;
4291
4292 return false;
4293 }
4294
4295 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4296 {
4297 /* the idea here is we could get notified
4298 * that some devices have changed, so we do a report
4299 * physical luns and report logical luns cmd, and adjust
4300 * our list of devices accordingly.
4301 *
4302 * The scsi3addr's of devices won't change so long as the
4303 * adapter is not reset. That means we can rescan and
4304 * tell which devices we already know about, vs. new
4305 * devices, vs. disappearing devices.
4306 */
4307 struct ReportExtendedLUNdata *physdev_list = NULL;
4308 struct ReportLUNdata *logdev_list = NULL;
4309 struct bmic_identify_physical_device *id_phys = NULL;
4310 struct bmic_identify_controller *id_ctlr = NULL;
4311 u32 nphysicals = 0;
4312 u32 nlogicals = 0;
4313 u32 nlocal_logicals = 0;
4314 u32 ndev_allocated = 0;
4315 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4316 int ncurrent = 0;
4317 int i, n_ext_target_devs, ndevs_to_allocate;
4318 int raid_ctlr_position;
4319 bool physical_device;
4320 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4321
4322 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4323 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4324 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4325 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4326 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4327 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4328
4329 if (!currentsd || !physdev_list || !logdev_list ||
4330 !tmpdevice || !id_phys || !id_ctlr) {
4331 dev_err(&h->pdev->dev, "out of memory\n");
4332 goto out;
4333 }
4334 memset(lunzerobits, 0, sizeof(lunzerobits));
4335
4336 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4337
4338 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4339 logdev_list, &nlogicals)) {
4340 h->drv_req_rescan = 1;
4341 goto out;
4342 }
4343
4344 /* Set number of local logicals (non PTRAID) */
4345 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4346 dev_warn(&h->pdev->dev,
4347 "%s: Can't determine number of local logical devices.\n",
4348 __func__);
4349 }
4350
4351 /* We might see up to the maximum number of logical and physical disks
4352 * plus external target devices, and a device for the local RAID
4353 * controller.
4354 */
4355 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4356
4357 hpsa_ext_ctrl_present(h, physdev_list);
4358
4359 /* Allocate the per device structures */
4360 for (i = 0; i < ndevs_to_allocate; i++) {
4361 if (i >= HPSA_MAX_DEVICES) {
4362 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4363 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4364 ndevs_to_allocate - HPSA_MAX_DEVICES);
4365 break;
4366 }
4367
4368 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4369 if (!currentsd[i]) {
4370 h->drv_req_rescan = 1;
4371 goto out;
4372 }
4373 ndev_allocated++;
4374 }
4375
4376 if (is_scsi_rev_5(h))
4377 raid_ctlr_position = 0;
4378 else
4379 raid_ctlr_position = nphysicals + nlogicals;
4380
4381 /* adjust our table of devices */
4382 n_ext_target_devs = 0;
4383 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4384 u8 *lunaddrbytes, is_OBDR = 0;
4385 int rc = 0;
4386 int phys_dev_index = i - (raid_ctlr_position == 0);
4387 bool skip_device = false;
4388
4389 memset(tmpdevice, 0, sizeof(*tmpdevice));
4390
4391 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4392
4393 /* Figure out where the LUN ID info is coming from */
4394 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4395 i, nphysicals, nlogicals, physdev_list, logdev_list);
4396
4397 /* Determine if this is a lun from an external target array */
4398 tmpdevice->external =
4399 figure_external_status(h, raid_ctlr_position, i,
4400 nphysicals, nlocal_logicals);
4401
4402 /*
4403 * Skip over some devices such as a spare.
4404 */
4405 if (!tmpdevice->external && physical_device) {
4406 skip_device = hpsa_skip_device(h, lunaddrbytes,
4407 &physdev_list->LUN[phys_dev_index]);
4408 if (skip_device)
4409 continue;
4410 }
4411
4412 /* Get device type, vendor, model, device id, raid_map */
4413 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4414 &is_OBDR);
4415 if (rc == -ENOMEM) {
4416 dev_warn(&h->pdev->dev,
4417 "Out of memory, rescan deferred.\n");
4418 h->drv_req_rescan = 1;
4419 goto out;
4420 }
4421 if (rc) {
4422 h->drv_req_rescan = 1;
4423 continue;
4424 }
4425
4426 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4427 this_device = currentsd[ncurrent];
4428
4429 *this_device = *tmpdevice;
4430 this_device->physical_device = physical_device;
4431
4432 /*
4433 * Expose all devices except for physical devices that
4434 * are masked.
4435 */
4436 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4437 this_device->expose_device = 0;
4438 else
4439 this_device->expose_device = 1;
4440
4441
4442 /*
4443 * Get the SAS address for physical devices that are exposed.
4444 */
4445 if (this_device->physical_device && this_device->expose_device)
4446 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4447
4448 switch (this_device->devtype) {
4449 case TYPE_ROM:
4450 /* We don't *really* support actual CD-ROM devices,
4451 * just "One Button Disaster Recovery" tape drive
4452 * which temporarily pretends to be a CD-ROM drive.
4453 * So we check that the device is really an OBDR tape
4454 * device by checking for "$DR-10" in bytes 43-48 of
4455 * the inquiry data.
4456 */
4457 if (is_OBDR)
4458 ncurrent++;
4459 break;
4460 case TYPE_DISK:
4461 case TYPE_ZBC:
4462 if (this_device->physical_device) {
4463 /* The disk is in HBA mode. */
4464 /* Never use RAID mapper in HBA mode. */
4465 this_device->offload_enabled = 0;
4466 hpsa_get_ioaccel_drive_info(h, this_device,
4467 physdev_list, phys_dev_index, id_phys);
4468 hpsa_get_path_info(this_device,
4469 physdev_list, phys_dev_index, id_phys);
4470 }
4471 ncurrent++;
4472 break;
4473 case TYPE_TAPE:
4474 case TYPE_MEDIUM_CHANGER:
4475 ncurrent++;
4476 break;
4477 case TYPE_ENCLOSURE:
4478 if (!this_device->external)
4479 hpsa_get_enclosure_info(h, lunaddrbytes,
4480 physdev_list, phys_dev_index,
4481 this_device);
4482 ncurrent++;
4483 break;
4484 case TYPE_RAID:
4485 /* Only present the Smartarray HBA as a RAID controller.
4486 * If it's a RAID controller other than the HBA itself
4487 * (an external RAID controller, MSA500 or similar)
4488 * don't present it.
4489 */
4490 if (!is_hba_lunid(lunaddrbytes))
4491 break;
4492 ncurrent++;
4493 break;
4494 default:
4495 break;
4496 }
4497 if (ncurrent >= HPSA_MAX_DEVICES)
4498 break;
4499 }
4500
4501 if (h->sas_host == NULL) {
4502 int rc = 0;
4503
4504 rc = hpsa_add_sas_host(h);
4505 if (rc) {
4506 dev_warn(&h->pdev->dev,
4507 "Could not add sas host %d\n", rc);
4508 goto out;
4509 }
4510 }
4511
4512 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4513 out:
4514 kfree(tmpdevice);
4515 for (i = 0; i < ndev_allocated; i++)
4516 kfree(currentsd[i]);
4517 kfree(currentsd);
4518 kfree(physdev_list);
4519 kfree(logdev_list);
4520 kfree(id_ctlr);
4521 kfree(id_phys);
4522 }
4523
4524 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4525 struct scatterlist *sg)
4526 {
4527 u64 addr64 = (u64) sg_dma_address(sg);
4528 unsigned int len = sg_dma_len(sg);
4529
4530 desc->Addr = cpu_to_le64(addr64);
4531 desc->Len = cpu_to_le32(len);
4532 desc->Ext = 0;
4533 }
4534
4535 /*
4536 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4537 * dma mapping and fills in the scatter gather entries of the
4538 * hpsa command, cp.
4539 */
4540 static int hpsa_scatter_gather(struct ctlr_info *h,
4541 struct CommandList *cp,
4542 struct scsi_cmnd *cmd)
4543 {
4544 struct scatterlist *sg;
4545 int use_sg, i, sg_limit, chained, last_sg;
4546 struct SGDescriptor *curr_sg;
4547
4548 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4549
4550 use_sg = scsi_dma_map(cmd);
4551 if (use_sg < 0)
4552 return use_sg;
4553
4554 if (!use_sg)
4555 goto sglist_finished;
4556
4557 /*
4558 * If the number of entries is greater than the max for a single list,
4559 * then we have a chained list; we will set up all but one entry in the
4560 * first list (the last entry is saved for link information);
4561 * otherwise, we don't have a chained list and we'll set up at each of
4562 * the entries in the one list.
4563 */
4564 curr_sg = cp->SG;
4565 chained = use_sg > h->max_cmd_sg_entries;
4566 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4567 last_sg = scsi_sg_count(cmd) - 1;
4568 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4569 hpsa_set_sg_descriptor(curr_sg, sg);
4570 curr_sg++;
4571 }
4572
4573 if (chained) {
4574 /*
4575 * Continue with the chained list. Set curr_sg to the chained
4576 * list. Modify the limit to the total count less the entries
4577 * we've already set up. Resume the scan at the list entry
4578 * where the previous loop left off.
4579 */
4580 curr_sg = h->cmd_sg_list[cp->cmdindex];
4581 sg_limit = use_sg - sg_limit;
4582 for_each_sg(sg, sg, sg_limit, i) {
4583 hpsa_set_sg_descriptor(curr_sg, sg);
4584 curr_sg++;
4585 }
4586 }
4587
4588 /* Back the pointer up to the last entry and mark it as "last". */
4589 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4590
4591 if (use_sg + chained > h->maxSG)
4592 h->maxSG = use_sg + chained;
4593
4594 if (chained) {
4595 cp->Header.SGList = h->max_cmd_sg_entries;
4596 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4597 if (hpsa_map_sg_chain_block(h, cp)) {
4598 scsi_dma_unmap(cmd);
4599 return -1;
4600 }
4601 return 0;
4602 }
4603
4604 sglist_finished:
4605
4606 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4607 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4608 return 0;
4609 }
4610
4611 #define BUFLEN 128
4612 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4613 u8 *cdb, int cdb_len,
4614 const char *func)
4615 {
4616 char buf[BUFLEN];
4617 int outlen;
4618 int i;
4619
4620 outlen = scnprintf(buf, BUFLEN,
4621 "%s: Blocking zero-length request: CDB:", func);
4622 for (i = 0; i < cdb_len; i++)
4623 outlen += scnprintf(buf+outlen, BUFLEN - outlen,
4624 "%02hhx", cdb[i]);
4625 dev_warn(&h->pdev->dev, "%s\n", buf);
4626 }
4627
4628 #define IO_ACCEL_INELIGIBLE 1
4629 /* zero-length transfers trigger hardware errors. */
4630 static bool is_zero_length_transfer(u8 *cdb)
4631 {
4632 u32 block_cnt;
4633
4634 /* Block zero-length transfer sizes on certain commands. */
4635 switch (cdb[0]) {
4636 case READ_10:
4637 case WRITE_10:
4638 case VERIFY: /* 0x2F */
4639 case WRITE_VERIFY: /* 0x2E */
4640 block_cnt = get_unaligned_be16(&cdb[7]);
4641 break;
4642 case READ_12:
4643 case WRITE_12:
4644 case VERIFY_12: /* 0xAF */
4645 case WRITE_VERIFY_12: /* 0xAE */
4646 block_cnt = get_unaligned_be32(&cdb[6]);
4647 break;
4648 case READ_16:
4649 case WRITE_16:
4650 case VERIFY_16: /* 0x8F */
4651 block_cnt = get_unaligned_be32(&cdb[10]);
4652 break;
4653 default:
4654 return false;
4655 }
4656
4657 return block_cnt == 0;
4658 }
4659
4660 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4661 {
4662 int is_write = 0;
4663 u32 block;
4664 u32 block_cnt;
4665
4666 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4667 switch (cdb[0]) {
4668 case WRITE_6:
4669 case WRITE_12:
4670 is_write = 1;
4671 case READ_6:
4672 case READ_12:
4673 if (*cdb_len == 6) {
4674 block = (((cdb[1] & 0x1F) << 16) |
4675 (cdb[2] << 8) |
4676 cdb[3]);
4677 block_cnt = cdb[4];
4678 if (block_cnt == 0)
4679 block_cnt = 256;
4680 } else {
4681 BUG_ON(*cdb_len != 12);
4682 block = get_unaligned_be32(&cdb[2]);
4683 block_cnt = get_unaligned_be32(&cdb[6]);
4684 }
4685 if (block_cnt > 0xffff)
4686 return IO_ACCEL_INELIGIBLE;
4687
4688 cdb[0] = is_write ? WRITE_10 : READ_10;
4689 cdb[1] = 0;
4690 cdb[2] = (u8) (block >> 24);
4691 cdb[3] = (u8) (block >> 16);
4692 cdb[4] = (u8) (block >> 8);
4693 cdb[5] = (u8) (block);
4694 cdb[6] = 0;
4695 cdb[7] = (u8) (block_cnt >> 8);
4696 cdb[8] = (u8) (block_cnt);
4697 cdb[9] = 0;
4698 *cdb_len = 10;
4699 break;
4700 }
4701 return 0;
4702 }
4703
4704 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4705 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4706 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4707 {
4708 struct scsi_cmnd *cmd = c->scsi_cmd;
4709 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4710 unsigned int len;
4711 unsigned int total_len = 0;
4712 struct scatterlist *sg;
4713 u64 addr64;
4714 int use_sg, i;
4715 struct SGDescriptor *curr_sg;
4716 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4717
4718 /* TODO: implement chaining support */
4719 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4720 atomic_dec(&phys_disk->ioaccel_cmds_out);
4721 return IO_ACCEL_INELIGIBLE;
4722 }
4723
4724 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4725
4726 if (is_zero_length_transfer(cdb)) {
4727 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4728 atomic_dec(&phys_disk->ioaccel_cmds_out);
4729 return IO_ACCEL_INELIGIBLE;
4730 }
4731
4732 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4733 atomic_dec(&phys_disk->ioaccel_cmds_out);
4734 return IO_ACCEL_INELIGIBLE;
4735 }
4736
4737 c->cmd_type = CMD_IOACCEL1;
4738
4739 /* Adjust the DMA address to point to the accelerated command buffer */
4740 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4741 (c->cmdindex * sizeof(*cp));
4742 BUG_ON(c->busaddr & 0x0000007F);
4743
4744 use_sg = scsi_dma_map(cmd);
4745 if (use_sg < 0) {
4746 atomic_dec(&phys_disk->ioaccel_cmds_out);
4747 return use_sg;
4748 }
4749
4750 if (use_sg) {
4751 curr_sg = cp->SG;
4752 scsi_for_each_sg(cmd, sg, use_sg, i) {
4753 addr64 = (u64) sg_dma_address(sg);
4754 len = sg_dma_len(sg);
4755 total_len += len;
4756 curr_sg->Addr = cpu_to_le64(addr64);
4757 curr_sg->Len = cpu_to_le32(len);
4758 curr_sg->Ext = cpu_to_le32(0);
4759 curr_sg++;
4760 }
4761 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4762
4763 switch (cmd->sc_data_direction) {
4764 case DMA_TO_DEVICE:
4765 control |= IOACCEL1_CONTROL_DATA_OUT;
4766 break;
4767 case DMA_FROM_DEVICE:
4768 control |= IOACCEL1_CONTROL_DATA_IN;
4769 break;
4770 case DMA_NONE:
4771 control |= IOACCEL1_CONTROL_NODATAXFER;
4772 break;
4773 default:
4774 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4775 cmd->sc_data_direction);
4776 BUG();
4777 break;
4778 }
4779 } else {
4780 control |= IOACCEL1_CONTROL_NODATAXFER;
4781 }
4782
4783 c->Header.SGList = use_sg;
4784 /* Fill out the command structure to submit */
4785 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4786 cp->transfer_len = cpu_to_le32(total_len);
4787 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4788 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4789 cp->control = cpu_to_le32(control);
4790 memcpy(cp->CDB, cdb, cdb_len);
4791 memcpy(cp->CISS_LUN, scsi3addr, 8);
4792 /* Tag was already set at init time. */
4793 enqueue_cmd_and_start_io(h, c);
4794 return 0;
4795 }
4796
4797 /*
4798 * Queue a command directly to a device behind the controller using the
4799 * I/O accelerator path.
4800 */
4801 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4802 struct CommandList *c)
4803 {
4804 struct scsi_cmnd *cmd = c->scsi_cmd;
4805 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4806
4807 if (!dev)
4808 return -1;
4809
4810 c->phys_disk = dev;
4811
4812 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4813 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4814 }
4815
4816 /*
4817 * Set encryption parameters for the ioaccel2 request
4818 */
4819 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4820 struct CommandList *c, struct io_accel2_cmd *cp)
4821 {
4822 struct scsi_cmnd *cmd = c->scsi_cmd;
4823 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4824 struct raid_map_data *map = &dev->raid_map;
4825 u64 first_block;
4826
4827 /* Are we doing encryption on this device */
4828 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4829 return;
4830 /* Set the data encryption key index. */
4831 cp->dekindex = map->dekindex;
4832
4833 /* Set the encryption enable flag, encoded into direction field. */
4834 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4835
4836 /* Set encryption tweak values based on logical block address
4837 * If block size is 512, tweak value is LBA.
4838 * For other block sizes, tweak is (LBA * block size)/ 512)
4839 */
4840 switch (cmd->cmnd[0]) {
4841 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4842 case READ_6:
4843 case WRITE_6:
4844 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4845 (cmd->cmnd[2] << 8) |
4846 cmd->cmnd[3]);
4847 break;
4848 case WRITE_10:
4849 case READ_10:
4850 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4851 case WRITE_12:
4852 case READ_12:
4853 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4854 break;
4855 case WRITE_16:
4856 case READ_16:
4857 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4858 break;
4859 default:
4860 dev_err(&h->pdev->dev,
4861 "ERROR: %s: size (0x%x) not supported for encryption\n",
4862 __func__, cmd->cmnd[0]);
4863 BUG();
4864 break;
4865 }
4866
4867 if (le32_to_cpu(map->volume_blk_size) != 512)
4868 first_block = first_block *
4869 le32_to_cpu(map->volume_blk_size)/512;
4870
4871 cp->tweak_lower = cpu_to_le32(first_block);
4872 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4873 }
4874
4875 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4876 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4877 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4878 {
4879 struct scsi_cmnd *cmd = c->scsi_cmd;
4880 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4881 struct ioaccel2_sg_element *curr_sg;
4882 int use_sg, i;
4883 struct scatterlist *sg;
4884 u64 addr64;
4885 u32 len;
4886 u32 total_len = 0;
4887
4888 if (!cmd->device)
4889 return -1;
4890
4891 if (!cmd->device->hostdata)
4892 return -1;
4893
4894 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4895
4896 if (is_zero_length_transfer(cdb)) {
4897 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4898 atomic_dec(&phys_disk->ioaccel_cmds_out);
4899 return IO_ACCEL_INELIGIBLE;
4900 }
4901
4902 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4903 atomic_dec(&phys_disk->ioaccel_cmds_out);
4904 return IO_ACCEL_INELIGIBLE;
4905 }
4906
4907 c->cmd_type = CMD_IOACCEL2;
4908 /* Adjust the DMA address to point to the accelerated command buffer */
4909 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4910 (c->cmdindex * sizeof(*cp));
4911 BUG_ON(c->busaddr & 0x0000007F);
4912
4913 memset(cp, 0, sizeof(*cp));
4914 cp->IU_type = IOACCEL2_IU_TYPE;
4915
4916 use_sg = scsi_dma_map(cmd);
4917 if (use_sg < 0) {
4918 atomic_dec(&phys_disk->ioaccel_cmds_out);
4919 return use_sg;
4920 }
4921
4922 if (use_sg) {
4923 curr_sg = cp->sg;
4924 if (use_sg > h->ioaccel_maxsg) {
4925 addr64 = le64_to_cpu(
4926 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4927 curr_sg->address = cpu_to_le64(addr64);
4928 curr_sg->length = 0;
4929 curr_sg->reserved[0] = 0;
4930 curr_sg->reserved[1] = 0;
4931 curr_sg->reserved[2] = 0;
4932 curr_sg->chain_indicator = 0x80;
4933
4934 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4935 }
4936 scsi_for_each_sg(cmd, sg, use_sg, i) {
4937 addr64 = (u64) sg_dma_address(sg);
4938 len = sg_dma_len(sg);
4939 total_len += len;
4940 curr_sg->address = cpu_to_le64(addr64);
4941 curr_sg->length = cpu_to_le32(len);
4942 curr_sg->reserved[0] = 0;
4943 curr_sg->reserved[1] = 0;
4944 curr_sg->reserved[2] = 0;
4945 curr_sg->chain_indicator = 0;
4946 curr_sg++;
4947 }
4948
4949 switch (cmd->sc_data_direction) {
4950 case DMA_TO_DEVICE:
4951 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4952 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4953 break;
4954 case DMA_FROM_DEVICE:
4955 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4956 cp->direction |= IOACCEL2_DIR_DATA_IN;
4957 break;
4958 case DMA_NONE:
4959 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4960 cp->direction |= IOACCEL2_DIR_NO_DATA;
4961 break;
4962 default:
4963 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4964 cmd->sc_data_direction);
4965 BUG();
4966 break;
4967 }
4968 } else {
4969 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4970 cp->direction |= IOACCEL2_DIR_NO_DATA;
4971 }
4972
4973 /* Set encryption parameters, if necessary */
4974 set_encrypt_ioaccel2(h, c, cp);
4975
4976 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4977 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4978 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4979
4980 cp->data_len = cpu_to_le32(total_len);
4981 cp->err_ptr = cpu_to_le64(c->busaddr +
4982 offsetof(struct io_accel2_cmd, error_data));
4983 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4984
4985 /* fill in sg elements */
4986 if (use_sg > h->ioaccel_maxsg) {
4987 cp->sg_count = 1;
4988 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4989 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4990 atomic_dec(&phys_disk->ioaccel_cmds_out);
4991 scsi_dma_unmap(cmd);
4992 return -1;
4993 }
4994 } else
4995 cp->sg_count = (u8) use_sg;
4996
4997 enqueue_cmd_and_start_io(h, c);
4998 return 0;
4999 }
5000
5001 /*
5002 * Queue a command to the correct I/O accelerator path.
5003 */
5004 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
5005 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5006 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5007 {
5008 if (!c->scsi_cmd->device)
5009 return -1;
5010
5011 if (!c->scsi_cmd->device->hostdata)
5012 return -1;
5013
5014 /* Try to honor the device's queue depth */
5015 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5016 phys_disk->queue_depth) {
5017 atomic_dec(&phys_disk->ioaccel_cmds_out);
5018 return IO_ACCEL_INELIGIBLE;
5019 }
5020 if (h->transMethod & CFGTBL_Trans_io_accel1)
5021 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5022 cdb, cdb_len, scsi3addr,
5023 phys_disk);
5024 else
5025 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5026 cdb, cdb_len, scsi3addr,
5027 phys_disk);
5028 }
5029
5030 static void raid_map_helper(struct raid_map_data *map,
5031 int offload_to_mirror, u32 *map_index, u32 *current_group)
5032 {
5033 if (offload_to_mirror == 0) {
5034 /* use physical disk in the first mirrored group. */
5035 *map_index %= le16_to_cpu(map->data_disks_per_row);
5036 return;
5037 }
5038 do {
5039 /* determine mirror group that *map_index indicates */
5040 *current_group = *map_index /
5041 le16_to_cpu(map->data_disks_per_row);
5042 if (offload_to_mirror == *current_group)
5043 continue;
5044 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5045 /* select map index from next group */
5046 *map_index += le16_to_cpu(map->data_disks_per_row);
5047 (*current_group)++;
5048 } else {
5049 /* select map index from first group */
5050 *map_index %= le16_to_cpu(map->data_disks_per_row);
5051 *current_group = 0;
5052 }
5053 } while (offload_to_mirror != *current_group);
5054 }
5055
5056 /*
5057 * Attempt to perform offload RAID mapping for a logical volume I/O.
5058 */
5059 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5060 struct CommandList *c)
5061 {
5062 struct scsi_cmnd *cmd = c->scsi_cmd;
5063 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5064 struct raid_map_data *map = &dev->raid_map;
5065 struct raid_map_disk_data *dd = &map->data[0];
5066 int is_write = 0;
5067 u32 map_index;
5068 u64 first_block, last_block;
5069 u32 block_cnt;
5070 u32 blocks_per_row;
5071 u64 first_row, last_row;
5072 u32 first_row_offset, last_row_offset;
5073 u32 first_column, last_column;
5074 u64 r0_first_row, r0_last_row;
5075 u32 r5or6_blocks_per_row;
5076 u64 r5or6_first_row, r5or6_last_row;
5077 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5078 u32 r5or6_first_column, r5or6_last_column;
5079 u32 total_disks_per_row;
5080 u32 stripesize;
5081 u32 first_group, last_group, current_group;
5082 u32 map_row;
5083 u32 disk_handle;
5084 u64 disk_block;
5085 u32 disk_block_cnt;
5086 u8 cdb[16];
5087 u8 cdb_len;
5088 u16 strip_size;
5089 #if BITS_PER_LONG == 32
5090 u64 tmpdiv;
5091 #endif
5092 int offload_to_mirror;
5093
5094 if (!dev)
5095 return -1;
5096
5097 /* check for valid opcode, get LBA and block count */
5098 switch (cmd->cmnd[0]) {
5099 case WRITE_6:
5100 is_write = 1;
5101 case READ_6:
5102 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5103 (cmd->cmnd[2] << 8) |
5104 cmd->cmnd[3]);
5105 block_cnt = cmd->cmnd[4];
5106 if (block_cnt == 0)
5107 block_cnt = 256;
5108 break;
5109 case WRITE_10:
5110 is_write = 1;
5111 case READ_10:
5112 first_block =
5113 (((u64) cmd->cmnd[2]) << 24) |
5114 (((u64) cmd->cmnd[3]) << 16) |
5115 (((u64) cmd->cmnd[4]) << 8) |
5116 cmd->cmnd[5];
5117 block_cnt =
5118 (((u32) cmd->cmnd[7]) << 8) |
5119 cmd->cmnd[8];
5120 break;
5121 case WRITE_12:
5122 is_write = 1;
5123 case READ_12:
5124 first_block =
5125 (((u64) cmd->cmnd[2]) << 24) |
5126 (((u64) cmd->cmnd[3]) << 16) |
5127 (((u64) cmd->cmnd[4]) << 8) |
5128 cmd->cmnd[5];
5129 block_cnt =
5130 (((u32) cmd->cmnd[6]) << 24) |
5131 (((u32) cmd->cmnd[7]) << 16) |
5132 (((u32) cmd->cmnd[8]) << 8) |
5133 cmd->cmnd[9];
5134 break;
5135 case WRITE_16:
5136 is_write = 1;
5137 case READ_16:
5138 first_block =
5139 (((u64) cmd->cmnd[2]) << 56) |
5140 (((u64) cmd->cmnd[3]) << 48) |
5141 (((u64) cmd->cmnd[4]) << 40) |
5142 (((u64) cmd->cmnd[5]) << 32) |
5143 (((u64) cmd->cmnd[6]) << 24) |
5144 (((u64) cmd->cmnd[7]) << 16) |
5145 (((u64) cmd->cmnd[8]) << 8) |
5146 cmd->cmnd[9];
5147 block_cnt =
5148 (((u32) cmd->cmnd[10]) << 24) |
5149 (((u32) cmd->cmnd[11]) << 16) |
5150 (((u32) cmd->cmnd[12]) << 8) |
5151 cmd->cmnd[13];
5152 break;
5153 default:
5154 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5155 }
5156 last_block = first_block + block_cnt - 1;
5157
5158 /* check for write to non-RAID-0 */
5159 if (is_write && dev->raid_level != 0)
5160 return IO_ACCEL_INELIGIBLE;
5161
5162 /* check for invalid block or wraparound */
5163 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5164 last_block < first_block)
5165 return IO_ACCEL_INELIGIBLE;
5166
5167 /* calculate stripe information for the request */
5168 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5169 le16_to_cpu(map->strip_size);
5170 strip_size = le16_to_cpu(map->strip_size);
5171 #if BITS_PER_LONG == 32
5172 tmpdiv = first_block;
5173 (void) do_div(tmpdiv, blocks_per_row);
5174 first_row = tmpdiv;
5175 tmpdiv = last_block;
5176 (void) do_div(tmpdiv, blocks_per_row);
5177 last_row = tmpdiv;
5178 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5179 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5180 tmpdiv = first_row_offset;
5181 (void) do_div(tmpdiv, strip_size);
5182 first_column = tmpdiv;
5183 tmpdiv = last_row_offset;
5184 (void) do_div(tmpdiv, strip_size);
5185 last_column = tmpdiv;
5186 #else
5187 first_row = first_block / blocks_per_row;
5188 last_row = last_block / blocks_per_row;
5189 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5190 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5191 first_column = first_row_offset / strip_size;
5192 last_column = last_row_offset / strip_size;
5193 #endif
5194
5195 /* if this isn't a single row/column then give to the controller */
5196 if ((first_row != last_row) || (first_column != last_column))
5197 return IO_ACCEL_INELIGIBLE;
5198
5199 /* proceeding with driver mapping */
5200 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5201 le16_to_cpu(map->metadata_disks_per_row);
5202 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5203 le16_to_cpu(map->row_cnt);
5204 map_index = (map_row * total_disks_per_row) + first_column;
5205
5206 switch (dev->raid_level) {
5207 case HPSA_RAID_0:
5208 break; /* nothing special to do */
5209 case HPSA_RAID_1:
5210 /* Handles load balance across RAID 1 members.
5211 * (2-drive R1 and R10 with even # of drives.)
5212 * Appropriate for SSDs, not optimal for HDDs
5213 */
5214 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5215 if (dev->offload_to_mirror)
5216 map_index += le16_to_cpu(map->data_disks_per_row);
5217 dev->offload_to_mirror = !dev->offload_to_mirror;
5218 break;
5219 case HPSA_RAID_ADM:
5220 /* Handles N-way mirrors (R1-ADM)
5221 * and R10 with # of drives divisible by 3.)
5222 */
5223 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5224
5225 offload_to_mirror = dev->offload_to_mirror;
5226 raid_map_helper(map, offload_to_mirror,
5227 &map_index, &current_group);
5228 /* set mirror group to use next time */
5229 offload_to_mirror =
5230 (offload_to_mirror >=
5231 le16_to_cpu(map->layout_map_count) - 1)
5232 ? 0 : offload_to_mirror + 1;
5233 dev->offload_to_mirror = offload_to_mirror;
5234 /* Avoid direct use of dev->offload_to_mirror within this
5235 * function since multiple threads might simultaneously
5236 * increment it beyond the range of dev->layout_map_count -1.
5237 */
5238 break;
5239 case HPSA_RAID_5:
5240 case HPSA_RAID_6:
5241 if (le16_to_cpu(map->layout_map_count) <= 1)
5242 break;
5243
5244 /* Verify first and last block are in same RAID group */
5245 r5or6_blocks_per_row =
5246 le16_to_cpu(map->strip_size) *
5247 le16_to_cpu(map->data_disks_per_row);
5248 BUG_ON(r5or6_blocks_per_row == 0);
5249 stripesize = r5or6_blocks_per_row *
5250 le16_to_cpu(map->layout_map_count);
5251 #if BITS_PER_LONG == 32
5252 tmpdiv = first_block;
5253 first_group = do_div(tmpdiv, stripesize);
5254 tmpdiv = first_group;
5255 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5256 first_group = tmpdiv;
5257 tmpdiv = last_block;
5258 last_group = do_div(tmpdiv, stripesize);
5259 tmpdiv = last_group;
5260 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5261 last_group = tmpdiv;
5262 #else
5263 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5264 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5265 #endif
5266 if (first_group != last_group)
5267 return IO_ACCEL_INELIGIBLE;
5268
5269 /* Verify request is in a single row of RAID 5/6 */
5270 #if BITS_PER_LONG == 32
5271 tmpdiv = first_block;
5272 (void) do_div(tmpdiv, stripesize);
5273 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5274 tmpdiv = last_block;
5275 (void) do_div(tmpdiv, stripesize);
5276 r5or6_last_row = r0_last_row = tmpdiv;
5277 #else
5278 first_row = r5or6_first_row = r0_first_row =
5279 first_block / stripesize;
5280 r5or6_last_row = r0_last_row = last_block / stripesize;
5281 #endif
5282 if (r5or6_first_row != r5or6_last_row)
5283 return IO_ACCEL_INELIGIBLE;
5284
5285
5286 /* Verify request is in a single column */
5287 #if BITS_PER_LONG == 32
5288 tmpdiv = first_block;
5289 first_row_offset = do_div(tmpdiv, stripesize);
5290 tmpdiv = first_row_offset;
5291 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5292 r5or6_first_row_offset = first_row_offset;
5293 tmpdiv = last_block;
5294 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5295 tmpdiv = r5or6_last_row_offset;
5296 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5297 tmpdiv = r5or6_first_row_offset;
5298 (void) do_div(tmpdiv, map->strip_size);
5299 first_column = r5or6_first_column = tmpdiv;
5300 tmpdiv = r5or6_last_row_offset;
5301 (void) do_div(tmpdiv, map->strip_size);
5302 r5or6_last_column = tmpdiv;
5303 #else
5304 first_row_offset = r5or6_first_row_offset =
5305 (u32)((first_block % stripesize) %
5306 r5or6_blocks_per_row);
5307
5308 r5or6_last_row_offset =
5309 (u32)((last_block % stripesize) %
5310 r5or6_blocks_per_row);
5311
5312 first_column = r5or6_first_column =
5313 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5314 r5or6_last_column =
5315 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5316 #endif
5317 if (r5or6_first_column != r5or6_last_column)
5318 return IO_ACCEL_INELIGIBLE;
5319
5320 /* Request is eligible */
5321 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5322 le16_to_cpu(map->row_cnt);
5323
5324 map_index = (first_group *
5325 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5326 (map_row * total_disks_per_row) + first_column;
5327 break;
5328 default:
5329 return IO_ACCEL_INELIGIBLE;
5330 }
5331
5332 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5333 return IO_ACCEL_INELIGIBLE;
5334
5335 c->phys_disk = dev->phys_disk[map_index];
5336 if (!c->phys_disk)
5337 return IO_ACCEL_INELIGIBLE;
5338
5339 disk_handle = dd[map_index].ioaccel_handle;
5340 disk_block = le64_to_cpu(map->disk_starting_blk) +
5341 first_row * le16_to_cpu(map->strip_size) +
5342 (first_row_offset - first_column *
5343 le16_to_cpu(map->strip_size));
5344 disk_block_cnt = block_cnt;
5345
5346 /* handle differing logical/physical block sizes */
5347 if (map->phys_blk_shift) {
5348 disk_block <<= map->phys_blk_shift;
5349 disk_block_cnt <<= map->phys_blk_shift;
5350 }
5351 BUG_ON(disk_block_cnt > 0xffff);
5352
5353 /* build the new CDB for the physical disk I/O */
5354 if (disk_block > 0xffffffff) {
5355 cdb[0] = is_write ? WRITE_16 : READ_16;
5356 cdb[1] = 0;
5357 cdb[2] = (u8) (disk_block >> 56);
5358 cdb[3] = (u8) (disk_block >> 48);
5359 cdb[4] = (u8) (disk_block >> 40);
5360 cdb[5] = (u8) (disk_block >> 32);
5361 cdb[6] = (u8) (disk_block >> 24);
5362 cdb[7] = (u8) (disk_block >> 16);
5363 cdb[8] = (u8) (disk_block >> 8);
5364 cdb[9] = (u8) (disk_block);
5365 cdb[10] = (u8) (disk_block_cnt >> 24);
5366 cdb[11] = (u8) (disk_block_cnt >> 16);
5367 cdb[12] = (u8) (disk_block_cnt >> 8);
5368 cdb[13] = (u8) (disk_block_cnt);
5369 cdb[14] = 0;
5370 cdb[15] = 0;
5371 cdb_len = 16;
5372 } else {
5373 cdb[0] = is_write ? WRITE_10 : READ_10;
5374 cdb[1] = 0;
5375 cdb[2] = (u8) (disk_block >> 24);
5376 cdb[3] = (u8) (disk_block >> 16);
5377 cdb[4] = (u8) (disk_block >> 8);
5378 cdb[5] = (u8) (disk_block);
5379 cdb[6] = 0;
5380 cdb[7] = (u8) (disk_block_cnt >> 8);
5381 cdb[8] = (u8) (disk_block_cnt);
5382 cdb[9] = 0;
5383 cdb_len = 10;
5384 }
5385 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5386 dev->scsi3addr,
5387 dev->phys_disk[map_index]);
5388 }
5389
5390 /*
5391 * Submit commands down the "normal" RAID stack path
5392 * All callers to hpsa_ciss_submit must check lockup_detected
5393 * beforehand, before (opt.) and after calling cmd_alloc
5394 */
5395 static int hpsa_ciss_submit(struct ctlr_info *h,
5396 struct CommandList *c, struct scsi_cmnd *cmd,
5397 unsigned char scsi3addr[])
5398 {
5399 cmd->host_scribble = (unsigned char *) c;
5400 c->cmd_type = CMD_SCSI;
5401 c->scsi_cmd = cmd;
5402 c->Header.ReplyQueue = 0; /* unused in simple mode */
5403 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5404 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5405
5406 /* Fill in the request block... */
5407
5408 c->Request.Timeout = 0;
5409 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5410 c->Request.CDBLen = cmd->cmd_len;
5411 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5412 switch (cmd->sc_data_direction) {
5413 case DMA_TO_DEVICE:
5414 c->Request.type_attr_dir =
5415 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5416 break;
5417 case DMA_FROM_DEVICE:
5418 c->Request.type_attr_dir =
5419 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5420 break;
5421 case DMA_NONE:
5422 c->Request.type_attr_dir =
5423 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5424 break;
5425 case DMA_BIDIRECTIONAL:
5426 /* This can happen if a buggy application does a scsi passthru
5427 * and sets both inlen and outlen to non-zero. ( see
5428 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5429 */
5430
5431 c->Request.type_attr_dir =
5432 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5433 /* This is technically wrong, and hpsa controllers should
5434 * reject it with CMD_INVALID, which is the most correct
5435 * response, but non-fibre backends appear to let it
5436 * slide by, and give the same results as if this field
5437 * were set correctly. Either way is acceptable for
5438 * our purposes here.
5439 */
5440
5441 break;
5442
5443 default:
5444 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5445 cmd->sc_data_direction);
5446 BUG();
5447 break;
5448 }
5449
5450 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5451 hpsa_cmd_resolve_and_free(h, c);
5452 return SCSI_MLQUEUE_HOST_BUSY;
5453 }
5454 enqueue_cmd_and_start_io(h, c);
5455 /* the cmd'll come back via intr handler in complete_scsi_command() */
5456 return 0;
5457 }
5458
5459 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5460 struct CommandList *c)
5461 {
5462 dma_addr_t cmd_dma_handle, err_dma_handle;
5463
5464 /* Zero out all of commandlist except the last field, refcount */
5465 memset(c, 0, offsetof(struct CommandList, refcount));
5466 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5467 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5468 c->err_info = h->errinfo_pool + index;
5469 memset(c->err_info, 0, sizeof(*c->err_info));
5470 err_dma_handle = h->errinfo_pool_dhandle
5471 + index * sizeof(*c->err_info);
5472 c->cmdindex = index;
5473 c->busaddr = (u32) cmd_dma_handle;
5474 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5475 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5476 c->h = h;
5477 c->scsi_cmd = SCSI_CMD_IDLE;
5478 }
5479
5480 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5481 {
5482 int i;
5483
5484 for (i = 0; i < h->nr_cmds; i++) {
5485 struct CommandList *c = h->cmd_pool + i;
5486
5487 hpsa_cmd_init(h, i, c);
5488 atomic_set(&c->refcount, 0);
5489 }
5490 }
5491
5492 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5493 struct CommandList *c)
5494 {
5495 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5496
5497 BUG_ON(c->cmdindex != index);
5498
5499 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5500 memset(c->err_info, 0, sizeof(*c->err_info));
5501 c->busaddr = (u32) cmd_dma_handle;
5502 }
5503
5504 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5505 struct CommandList *c, struct scsi_cmnd *cmd,
5506 unsigned char *scsi3addr)
5507 {
5508 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5509 int rc = IO_ACCEL_INELIGIBLE;
5510
5511 if (!dev)
5512 return SCSI_MLQUEUE_HOST_BUSY;
5513
5514 cmd->host_scribble = (unsigned char *) c;
5515
5516 if (dev->offload_enabled) {
5517 hpsa_cmd_init(h, c->cmdindex, c);
5518 c->cmd_type = CMD_SCSI;
5519 c->scsi_cmd = cmd;
5520 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5521 if (rc < 0) /* scsi_dma_map failed. */
5522 rc = SCSI_MLQUEUE_HOST_BUSY;
5523 } else if (dev->hba_ioaccel_enabled) {
5524 hpsa_cmd_init(h, c->cmdindex, c);
5525 c->cmd_type = CMD_SCSI;
5526 c->scsi_cmd = cmd;
5527 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5528 if (rc < 0) /* scsi_dma_map failed. */
5529 rc = SCSI_MLQUEUE_HOST_BUSY;
5530 }
5531 return rc;
5532 }
5533
5534 static void hpsa_command_resubmit_worker(struct work_struct *work)
5535 {
5536 struct scsi_cmnd *cmd;
5537 struct hpsa_scsi_dev_t *dev;
5538 struct CommandList *c = container_of(work, struct CommandList, work);
5539
5540 cmd = c->scsi_cmd;
5541 dev = cmd->device->hostdata;
5542 if (!dev) {
5543 cmd->result = DID_NO_CONNECT << 16;
5544 return hpsa_cmd_free_and_done(c->h, c, cmd);
5545 }
5546 if (c->reset_pending)
5547 return hpsa_cmd_free_and_done(c->h, c, cmd);
5548 if (c->cmd_type == CMD_IOACCEL2) {
5549 struct ctlr_info *h = c->h;
5550 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5551 int rc;
5552
5553 if (c2->error_data.serv_response ==
5554 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5555 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5556 if (rc == 0)
5557 return;
5558 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5559 /*
5560 * If we get here, it means dma mapping failed.
5561 * Try again via scsi mid layer, which will
5562 * then get SCSI_MLQUEUE_HOST_BUSY.
5563 */
5564 cmd->result = DID_IMM_RETRY << 16;
5565 return hpsa_cmd_free_and_done(h, c, cmd);
5566 }
5567 /* else, fall thru and resubmit down CISS path */
5568 }
5569 }
5570 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5571 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5572 /*
5573 * If we get here, it means dma mapping failed. Try
5574 * again via scsi mid layer, which will then get
5575 * SCSI_MLQUEUE_HOST_BUSY.
5576 *
5577 * hpsa_ciss_submit will have already freed c
5578 * if it encountered a dma mapping failure.
5579 */
5580 cmd->result = DID_IMM_RETRY << 16;
5581 cmd->scsi_done(cmd);
5582 }
5583 }
5584
5585 /* Running in struct Scsi_Host->host_lock less mode */
5586 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5587 {
5588 struct ctlr_info *h;
5589 struct hpsa_scsi_dev_t *dev;
5590 unsigned char scsi3addr[8];
5591 struct CommandList *c;
5592 int rc = 0;
5593
5594 /* Get the ptr to our adapter structure out of cmd->host. */
5595 h = sdev_to_hba(cmd->device);
5596
5597 BUG_ON(cmd->request->tag < 0);
5598
5599 dev = cmd->device->hostdata;
5600 if (!dev) {
5601 cmd->result = DID_NO_CONNECT << 16;
5602 cmd->scsi_done(cmd);
5603 return 0;
5604 }
5605
5606 if (dev->removed) {
5607 cmd->result = DID_NO_CONNECT << 16;
5608 cmd->scsi_done(cmd);
5609 return 0;
5610 }
5611
5612 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5613
5614 if (unlikely(lockup_detected(h))) {
5615 cmd->result = DID_NO_CONNECT << 16;
5616 cmd->scsi_done(cmd);
5617 return 0;
5618 }
5619 c = cmd_tagged_alloc(h, cmd);
5620
5621 /*
5622 * Call alternate submit routine for I/O accelerated commands.
5623 * Retries always go down the normal I/O path.
5624 */
5625 if (likely(cmd->retries == 0 &&
5626 !blk_rq_is_passthrough(cmd->request) &&
5627 h->acciopath_status)) {
5628 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5629 if (rc == 0)
5630 return 0;
5631 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5632 hpsa_cmd_resolve_and_free(h, c);
5633 return SCSI_MLQUEUE_HOST_BUSY;
5634 }
5635 }
5636 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5637 }
5638
5639 static void hpsa_scan_complete(struct ctlr_info *h)
5640 {
5641 unsigned long flags;
5642
5643 spin_lock_irqsave(&h->scan_lock, flags);
5644 h->scan_finished = 1;
5645 wake_up(&h->scan_wait_queue);
5646 spin_unlock_irqrestore(&h->scan_lock, flags);
5647 }
5648
5649 static void hpsa_scan_start(struct Scsi_Host *sh)
5650 {
5651 struct ctlr_info *h = shost_to_hba(sh);
5652 unsigned long flags;
5653
5654 /*
5655 * Don't let rescans be initiated on a controller known to be locked
5656 * up. If the controller locks up *during* a rescan, that thread is
5657 * probably hosed, but at least we can prevent new rescan threads from
5658 * piling up on a locked up controller.
5659 */
5660 if (unlikely(lockup_detected(h)))
5661 return hpsa_scan_complete(h);
5662
5663 /*
5664 * If a scan is already waiting to run, no need to add another
5665 */
5666 spin_lock_irqsave(&h->scan_lock, flags);
5667 if (h->scan_waiting) {
5668 spin_unlock_irqrestore(&h->scan_lock, flags);
5669 return;
5670 }
5671
5672 spin_unlock_irqrestore(&h->scan_lock, flags);
5673
5674 /* wait until any scan already in progress is finished. */
5675 while (1) {
5676 spin_lock_irqsave(&h->scan_lock, flags);
5677 if (h->scan_finished)
5678 break;
5679 h->scan_waiting = 1;
5680 spin_unlock_irqrestore(&h->scan_lock, flags);
5681 wait_event(h->scan_wait_queue, h->scan_finished);
5682 /* Note: We don't need to worry about a race between this
5683 * thread and driver unload because the midlayer will
5684 * have incremented the reference count, so unload won't
5685 * happen if we're in here.
5686 */
5687 }
5688 h->scan_finished = 0; /* mark scan as in progress */
5689 h->scan_waiting = 0;
5690 spin_unlock_irqrestore(&h->scan_lock, flags);
5691
5692 if (unlikely(lockup_detected(h)))
5693 return hpsa_scan_complete(h);
5694
5695 /*
5696 * Do the scan after a reset completion
5697 */
5698 spin_lock_irqsave(&h->reset_lock, flags);
5699 if (h->reset_in_progress) {
5700 h->drv_req_rescan = 1;
5701 spin_unlock_irqrestore(&h->reset_lock, flags);
5702 hpsa_scan_complete(h);
5703 return;
5704 }
5705 spin_unlock_irqrestore(&h->reset_lock, flags);
5706
5707 hpsa_update_scsi_devices(h);
5708
5709 hpsa_scan_complete(h);
5710 }
5711
5712 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5713 {
5714 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5715
5716 if (!logical_drive)
5717 return -ENODEV;
5718
5719 if (qdepth < 1)
5720 qdepth = 1;
5721 else if (qdepth > logical_drive->queue_depth)
5722 qdepth = logical_drive->queue_depth;
5723
5724 return scsi_change_queue_depth(sdev, qdepth);
5725 }
5726
5727 static int hpsa_scan_finished(struct Scsi_Host *sh,
5728 unsigned long elapsed_time)
5729 {
5730 struct ctlr_info *h = shost_to_hba(sh);
5731 unsigned long flags;
5732 int finished;
5733
5734 spin_lock_irqsave(&h->scan_lock, flags);
5735 finished = h->scan_finished;
5736 spin_unlock_irqrestore(&h->scan_lock, flags);
5737 return finished;
5738 }
5739
5740 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5741 {
5742 struct Scsi_Host *sh;
5743
5744 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5745 if (sh == NULL) {
5746 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5747 return -ENOMEM;
5748 }
5749
5750 sh->io_port = 0;
5751 sh->n_io_port = 0;
5752 sh->this_id = -1;
5753 sh->max_channel = 3;
5754 sh->max_cmd_len = MAX_COMMAND_SIZE;
5755 sh->max_lun = HPSA_MAX_LUN;
5756 sh->max_id = HPSA_MAX_LUN;
5757 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5758 sh->cmd_per_lun = sh->can_queue;
5759 sh->sg_tablesize = h->maxsgentries;
5760 sh->transportt = hpsa_sas_transport_template;
5761 sh->hostdata[0] = (unsigned long) h;
5762 sh->irq = pci_irq_vector(h->pdev, 0);
5763 sh->unique_id = sh->irq;
5764
5765 h->scsi_host = sh;
5766 return 0;
5767 }
5768
5769 static int hpsa_scsi_add_host(struct ctlr_info *h)
5770 {
5771 int rv;
5772
5773 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5774 if (rv) {
5775 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5776 return rv;
5777 }
5778 scsi_scan_host(h->scsi_host);
5779 return 0;
5780 }
5781
5782 /*
5783 * The block layer has already gone to the trouble of picking out a unique,
5784 * small-integer tag for this request. We use an offset from that value as
5785 * an index to select our command block. (The offset allows us to reserve the
5786 * low-numbered entries for our own uses.)
5787 */
5788 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5789 {
5790 int idx = scmd->request->tag;
5791
5792 if (idx < 0)
5793 return idx;
5794
5795 /* Offset to leave space for internal cmds. */
5796 return idx += HPSA_NRESERVED_CMDS;
5797 }
5798
5799 /*
5800 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5801 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5802 */
5803 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5804 struct CommandList *c, unsigned char lunaddr[],
5805 int reply_queue)
5806 {
5807 int rc;
5808
5809 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5810 (void) fill_cmd(c, TEST_UNIT_READY, h,
5811 NULL, 0, 0, lunaddr, TYPE_CMD);
5812 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5813 if (rc)
5814 return rc;
5815 /* no unmap needed here because no data xfer. */
5816
5817 /* Check if the unit is already ready. */
5818 if (c->err_info->CommandStatus == CMD_SUCCESS)
5819 return 0;
5820
5821 /*
5822 * The first command sent after reset will receive "unit attention" to
5823 * indicate that the LUN has been reset...this is actually what we're
5824 * looking for (but, success is good too).
5825 */
5826 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5827 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5828 (c->err_info->SenseInfo[2] == NO_SENSE ||
5829 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5830 return 0;
5831
5832 return 1;
5833 }
5834
5835 /*
5836 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5837 * returns zero when the unit is ready, and non-zero when giving up.
5838 */
5839 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5840 struct CommandList *c,
5841 unsigned char lunaddr[], int reply_queue)
5842 {
5843 int rc;
5844 int count = 0;
5845 int waittime = 1; /* seconds */
5846
5847 /* Send test unit ready until device ready, or give up. */
5848 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5849
5850 /*
5851 * Wait for a bit. do this first, because if we send
5852 * the TUR right away, the reset will just abort it.
5853 */
5854 msleep(1000 * waittime);
5855
5856 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5857 if (!rc)
5858 break;
5859
5860 /* Increase wait time with each try, up to a point. */
5861 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5862 waittime *= 2;
5863
5864 dev_warn(&h->pdev->dev,
5865 "waiting %d secs for device to become ready.\n",
5866 waittime);
5867 }
5868
5869 return rc;
5870 }
5871
5872 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5873 unsigned char lunaddr[],
5874 int reply_queue)
5875 {
5876 int first_queue;
5877 int last_queue;
5878 int rq;
5879 int rc = 0;
5880 struct CommandList *c;
5881
5882 c = cmd_alloc(h);
5883
5884 /*
5885 * If no specific reply queue was requested, then send the TUR
5886 * repeatedly, requesting a reply on each reply queue; otherwise execute
5887 * the loop exactly once using only the specified queue.
5888 */
5889 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5890 first_queue = 0;
5891 last_queue = h->nreply_queues - 1;
5892 } else {
5893 first_queue = reply_queue;
5894 last_queue = reply_queue;
5895 }
5896
5897 for (rq = first_queue; rq <= last_queue; rq++) {
5898 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5899 if (rc)
5900 break;
5901 }
5902
5903 if (rc)
5904 dev_warn(&h->pdev->dev, "giving up on device.\n");
5905 else
5906 dev_warn(&h->pdev->dev, "device is ready.\n");
5907
5908 cmd_free(h, c);
5909 return rc;
5910 }
5911
5912 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5913 * complaining. Doing a host- or bus-reset can't do anything good here.
5914 */
5915 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5916 {
5917 int rc = SUCCESS;
5918 struct ctlr_info *h;
5919 struct hpsa_scsi_dev_t *dev;
5920 u8 reset_type;
5921 char msg[48];
5922 unsigned long flags;
5923
5924 /* find the controller to which the command to be aborted was sent */
5925 h = sdev_to_hba(scsicmd->device);
5926 if (h == NULL) /* paranoia */
5927 return FAILED;
5928
5929 spin_lock_irqsave(&h->reset_lock, flags);
5930 h->reset_in_progress = 1;
5931 spin_unlock_irqrestore(&h->reset_lock, flags);
5932
5933 if (lockup_detected(h)) {
5934 rc = FAILED;
5935 goto return_reset_status;
5936 }
5937
5938 dev = scsicmd->device->hostdata;
5939 if (!dev) {
5940 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5941 rc = FAILED;
5942 goto return_reset_status;
5943 }
5944
5945 if (dev->devtype == TYPE_ENCLOSURE) {
5946 rc = SUCCESS;
5947 goto return_reset_status;
5948 }
5949
5950 /* if controller locked up, we can guarantee command won't complete */
5951 if (lockup_detected(h)) {
5952 snprintf(msg, sizeof(msg),
5953 "cmd %d RESET FAILED, lockup detected",
5954 hpsa_get_cmd_index(scsicmd));
5955 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5956 rc = FAILED;
5957 goto return_reset_status;
5958 }
5959
5960 /* this reset request might be the result of a lockup; check */
5961 if (detect_controller_lockup(h)) {
5962 snprintf(msg, sizeof(msg),
5963 "cmd %d RESET FAILED, new lockup detected",
5964 hpsa_get_cmd_index(scsicmd));
5965 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5966 rc = FAILED;
5967 goto return_reset_status;
5968 }
5969
5970 /* Do not attempt on controller */
5971 if (is_hba_lunid(dev->scsi3addr)) {
5972 rc = SUCCESS;
5973 goto return_reset_status;
5974 }
5975
5976 if (is_logical_dev_addr_mode(dev->scsi3addr))
5977 reset_type = HPSA_DEVICE_RESET_MSG;
5978 else
5979 reset_type = HPSA_PHYS_TARGET_RESET;
5980
5981 sprintf(msg, "resetting %s",
5982 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5983 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5984
5985 /* send a reset to the SCSI LUN which the command was sent to */
5986 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5987 DEFAULT_REPLY_QUEUE);
5988 if (rc == 0)
5989 rc = SUCCESS;
5990 else
5991 rc = FAILED;
5992
5993 sprintf(msg, "reset %s %s",
5994 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5995 rc == SUCCESS ? "completed successfully" : "failed");
5996 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5997
5998 return_reset_status:
5999 spin_lock_irqsave(&h->reset_lock, flags);
6000 h->reset_in_progress = 0;
6001 spin_unlock_irqrestore(&h->reset_lock, flags);
6002 return rc;
6003 }
6004
6005 /*
6006 * For operations with an associated SCSI command, a command block is allocated
6007 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6008 * block request tag as an index into a table of entries. cmd_tagged_free() is
6009 * the complement, although cmd_free() may be called instead.
6010 */
6011 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6012 struct scsi_cmnd *scmd)
6013 {
6014 int idx = hpsa_get_cmd_index(scmd);
6015 struct CommandList *c = h->cmd_pool + idx;
6016
6017 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6018 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6019 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6020 /* The index value comes from the block layer, so if it's out of
6021 * bounds, it's probably not our bug.
6022 */
6023 BUG();
6024 }
6025
6026 atomic_inc(&c->refcount);
6027 if (unlikely(!hpsa_is_cmd_idle(c))) {
6028 /*
6029 * We expect that the SCSI layer will hand us a unique tag
6030 * value. Thus, there should never be a collision here between
6031 * two requests...because if the selected command isn't idle
6032 * then someone is going to be very disappointed.
6033 */
6034 dev_err(&h->pdev->dev,
6035 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6036 idx);
6037 if (c->scsi_cmd != NULL)
6038 scsi_print_command(c->scsi_cmd);
6039 scsi_print_command(scmd);
6040 }
6041
6042 hpsa_cmd_partial_init(h, idx, c);
6043 return c;
6044 }
6045
6046 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6047 {
6048 /*
6049 * Release our reference to the block. We don't need to do anything
6050 * else to free it, because it is accessed by index.
6051 */
6052 (void)atomic_dec(&c->refcount);
6053 }
6054
6055 /*
6056 * For operations that cannot sleep, a command block is allocated at init,
6057 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6058 * which ones are free or in use. Lock must be held when calling this.
6059 * cmd_free() is the complement.
6060 * This function never gives up and returns NULL. If it hangs,
6061 * another thread must call cmd_free() to free some tags.
6062 */
6063
6064 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6065 {
6066 struct CommandList *c;
6067 int refcount, i;
6068 int offset = 0;
6069
6070 /*
6071 * There is some *extremely* small but non-zero chance that that
6072 * multiple threads could get in here, and one thread could
6073 * be scanning through the list of bits looking for a free
6074 * one, but the free ones are always behind him, and other
6075 * threads sneak in behind him and eat them before he can
6076 * get to them, so that while there is always a free one, a
6077 * very unlucky thread might be starved anyway, never able to
6078 * beat the other threads. In reality, this happens so
6079 * infrequently as to be indistinguishable from never.
6080 *
6081 * Note that we start allocating commands before the SCSI host structure
6082 * is initialized. Since the search starts at bit zero, this
6083 * all works, since we have at least one command structure available;
6084 * however, it means that the structures with the low indexes have to be
6085 * reserved for driver-initiated requests, while requests from the block
6086 * layer will use the higher indexes.
6087 */
6088
6089 for (;;) {
6090 i = find_next_zero_bit(h->cmd_pool_bits,
6091 HPSA_NRESERVED_CMDS,
6092 offset);
6093 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6094 offset = 0;
6095 continue;
6096 }
6097 c = h->cmd_pool + i;
6098 refcount = atomic_inc_return(&c->refcount);
6099 if (unlikely(refcount > 1)) {
6100 cmd_free(h, c); /* already in use */
6101 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6102 continue;
6103 }
6104 set_bit(i & (BITS_PER_LONG - 1),
6105 h->cmd_pool_bits + (i / BITS_PER_LONG));
6106 break; /* it's ours now. */
6107 }
6108 hpsa_cmd_partial_init(h, i, c);
6109 return c;
6110 }
6111
6112 /*
6113 * This is the complementary operation to cmd_alloc(). Note, however, in some
6114 * corner cases it may also be used to free blocks allocated by
6115 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6116 * the clear-bit is harmless.
6117 */
6118 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6119 {
6120 if (atomic_dec_and_test(&c->refcount)) {
6121 int i;
6122
6123 i = c - h->cmd_pool;
6124 clear_bit(i & (BITS_PER_LONG - 1),
6125 h->cmd_pool_bits + (i / BITS_PER_LONG));
6126 }
6127 }
6128
6129 #ifdef CONFIG_COMPAT
6130
6131 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6132 void __user *arg)
6133 {
6134 IOCTL32_Command_struct __user *arg32 =
6135 (IOCTL32_Command_struct __user *) arg;
6136 IOCTL_Command_struct arg64;
6137 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6138 int err;
6139 u32 cp;
6140
6141 memset(&arg64, 0, sizeof(arg64));
6142 err = 0;
6143 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6144 sizeof(arg64.LUN_info));
6145 err |= copy_from_user(&arg64.Request, &arg32->Request,
6146 sizeof(arg64.Request));
6147 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6148 sizeof(arg64.error_info));
6149 err |= get_user(arg64.buf_size, &arg32->buf_size);
6150 err |= get_user(cp, &arg32->buf);
6151 arg64.buf = compat_ptr(cp);
6152 err |= copy_to_user(p, &arg64, sizeof(arg64));
6153
6154 if (err)
6155 return -EFAULT;
6156
6157 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6158 if (err)
6159 return err;
6160 err |= copy_in_user(&arg32->error_info, &p->error_info,
6161 sizeof(arg32->error_info));
6162 if (err)
6163 return -EFAULT;
6164 return err;
6165 }
6166
6167 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6168 int cmd, void __user *arg)
6169 {
6170 BIG_IOCTL32_Command_struct __user *arg32 =
6171 (BIG_IOCTL32_Command_struct __user *) arg;
6172 BIG_IOCTL_Command_struct arg64;
6173 BIG_IOCTL_Command_struct __user *p =
6174 compat_alloc_user_space(sizeof(arg64));
6175 int err;
6176 u32 cp;
6177
6178 memset(&arg64, 0, sizeof(arg64));
6179 err = 0;
6180 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6181 sizeof(arg64.LUN_info));
6182 err |= copy_from_user(&arg64.Request, &arg32->Request,
6183 sizeof(arg64.Request));
6184 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6185 sizeof(arg64.error_info));
6186 err |= get_user(arg64.buf_size, &arg32->buf_size);
6187 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6188 err |= get_user(cp, &arg32->buf);
6189 arg64.buf = compat_ptr(cp);
6190 err |= copy_to_user(p, &arg64, sizeof(arg64));
6191
6192 if (err)
6193 return -EFAULT;
6194
6195 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6196 if (err)
6197 return err;
6198 err |= copy_in_user(&arg32->error_info, &p->error_info,
6199 sizeof(arg32->error_info));
6200 if (err)
6201 return -EFAULT;
6202 return err;
6203 }
6204
6205 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6206 {
6207 switch (cmd) {
6208 case CCISS_GETPCIINFO:
6209 case CCISS_GETINTINFO:
6210 case CCISS_SETINTINFO:
6211 case CCISS_GETNODENAME:
6212 case CCISS_SETNODENAME:
6213 case CCISS_GETHEARTBEAT:
6214 case CCISS_GETBUSTYPES:
6215 case CCISS_GETFIRMVER:
6216 case CCISS_GETDRIVVER:
6217 case CCISS_REVALIDVOLS:
6218 case CCISS_DEREGDISK:
6219 case CCISS_REGNEWDISK:
6220 case CCISS_REGNEWD:
6221 case CCISS_RESCANDISK:
6222 case CCISS_GETLUNINFO:
6223 return hpsa_ioctl(dev, cmd, arg);
6224
6225 case CCISS_PASSTHRU32:
6226 return hpsa_ioctl32_passthru(dev, cmd, arg);
6227 case CCISS_BIG_PASSTHRU32:
6228 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6229
6230 default:
6231 return -ENOIOCTLCMD;
6232 }
6233 }
6234 #endif
6235
6236 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6237 {
6238 struct hpsa_pci_info pciinfo;
6239
6240 if (!argp)
6241 return -EINVAL;
6242 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6243 pciinfo.bus = h->pdev->bus->number;
6244 pciinfo.dev_fn = h->pdev->devfn;
6245 pciinfo.board_id = h->board_id;
6246 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6247 return -EFAULT;
6248 return 0;
6249 }
6250
6251 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6252 {
6253 DriverVer_type DriverVer;
6254 unsigned char vmaj, vmin, vsubmin;
6255 int rc;
6256
6257 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6258 &vmaj, &vmin, &vsubmin);
6259 if (rc != 3) {
6260 dev_info(&h->pdev->dev, "driver version string '%s' "
6261 "unrecognized.", HPSA_DRIVER_VERSION);
6262 vmaj = 0;
6263 vmin = 0;
6264 vsubmin = 0;
6265 }
6266 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6267 if (!argp)
6268 return -EINVAL;
6269 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6270 return -EFAULT;
6271 return 0;
6272 }
6273
6274 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6275 {
6276 IOCTL_Command_struct iocommand;
6277 struct CommandList *c;
6278 char *buff = NULL;
6279 u64 temp64;
6280 int rc = 0;
6281
6282 if (!argp)
6283 return -EINVAL;
6284 if (!capable(CAP_SYS_RAWIO))
6285 return -EPERM;
6286 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6287 return -EFAULT;
6288 if ((iocommand.buf_size < 1) &&
6289 (iocommand.Request.Type.Direction != XFER_NONE)) {
6290 return -EINVAL;
6291 }
6292 if (iocommand.buf_size > 0) {
6293 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6294 if (buff == NULL)
6295 return -ENOMEM;
6296 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6297 /* Copy the data into the buffer we created */
6298 if (copy_from_user(buff, iocommand.buf,
6299 iocommand.buf_size)) {
6300 rc = -EFAULT;
6301 goto out_kfree;
6302 }
6303 } else {
6304 memset(buff, 0, iocommand.buf_size);
6305 }
6306 }
6307 c = cmd_alloc(h);
6308
6309 /* Fill in the command type */
6310 c->cmd_type = CMD_IOCTL_PEND;
6311 c->scsi_cmd = SCSI_CMD_BUSY;
6312 /* Fill in Command Header */
6313 c->Header.ReplyQueue = 0; /* unused in simple mode */
6314 if (iocommand.buf_size > 0) { /* buffer to fill */
6315 c->Header.SGList = 1;
6316 c->Header.SGTotal = cpu_to_le16(1);
6317 } else { /* no buffers to fill */
6318 c->Header.SGList = 0;
6319 c->Header.SGTotal = cpu_to_le16(0);
6320 }
6321 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6322
6323 /* Fill in Request block */
6324 memcpy(&c->Request, &iocommand.Request,
6325 sizeof(c->Request));
6326
6327 /* Fill in the scatter gather information */
6328 if (iocommand.buf_size > 0) {
6329 temp64 = pci_map_single(h->pdev, buff,
6330 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6331 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6332 c->SG[0].Addr = cpu_to_le64(0);
6333 c->SG[0].Len = cpu_to_le32(0);
6334 rc = -ENOMEM;
6335 goto out;
6336 }
6337 c->SG[0].Addr = cpu_to_le64(temp64);
6338 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6339 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6340 }
6341 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6342 NO_TIMEOUT);
6343 if (iocommand.buf_size > 0)
6344 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6345 check_ioctl_unit_attention(h, c);
6346 if (rc) {
6347 rc = -EIO;
6348 goto out;
6349 }
6350
6351 /* Copy the error information out */
6352 memcpy(&iocommand.error_info, c->err_info,
6353 sizeof(iocommand.error_info));
6354 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6355 rc = -EFAULT;
6356 goto out;
6357 }
6358 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6359 iocommand.buf_size > 0) {
6360 /* Copy the data out of the buffer we created */
6361 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6362 rc = -EFAULT;
6363 goto out;
6364 }
6365 }
6366 out:
6367 cmd_free(h, c);
6368 out_kfree:
6369 kfree(buff);
6370 return rc;
6371 }
6372
6373 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6374 {
6375 BIG_IOCTL_Command_struct *ioc;
6376 struct CommandList *c;
6377 unsigned char **buff = NULL;
6378 int *buff_size = NULL;
6379 u64 temp64;
6380 BYTE sg_used = 0;
6381 int status = 0;
6382 u32 left;
6383 u32 sz;
6384 BYTE __user *data_ptr;
6385
6386 if (!argp)
6387 return -EINVAL;
6388 if (!capable(CAP_SYS_RAWIO))
6389 return -EPERM;
6390 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6391 if (!ioc) {
6392 status = -ENOMEM;
6393 goto cleanup1;
6394 }
6395 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6396 status = -EFAULT;
6397 goto cleanup1;
6398 }
6399 if ((ioc->buf_size < 1) &&
6400 (ioc->Request.Type.Direction != XFER_NONE)) {
6401 status = -EINVAL;
6402 goto cleanup1;
6403 }
6404 /* Check kmalloc limits using all SGs */
6405 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6406 status = -EINVAL;
6407 goto cleanup1;
6408 }
6409 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6410 status = -EINVAL;
6411 goto cleanup1;
6412 }
6413 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6414 if (!buff) {
6415 status = -ENOMEM;
6416 goto cleanup1;
6417 }
6418 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
6419 if (!buff_size) {
6420 status = -ENOMEM;
6421 goto cleanup1;
6422 }
6423 left = ioc->buf_size;
6424 data_ptr = ioc->buf;
6425 while (left) {
6426 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6427 buff_size[sg_used] = sz;
6428 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6429 if (buff[sg_used] == NULL) {
6430 status = -ENOMEM;
6431 goto cleanup1;
6432 }
6433 if (ioc->Request.Type.Direction & XFER_WRITE) {
6434 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6435 status = -EFAULT;
6436 goto cleanup1;
6437 }
6438 } else
6439 memset(buff[sg_used], 0, sz);
6440 left -= sz;
6441 data_ptr += sz;
6442 sg_used++;
6443 }
6444 c = cmd_alloc(h);
6445
6446 c->cmd_type = CMD_IOCTL_PEND;
6447 c->scsi_cmd = SCSI_CMD_BUSY;
6448 c->Header.ReplyQueue = 0;
6449 c->Header.SGList = (u8) sg_used;
6450 c->Header.SGTotal = cpu_to_le16(sg_used);
6451 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6452 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6453 if (ioc->buf_size > 0) {
6454 int i;
6455 for (i = 0; i < sg_used; i++) {
6456 temp64 = pci_map_single(h->pdev, buff[i],
6457 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6458 if (dma_mapping_error(&h->pdev->dev,
6459 (dma_addr_t) temp64)) {
6460 c->SG[i].Addr = cpu_to_le64(0);
6461 c->SG[i].Len = cpu_to_le32(0);
6462 hpsa_pci_unmap(h->pdev, c, i,
6463 PCI_DMA_BIDIRECTIONAL);
6464 status = -ENOMEM;
6465 goto cleanup0;
6466 }
6467 c->SG[i].Addr = cpu_to_le64(temp64);
6468 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6469 c->SG[i].Ext = cpu_to_le32(0);
6470 }
6471 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6472 }
6473 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6474 NO_TIMEOUT);
6475 if (sg_used)
6476 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6477 check_ioctl_unit_attention(h, c);
6478 if (status) {
6479 status = -EIO;
6480 goto cleanup0;
6481 }
6482
6483 /* Copy the error information out */
6484 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6485 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6486 status = -EFAULT;
6487 goto cleanup0;
6488 }
6489 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6490 int i;
6491
6492 /* Copy the data out of the buffer we created */
6493 BYTE __user *ptr = ioc->buf;
6494 for (i = 0; i < sg_used; i++) {
6495 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6496 status = -EFAULT;
6497 goto cleanup0;
6498 }
6499 ptr += buff_size[i];
6500 }
6501 }
6502 status = 0;
6503 cleanup0:
6504 cmd_free(h, c);
6505 cleanup1:
6506 if (buff) {
6507 int i;
6508
6509 for (i = 0; i < sg_used; i++)
6510 kfree(buff[i]);
6511 kfree(buff);
6512 }
6513 kfree(buff_size);
6514 kfree(ioc);
6515 return status;
6516 }
6517
6518 static void check_ioctl_unit_attention(struct ctlr_info *h,
6519 struct CommandList *c)
6520 {
6521 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6522 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6523 (void) check_for_unit_attention(h, c);
6524 }
6525
6526 /*
6527 * ioctl
6528 */
6529 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6530 {
6531 struct ctlr_info *h;
6532 void __user *argp = (void __user *)arg;
6533 int rc;
6534
6535 h = sdev_to_hba(dev);
6536
6537 switch (cmd) {
6538 case CCISS_DEREGDISK:
6539 case CCISS_REGNEWDISK:
6540 case CCISS_REGNEWD:
6541 hpsa_scan_start(h->scsi_host);
6542 return 0;
6543 case CCISS_GETPCIINFO:
6544 return hpsa_getpciinfo_ioctl(h, argp);
6545 case CCISS_GETDRIVVER:
6546 return hpsa_getdrivver_ioctl(h, argp);
6547 case CCISS_PASSTHRU:
6548 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6549 return -EAGAIN;
6550 rc = hpsa_passthru_ioctl(h, argp);
6551 atomic_inc(&h->passthru_cmds_avail);
6552 return rc;
6553 case CCISS_BIG_PASSTHRU:
6554 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6555 return -EAGAIN;
6556 rc = hpsa_big_passthru_ioctl(h, argp);
6557 atomic_inc(&h->passthru_cmds_avail);
6558 return rc;
6559 default:
6560 return -ENOTTY;
6561 }
6562 }
6563
6564 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6565 u8 reset_type)
6566 {
6567 struct CommandList *c;
6568
6569 c = cmd_alloc(h);
6570
6571 /* fill_cmd can't fail here, no data buffer to map */
6572 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6573 RAID_CTLR_LUNID, TYPE_MSG);
6574 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6575 c->waiting = NULL;
6576 enqueue_cmd_and_start_io(h, c);
6577 /* Don't wait for completion, the reset won't complete. Don't free
6578 * the command either. This is the last command we will send before
6579 * re-initializing everything, so it doesn't matter and won't leak.
6580 */
6581 return;
6582 }
6583
6584 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6585 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6586 int cmd_type)
6587 {
6588 int pci_dir = XFER_NONE;
6589
6590 c->cmd_type = CMD_IOCTL_PEND;
6591 c->scsi_cmd = SCSI_CMD_BUSY;
6592 c->Header.ReplyQueue = 0;
6593 if (buff != NULL && size > 0) {
6594 c->Header.SGList = 1;
6595 c->Header.SGTotal = cpu_to_le16(1);
6596 } else {
6597 c->Header.SGList = 0;
6598 c->Header.SGTotal = cpu_to_le16(0);
6599 }
6600 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6601
6602 if (cmd_type == TYPE_CMD) {
6603 switch (cmd) {
6604 case HPSA_INQUIRY:
6605 /* are we trying to read a vital product page */
6606 if (page_code & VPD_PAGE) {
6607 c->Request.CDB[1] = 0x01;
6608 c->Request.CDB[2] = (page_code & 0xff);
6609 }
6610 c->Request.CDBLen = 6;
6611 c->Request.type_attr_dir =
6612 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6613 c->Request.Timeout = 0;
6614 c->Request.CDB[0] = HPSA_INQUIRY;
6615 c->Request.CDB[4] = size & 0xFF;
6616 break;
6617 case RECEIVE_DIAGNOSTIC:
6618 c->Request.CDBLen = 6;
6619 c->Request.type_attr_dir =
6620 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6621 c->Request.Timeout = 0;
6622 c->Request.CDB[0] = cmd;
6623 c->Request.CDB[1] = 1;
6624 c->Request.CDB[2] = 1;
6625 c->Request.CDB[3] = (size >> 8) & 0xFF;
6626 c->Request.CDB[4] = size & 0xFF;
6627 break;
6628 case HPSA_REPORT_LOG:
6629 case HPSA_REPORT_PHYS:
6630 /* Talking to controller so It's a physical command
6631 mode = 00 target = 0. Nothing to write.
6632 */
6633 c->Request.CDBLen = 12;
6634 c->Request.type_attr_dir =
6635 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6636 c->Request.Timeout = 0;
6637 c->Request.CDB[0] = cmd;
6638 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6639 c->Request.CDB[7] = (size >> 16) & 0xFF;
6640 c->Request.CDB[8] = (size >> 8) & 0xFF;
6641 c->Request.CDB[9] = size & 0xFF;
6642 break;
6643 case BMIC_SENSE_DIAG_OPTIONS:
6644 c->Request.CDBLen = 16;
6645 c->Request.type_attr_dir =
6646 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6647 c->Request.Timeout = 0;
6648 /* Spec says this should be BMIC_WRITE */
6649 c->Request.CDB[0] = BMIC_READ;
6650 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6651 break;
6652 case BMIC_SET_DIAG_OPTIONS:
6653 c->Request.CDBLen = 16;
6654 c->Request.type_attr_dir =
6655 TYPE_ATTR_DIR(cmd_type,
6656 ATTR_SIMPLE, XFER_WRITE);
6657 c->Request.Timeout = 0;
6658 c->Request.CDB[0] = BMIC_WRITE;
6659 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6660 break;
6661 case HPSA_CACHE_FLUSH:
6662 c->Request.CDBLen = 12;
6663 c->Request.type_attr_dir =
6664 TYPE_ATTR_DIR(cmd_type,
6665 ATTR_SIMPLE, XFER_WRITE);
6666 c->Request.Timeout = 0;
6667 c->Request.CDB[0] = BMIC_WRITE;
6668 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6669 c->Request.CDB[7] = (size >> 8) & 0xFF;
6670 c->Request.CDB[8] = size & 0xFF;
6671 break;
6672 case TEST_UNIT_READY:
6673 c->Request.CDBLen = 6;
6674 c->Request.type_attr_dir =
6675 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6676 c->Request.Timeout = 0;
6677 break;
6678 case HPSA_GET_RAID_MAP:
6679 c->Request.CDBLen = 12;
6680 c->Request.type_attr_dir =
6681 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6682 c->Request.Timeout = 0;
6683 c->Request.CDB[0] = HPSA_CISS_READ;
6684 c->Request.CDB[1] = cmd;
6685 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6686 c->Request.CDB[7] = (size >> 16) & 0xFF;
6687 c->Request.CDB[8] = (size >> 8) & 0xFF;
6688 c->Request.CDB[9] = size & 0xFF;
6689 break;
6690 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6691 c->Request.CDBLen = 10;
6692 c->Request.type_attr_dir =
6693 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6694 c->Request.Timeout = 0;
6695 c->Request.CDB[0] = BMIC_READ;
6696 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6697 c->Request.CDB[7] = (size >> 16) & 0xFF;
6698 c->Request.CDB[8] = (size >> 8) & 0xFF;
6699 break;
6700 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6701 c->Request.CDBLen = 10;
6702 c->Request.type_attr_dir =
6703 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6704 c->Request.Timeout = 0;
6705 c->Request.CDB[0] = BMIC_READ;
6706 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6707 c->Request.CDB[7] = (size >> 16) & 0xFF;
6708 c->Request.CDB[8] = (size >> 8) & 0XFF;
6709 break;
6710 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6711 c->Request.CDBLen = 10;
6712 c->Request.type_attr_dir =
6713 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6714 c->Request.Timeout = 0;
6715 c->Request.CDB[0] = BMIC_READ;
6716 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6717 c->Request.CDB[7] = (size >> 16) & 0xFF;
6718 c->Request.CDB[8] = (size >> 8) & 0XFF;
6719 break;
6720 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6721 c->Request.CDBLen = 10;
6722 c->Request.type_attr_dir =
6723 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6724 c->Request.Timeout = 0;
6725 c->Request.CDB[0] = BMIC_READ;
6726 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6727 c->Request.CDB[7] = (size >> 16) & 0xFF;
6728 c->Request.CDB[8] = (size >> 8) & 0XFF;
6729 break;
6730 case BMIC_IDENTIFY_CONTROLLER:
6731 c->Request.CDBLen = 10;
6732 c->Request.type_attr_dir =
6733 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6734 c->Request.Timeout = 0;
6735 c->Request.CDB[0] = BMIC_READ;
6736 c->Request.CDB[1] = 0;
6737 c->Request.CDB[2] = 0;
6738 c->Request.CDB[3] = 0;
6739 c->Request.CDB[4] = 0;
6740 c->Request.CDB[5] = 0;
6741 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6742 c->Request.CDB[7] = (size >> 16) & 0xFF;
6743 c->Request.CDB[8] = (size >> 8) & 0XFF;
6744 c->Request.CDB[9] = 0;
6745 break;
6746 default:
6747 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6748 BUG();
6749 }
6750 } else if (cmd_type == TYPE_MSG) {
6751 switch (cmd) {
6752
6753 case HPSA_PHYS_TARGET_RESET:
6754 c->Request.CDBLen = 16;
6755 c->Request.type_attr_dir =
6756 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6757 c->Request.Timeout = 0; /* Don't time out */
6758 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6759 c->Request.CDB[0] = HPSA_RESET;
6760 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6761 /* Physical target reset needs no control bytes 4-7*/
6762 c->Request.CDB[4] = 0x00;
6763 c->Request.CDB[5] = 0x00;
6764 c->Request.CDB[6] = 0x00;
6765 c->Request.CDB[7] = 0x00;
6766 break;
6767 case HPSA_DEVICE_RESET_MSG:
6768 c->Request.CDBLen = 16;
6769 c->Request.type_attr_dir =
6770 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6771 c->Request.Timeout = 0; /* Don't time out */
6772 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6773 c->Request.CDB[0] = cmd;
6774 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6775 /* If bytes 4-7 are zero, it means reset the */
6776 /* LunID device */
6777 c->Request.CDB[4] = 0x00;
6778 c->Request.CDB[5] = 0x00;
6779 c->Request.CDB[6] = 0x00;
6780 c->Request.CDB[7] = 0x00;
6781 break;
6782 default:
6783 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6784 cmd);
6785 BUG();
6786 }
6787 } else {
6788 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6789 BUG();
6790 }
6791
6792 switch (GET_DIR(c->Request.type_attr_dir)) {
6793 case XFER_READ:
6794 pci_dir = PCI_DMA_FROMDEVICE;
6795 break;
6796 case XFER_WRITE:
6797 pci_dir = PCI_DMA_TODEVICE;
6798 break;
6799 case XFER_NONE:
6800 pci_dir = PCI_DMA_NONE;
6801 break;
6802 default:
6803 pci_dir = PCI_DMA_BIDIRECTIONAL;
6804 }
6805 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6806 return -1;
6807 return 0;
6808 }
6809
6810 /*
6811 * Map (physical) PCI mem into (virtual) kernel space
6812 */
6813 static void __iomem *remap_pci_mem(ulong base, ulong size)
6814 {
6815 ulong page_base = ((ulong) base) & PAGE_MASK;
6816 ulong page_offs = ((ulong) base) - page_base;
6817 void __iomem *page_remapped = ioremap_nocache(page_base,
6818 page_offs + size);
6819
6820 return page_remapped ? (page_remapped + page_offs) : NULL;
6821 }
6822
6823 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6824 {
6825 return h->access.command_completed(h, q);
6826 }
6827
6828 static inline bool interrupt_pending(struct ctlr_info *h)
6829 {
6830 return h->access.intr_pending(h);
6831 }
6832
6833 static inline long interrupt_not_for_us(struct ctlr_info *h)
6834 {
6835 return (h->access.intr_pending(h) == 0) ||
6836 (h->interrupts_enabled == 0);
6837 }
6838
6839 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6840 u32 raw_tag)
6841 {
6842 if (unlikely(tag_index >= h->nr_cmds)) {
6843 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6844 return 1;
6845 }
6846 return 0;
6847 }
6848
6849 static inline void finish_cmd(struct CommandList *c)
6850 {
6851 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6852 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6853 || c->cmd_type == CMD_IOACCEL2))
6854 complete_scsi_command(c);
6855 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6856 complete(c->waiting);
6857 }
6858
6859 /* process completion of an indexed ("direct lookup") command */
6860 static inline void process_indexed_cmd(struct ctlr_info *h,
6861 u32 raw_tag)
6862 {
6863 u32 tag_index;
6864 struct CommandList *c;
6865
6866 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6867 if (!bad_tag(h, tag_index, raw_tag)) {
6868 c = h->cmd_pool + tag_index;
6869 finish_cmd(c);
6870 }
6871 }
6872
6873 /* Some controllers, like p400, will give us one interrupt
6874 * after a soft reset, even if we turned interrupts off.
6875 * Only need to check for this in the hpsa_xxx_discard_completions
6876 * functions.
6877 */
6878 static int ignore_bogus_interrupt(struct ctlr_info *h)
6879 {
6880 if (likely(!reset_devices))
6881 return 0;
6882
6883 if (likely(h->interrupts_enabled))
6884 return 0;
6885
6886 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6887 "(known firmware bug.) Ignoring.\n");
6888
6889 return 1;
6890 }
6891
6892 /*
6893 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6894 * Relies on (h-q[x] == x) being true for x such that
6895 * 0 <= x < MAX_REPLY_QUEUES.
6896 */
6897 static struct ctlr_info *queue_to_hba(u8 *queue)
6898 {
6899 return container_of((queue - *queue), struct ctlr_info, q[0]);
6900 }
6901
6902 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6903 {
6904 struct ctlr_info *h = queue_to_hba(queue);
6905 u8 q = *(u8 *) queue;
6906 u32 raw_tag;
6907
6908 if (ignore_bogus_interrupt(h))
6909 return IRQ_NONE;
6910
6911 if (interrupt_not_for_us(h))
6912 return IRQ_NONE;
6913 h->last_intr_timestamp = get_jiffies_64();
6914 while (interrupt_pending(h)) {
6915 raw_tag = get_next_completion(h, q);
6916 while (raw_tag != FIFO_EMPTY)
6917 raw_tag = next_command(h, q);
6918 }
6919 return IRQ_HANDLED;
6920 }
6921
6922 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6923 {
6924 struct ctlr_info *h = queue_to_hba(queue);
6925 u32 raw_tag;
6926 u8 q = *(u8 *) queue;
6927
6928 if (ignore_bogus_interrupt(h))
6929 return IRQ_NONE;
6930
6931 h->last_intr_timestamp = get_jiffies_64();
6932 raw_tag = get_next_completion(h, q);
6933 while (raw_tag != FIFO_EMPTY)
6934 raw_tag = next_command(h, q);
6935 return IRQ_HANDLED;
6936 }
6937
6938 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6939 {
6940 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6941 u32 raw_tag;
6942 u8 q = *(u8 *) queue;
6943
6944 if (interrupt_not_for_us(h))
6945 return IRQ_NONE;
6946 h->last_intr_timestamp = get_jiffies_64();
6947 while (interrupt_pending(h)) {
6948 raw_tag = get_next_completion(h, q);
6949 while (raw_tag != FIFO_EMPTY) {
6950 process_indexed_cmd(h, raw_tag);
6951 raw_tag = next_command(h, q);
6952 }
6953 }
6954 return IRQ_HANDLED;
6955 }
6956
6957 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6958 {
6959 struct ctlr_info *h = queue_to_hba(queue);
6960 u32 raw_tag;
6961 u8 q = *(u8 *) queue;
6962
6963 h->last_intr_timestamp = get_jiffies_64();
6964 raw_tag = get_next_completion(h, q);
6965 while (raw_tag != FIFO_EMPTY) {
6966 process_indexed_cmd(h, raw_tag);
6967 raw_tag = next_command(h, q);
6968 }
6969 return IRQ_HANDLED;
6970 }
6971
6972 /* Send a message CDB to the firmware. Careful, this only works
6973 * in simple mode, not performant mode due to the tag lookup.
6974 * We only ever use this immediately after a controller reset.
6975 */
6976 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6977 unsigned char type)
6978 {
6979 struct Command {
6980 struct CommandListHeader CommandHeader;
6981 struct RequestBlock Request;
6982 struct ErrDescriptor ErrorDescriptor;
6983 };
6984 struct Command *cmd;
6985 static const size_t cmd_sz = sizeof(*cmd) +
6986 sizeof(cmd->ErrorDescriptor);
6987 dma_addr_t paddr64;
6988 __le32 paddr32;
6989 u32 tag;
6990 void __iomem *vaddr;
6991 int i, err;
6992
6993 vaddr = pci_ioremap_bar(pdev, 0);
6994 if (vaddr == NULL)
6995 return -ENOMEM;
6996
6997 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6998 * CCISS commands, so they must be allocated from the lower 4GiB of
6999 * memory.
7000 */
7001 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7002 if (err) {
7003 iounmap(vaddr);
7004 return err;
7005 }
7006
7007 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7008 if (cmd == NULL) {
7009 iounmap(vaddr);
7010 return -ENOMEM;
7011 }
7012
7013 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7014 * although there's no guarantee, we assume that the address is at
7015 * least 4-byte aligned (most likely, it's page-aligned).
7016 */
7017 paddr32 = cpu_to_le32(paddr64);
7018
7019 cmd->CommandHeader.ReplyQueue = 0;
7020 cmd->CommandHeader.SGList = 0;
7021 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7022 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7023 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7024
7025 cmd->Request.CDBLen = 16;
7026 cmd->Request.type_attr_dir =
7027 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7028 cmd->Request.Timeout = 0; /* Don't time out */
7029 cmd->Request.CDB[0] = opcode;
7030 cmd->Request.CDB[1] = type;
7031 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7032 cmd->ErrorDescriptor.Addr =
7033 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7034 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7035
7036 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7037
7038 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7039 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7040 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7041 break;
7042 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7043 }
7044
7045 iounmap(vaddr);
7046
7047 /* we leak the DMA buffer here ... no choice since the controller could
7048 * still complete the command.
7049 */
7050 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7051 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7052 opcode, type);
7053 return -ETIMEDOUT;
7054 }
7055
7056 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7057
7058 if (tag & HPSA_ERROR_BIT) {
7059 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7060 opcode, type);
7061 return -EIO;
7062 }
7063
7064 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7065 opcode, type);
7066 return 0;
7067 }
7068
7069 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7070
7071 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7072 void __iomem *vaddr, u32 use_doorbell)
7073 {
7074
7075 if (use_doorbell) {
7076 /* For everything after the P600, the PCI power state method
7077 * of resetting the controller doesn't work, so we have this
7078 * other way using the doorbell register.
7079 */
7080 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7081 writel(use_doorbell, vaddr + SA5_DOORBELL);
7082
7083 /* PMC hardware guys tell us we need a 10 second delay after
7084 * doorbell reset and before any attempt to talk to the board
7085 * at all to ensure that this actually works and doesn't fall
7086 * over in some weird corner cases.
7087 */
7088 msleep(10000);
7089 } else { /* Try to do it the PCI power state way */
7090
7091 /* Quoting from the Open CISS Specification: "The Power
7092 * Management Control/Status Register (CSR) controls the power
7093 * state of the device. The normal operating state is D0,
7094 * CSR=00h. The software off state is D3, CSR=03h. To reset
7095 * the controller, place the interface device in D3 then to D0,
7096 * this causes a secondary PCI reset which will reset the
7097 * controller." */
7098
7099 int rc = 0;
7100
7101 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7102
7103 /* enter the D3hot power management state */
7104 rc = pci_set_power_state(pdev, PCI_D3hot);
7105 if (rc)
7106 return rc;
7107
7108 msleep(500);
7109
7110 /* enter the D0 power management state */
7111 rc = pci_set_power_state(pdev, PCI_D0);
7112 if (rc)
7113 return rc;
7114
7115 /*
7116 * The P600 requires a small delay when changing states.
7117 * Otherwise we may think the board did not reset and we bail.
7118 * This for kdump only and is particular to the P600.
7119 */
7120 msleep(500);
7121 }
7122 return 0;
7123 }
7124
7125 static void init_driver_version(char *driver_version, int len)
7126 {
7127 memset(driver_version, 0, len);
7128 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7129 }
7130
7131 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7132 {
7133 char *driver_version;
7134 int i, size = sizeof(cfgtable->driver_version);
7135
7136 driver_version = kmalloc(size, GFP_KERNEL);
7137 if (!driver_version)
7138 return -ENOMEM;
7139
7140 init_driver_version(driver_version, size);
7141 for (i = 0; i < size; i++)
7142 writeb(driver_version[i], &cfgtable->driver_version[i]);
7143 kfree(driver_version);
7144 return 0;
7145 }
7146
7147 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7148 unsigned char *driver_ver)
7149 {
7150 int i;
7151
7152 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7153 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7154 }
7155
7156 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7157 {
7158
7159 char *driver_ver, *old_driver_ver;
7160 int rc, size = sizeof(cfgtable->driver_version);
7161
7162 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
7163 if (!old_driver_ver)
7164 return -ENOMEM;
7165 driver_ver = old_driver_ver + size;
7166
7167 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7168 * should have been changed, otherwise we know the reset failed.
7169 */
7170 init_driver_version(old_driver_ver, size);
7171 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7172 rc = !memcmp(driver_ver, old_driver_ver, size);
7173 kfree(old_driver_ver);
7174 return rc;
7175 }
7176 /* This does a hard reset of the controller using PCI power management
7177 * states or the using the doorbell register.
7178 */
7179 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7180 {
7181 u64 cfg_offset;
7182 u32 cfg_base_addr;
7183 u64 cfg_base_addr_index;
7184 void __iomem *vaddr;
7185 unsigned long paddr;
7186 u32 misc_fw_support;
7187 int rc;
7188 struct CfgTable __iomem *cfgtable;
7189 u32 use_doorbell;
7190 u16 command_register;
7191
7192 /* For controllers as old as the P600, this is very nearly
7193 * the same thing as
7194 *
7195 * pci_save_state(pci_dev);
7196 * pci_set_power_state(pci_dev, PCI_D3hot);
7197 * pci_set_power_state(pci_dev, PCI_D0);
7198 * pci_restore_state(pci_dev);
7199 *
7200 * For controllers newer than the P600, the pci power state
7201 * method of resetting doesn't work so we have another way
7202 * using the doorbell register.
7203 */
7204
7205 if (!ctlr_is_resettable(board_id)) {
7206 dev_warn(&pdev->dev, "Controller not resettable\n");
7207 return -ENODEV;
7208 }
7209
7210 /* if controller is soft- but not hard resettable... */
7211 if (!ctlr_is_hard_resettable(board_id))
7212 return -ENOTSUPP; /* try soft reset later. */
7213
7214 /* Save the PCI command register */
7215 pci_read_config_word(pdev, 4, &command_register);
7216 pci_save_state(pdev);
7217
7218 /* find the first memory BAR, so we can find the cfg table */
7219 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7220 if (rc)
7221 return rc;
7222 vaddr = remap_pci_mem(paddr, 0x250);
7223 if (!vaddr)
7224 return -ENOMEM;
7225
7226 /* find cfgtable in order to check if reset via doorbell is supported */
7227 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7228 &cfg_base_addr_index, &cfg_offset);
7229 if (rc)
7230 goto unmap_vaddr;
7231 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7232 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7233 if (!cfgtable) {
7234 rc = -ENOMEM;
7235 goto unmap_vaddr;
7236 }
7237 rc = write_driver_ver_to_cfgtable(cfgtable);
7238 if (rc)
7239 goto unmap_cfgtable;
7240
7241 /* If reset via doorbell register is supported, use that.
7242 * There are two such methods. Favor the newest method.
7243 */
7244 misc_fw_support = readl(&cfgtable->misc_fw_support);
7245 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7246 if (use_doorbell) {
7247 use_doorbell = DOORBELL_CTLR_RESET2;
7248 } else {
7249 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7250 if (use_doorbell) {
7251 dev_warn(&pdev->dev,
7252 "Soft reset not supported. Firmware update is required.\n");
7253 rc = -ENOTSUPP; /* try soft reset */
7254 goto unmap_cfgtable;
7255 }
7256 }
7257
7258 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7259 if (rc)
7260 goto unmap_cfgtable;
7261
7262 pci_restore_state(pdev);
7263 pci_write_config_word(pdev, 4, command_register);
7264
7265 /* Some devices (notably the HP Smart Array 5i Controller)
7266 need a little pause here */
7267 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7268
7269 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7270 if (rc) {
7271 dev_warn(&pdev->dev,
7272 "Failed waiting for board to become ready after hard reset\n");
7273 goto unmap_cfgtable;
7274 }
7275
7276 rc = controller_reset_failed(vaddr);
7277 if (rc < 0)
7278 goto unmap_cfgtable;
7279 if (rc) {
7280 dev_warn(&pdev->dev, "Unable to successfully reset "
7281 "controller. Will try soft reset.\n");
7282 rc = -ENOTSUPP;
7283 } else {
7284 dev_info(&pdev->dev, "board ready after hard reset.\n");
7285 }
7286
7287 unmap_cfgtable:
7288 iounmap(cfgtable);
7289
7290 unmap_vaddr:
7291 iounmap(vaddr);
7292 return rc;
7293 }
7294
7295 /*
7296 * We cannot read the structure directly, for portability we must use
7297 * the io functions.
7298 * This is for debug only.
7299 */
7300 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7301 {
7302 #ifdef HPSA_DEBUG
7303 int i;
7304 char temp_name[17];
7305
7306 dev_info(dev, "Controller Configuration information\n");
7307 dev_info(dev, "------------------------------------\n");
7308 for (i = 0; i < 4; i++)
7309 temp_name[i] = readb(&(tb->Signature[i]));
7310 temp_name[4] = '\0';
7311 dev_info(dev, " Signature = %s\n", temp_name);
7312 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7313 dev_info(dev, " Transport methods supported = 0x%x\n",
7314 readl(&(tb->TransportSupport)));
7315 dev_info(dev, " Transport methods active = 0x%x\n",
7316 readl(&(tb->TransportActive)));
7317 dev_info(dev, " Requested transport Method = 0x%x\n",
7318 readl(&(tb->HostWrite.TransportRequest)));
7319 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7320 readl(&(tb->HostWrite.CoalIntDelay)));
7321 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7322 readl(&(tb->HostWrite.CoalIntCount)));
7323 dev_info(dev, " Max outstanding commands = %d\n",
7324 readl(&(tb->CmdsOutMax)));
7325 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7326 for (i = 0; i < 16; i++)
7327 temp_name[i] = readb(&(tb->ServerName[i]));
7328 temp_name[16] = '\0';
7329 dev_info(dev, " Server Name = %s\n", temp_name);
7330 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7331 readl(&(tb->HeartBeat)));
7332 #endif /* HPSA_DEBUG */
7333 }
7334
7335 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7336 {
7337 int i, offset, mem_type, bar_type;
7338
7339 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7340 return 0;
7341 offset = 0;
7342 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7343 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7344 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7345 offset += 4;
7346 else {
7347 mem_type = pci_resource_flags(pdev, i) &
7348 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7349 switch (mem_type) {
7350 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7351 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7352 offset += 4; /* 32 bit */
7353 break;
7354 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7355 offset += 8;
7356 break;
7357 default: /* reserved in PCI 2.2 */
7358 dev_warn(&pdev->dev,
7359 "base address is invalid\n");
7360 return -1;
7361 break;
7362 }
7363 }
7364 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7365 return i + 1;
7366 }
7367 return -1;
7368 }
7369
7370 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7371 {
7372 pci_free_irq_vectors(h->pdev);
7373 h->msix_vectors = 0;
7374 }
7375
7376 static void hpsa_setup_reply_map(struct ctlr_info *h)
7377 {
7378 const struct cpumask *mask;
7379 unsigned int queue, cpu;
7380
7381 for (queue = 0; queue < h->msix_vectors; queue++) {
7382 mask = pci_irq_get_affinity(h->pdev, queue);
7383 if (!mask)
7384 goto fallback;
7385
7386 for_each_cpu(cpu, mask)
7387 h->reply_map[cpu] = queue;
7388 }
7389 return;
7390
7391 fallback:
7392 for_each_possible_cpu(cpu)
7393 h->reply_map[cpu] = 0;
7394 }
7395
7396 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7397 * controllers that are capable. If not, we use legacy INTx mode.
7398 */
7399 static int hpsa_interrupt_mode(struct ctlr_info *h)
7400 {
7401 unsigned int flags = PCI_IRQ_LEGACY;
7402 int ret;
7403
7404 /* Some boards advertise MSI but don't really support it */
7405 switch (h->board_id) {
7406 case 0x40700E11:
7407 case 0x40800E11:
7408 case 0x40820E11:
7409 case 0x40830E11:
7410 break;
7411 default:
7412 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7413 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7414 if (ret > 0) {
7415 h->msix_vectors = ret;
7416 return 0;
7417 }
7418
7419 flags |= PCI_IRQ_MSI;
7420 break;
7421 }
7422
7423 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7424 if (ret < 0)
7425 return ret;
7426 return 0;
7427 }
7428
7429 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7430 bool *legacy_board)
7431 {
7432 int i;
7433 u32 subsystem_vendor_id, subsystem_device_id;
7434
7435 subsystem_vendor_id = pdev->subsystem_vendor;
7436 subsystem_device_id = pdev->subsystem_device;
7437 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7438 subsystem_vendor_id;
7439
7440 if (legacy_board)
7441 *legacy_board = false;
7442 for (i = 0; i < ARRAY_SIZE(products); i++)
7443 if (*board_id == products[i].board_id) {
7444 if (products[i].access != &SA5A_access &&
7445 products[i].access != &SA5B_access)
7446 return i;
7447 dev_warn(&pdev->dev,
7448 "legacy board ID: 0x%08x\n",
7449 *board_id);
7450 if (legacy_board)
7451 *legacy_board = true;
7452 return i;
7453 }
7454
7455 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7456 if (legacy_board)
7457 *legacy_board = true;
7458 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7459 }
7460
7461 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7462 unsigned long *memory_bar)
7463 {
7464 int i;
7465
7466 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7467 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7468 /* addressing mode bits already removed */
7469 *memory_bar = pci_resource_start(pdev, i);
7470 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7471 *memory_bar);
7472 return 0;
7473 }
7474 dev_warn(&pdev->dev, "no memory BAR found\n");
7475 return -ENODEV;
7476 }
7477
7478 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7479 int wait_for_ready)
7480 {
7481 int i, iterations;
7482 u32 scratchpad;
7483 if (wait_for_ready)
7484 iterations = HPSA_BOARD_READY_ITERATIONS;
7485 else
7486 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7487
7488 for (i = 0; i < iterations; i++) {
7489 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7490 if (wait_for_ready) {
7491 if (scratchpad == HPSA_FIRMWARE_READY)
7492 return 0;
7493 } else {
7494 if (scratchpad != HPSA_FIRMWARE_READY)
7495 return 0;
7496 }
7497 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7498 }
7499 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7500 return -ENODEV;
7501 }
7502
7503 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7504 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7505 u64 *cfg_offset)
7506 {
7507 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7508 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7509 *cfg_base_addr &= (u32) 0x0000ffff;
7510 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7511 if (*cfg_base_addr_index == -1) {
7512 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7513 return -ENODEV;
7514 }
7515 return 0;
7516 }
7517
7518 static void hpsa_free_cfgtables(struct ctlr_info *h)
7519 {
7520 if (h->transtable) {
7521 iounmap(h->transtable);
7522 h->transtable = NULL;
7523 }
7524 if (h->cfgtable) {
7525 iounmap(h->cfgtable);
7526 h->cfgtable = NULL;
7527 }
7528 }
7529
7530 /* Find and map CISS config table and transfer table
7531 + * several items must be unmapped (freed) later
7532 + * */
7533 static int hpsa_find_cfgtables(struct ctlr_info *h)
7534 {
7535 u64 cfg_offset;
7536 u32 cfg_base_addr;
7537 u64 cfg_base_addr_index;
7538 u32 trans_offset;
7539 int rc;
7540
7541 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7542 &cfg_base_addr_index, &cfg_offset);
7543 if (rc)
7544 return rc;
7545 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7546 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7547 if (!h->cfgtable) {
7548 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7549 return -ENOMEM;
7550 }
7551 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7552 if (rc)
7553 return rc;
7554 /* Find performant mode table. */
7555 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7556 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7557 cfg_base_addr_index)+cfg_offset+trans_offset,
7558 sizeof(*h->transtable));
7559 if (!h->transtable) {
7560 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7561 hpsa_free_cfgtables(h);
7562 return -ENOMEM;
7563 }
7564 return 0;
7565 }
7566
7567 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7568 {
7569 #define MIN_MAX_COMMANDS 16
7570 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7571
7572 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7573
7574 /* Limit commands in memory limited kdump scenario. */
7575 if (reset_devices && h->max_commands > 32)
7576 h->max_commands = 32;
7577
7578 if (h->max_commands < MIN_MAX_COMMANDS) {
7579 dev_warn(&h->pdev->dev,
7580 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7581 h->max_commands,
7582 MIN_MAX_COMMANDS);
7583 h->max_commands = MIN_MAX_COMMANDS;
7584 }
7585 }
7586
7587 /* If the controller reports that the total max sg entries is greater than 512,
7588 * then we know that chained SG blocks work. (Original smart arrays did not
7589 * support chained SG blocks and would return zero for max sg entries.)
7590 */
7591 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7592 {
7593 return h->maxsgentries > 512;
7594 }
7595
7596 /* Interrogate the hardware for some limits:
7597 * max commands, max SG elements without chaining, and with chaining,
7598 * SG chain block size, etc.
7599 */
7600 static void hpsa_find_board_params(struct ctlr_info *h)
7601 {
7602 hpsa_get_max_perf_mode_cmds(h);
7603 h->nr_cmds = h->max_commands;
7604 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7605 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7606 if (hpsa_supports_chained_sg_blocks(h)) {
7607 /* Limit in-command s/g elements to 32 save dma'able memory. */
7608 h->max_cmd_sg_entries = 32;
7609 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7610 h->maxsgentries--; /* save one for chain pointer */
7611 } else {
7612 /*
7613 * Original smart arrays supported at most 31 s/g entries
7614 * embedded inline in the command (trying to use more
7615 * would lock up the controller)
7616 */
7617 h->max_cmd_sg_entries = 31;
7618 h->maxsgentries = 31; /* default to traditional values */
7619 h->chainsize = 0;
7620 }
7621
7622 /* Find out what task management functions are supported and cache */
7623 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7624 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7625 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7626 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7627 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7628 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7629 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7630 }
7631
7632 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7633 {
7634 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7635 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7636 return false;
7637 }
7638 return true;
7639 }
7640
7641 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7642 {
7643 u32 driver_support;
7644
7645 driver_support = readl(&(h->cfgtable->driver_support));
7646 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7647 #ifdef CONFIG_X86
7648 driver_support |= ENABLE_SCSI_PREFETCH;
7649 #endif
7650 driver_support |= ENABLE_UNIT_ATTN;
7651 writel(driver_support, &(h->cfgtable->driver_support));
7652 }
7653
7654 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7655 * in a prefetch beyond physical memory.
7656 */
7657 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7658 {
7659 u32 dma_prefetch;
7660
7661 if (h->board_id != 0x3225103C)
7662 return;
7663 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7664 dma_prefetch |= 0x8000;
7665 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7666 }
7667
7668 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7669 {
7670 int i;
7671 u32 doorbell_value;
7672 unsigned long flags;
7673 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7674 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7675 spin_lock_irqsave(&h->lock, flags);
7676 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7677 spin_unlock_irqrestore(&h->lock, flags);
7678 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7679 goto done;
7680 /* delay and try again */
7681 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7682 }
7683 return -ENODEV;
7684 done:
7685 return 0;
7686 }
7687
7688 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7689 {
7690 int i;
7691 u32 doorbell_value;
7692 unsigned long flags;
7693
7694 /* under certain very rare conditions, this can take awhile.
7695 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7696 * as we enter this code.)
7697 */
7698 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7699 if (h->remove_in_progress)
7700 goto done;
7701 spin_lock_irqsave(&h->lock, flags);
7702 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7703 spin_unlock_irqrestore(&h->lock, flags);
7704 if (!(doorbell_value & CFGTBL_ChangeReq))
7705 goto done;
7706 /* delay and try again */
7707 msleep(MODE_CHANGE_WAIT_INTERVAL);
7708 }
7709 return -ENODEV;
7710 done:
7711 return 0;
7712 }
7713
7714 /* return -ENODEV or other reason on error, 0 on success */
7715 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7716 {
7717 u32 trans_support;
7718
7719 trans_support = readl(&(h->cfgtable->TransportSupport));
7720 if (!(trans_support & SIMPLE_MODE))
7721 return -ENOTSUPP;
7722
7723 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7724
7725 /* Update the field, and then ring the doorbell */
7726 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7727 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7728 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7729 if (hpsa_wait_for_mode_change_ack(h))
7730 goto error;
7731 print_cfg_table(&h->pdev->dev, h->cfgtable);
7732 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7733 goto error;
7734 h->transMethod = CFGTBL_Trans_Simple;
7735 return 0;
7736 error:
7737 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7738 return -ENODEV;
7739 }
7740
7741 /* free items allocated or mapped by hpsa_pci_init */
7742 static void hpsa_free_pci_init(struct ctlr_info *h)
7743 {
7744 hpsa_free_cfgtables(h); /* pci_init 4 */
7745 iounmap(h->vaddr); /* pci_init 3 */
7746 h->vaddr = NULL;
7747 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7748 /*
7749 * call pci_disable_device before pci_release_regions per
7750 * Documentation/PCI/pci.txt
7751 */
7752 pci_disable_device(h->pdev); /* pci_init 1 */
7753 pci_release_regions(h->pdev); /* pci_init 2 */
7754 }
7755
7756 /* several items must be freed later */
7757 static int hpsa_pci_init(struct ctlr_info *h)
7758 {
7759 int prod_index, err;
7760 bool legacy_board;
7761
7762 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7763 if (prod_index < 0)
7764 return prod_index;
7765 h->product_name = products[prod_index].product_name;
7766 h->access = *(products[prod_index].access);
7767 h->legacy_board = legacy_board;
7768 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7769 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7770
7771 err = pci_enable_device(h->pdev);
7772 if (err) {
7773 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7774 pci_disable_device(h->pdev);
7775 return err;
7776 }
7777
7778 err = pci_request_regions(h->pdev, HPSA);
7779 if (err) {
7780 dev_err(&h->pdev->dev,
7781 "failed to obtain PCI resources\n");
7782 pci_disable_device(h->pdev);
7783 return err;
7784 }
7785
7786 pci_set_master(h->pdev);
7787
7788 err = hpsa_interrupt_mode(h);
7789 if (err)
7790 goto clean1;
7791
7792 /* setup mapping between CPU and reply queue */
7793 hpsa_setup_reply_map(h);
7794
7795 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7796 if (err)
7797 goto clean2; /* intmode+region, pci */
7798 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7799 if (!h->vaddr) {
7800 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7801 err = -ENOMEM;
7802 goto clean2; /* intmode+region, pci */
7803 }
7804 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7805 if (err)
7806 goto clean3; /* vaddr, intmode+region, pci */
7807 err = hpsa_find_cfgtables(h);
7808 if (err)
7809 goto clean3; /* vaddr, intmode+region, pci */
7810 hpsa_find_board_params(h);
7811
7812 if (!hpsa_CISS_signature_present(h)) {
7813 err = -ENODEV;
7814 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7815 }
7816 hpsa_set_driver_support_bits(h);
7817 hpsa_p600_dma_prefetch_quirk(h);
7818 err = hpsa_enter_simple_mode(h);
7819 if (err)
7820 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7821 return 0;
7822
7823 clean4: /* cfgtables, vaddr, intmode+region, pci */
7824 hpsa_free_cfgtables(h);
7825 clean3: /* vaddr, intmode+region, pci */
7826 iounmap(h->vaddr);
7827 h->vaddr = NULL;
7828 clean2: /* intmode+region, pci */
7829 hpsa_disable_interrupt_mode(h);
7830 clean1:
7831 /*
7832 * call pci_disable_device before pci_release_regions per
7833 * Documentation/PCI/pci.txt
7834 */
7835 pci_disable_device(h->pdev);
7836 pci_release_regions(h->pdev);
7837 return err;
7838 }
7839
7840 static void hpsa_hba_inquiry(struct ctlr_info *h)
7841 {
7842 int rc;
7843
7844 #define HBA_INQUIRY_BYTE_COUNT 64
7845 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7846 if (!h->hba_inquiry_data)
7847 return;
7848 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7849 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7850 if (rc != 0) {
7851 kfree(h->hba_inquiry_data);
7852 h->hba_inquiry_data = NULL;
7853 }
7854 }
7855
7856 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7857 {
7858 int rc, i;
7859 void __iomem *vaddr;
7860
7861 if (!reset_devices)
7862 return 0;
7863
7864 /* kdump kernel is loading, we don't know in which state is
7865 * the pci interface. The dev->enable_cnt is equal zero
7866 * so we call enable+disable, wait a while and switch it on.
7867 */
7868 rc = pci_enable_device(pdev);
7869 if (rc) {
7870 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7871 return -ENODEV;
7872 }
7873 pci_disable_device(pdev);
7874 msleep(260); /* a randomly chosen number */
7875 rc = pci_enable_device(pdev);
7876 if (rc) {
7877 dev_warn(&pdev->dev, "failed to enable device.\n");
7878 return -ENODEV;
7879 }
7880
7881 pci_set_master(pdev);
7882
7883 vaddr = pci_ioremap_bar(pdev, 0);
7884 if (vaddr == NULL) {
7885 rc = -ENOMEM;
7886 goto out_disable;
7887 }
7888 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7889 iounmap(vaddr);
7890
7891 /* Reset the controller with a PCI power-cycle or via doorbell */
7892 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7893
7894 /* -ENOTSUPP here means we cannot reset the controller
7895 * but it's already (and still) up and running in
7896 * "performant mode". Or, it might be 640x, which can't reset
7897 * due to concerns about shared bbwc between 6402/6404 pair.
7898 */
7899 if (rc)
7900 goto out_disable;
7901
7902 /* Now try to get the controller to respond to a no-op */
7903 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7904 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7905 if (hpsa_noop(pdev) == 0)
7906 break;
7907 else
7908 dev_warn(&pdev->dev, "no-op failed%s\n",
7909 (i < 11 ? "; re-trying" : ""));
7910 }
7911
7912 out_disable:
7913
7914 pci_disable_device(pdev);
7915 return rc;
7916 }
7917
7918 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7919 {
7920 kfree(h->cmd_pool_bits);
7921 h->cmd_pool_bits = NULL;
7922 if (h->cmd_pool) {
7923 pci_free_consistent(h->pdev,
7924 h->nr_cmds * sizeof(struct CommandList),
7925 h->cmd_pool,
7926 h->cmd_pool_dhandle);
7927 h->cmd_pool = NULL;
7928 h->cmd_pool_dhandle = 0;
7929 }
7930 if (h->errinfo_pool) {
7931 pci_free_consistent(h->pdev,
7932 h->nr_cmds * sizeof(struct ErrorInfo),
7933 h->errinfo_pool,
7934 h->errinfo_pool_dhandle);
7935 h->errinfo_pool = NULL;
7936 h->errinfo_pool_dhandle = 0;
7937 }
7938 }
7939
7940 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7941 {
7942 h->cmd_pool_bits = kzalloc(
7943 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7944 sizeof(unsigned long), GFP_KERNEL);
7945 h->cmd_pool = pci_alloc_consistent(h->pdev,
7946 h->nr_cmds * sizeof(*h->cmd_pool),
7947 &(h->cmd_pool_dhandle));
7948 h->errinfo_pool = pci_alloc_consistent(h->pdev,
7949 h->nr_cmds * sizeof(*h->errinfo_pool),
7950 &(h->errinfo_pool_dhandle));
7951 if ((h->cmd_pool_bits == NULL)
7952 || (h->cmd_pool == NULL)
7953 || (h->errinfo_pool == NULL)) {
7954 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7955 goto clean_up;
7956 }
7957 hpsa_preinitialize_commands(h);
7958 return 0;
7959 clean_up:
7960 hpsa_free_cmd_pool(h);
7961 return -ENOMEM;
7962 }
7963
7964 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7965 static void hpsa_free_irqs(struct ctlr_info *h)
7966 {
7967 int i;
7968
7969 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
7970 /* Single reply queue, only one irq to free */
7971 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
7972 h->q[h->intr_mode] = 0;
7973 return;
7974 }
7975
7976 for (i = 0; i < h->msix_vectors; i++) {
7977 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
7978 h->q[i] = 0;
7979 }
7980 for (; i < MAX_REPLY_QUEUES; i++)
7981 h->q[i] = 0;
7982 }
7983
7984 /* returns 0 on success; cleans up and returns -Enn on error */
7985 static int hpsa_request_irqs(struct ctlr_info *h,
7986 irqreturn_t (*msixhandler)(int, void *),
7987 irqreturn_t (*intxhandler)(int, void *))
7988 {
7989 int rc, i;
7990
7991 /*
7992 * initialize h->q[x] = x so that interrupt handlers know which
7993 * queue to process.
7994 */
7995 for (i = 0; i < MAX_REPLY_QUEUES; i++)
7996 h->q[i] = (u8) i;
7997
7998 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
7999 /* If performant mode and MSI-X, use multiple reply queues */
8000 for (i = 0; i < h->msix_vectors; i++) {
8001 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
8002 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8003 0, h->intrname[i],
8004 &h->q[i]);
8005 if (rc) {
8006 int j;
8007
8008 dev_err(&h->pdev->dev,
8009 "failed to get irq %d for %s\n",
8010 pci_irq_vector(h->pdev, i), h->devname);
8011 for (j = 0; j < i; j++) {
8012 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8013 h->q[j] = 0;
8014 }
8015 for (; j < MAX_REPLY_QUEUES; j++)
8016 h->q[j] = 0;
8017 return rc;
8018 }
8019 }
8020 } else {
8021 /* Use single reply pool */
8022 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8023 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8024 h->msix_vectors ? "x" : "");
8025 rc = request_irq(pci_irq_vector(h->pdev, 0),
8026 msixhandler, 0,
8027 h->intrname[0],
8028 &h->q[h->intr_mode]);
8029 } else {
8030 sprintf(h->intrname[h->intr_mode],
8031 "%s-intx", h->devname);
8032 rc = request_irq(pci_irq_vector(h->pdev, 0),
8033 intxhandler, IRQF_SHARED,
8034 h->intrname[0],
8035 &h->q[h->intr_mode]);
8036 }
8037 }
8038 if (rc) {
8039 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8040 pci_irq_vector(h->pdev, 0), h->devname);
8041 hpsa_free_irqs(h);
8042 return -ENODEV;
8043 }
8044 return 0;
8045 }
8046
8047 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8048 {
8049 int rc;
8050 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8051
8052 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8053 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8054 if (rc) {
8055 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8056 return rc;
8057 }
8058
8059 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8060 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8061 if (rc) {
8062 dev_warn(&h->pdev->dev, "Board failed to become ready "
8063 "after soft reset.\n");
8064 return rc;
8065 }
8066
8067 return 0;
8068 }
8069
8070 static void hpsa_free_reply_queues(struct ctlr_info *h)
8071 {
8072 int i;
8073
8074 for (i = 0; i < h->nreply_queues; i++) {
8075 if (!h->reply_queue[i].head)
8076 continue;
8077 pci_free_consistent(h->pdev,
8078 h->reply_queue_size,
8079 h->reply_queue[i].head,
8080 h->reply_queue[i].busaddr);
8081 h->reply_queue[i].head = NULL;
8082 h->reply_queue[i].busaddr = 0;
8083 }
8084 h->reply_queue_size = 0;
8085 }
8086
8087 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8088 {
8089 hpsa_free_performant_mode(h); /* init_one 7 */
8090 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8091 hpsa_free_cmd_pool(h); /* init_one 5 */
8092 hpsa_free_irqs(h); /* init_one 4 */
8093 scsi_host_put(h->scsi_host); /* init_one 3 */
8094 h->scsi_host = NULL; /* init_one 3 */
8095 hpsa_free_pci_init(h); /* init_one 2_5 */
8096 free_percpu(h->lockup_detected); /* init_one 2 */
8097 h->lockup_detected = NULL; /* init_one 2 */
8098 if (h->resubmit_wq) {
8099 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8100 h->resubmit_wq = NULL;
8101 }
8102 if (h->rescan_ctlr_wq) {
8103 destroy_workqueue(h->rescan_ctlr_wq);
8104 h->rescan_ctlr_wq = NULL;
8105 }
8106 kfree(h); /* init_one 1 */
8107 }
8108
8109 /* Called when controller lockup detected. */
8110 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8111 {
8112 int i, refcount;
8113 struct CommandList *c;
8114 int failcount = 0;
8115
8116 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8117 for (i = 0; i < h->nr_cmds; i++) {
8118 c = h->cmd_pool + i;
8119 refcount = atomic_inc_return(&c->refcount);
8120 if (refcount > 1) {
8121 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8122 finish_cmd(c);
8123 atomic_dec(&h->commands_outstanding);
8124 failcount++;
8125 }
8126 cmd_free(h, c);
8127 }
8128 dev_warn(&h->pdev->dev,
8129 "failed %d commands in fail_all\n", failcount);
8130 }
8131
8132 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8133 {
8134 int cpu;
8135
8136 for_each_online_cpu(cpu) {
8137 u32 *lockup_detected;
8138 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8139 *lockup_detected = value;
8140 }
8141 wmb(); /* be sure the per-cpu variables are out to memory */
8142 }
8143
8144 static void controller_lockup_detected(struct ctlr_info *h)
8145 {
8146 unsigned long flags;
8147 u32 lockup_detected;
8148
8149 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8150 spin_lock_irqsave(&h->lock, flags);
8151 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8152 if (!lockup_detected) {
8153 /* no heartbeat, but controller gave us a zero. */
8154 dev_warn(&h->pdev->dev,
8155 "lockup detected after %d but scratchpad register is zero\n",
8156 h->heartbeat_sample_interval / HZ);
8157 lockup_detected = 0xffffffff;
8158 }
8159 set_lockup_detected_for_all_cpus(h, lockup_detected);
8160 spin_unlock_irqrestore(&h->lock, flags);
8161 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8162 lockup_detected, h->heartbeat_sample_interval / HZ);
8163 if (lockup_detected == 0xffff0000) {
8164 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8165 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8166 }
8167 pci_disable_device(h->pdev);
8168 fail_all_outstanding_cmds(h);
8169 }
8170
8171 static int detect_controller_lockup(struct ctlr_info *h)
8172 {
8173 u64 now;
8174 u32 heartbeat;
8175 unsigned long flags;
8176
8177 now = get_jiffies_64();
8178 /* If we've received an interrupt recently, we're ok. */
8179 if (time_after64(h->last_intr_timestamp +
8180 (h->heartbeat_sample_interval), now))
8181 return false;
8182
8183 /*
8184 * If we've already checked the heartbeat recently, we're ok.
8185 * This could happen if someone sends us a signal. We
8186 * otherwise don't care about signals in this thread.
8187 */
8188 if (time_after64(h->last_heartbeat_timestamp +
8189 (h->heartbeat_sample_interval), now))
8190 return false;
8191
8192 /* If heartbeat has not changed since we last looked, we're not ok. */
8193 spin_lock_irqsave(&h->lock, flags);
8194 heartbeat = readl(&h->cfgtable->HeartBeat);
8195 spin_unlock_irqrestore(&h->lock, flags);
8196 if (h->last_heartbeat == heartbeat) {
8197 controller_lockup_detected(h);
8198 return true;
8199 }
8200
8201 /* We're ok. */
8202 h->last_heartbeat = heartbeat;
8203 h->last_heartbeat_timestamp = now;
8204 return false;
8205 }
8206
8207 /*
8208 * Set ioaccel status for all ioaccel volumes.
8209 *
8210 * Called from monitor controller worker (hpsa_event_monitor_worker)
8211 *
8212 * A Volume (or Volumes that comprise an Array set may be undergoing a
8213 * transformation, so we will be turning off ioaccel for all volumes that
8214 * make up the Array.
8215 */
8216 static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8217 {
8218 int rc;
8219 int i;
8220 u8 ioaccel_status;
8221 unsigned char *buf;
8222 struct hpsa_scsi_dev_t *device;
8223
8224 if (!h)
8225 return;
8226
8227 buf = kmalloc(64, GFP_KERNEL);
8228 if (!buf)
8229 return;
8230
8231 /*
8232 * Run through current device list used during I/O requests.
8233 */
8234 for (i = 0; i < h->ndevices; i++) {
8235 device = h->dev[i];
8236
8237 if (!device)
8238 continue;
8239 if (!device->scsi3addr)
8240 continue;
8241 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8242 HPSA_VPD_LV_IOACCEL_STATUS))
8243 continue;
8244
8245 memset(buf, 0, 64);
8246
8247 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8248 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8249 buf, 64);
8250 if (rc != 0)
8251 continue;
8252
8253 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8254 device->offload_config =
8255 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8256 if (device->offload_config)
8257 device->offload_to_be_enabled =
8258 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8259
8260 /*
8261 * Immediately turn off ioaccel for any volume the
8262 * controller tells us to. Some of the reasons could be:
8263 * transformation - change to the LVs of an Array.
8264 * degraded volume - component failure
8265 *
8266 * If ioaccel is to be re-enabled, re-enable later during the
8267 * scan operation so the driver can get a fresh raidmap
8268 * before turning ioaccel back on.
8269 *
8270 */
8271 if (!device->offload_to_be_enabled)
8272 device->offload_enabled = 0;
8273 }
8274
8275 kfree(buf);
8276 }
8277
8278 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8279 {
8280 char *event_type;
8281
8282 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8283 return;
8284
8285 /* Ask the controller to clear the events we're handling. */
8286 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8287 | CFGTBL_Trans_io_accel2)) &&
8288 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8289 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8290
8291 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8292 event_type = "state change";
8293 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8294 event_type = "configuration change";
8295 /* Stop sending new RAID offload reqs via the IO accelerator */
8296 scsi_block_requests(h->scsi_host);
8297 hpsa_set_ioaccel_status(h);
8298 hpsa_drain_accel_commands(h);
8299 /* Set 'accelerator path config change' bit */
8300 dev_warn(&h->pdev->dev,
8301 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8302 h->events, event_type);
8303 writel(h->events, &(h->cfgtable->clear_event_notify));
8304 /* Set the "clear event notify field update" bit 6 */
8305 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8306 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8307 hpsa_wait_for_clear_event_notify_ack(h);
8308 scsi_unblock_requests(h->scsi_host);
8309 } else {
8310 /* Acknowledge controller notification events. */
8311 writel(h->events, &(h->cfgtable->clear_event_notify));
8312 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8313 hpsa_wait_for_clear_event_notify_ack(h);
8314 }
8315 return;
8316 }
8317
8318 /* Check a register on the controller to see if there are configuration
8319 * changes (added/changed/removed logical drives, etc.) which mean that
8320 * we should rescan the controller for devices.
8321 * Also check flag for driver-initiated rescan.
8322 */
8323 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8324 {
8325 if (h->drv_req_rescan) {
8326 h->drv_req_rescan = 0;
8327 return 1;
8328 }
8329
8330 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8331 return 0;
8332
8333 h->events = readl(&(h->cfgtable->event_notify));
8334 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8335 }
8336
8337 /*
8338 * Check if any of the offline devices have become ready
8339 */
8340 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8341 {
8342 unsigned long flags;
8343 struct offline_device_entry *d;
8344 struct list_head *this, *tmp;
8345
8346 spin_lock_irqsave(&h->offline_device_lock, flags);
8347 list_for_each_safe(this, tmp, &h->offline_device_list) {
8348 d = list_entry(this, struct offline_device_entry,
8349 offline_list);
8350 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8351 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8352 spin_lock_irqsave(&h->offline_device_lock, flags);
8353 list_del(&d->offline_list);
8354 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8355 return 1;
8356 }
8357 spin_lock_irqsave(&h->offline_device_lock, flags);
8358 }
8359 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8360 return 0;
8361 }
8362
8363 static int hpsa_luns_changed(struct ctlr_info *h)
8364 {
8365 int rc = 1; /* assume there are changes */
8366 struct ReportLUNdata *logdev = NULL;
8367
8368 /* if we can't find out if lun data has changed,
8369 * assume that it has.
8370 */
8371
8372 if (!h->lastlogicals)
8373 return rc;
8374
8375 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8376 if (!logdev)
8377 return rc;
8378
8379 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8380 dev_warn(&h->pdev->dev,
8381 "report luns failed, can't track lun changes.\n");
8382 goto out;
8383 }
8384 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8385 dev_info(&h->pdev->dev,
8386 "Lun changes detected.\n");
8387 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8388 goto out;
8389 } else
8390 rc = 0; /* no changes detected. */
8391 out:
8392 kfree(logdev);
8393 return rc;
8394 }
8395
8396 static void hpsa_perform_rescan(struct ctlr_info *h)
8397 {
8398 struct Scsi_Host *sh = NULL;
8399 unsigned long flags;
8400
8401 /*
8402 * Do the scan after the reset
8403 */
8404 spin_lock_irqsave(&h->reset_lock, flags);
8405 if (h->reset_in_progress) {
8406 h->drv_req_rescan = 1;
8407 spin_unlock_irqrestore(&h->reset_lock, flags);
8408 return;
8409 }
8410 spin_unlock_irqrestore(&h->reset_lock, flags);
8411
8412 sh = scsi_host_get(h->scsi_host);
8413 if (sh != NULL) {
8414 hpsa_scan_start(sh);
8415 scsi_host_put(sh);
8416 h->drv_req_rescan = 0;
8417 }
8418 }
8419
8420 /*
8421 * watch for controller events
8422 */
8423 static void hpsa_event_monitor_worker(struct work_struct *work)
8424 {
8425 struct ctlr_info *h = container_of(to_delayed_work(work),
8426 struct ctlr_info, event_monitor_work);
8427 unsigned long flags;
8428
8429 spin_lock_irqsave(&h->lock, flags);
8430 if (h->remove_in_progress) {
8431 spin_unlock_irqrestore(&h->lock, flags);
8432 return;
8433 }
8434 spin_unlock_irqrestore(&h->lock, flags);
8435
8436 if (hpsa_ctlr_needs_rescan(h)) {
8437 hpsa_ack_ctlr_events(h);
8438 hpsa_perform_rescan(h);
8439 }
8440
8441 spin_lock_irqsave(&h->lock, flags);
8442 if (!h->remove_in_progress)
8443 schedule_delayed_work(&h->event_monitor_work,
8444 HPSA_EVENT_MONITOR_INTERVAL);
8445 spin_unlock_irqrestore(&h->lock, flags);
8446 }
8447
8448 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8449 {
8450 unsigned long flags;
8451 struct ctlr_info *h = container_of(to_delayed_work(work),
8452 struct ctlr_info, rescan_ctlr_work);
8453
8454 spin_lock_irqsave(&h->lock, flags);
8455 if (h->remove_in_progress) {
8456 spin_unlock_irqrestore(&h->lock, flags);
8457 return;
8458 }
8459 spin_unlock_irqrestore(&h->lock, flags);
8460
8461 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8462 hpsa_perform_rescan(h);
8463 } else if (h->discovery_polling) {
8464 if (hpsa_luns_changed(h)) {
8465 dev_info(&h->pdev->dev,
8466 "driver discovery polling rescan.\n");
8467 hpsa_perform_rescan(h);
8468 }
8469 }
8470 spin_lock_irqsave(&h->lock, flags);
8471 if (!h->remove_in_progress)
8472 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8473 h->heartbeat_sample_interval);
8474 spin_unlock_irqrestore(&h->lock, flags);
8475 }
8476
8477 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8478 {
8479 unsigned long flags;
8480 struct ctlr_info *h = container_of(to_delayed_work(work),
8481 struct ctlr_info, monitor_ctlr_work);
8482
8483 detect_controller_lockup(h);
8484 if (lockup_detected(h))
8485 return;
8486
8487 spin_lock_irqsave(&h->lock, flags);
8488 if (!h->remove_in_progress)
8489 schedule_delayed_work(&h->monitor_ctlr_work,
8490 h->heartbeat_sample_interval);
8491 spin_unlock_irqrestore(&h->lock, flags);
8492 }
8493
8494 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8495 char *name)
8496 {
8497 struct workqueue_struct *wq = NULL;
8498
8499 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8500 if (!wq)
8501 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8502
8503 return wq;
8504 }
8505
8506 static void hpda_free_ctlr_info(struct ctlr_info *h)
8507 {
8508 kfree(h->reply_map);
8509 kfree(h);
8510 }
8511
8512 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8513 {
8514 struct ctlr_info *h;
8515
8516 h = kzalloc(sizeof(*h), GFP_KERNEL);
8517 if (!h)
8518 return NULL;
8519
8520 h->reply_map = kzalloc(sizeof(*h->reply_map) * nr_cpu_ids, GFP_KERNEL);
8521 if (!h->reply_map) {
8522 kfree(h);
8523 return NULL;
8524 }
8525 return h;
8526 }
8527
8528 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8529 {
8530 int dac, rc;
8531 struct ctlr_info *h;
8532 int try_soft_reset = 0;
8533 unsigned long flags;
8534 u32 board_id;
8535
8536 if (number_of_controllers == 0)
8537 printk(KERN_INFO DRIVER_NAME "\n");
8538
8539 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8540 if (rc < 0) {
8541 dev_warn(&pdev->dev, "Board ID not found\n");
8542 return rc;
8543 }
8544
8545 rc = hpsa_init_reset_devices(pdev, board_id);
8546 if (rc) {
8547 if (rc != -ENOTSUPP)
8548 return rc;
8549 /* If the reset fails in a particular way (it has no way to do
8550 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8551 * a soft reset once we get the controller configured up to the
8552 * point that it can accept a command.
8553 */
8554 try_soft_reset = 1;
8555 rc = 0;
8556 }
8557
8558 reinit_after_soft_reset:
8559
8560 /* Command structures must be aligned on a 32-byte boundary because
8561 * the 5 lower bits of the address are used by the hardware. and by
8562 * the driver. See comments in hpsa.h for more info.
8563 */
8564 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8565 h = hpda_alloc_ctlr_info();
8566 if (!h) {
8567 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8568 return -ENOMEM;
8569 }
8570
8571 h->pdev = pdev;
8572
8573 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8574 INIT_LIST_HEAD(&h->offline_device_list);
8575 spin_lock_init(&h->lock);
8576 spin_lock_init(&h->offline_device_lock);
8577 spin_lock_init(&h->scan_lock);
8578 spin_lock_init(&h->reset_lock);
8579 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8580
8581 /* Allocate and clear per-cpu variable lockup_detected */
8582 h->lockup_detected = alloc_percpu(u32);
8583 if (!h->lockup_detected) {
8584 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8585 rc = -ENOMEM;
8586 goto clean1; /* aer/h */
8587 }
8588 set_lockup_detected_for_all_cpus(h, 0);
8589
8590 rc = hpsa_pci_init(h);
8591 if (rc)
8592 goto clean2; /* lu, aer/h */
8593
8594 /* relies on h-> settings made by hpsa_pci_init, including
8595 * interrupt_mode h->intr */
8596 rc = hpsa_scsi_host_alloc(h);
8597 if (rc)
8598 goto clean2_5; /* pci, lu, aer/h */
8599
8600 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8601 h->ctlr = number_of_controllers;
8602 number_of_controllers++;
8603
8604 /* configure PCI DMA stuff */
8605 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8606 if (rc == 0) {
8607 dac = 1;
8608 } else {
8609 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8610 if (rc == 0) {
8611 dac = 0;
8612 } else {
8613 dev_err(&pdev->dev, "no suitable DMA available\n");
8614 goto clean3; /* shost, pci, lu, aer/h */
8615 }
8616 }
8617
8618 /* make sure the board interrupts are off */
8619 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8620
8621 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8622 if (rc)
8623 goto clean3; /* shost, pci, lu, aer/h */
8624 rc = hpsa_alloc_cmd_pool(h);
8625 if (rc)
8626 goto clean4; /* irq, shost, pci, lu, aer/h */
8627 rc = hpsa_alloc_sg_chain_blocks(h);
8628 if (rc)
8629 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8630 init_waitqueue_head(&h->scan_wait_queue);
8631 init_waitqueue_head(&h->event_sync_wait_queue);
8632 mutex_init(&h->reset_mutex);
8633 h->scan_finished = 1; /* no scan currently in progress */
8634 h->scan_waiting = 0;
8635
8636 pci_set_drvdata(pdev, h);
8637 h->ndevices = 0;
8638
8639 spin_lock_init(&h->devlock);
8640 rc = hpsa_put_ctlr_into_performant_mode(h);
8641 if (rc)
8642 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8643
8644 /* create the resubmit workqueue */
8645 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8646 if (!h->rescan_ctlr_wq) {
8647 rc = -ENOMEM;
8648 goto clean7;
8649 }
8650
8651 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8652 if (!h->resubmit_wq) {
8653 rc = -ENOMEM;
8654 goto clean7; /* aer/h */
8655 }
8656
8657 /*
8658 * At this point, the controller is ready to take commands.
8659 * Now, if reset_devices and the hard reset didn't work, try
8660 * the soft reset and see if that works.
8661 */
8662 if (try_soft_reset) {
8663
8664 /* This is kind of gross. We may or may not get a completion
8665 * from the soft reset command, and if we do, then the value
8666 * from the fifo may or may not be valid. So, we wait 10 secs
8667 * after the reset throwing away any completions we get during
8668 * that time. Unregister the interrupt handler and register
8669 * fake ones to scoop up any residual completions.
8670 */
8671 spin_lock_irqsave(&h->lock, flags);
8672 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8673 spin_unlock_irqrestore(&h->lock, flags);
8674 hpsa_free_irqs(h);
8675 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8676 hpsa_intx_discard_completions);
8677 if (rc) {
8678 dev_warn(&h->pdev->dev,
8679 "Failed to request_irq after soft reset.\n");
8680 /*
8681 * cannot goto clean7 or free_irqs will be called
8682 * again. Instead, do its work
8683 */
8684 hpsa_free_performant_mode(h); /* clean7 */
8685 hpsa_free_sg_chain_blocks(h); /* clean6 */
8686 hpsa_free_cmd_pool(h); /* clean5 */
8687 /*
8688 * skip hpsa_free_irqs(h) clean4 since that
8689 * was just called before request_irqs failed
8690 */
8691 goto clean3;
8692 }
8693
8694 rc = hpsa_kdump_soft_reset(h);
8695 if (rc)
8696 /* Neither hard nor soft reset worked, we're hosed. */
8697 goto clean7;
8698
8699 dev_info(&h->pdev->dev, "Board READY.\n");
8700 dev_info(&h->pdev->dev,
8701 "Waiting for stale completions to drain.\n");
8702 h->access.set_intr_mask(h, HPSA_INTR_ON);
8703 msleep(10000);
8704 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8705
8706 rc = controller_reset_failed(h->cfgtable);
8707 if (rc)
8708 dev_info(&h->pdev->dev,
8709 "Soft reset appears to have failed.\n");
8710
8711 /* since the controller's reset, we have to go back and re-init
8712 * everything. Easiest to just forget what we've done and do it
8713 * all over again.
8714 */
8715 hpsa_undo_allocations_after_kdump_soft_reset(h);
8716 try_soft_reset = 0;
8717 if (rc)
8718 /* don't goto clean, we already unallocated */
8719 return -ENODEV;
8720
8721 goto reinit_after_soft_reset;
8722 }
8723
8724 /* Enable Accelerated IO path at driver layer */
8725 h->acciopath_status = 1;
8726 /* Disable discovery polling.*/
8727 h->discovery_polling = 0;
8728
8729
8730 /* Turn the interrupts on so we can service requests */
8731 h->access.set_intr_mask(h, HPSA_INTR_ON);
8732
8733 hpsa_hba_inquiry(h);
8734
8735 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8736 if (!h->lastlogicals)
8737 dev_info(&h->pdev->dev,
8738 "Can't track change to report lun data\n");
8739
8740 /* hook into SCSI subsystem */
8741 rc = hpsa_scsi_add_host(h);
8742 if (rc)
8743 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8744
8745 /* Monitor the controller for firmware lockups */
8746 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8747 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8748 schedule_delayed_work(&h->monitor_ctlr_work,
8749 h->heartbeat_sample_interval);
8750 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8751 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8752 h->heartbeat_sample_interval);
8753 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8754 schedule_delayed_work(&h->event_monitor_work,
8755 HPSA_EVENT_MONITOR_INTERVAL);
8756 return 0;
8757
8758 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8759 hpsa_free_performant_mode(h);
8760 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8761 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8762 hpsa_free_sg_chain_blocks(h);
8763 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8764 hpsa_free_cmd_pool(h);
8765 clean4: /* irq, shost, pci, lu, aer/h */
8766 hpsa_free_irqs(h);
8767 clean3: /* shost, pci, lu, aer/h */
8768 scsi_host_put(h->scsi_host);
8769 h->scsi_host = NULL;
8770 clean2_5: /* pci, lu, aer/h */
8771 hpsa_free_pci_init(h);
8772 clean2: /* lu, aer/h */
8773 if (h->lockup_detected) {
8774 free_percpu(h->lockup_detected);
8775 h->lockup_detected = NULL;
8776 }
8777 clean1: /* wq/aer/h */
8778 if (h->resubmit_wq) {
8779 destroy_workqueue(h->resubmit_wq);
8780 h->resubmit_wq = NULL;
8781 }
8782 if (h->rescan_ctlr_wq) {
8783 destroy_workqueue(h->rescan_ctlr_wq);
8784 h->rescan_ctlr_wq = NULL;
8785 }
8786 kfree(h);
8787 return rc;
8788 }
8789
8790 static void hpsa_flush_cache(struct ctlr_info *h)
8791 {
8792 char *flush_buf;
8793 struct CommandList *c;
8794 int rc;
8795
8796 if (unlikely(lockup_detected(h)))
8797 return;
8798 flush_buf = kzalloc(4, GFP_KERNEL);
8799 if (!flush_buf)
8800 return;
8801
8802 c = cmd_alloc(h);
8803
8804 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8805 RAID_CTLR_LUNID, TYPE_CMD)) {
8806 goto out;
8807 }
8808 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8809 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8810 if (rc)
8811 goto out;
8812 if (c->err_info->CommandStatus != 0)
8813 out:
8814 dev_warn(&h->pdev->dev,
8815 "error flushing cache on controller\n");
8816 cmd_free(h, c);
8817 kfree(flush_buf);
8818 }
8819
8820 /* Make controller gather fresh report lun data each time we
8821 * send down a report luns request
8822 */
8823 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8824 {
8825 u32 *options;
8826 struct CommandList *c;
8827 int rc;
8828
8829 /* Don't bother trying to set diag options if locked up */
8830 if (unlikely(h->lockup_detected))
8831 return;
8832
8833 options = kzalloc(sizeof(*options), GFP_KERNEL);
8834 if (!options)
8835 return;
8836
8837 c = cmd_alloc(h);
8838
8839 /* first, get the current diag options settings */
8840 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8841 RAID_CTLR_LUNID, TYPE_CMD))
8842 goto errout;
8843
8844 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8845 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8846 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8847 goto errout;
8848
8849 /* Now, set the bit for disabling the RLD caching */
8850 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8851
8852 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8853 RAID_CTLR_LUNID, TYPE_CMD))
8854 goto errout;
8855
8856 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8857 PCI_DMA_TODEVICE, NO_TIMEOUT);
8858 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8859 goto errout;
8860
8861 /* Now verify that it got set: */
8862 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8863 RAID_CTLR_LUNID, TYPE_CMD))
8864 goto errout;
8865
8866 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8867 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8868 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8869 goto errout;
8870
8871 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8872 goto out;
8873
8874 errout:
8875 dev_err(&h->pdev->dev,
8876 "Error: failed to disable report lun data caching.\n");
8877 out:
8878 cmd_free(h, c);
8879 kfree(options);
8880 }
8881
8882 static void __hpsa_shutdown(struct pci_dev *pdev)
8883 {
8884 struct ctlr_info *h;
8885
8886 h = pci_get_drvdata(pdev);
8887 /* Turn board interrupts off and send the flush cache command
8888 * sendcmd will turn off interrupt, and send the flush...
8889 * To write all data in the battery backed cache to disks
8890 */
8891 hpsa_flush_cache(h);
8892 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8893 hpsa_free_irqs(h); /* init_one 4 */
8894 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8895 }
8896
8897 static void hpsa_shutdown(struct pci_dev *pdev)
8898 {
8899 __hpsa_shutdown(pdev);
8900 pci_disable_device(pdev);
8901 }
8902
8903 static void hpsa_free_device_info(struct ctlr_info *h)
8904 {
8905 int i;
8906
8907 for (i = 0; i < h->ndevices; i++) {
8908 kfree(h->dev[i]);
8909 h->dev[i] = NULL;
8910 }
8911 }
8912
8913 static void hpsa_remove_one(struct pci_dev *pdev)
8914 {
8915 struct ctlr_info *h;
8916 unsigned long flags;
8917
8918 if (pci_get_drvdata(pdev) == NULL) {
8919 dev_err(&pdev->dev, "unable to remove device\n");
8920 return;
8921 }
8922 h = pci_get_drvdata(pdev);
8923
8924 /* Get rid of any controller monitoring work items */
8925 spin_lock_irqsave(&h->lock, flags);
8926 h->remove_in_progress = 1;
8927 spin_unlock_irqrestore(&h->lock, flags);
8928 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8929 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8930 cancel_delayed_work_sync(&h->event_monitor_work);
8931 destroy_workqueue(h->rescan_ctlr_wq);
8932 destroy_workqueue(h->resubmit_wq);
8933
8934 hpsa_delete_sas_host(h);
8935
8936 /*
8937 * Call before disabling interrupts.
8938 * scsi_remove_host can trigger I/O operations especially
8939 * when multipath is enabled. There can be SYNCHRONIZE CACHE
8940 * operations which cannot complete and will hang the system.
8941 */
8942 if (h->scsi_host)
8943 scsi_remove_host(h->scsi_host); /* init_one 8 */
8944 /* includes hpsa_free_irqs - init_one 4 */
8945 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8946 __hpsa_shutdown(pdev);
8947
8948 hpsa_free_device_info(h); /* scan */
8949
8950 kfree(h->hba_inquiry_data); /* init_one 10 */
8951 h->hba_inquiry_data = NULL; /* init_one 10 */
8952 hpsa_free_ioaccel2_sg_chain_blocks(h);
8953 hpsa_free_performant_mode(h); /* init_one 7 */
8954 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8955 hpsa_free_cmd_pool(h); /* init_one 5 */
8956 kfree(h->lastlogicals);
8957
8958 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8959
8960 scsi_host_put(h->scsi_host); /* init_one 3 */
8961 h->scsi_host = NULL; /* init_one 3 */
8962
8963 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8964 hpsa_free_pci_init(h); /* init_one 2.5 */
8965
8966 free_percpu(h->lockup_detected); /* init_one 2 */
8967 h->lockup_detected = NULL; /* init_one 2 */
8968 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
8969
8970 hpda_free_ctlr_info(h); /* init_one 1 */
8971 }
8972
8973 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8974 __attribute__((unused)) pm_message_t state)
8975 {
8976 return -ENOSYS;
8977 }
8978
8979 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8980 {
8981 return -ENOSYS;
8982 }
8983
8984 static struct pci_driver hpsa_pci_driver = {
8985 .name = HPSA,
8986 .probe = hpsa_init_one,
8987 .remove = hpsa_remove_one,
8988 .id_table = hpsa_pci_device_id, /* id_table */
8989 .shutdown = hpsa_shutdown,
8990 .suspend = hpsa_suspend,
8991 .resume = hpsa_resume,
8992 };
8993
8994 /* Fill in bucket_map[], given nsgs (the max number of
8995 * scatter gather elements supported) and bucket[],
8996 * which is an array of 8 integers. The bucket[] array
8997 * contains 8 different DMA transfer sizes (in 16
8998 * byte increments) which the controller uses to fetch
8999 * commands. This function fills in bucket_map[], which
9000 * maps a given number of scatter gather elements to one of
9001 * the 8 DMA transfer sizes. The point of it is to allow the
9002 * controller to only do as much DMA as needed to fetch the
9003 * command, with the DMA transfer size encoded in the lower
9004 * bits of the command address.
9005 */
9006 static void calc_bucket_map(int bucket[], int num_buckets,
9007 int nsgs, int min_blocks, u32 *bucket_map)
9008 {
9009 int i, j, b, size;
9010
9011 /* Note, bucket_map must have nsgs+1 entries. */
9012 for (i = 0; i <= nsgs; i++) {
9013 /* Compute size of a command with i SG entries */
9014 size = i + min_blocks;
9015 b = num_buckets; /* Assume the biggest bucket */
9016 /* Find the bucket that is just big enough */
9017 for (j = 0; j < num_buckets; j++) {
9018 if (bucket[j] >= size) {
9019 b = j;
9020 break;
9021 }
9022 }
9023 /* for a command with i SG entries, use bucket b. */
9024 bucket_map[i] = b;
9025 }
9026 }
9027
9028 /*
9029 * return -ENODEV on err, 0 on success (or no action)
9030 * allocates numerous items that must be freed later
9031 */
9032 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9033 {
9034 int i;
9035 unsigned long register_value;
9036 unsigned long transMethod = CFGTBL_Trans_Performant |
9037 (trans_support & CFGTBL_Trans_use_short_tags) |
9038 CFGTBL_Trans_enable_directed_msix |
9039 (trans_support & (CFGTBL_Trans_io_accel1 |
9040 CFGTBL_Trans_io_accel2));
9041 struct access_method access = SA5_performant_access;
9042
9043 /* This is a bit complicated. There are 8 registers on
9044 * the controller which we write to to tell it 8 different
9045 * sizes of commands which there may be. It's a way of
9046 * reducing the DMA done to fetch each command. Encoded into
9047 * each command's tag are 3 bits which communicate to the controller
9048 * which of the eight sizes that command fits within. The size of
9049 * each command depends on how many scatter gather entries there are.
9050 * Each SG entry requires 16 bytes. The eight registers are programmed
9051 * with the number of 16-byte blocks a command of that size requires.
9052 * The smallest command possible requires 5 such 16 byte blocks.
9053 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9054 * blocks. Note, this only extends to the SG entries contained
9055 * within the command block, and does not extend to chained blocks
9056 * of SG elements. bft[] contains the eight values we write to
9057 * the registers. They are not evenly distributed, but have more
9058 * sizes for small commands, and fewer sizes for larger commands.
9059 */
9060 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9061 #define MIN_IOACCEL2_BFT_ENTRY 5
9062 #define HPSA_IOACCEL2_HEADER_SZ 4
9063 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9064 13, 14, 15, 16, 17, 18, 19,
9065 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9066 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9067 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9068 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9069 16 * MIN_IOACCEL2_BFT_ENTRY);
9070 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9071 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9072 /* 5 = 1 s/g entry or 4k
9073 * 6 = 2 s/g entry or 8k
9074 * 8 = 4 s/g entry or 16k
9075 * 10 = 6 s/g entry or 24k
9076 */
9077
9078 /* If the controller supports either ioaccel method then
9079 * we can also use the RAID stack submit path that does not
9080 * perform the superfluous readl() after each command submission.
9081 */
9082 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9083 access = SA5_performant_access_no_read;
9084
9085 /* Controller spec: zero out this buffer. */
9086 for (i = 0; i < h->nreply_queues; i++)
9087 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9088
9089 bft[7] = SG_ENTRIES_IN_CMD + 4;
9090 calc_bucket_map(bft, ARRAY_SIZE(bft),
9091 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9092 for (i = 0; i < 8; i++)
9093 writel(bft[i], &h->transtable->BlockFetch[i]);
9094
9095 /* size of controller ring buffer */
9096 writel(h->max_commands, &h->transtable->RepQSize);
9097 writel(h->nreply_queues, &h->transtable->RepQCount);
9098 writel(0, &h->transtable->RepQCtrAddrLow32);
9099 writel(0, &h->transtable->RepQCtrAddrHigh32);
9100
9101 for (i = 0; i < h->nreply_queues; i++) {
9102 writel(0, &h->transtable->RepQAddr[i].upper);
9103 writel(h->reply_queue[i].busaddr,
9104 &h->transtable->RepQAddr[i].lower);
9105 }
9106
9107 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9108 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9109 /*
9110 * enable outbound interrupt coalescing in accelerator mode;
9111 */
9112 if (trans_support & CFGTBL_Trans_io_accel1) {
9113 access = SA5_ioaccel_mode1_access;
9114 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9115 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9116 } else
9117 if (trans_support & CFGTBL_Trans_io_accel2)
9118 access = SA5_ioaccel_mode2_access;
9119 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9120 if (hpsa_wait_for_mode_change_ack(h)) {
9121 dev_err(&h->pdev->dev,
9122 "performant mode problem - doorbell timeout\n");
9123 return -ENODEV;
9124 }
9125 register_value = readl(&(h->cfgtable->TransportActive));
9126 if (!(register_value & CFGTBL_Trans_Performant)) {
9127 dev_err(&h->pdev->dev,
9128 "performant mode problem - transport not active\n");
9129 return -ENODEV;
9130 }
9131 /* Change the access methods to the performant access methods */
9132 h->access = access;
9133 h->transMethod = transMethod;
9134
9135 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9136 (trans_support & CFGTBL_Trans_io_accel2)))
9137 return 0;
9138
9139 if (trans_support & CFGTBL_Trans_io_accel1) {
9140 /* Set up I/O accelerator mode */
9141 for (i = 0; i < h->nreply_queues; i++) {
9142 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9143 h->reply_queue[i].current_entry =
9144 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9145 }
9146 bft[7] = h->ioaccel_maxsg + 8;
9147 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9148 h->ioaccel1_blockFetchTable);
9149
9150 /* initialize all reply queue entries to unused */
9151 for (i = 0; i < h->nreply_queues; i++)
9152 memset(h->reply_queue[i].head,
9153 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9154 h->reply_queue_size);
9155
9156 /* set all the constant fields in the accelerator command
9157 * frames once at init time to save CPU cycles later.
9158 */
9159 for (i = 0; i < h->nr_cmds; i++) {
9160 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9161
9162 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9163 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9164 (i * sizeof(struct ErrorInfo)));
9165 cp->err_info_len = sizeof(struct ErrorInfo);
9166 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9167 cp->host_context_flags =
9168 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9169 cp->timeout_sec = 0;
9170 cp->ReplyQueue = 0;
9171 cp->tag =
9172 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9173 cp->host_addr =
9174 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9175 (i * sizeof(struct io_accel1_cmd)));
9176 }
9177 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9178 u64 cfg_offset, cfg_base_addr_index;
9179 u32 bft2_offset, cfg_base_addr;
9180 int rc;
9181
9182 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9183 &cfg_base_addr_index, &cfg_offset);
9184 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9185 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9186 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9187 4, h->ioaccel2_blockFetchTable);
9188 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9189 BUILD_BUG_ON(offsetof(struct CfgTable,
9190 io_accel_request_size_offset) != 0xb8);
9191 h->ioaccel2_bft2_regs =
9192 remap_pci_mem(pci_resource_start(h->pdev,
9193 cfg_base_addr_index) +
9194 cfg_offset + bft2_offset,
9195 ARRAY_SIZE(bft2) *
9196 sizeof(*h->ioaccel2_bft2_regs));
9197 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9198 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9199 }
9200 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9201 if (hpsa_wait_for_mode_change_ack(h)) {
9202 dev_err(&h->pdev->dev,
9203 "performant mode problem - enabling ioaccel mode\n");
9204 return -ENODEV;
9205 }
9206 return 0;
9207 }
9208
9209 /* Free ioaccel1 mode command blocks and block fetch table */
9210 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9211 {
9212 if (h->ioaccel_cmd_pool) {
9213 pci_free_consistent(h->pdev,
9214 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9215 h->ioaccel_cmd_pool,
9216 h->ioaccel_cmd_pool_dhandle);
9217 h->ioaccel_cmd_pool = NULL;
9218 h->ioaccel_cmd_pool_dhandle = 0;
9219 }
9220 kfree(h->ioaccel1_blockFetchTable);
9221 h->ioaccel1_blockFetchTable = NULL;
9222 }
9223
9224 /* Allocate ioaccel1 mode command blocks and block fetch table */
9225 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9226 {
9227 h->ioaccel_maxsg =
9228 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9229 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9230 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9231
9232 /* Command structures must be aligned on a 128-byte boundary
9233 * because the 7 lower bits of the address are used by the
9234 * hardware.
9235 */
9236 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9237 IOACCEL1_COMMANDLIST_ALIGNMENT);
9238 h->ioaccel_cmd_pool =
9239 pci_alloc_consistent(h->pdev,
9240 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9241 &(h->ioaccel_cmd_pool_dhandle));
9242
9243 h->ioaccel1_blockFetchTable =
9244 kmalloc(((h->ioaccel_maxsg + 1) *
9245 sizeof(u32)), GFP_KERNEL);
9246
9247 if ((h->ioaccel_cmd_pool == NULL) ||
9248 (h->ioaccel1_blockFetchTable == NULL))
9249 goto clean_up;
9250
9251 memset(h->ioaccel_cmd_pool, 0,
9252 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9253 return 0;
9254
9255 clean_up:
9256 hpsa_free_ioaccel1_cmd_and_bft(h);
9257 return -ENOMEM;
9258 }
9259
9260 /* Free ioaccel2 mode command blocks and block fetch table */
9261 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9262 {
9263 hpsa_free_ioaccel2_sg_chain_blocks(h);
9264
9265 if (h->ioaccel2_cmd_pool) {
9266 pci_free_consistent(h->pdev,
9267 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9268 h->ioaccel2_cmd_pool,
9269 h->ioaccel2_cmd_pool_dhandle);
9270 h->ioaccel2_cmd_pool = NULL;
9271 h->ioaccel2_cmd_pool_dhandle = 0;
9272 }
9273 kfree(h->ioaccel2_blockFetchTable);
9274 h->ioaccel2_blockFetchTable = NULL;
9275 }
9276
9277 /* Allocate ioaccel2 mode command blocks and block fetch table */
9278 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9279 {
9280 int rc;
9281
9282 /* Allocate ioaccel2 mode command blocks and block fetch table */
9283
9284 h->ioaccel_maxsg =
9285 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9286 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9287 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9288
9289 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9290 IOACCEL2_COMMANDLIST_ALIGNMENT);
9291 h->ioaccel2_cmd_pool =
9292 pci_alloc_consistent(h->pdev,
9293 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9294 &(h->ioaccel2_cmd_pool_dhandle));
9295
9296 h->ioaccel2_blockFetchTable =
9297 kmalloc(((h->ioaccel_maxsg + 1) *
9298 sizeof(u32)), GFP_KERNEL);
9299
9300 if ((h->ioaccel2_cmd_pool == NULL) ||
9301 (h->ioaccel2_blockFetchTable == NULL)) {
9302 rc = -ENOMEM;
9303 goto clean_up;
9304 }
9305
9306 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9307 if (rc)
9308 goto clean_up;
9309
9310 memset(h->ioaccel2_cmd_pool, 0,
9311 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9312 return 0;
9313
9314 clean_up:
9315 hpsa_free_ioaccel2_cmd_and_bft(h);
9316 return rc;
9317 }
9318
9319 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9320 static void hpsa_free_performant_mode(struct ctlr_info *h)
9321 {
9322 kfree(h->blockFetchTable);
9323 h->blockFetchTable = NULL;
9324 hpsa_free_reply_queues(h);
9325 hpsa_free_ioaccel1_cmd_and_bft(h);
9326 hpsa_free_ioaccel2_cmd_and_bft(h);
9327 }
9328
9329 /* return -ENODEV on error, 0 on success (or no action)
9330 * allocates numerous items that must be freed later
9331 */
9332 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9333 {
9334 u32 trans_support;
9335 unsigned long transMethod = CFGTBL_Trans_Performant |
9336 CFGTBL_Trans_use_short_tags;
9337 int i, rc;
9338
9339 if (hpsa_simple_mode)
9340 return 0;
9341
9342 trans_support = readl(&(h->cfgtable->TransportSupport));
9343 if (!(trans_support & PERFORMANT_MODE))
9344 return 0;
9345
9346 /* Check for I/O accelerator mode support */
9347 if (trans_support & CFGTBL_Trans_io_accel1) {
9348 transMethod |= CFGTBL_Trans_io_accel1 |
9349 CFGTBL_Trans_enable_directed_msix;
9350 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9351 if (rc)
9352 return rc;
9353 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9354 transMethod |= CFGTBL_Trans_io_accel2 |
9355 CFGTBL_Trans_enable_directed_msix;
9356 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9357 if (rc)
9358 return rc;
9359 }
9360
9361 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9362 hpsa_get_max_perf_mode_cmds(h);
9363 /* Performant mode ring buffer and supporting data structures */
9364 h->reply_queue_size = h->max_commands * sizeof(u64);
9365
9366 for (i = 0; i < h->nreply_queues; i++) {
9367 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9368 h->reply_queue_size,
9369 &(h->reply_queue[i].busaddr));
9370 if (!h->reply_queue[i].head) {
9371 rc = -ENOMEM;
9372 goto clean1; /* rq, ioaccel */
9373 }
9374 h->reply_queue[i].size = h->max_commands;
9375 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9376 h->reply_queue[i].current_entry = 0;
9377 }
9378
9379 /* Need a block fetch table for performant mode */
9380 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9381 sizeof(u32)), GFP_KERNEL);
9382 if (!h->blockFetchTable) {
9383 rc = -ENOMEM;
9384 goto clean1; /* rq, ioaccel */
9385 }
9386
9387 rc = hpsa_enter_performant_mode(h, trans_support);
9388 if (rc)
9389 goto clean2; /* bft, rq, ioaccel */
9390 return 0;
9391
9392 clean2: /* bft, rq, ioaccel */
9393 kfree(h->blockFetchTable);
9394 h->blockFetchTable = NULL;
9395 clean1: /* rq, ioaccel */
9396 hpsa_free_reply_queues(h);
9397 hpsa_free_ioaccel1_cmd_and_bft(h);
9398 hpsa_free_ioaccel2_cmd_and_bft(h);
9399 return rc;
9400 }
9401
9402 static int is_accelerated_cmd(struct CommandList *c)
9403 {
9404 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9405 }
9406
9407 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9408 {
9409 struct CommandList *c = NULL;
9410 int i, accel_cmds_out;
9411 int refcount;
9412
9413 do { /* wait for all outstanding ioaccel commands to drain out */
9414 accel_cmds_out = 0;
9415 for (i = 0; i < h->nr_cmds; i++) {
9416 c = h->cmd_pool + i;
9417 refcount = atomic_inc_return(&c->refcount);
9418 if (refcount > 1) /* Command is allocated */
9419 accel_cmds_out += is_accelerated_cmd(c);
9420 cmd_free(h, c);
9421 }
9422 if (accel_cmds_out <= 0)
9423 break;
9424 msleep(100);
9425 } while (1);
9426 }
9427
9428 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9429 struct hpsa_sas_port *hpsa_sas_port)
9430 {
9431 struct hpsa_sas_phy *hpsa_sas_phy;
9432 struct sas_phy *phy;
9433
9434 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9435 if (!hpsa_sas_phy)
9436 return NULL;
9437
9438 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9439 hpsa_sas_port->next_phy_index);
9440 if (!phy) {
9441 kfree(hpsa_sas_phy);
9442 return NULL;
9443 }
9444
9445 hpsa_sas_port->next_phy_index++;
9446 hpsa_sas_phy->phy = phy;
9447 hpsa_sas_phy->parent_port = hpsa_sas_port;
9448
9449 return hpsa_sas_phy;
9450 }
9451
9452 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9453 {
9454 struct sas_phy *phy = hpsa_sas_phy->phy;
9455
9456 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9457 if (hpsa_sas_phy->added_to_port)
9458 list_del(&hpsa_sas_phy->phy_list_entry);
9459 sas_phy_delete(phy);
9460 kfree(hpsa_sas_phy);
9461 }
9462
9463 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9464 {
9465 int rc;
9466 struct hpsa_sas_port *hpsa_sas_port;
9467 struct sas_phy *phy;
9468 struct sas_identify *identify;
9469
9470 hpsa_sas_port = hpsa_sas_phy->parent_port;
9471 phy = hpsa_sas_phy->phy;
9472
9473 identify = &phy->identify;
9474 memset(identify, 0, sizeof(*identify));
9475 identify->sas_address = hpsa_sas_port->sas_address;
9476 identify->device_type = SAS_END_DEVICE;
9477 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9478 identify->target_port_protocols = SAS_PROTOCOL_STP;
9479 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9480 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9481 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9482 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9483 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9484
9485 rc = sas_phy_add(hpsa_sas_phy->phy);
9486 if (rc)
9487 return rc;
9488
9489 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9490 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9491 &hpsa_sas_port->phy_list_head);
9492 hpsa_sas_phy->added_to_port = true;
9493
9494 return 0;
9495 }
9496
9497 static int
9498 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9499 struct sas_rphy *rphy)
9500 {
9501 struct sas_identify *identify;
9502
9503 identify = &rphy->identify;
9504 identify->sas_address = hpsa_sas_port->sas_address;
9505 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9506 identify->target_port_protocols = SAS_PROTOCOL_STP;
9507
9508 return sas_rphy_add(rphy);
9509 }
9510
9511 static struct hpsa_sas_port
9512 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9513 u64 sas_address)
9514 {
9515 int rc;
9516 struct hpsa_sas_port *hpsa_sas_port;
9517 struct sas_port *port;
9518
9519 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9520 if (!hpsa_sas_port)
9521 return NULL;
9522
9523 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9524 hpsa_sas_port->parent_node = hpsa_sas_node;
9525
9526 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9527 if (!port)
9528 goto free_hpsa_port;
9529
9530 rc = sas_port_add(port);
9531 if (rc)
9532 goto free_sas_port;
9533
9534 hpsa_sas_port->port = port;
9535 hpsa_sas_port->sas_address = sas_address;
9536 list_add_tail(&hpsa_sas_port->port_list_entry,
9537 &hpsa_sas_node->port_list_head);
9538
9539 return hpsa_sas_port;
9540
9541 free_sas_port:
9542 sas_port_free(port);
9543 free_hpsa_port:
9544 kfree(hpsa_sas_port);
9545
9546 return NULL;
9547 }
9548
9549 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9550 {
9551 struct hpsa_sas_phy *hpsa_sas_phy;
9552 struct hpsa_sas_phy *next;
9553
9554 list_for_each_entry_safe(hpsa_sas_phy, next,
9555 &hpsa_sas_port->phy_list_head, phy_list_entry)
9556 hpsa_free_sas_phy(hpsa_sas_phy);
9557
9558 sas_port_delete(hpsa_sas_port->port);
9559 list_del(&hpsa_sas_port->port_list_entry);
9560 kfree(hpsa_sas_port);
9561 }
9562
9563 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9564 {
9565 struct hpsa_sas_node *hpsa_sas_node;
9566
9567 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9568 if (hpsa_sas_node) {
9569 hpsa_sas_node->parent_dev = parent_dev;
9570 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9571 }
9572
9573 return hpsa_sas_node;
9574 }
9575
9576 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9577 {
9578 struct hpsa_sas_port *hpsa_sas_port;
9579 struct hpsa_sas_port *next;
9580
9581 if (!hpsa_sas_node)
9582 return;
9583
9584 list_for_each_entry_safe(hpsa_sas_port, next,
9585 &hpsa_sas_node->port_list_head, port_list_entry)
9586 hpsa_free_sas_port(hpsa_sas_port);
9587
9588 kfree(hpsa_sas_node);
9589 }
9590
9591 static struct hpsa_scsi_dev_t
9592 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9593 struct sas_rphy *rphy)
9594 {
9595 int i;
9596 struct hpsa_scsi_dev_t *device;
9597
9598 for (i = 0; i < h->ndevices; i++) {
9599 device = h->dev[i];
9600 if (!device->sas_port)
9601 continue;
9602 if (device->sas_port->rphy == rphy)
9603 return device;
9604 }
9605
9606 return NULL;
9607 }
9608
9609 static int hpsa_add_sas_host(struct ctlr_info *h)
9610 {
9611 int rc;
9612 struct device *parent_dev;
9613 struct hpsa_sas_node *hpsa_sas_node;
9614 struct hpsa_sas_port *hpsa_sas_port;
9615 struct hpsa_sas_phy *hpsa_sas_phy;
9616
9617 parent_dev = &h->scsi_host->shost_dev;
9618
9619 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9620 if (!hpsa_sas_node)
9621 return -ENOMEM;
9622
9623 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9624 if (!hpsa_sas_port) {
9625 rc = -ENODEV;
9626 goto free_sas_node;
9627 }
9628
9629 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9630 if (!hpsa_sas_phy) {
9631 rc = -ENODEV;
9632 goto free_sas_port;
9633 }
9634
9635 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9636 if (rc)
9637 goto free_sas_phy;
9638
9639 h->sas_host = hpsa_sas_node;
9640
9641 return 0;
9642
9643 free_sas_phy:
9644 hpsa_free_sas_phy(hpsa_sas_phy);
9645 free_sas_port:
9646 hpsa_free_sas_port(hpsa_sas_port);
9647 free_sas_node:
9648 hpsa_free_sas_node(hpsa_sas_node);
9649
9650 return rc;
9651 }
9652
9653 static void hpsa_delete_sas_host(struct ctlr_info *h)
9654 {
9655 hpsa_free_sas_node(h->sas_host);
9656 }
9657
9658 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9659 struct hpsa_scsi_dev_t *device)
9660 {
9661 int rc;
9662 struct hpsa_sas_port *hpsa_sas_port;
9663 struct sas_rphy *rphy;
9664
9665 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9666 if (!hpsa_sas_port)
9667 return -ENOMEM;
9668
9669 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9670 if (!rphy) {
9671 rc = -ENODEV;
9672 goto free_sas_port;
9673 }
9674
9675 hpsa_sas_port->rphy = rphy;
9676 device->sas_port = hpsa_sas_port;
9677
9678 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9679 if (rc)
9680 goto free_sas_port;
9681
9682 return 0;
9683
9684 free_sas_port:
9685 hpsa_free_sas_port(hpsa_sas_port);
9686 device->sas_port = NULL;
9687
9688 return rc;
9689 }
9690
9691 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9692 {
9693 if (device->sas_port) {
9694 hpsa_free_sas_port(device->sas_port);
9695 device->sas_port = NULL;
9696 }
9697 }
9698
9699 static int
9700 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9701 {
9702 return 0;
9703 }
9704
9705 static int
9706 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9707 {
9708 *identifier = rphy->identify.sas_address;
9709 return 0;
9710 }
9711
9712 static int
9713 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9714 {
9715 return -ENXIO;
9716 }
9717
9718 static int
9719 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9720 {
9721 return 0;
9722 }
9723
9724 static int
9725 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9726 {
9727 return 0;
9728 }
9729
9730 static int
9731 hpsa_sas_phy_setup(struct sas_phy *phy)
9732 {
9733 return 0;
9734 }
9735
9736 static void
9737 hpsa_sas_phy_release(struct sas_phy *phy)
9738 {
9739 }
9740
9741 static int
9742 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9743 {
9744 return -EINVAL;
9745 }
9746
9747 static struct sas_function_template hpsa_sas_transport_functions = {
9748 .get_linkerrors = hpsa_sas_get_linkerrors,
9749 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9750 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9751 .phy_reset = hpsa_sas_phy_reset,
9752 .phy_enable = hpsa_sas_phy_enable,
9753 .phy_setup = hpsa_sas_phy_setup,
9754 .phy_release = hpsa_sas_phy_release,
9755 .set_phy_speed = hpsa_sas_phy_speed,
9756 };
9757
9758 /*
9759 * This is it. Register the PCI driver information for the cards we control
9760 * the OS will call our registered routines when it finds one of our cards.
9761 */
9762 static int __init hpsa_init(void)
9763 {
9764 int rc;
9765
9766 hpsa_sas_transport_template =
9767 sas_attach_transport(&hpsa_sas_transport_functions);
9768 if (!hpsa_sas_transport_template)
9769 return -ENODEV;
9770
9771 rc = pci_register_driver(&hpsa_pci_driver);
9772
9773 if (rc)
9774 sas_release_transport(hpsa_sas_transport_template);
9775
9776 return rc;
9777 }
9778
9779 static void __exit hpsa_cleanup(void)
9780 {
9781 pci_unregister_driver(&hpsa_pci_driver);
9782 sas_release_transport(hpsa_sas_transport_template);
9783 }
9784
9785 static void __attribute__((unused)) verify_offsets(void)
9786 {
9787 #define VERIFY_OFFSET(member, offset) \
9788 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9789
9790 VERIFY_OFFSET(structure_size, 0);
9791 VERIFY_OFFSET(volume_blk_size, 4);
9792 VERIFY_OFFSET(volume_blk_cnt, 8);
9793 VERIFY_OFFSET(phys_blk_shift, 16);
9794 VERIFY_OFFSET(parity_rotation_shift, 17);
9795 VERIFY_OFFSET(strip_size, 18);
9796 VERIFY_OFFSET(disk_starting_blk, 20);
9797 VERIFY_OFFSET(disk_blk_cnt, 28);
9798 VERIFY_OFFSET(data_disks_per_row, 36);
9799 VERIFY_OFFSET(metadata_disks_per_row, 38);
9800 VERIFY_OFFSET(row_cnt, 40);
9801 VERIFY_OFFSET(layout_map_count, 42);
9802 VERIFY_OFFSET(flags, 44);
9803 VERIFY_OFFSET(dekindex, 46);
9804 /* VERIFY_OFFSET(reserved, 48 */
9805 VERIFY_OFFSET(data, 64);
9806
9807 #undef VERIFY_OFFSET
9808
9809 #define VERIFY_OFFSET(member, offset) \
9810 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9811
9812 VERIFY_OFFSET(IU_type, 0);
9813 VERIFY_OFFSET(direction, 1);
9814 VERIFY_OFFSET(reply_queue, 2);
9815 /* VERIFY_OFFSET(reserved1, 3); */
9816 VERIFY_OFFSET(scsi_nexus, 4);
9817 VERIFY_OFFSET(Tag, 8);
9818 VERIFY_OFFSET(cdb, 16);
9819 VERIFY_OFFSET(cciss_lun, 32);
9820 VERIFY_OFFSET(data_len, 40);
9821 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9822 VERIFY_OFFSET(sg_count, 45);
9823 /* VERIFY_OFFSET(reserved3 */
9824 VERIFY_OFFSET(err_ptr, 48);
9825 VERIFY_OFFSET(err_len, 56);
9826 /* VERIFY_OFFSET(reserved4 */
9827 VERIFY_OFFSET(sg, 64);
9828
9829 #undef VERIFY_OFFSET
9830
9831 #define VERIFY_OFFSET(member, offset) \
9832 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9833
9834 VERIFY_OFFSET(dev_handle, 0x00);
9835 VERIFY_OFFSET(reserved1, 0x02);
9836 VERIFY_OFFSET(function, 0x03);
9837 VERIFY_OFFSET(reserved2, 0x04);
9838 VERIFY_OFFSET(err_info, 0x0C);
9839 VERIFY_OFFSET(reserved3, 0x10);
9840 VERIFY_OFFSET(err_info_len, 0x12);
9841 VERIFY_OFFSET(reserved4, 0x13);
9842 VERIFY_OFFSET(sgl_offset, 0x14);
9843 VERIFY_OFFSET(reserved5, 0x15);
9844 VERIFY_OFFSET(transfer_len, 0x1C);
9845 VERIFY_OFFSET(reserved6, 0x20);
9846 VERIFY_OFFSET(io_flags, 0x24);
9847 VERIFY_OFFSET(reserved7, 0x26);
9848 VERIFY_OFFSET(LUN, 0x34);
9849 VERIFY_OFFSET(control, 0x3C);
9850 VERIFY_OFFSET(CDB, 0x40);
9851 VERIFY_OFFSET(reserved8, 0x50);
9852 VERIFY_OFFSET(host_context_flags, 0x60);
9853 VERIFY_OFFSET(timeout_sec, 0x62);
9854 VERIFY_OFFSET(ReplyQueue, 0x64);
9855 VERIFY_OFFSET(reserved9, 0x65);
9856 VERIFY_OFFSET(tag, 0x68);
9857 VERIFY_OFFSET(host_addr, 0x70);
9858 VERIFY_OFFSET(CISS_LUN, 0x78);
9859 VERIFY_OFFSET(SG, 0x78 + 8);
9860 #undef VERIFY_OFFSET
9861 }
9862
9863 module_init(hpsa_init);
9864 module_exit(hpsa_cleanup);
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