1 /* sound/soc/samsung/i2s.c
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 * Jaswinder Singh <jassisinghbrar@gmail.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
19 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
28 #include <linux/platform_data/asoc-s3c.h>
35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
37 struct samsung_i2s_variant_regs
{
42 unsigned int rclksrc_off
;
44 unsigned int cdclkcon_off
;
46 unsigned int bfs_mask
;
47 unsigned int rfs_mask
;
48 unsigned int ftx0cnt_off
;
51 struct samsung_i2s_dai_data
{
53 unsigned int pcm_rates
;
54 const struct samsung_i2s_variant_regs
*i2s_variant_regs
;
58 /* Platform device for this DAI */
59 struct platform_device
*pdev
;
60 /* Memory mapped SFR region */
62 /* Rate of RCLK source clock */
63 unsigned long rclk_srcrate
;
67 * Specifically requested RCLK,BCLK by MACHINE Driver.
68 * 0 indicates CPU driver is free to choose any value.
71 /* I2S Controller's core clock */
73 /* Clock for generating I2S signals */
75 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
76 struct i2s_dai
*pri_dai
;
77 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
78 struct i2s_dai
*sec_dai
;
79 #define DAI_OPENED (1 << 0) /* Dai is opened */
80 #define DAI_MANAGER (1 << 1) /* Dai is the manager */
82 /* Driver for this DAI */
83 struct snd_soc_dai_driver i2s_dai_drv
;
85 struct snd_dmaengine_dai_dma_data dma_playback
;
86 struct snd_dmaengine_dai_dma_data dma_capture
;
87 struct snd_dmaengine_dai_dma_data idma_playback
;
93 const struct samsung_i2s_variant_regs
*variant_regs
;
95 /* Spinlock protecting access to the device's registers */
99 /* Below fields are only valid if this is the primary FIFO */
100 struct clk
*clk_table
[3];
101 struct clk_onecell_data clk_data
;
104 /* Lock for cross i/f checks */
105 static DEFINE_SPINLOCK(lock
);
107 /* If this is the 'overlay' stereo DAI */
108 static inline bool is_secondary(struct i2s_dai
*i2s
)
110 return i2s
->pri_dai
? true : false;
113 /* If operating in SoC-Slave mode */
114 static inline bool is_slave(struct i2s_dai
*i2s
)
116 u32 mod
= readl(i2s
->addr
+ I2SMOD
);
117 return (mod
& (1 << i2s
->variant_regs
->mss_off
)) ? true : false;
120 /* If this interface of the controller is transmitting data */
121 static inline bool tx_active(struct i2s_dai
*i2s
)
128 active
= readl(i2s
->addr
+ I2SCON
);
130 if (is_secondary(i2s
))
131 active
&= CON_TXSDMA_ACTIVE
;
133 active
&= CON_TXDMA_ACTIVE
;
135 return active
? true : false;
138 /* Return pointer to the other DAI */
139 static inline struct i2s_dai
*get_other_dai(struct i2s_dai
*i2s
)
141 return i2s
->pri_dai
? : i2s
->sec_dai
;
144 /* If the other interface of the controller is transmitting data */
145 static inline bool other_tx_active(struct i2s_dai
*i2s
)
147 struct i2s_dai
*other
= get_other_dai(i2s
);
149 return tx_active(other
);
152 /* If any interface of the controller is transmitting data */
153 static inline bool any_tx_active(struct i2s_dai
*i2s
)
155 return tx_active(i2s
) || other_tx_active(i2s
);
158 /* If this interface of the controller is receiving data */
159 static inline bool rx_active(struct i2s_dai
*i2s
)
166 active
= readl(i2s
->addr
+ I2SCON
) & CON_RXDMA_ACTIVE
;
168 return active
? true : false;
171 /* If the other interface of the controller is receiving data */
172 static inline bool other_rx_active(struct i2s_dai
*i2s
)
174 struct i2s_dai
*other
= get_other_dai(i2s
);
176 return rx_active(other
);
179 /* If any interface of the controller is receiving data */
180 static inline bool any_rx_active(struct i2s_dai
*i2s
)
182 return rx_active(i2s
) || other_rx_active(i2s
);
185 /* If the other DAI is transmitting or receiving data */
186 static inline bool other_active(struct i2s_dai
*i2s
)
188 return other_rx_active(i2s
) || other_tx_active(i2s
);
191 /* If this DAI is transmitting or receiving data */
192 static inline bool this_active(struct i2s_dai
*i2s
)
194 return tx_active(i2s
) || rx_active(i2s
);
197 /* If the controller is active anyway */
198 static inline bool any_active(struct i2s_dai
*i2s
)
200 return this_active(i2s
) || other_active(i2s
);
203 static inline struct i2s_dai
*to_info(struct snd_soc_dai
*dai
)
205 return snd_soc_dai_get_drvdata(dai
);
208 static inline bool is_opened(struct i2s_dai
*i2s
)
210 if (i2s
&& (i2s
->mode
& DAI_OPENED
))
216 static inline bool is_manager(struct i2s_dai
*i2s
)
218 if (is_opened(i2s
) && (i2s
->mode
& DAI_MANAGER
))
224 /* Read RCLK of I2S (in multiples of LRCLK) */
225 static inline unsigned get_rfs(struct i2s_dai
*i2s
)
228 rfs
= readl(i2s
->addr
+ I2SMOD
) >> i2s
->variant_regs
->rfs_off
;
229 rfs
&= i2s
->variant_regs
->rfs_mask
;
243 /* Write RCLK of I2S (in multiples of LRCLK) */
244 static inline void set_rfs(struct i2s_dai
*i2s
, unsigned rfs
)
246 u32 mod
= readl(i2s
->addr
+ I2SMOD
);
247 int rfs_shift
= i2s
->variant_regs
->rfs_off
;
249 mod
&= ~(i2s
->variant_regs
->rfs_mask
<< rfs_shift
);
253 mod
|= (EXYNOS7_MOD_RCLK_192FS
<< rfs_shift
);
256 mod
|= (EXYNOS7_MOD_RCLK_96FS
<< rfs_shift
);
259 mod
|= (EXYNOS7_MOD_RCLK_128FS
<< rfs_shift
);
262 mod
|= (EXYNOS7_MOD_RCLK_64FS
<< rfs_shift
);
265 mod
|= (MOD_RCLK_768FS
<< rfs_shift
);
268 mod
|= (MOD_RCLK_512FS
<< rfs_shift
);
271 mod
|= (MOD_RCLK_384FS
<< rfs_shift
);
274 mod
|= (MOD_RCLK_256FS
<< rfs_shift
);
278 writel(mod
, i2s
->addr
+ I2SMOD
);
281 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
282 static inline unsigned get_bfs(struct i2s_dai
*i2s
)
285 bfs
= readl(i2s
->addr
+ I2SMOD
) >> i2s
->variant_regs
->bfs_off
;
286 bfs
&= i2s
->variant_regs
->bfs_mask
;
301 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
302 static inline void set_bfs(struct i2s_dai
*i2s
, unsigned bfs
)
304 u32 mod
= readl(i2s
->addr
+ I2SMOD
);
305 int tdm
= i2s
->quirks
& QUIRK_SUPPORTS_TDM
;
306 int bfs_shift
= i2s
->variant_regs
->bfs_off
;
308 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
309 if (!tdm
&& bfs
> 48) {
310 dev_err(&i2s
->pdev
->dev
, "Unsupported BCLK divider\n");
314 mod
&= ~(i2s
->variant_regs
->bfs_mask
<< bfs_shift
);
318 mod
|= (MOD_BCLK_48FS
<< bfs_shift
);
321 mod
|= (MOD_BCLK_32FS
<< bfs_shift
);
324 mod
|= (MOD_BCLK_24FS
<< bfs_shift
);
327 mod
|= (MOD_BCLK_16FS
<< bfs_shift
);
330 mod
|= (EXYNOS5420_MOD_BCLK_64FS
<< bfs_shift
);
333 mod
|= (EXYNOS5420_MOD_BCLK_96FS
<< bfs_shift
);
336 mod
|= (EXYNOS5420_MOD_BCLK_128FS
<< bfs_shift
);
339 mod
|= (EXYNOS5420_MOD_BCLK_192FS
<< bfs_shift
);
342 mod
|= (EXYNOS5420_MOD_BCLK_256FS
<< bfs_shift
);
345 dev_err(&i2s
->pdev
->dev
, "Wrong BCLK Divider!\n");
349 writel(mod
, i2s
->addr
+ I2SMOD
);
353 static inline int get_blc(struct i2s_dai
*i2s
)
355 int blc
= readl(i2s
->addr
+ I2SMOD
);
357 blc
= (blc
>> 13) & 0x3;
366 /* TX Channel Control */
367 static void i2s_txctrl(struct i2s_dai
*i2s
, int on
)
369 void __iomem
*addr
= i2s
->addr
;
370 int txr_off
= i2s
->variant_regs
->txr_off
;
371 u32 con
= readl(addr
+ I2SCON
);
372 u32 mod
= readl(addr
+ I2SMOD
) & ~(3 << txr_off
);
376 con
&= ~CON_TXCH_PAUSE
;
378 if (is_secondary(i2s
)) {
379 con
|= CON_TXSDMA_ACTIVE
;
380 con
&= ~CON_TXSDMA_PAUSE
;
382 con
|= CON_TXDMA_ACTIVE
;
383 con
&= ~CON_TXDMA_PAUSE
;
386 if (any_rx_active(i2s
))
391 if (is_secondary(i2s
)) {
392 con
|= CON_TXSDMA_PAUSE
;
393 con
&= ~CON_TXSDMA_ACTIVE
;
395 con
|= CON_TXDMA_PAUSE
;
396 con
&= ~CON_TXDMA_ACTIVE
;
399 if (other_tx_active(i2s
)) {
400 writel(con
, addr
+ I2SCON
);
404 con
|= CON_TXCH_PAUSE
;
406 if (any_rx_active(i2s
))
412 writel(mod
, addr
+ I2SMOD
);
413 writel(con
, addr
+ I2SCON
);
416 /* RX Channel Control */
417 static void i2s_rxctrl(struct i2s_dai
*i2s
, int on
)
419 void __iomem
*addr
= i2s
->addr
;
420 int txr_off
= i2s
->variant_regs
->txr_off
;
421 u32 con
= readl(addr
+ I2SCON
);
422 u32 mod
= readl(addr
+ I2SMOD
) & ~(3 << txr_off
);
425 con
|= CON_RXDMA_ACTIVE
| CON_ACTIVE
;
426 con
&= ~(CON_RXDMA_PAUSE
| CON_RXCH_PAUSE
);
428 if (any_tx_active(i2s
))
433 con
|= CON_RXDMA_PAUSE
| CON_RXCH_PAUSE
;
434 con
&= ~CON_RXDMA_ACTIVE
;
436 if (any_tx_active(i2s
))
442 writel(mod
, addr
+ I2SMOD
);
443 writel(con
, addr
+ I2SCON
);
446 /* Flush FIFO of an interface */
447 static inline void i2s_fifo(struct i2s_dai
*i2s
, u32 flush
)
455 if (is_secondary(i2s
))
456 fic
= i2s
->addr
+ I2SFICS
;
458 fic
= i2s
->addr
+ I2SFIC
;
461 writel(readl(fic
) | flush
, fic
);
464 val
= msecs_to_loops(1) / 1000; /* 1 usec */
468 writel(readl(fic
) & ~flush
, fic
);
471 static int i2s_set_sysclk(struct snd_soc_dai
*dai
,
472 int clk_id
, unsigned int rfs
, int dir
)
474 struct i2s_dai
*i2s
= to_info(dai
);
475 struct i2s_dai
*other
= get_other_dai(i2s
);
476 const struct samsung_i2s_variant_regs
*i2s_regs
= i2s
->variant_regs
;
477 unsigned int cdcon_mask
= 1 << i2s_regs
->cdclkcon_off
;
478 unsigned int rsrc_mask
= 1 << i2s_regs
->rclksrc_off
;
479 u32 mod
, mask
, val
= 0;
483 pm_runtime_get_sync(dai
->dev
);
485 spin_lock_irqsave(i2s
->lock
, flags
);
486 mod
= readl(i2s
->addr
+ I2SMOD
);
487 spin_unlock_irqrestore(i2s
->lock
, flags
);
490 case SAMSUNG_I2S_OPCLK
:
491 mask
= MOD_OPCLK_MASK
;
494 case SAMSUNG_I2S_CDCLK
:
495 mask
= 1 << i2s_regs
->cdclkcon_off
;
496 /* Shouldn't matter in GATING(CLOCK_IN) mode */
497 if (dir
== SND_SOC_CLOCK_IN
)
500 if ((rfs
&& other
&& other
->rfs
&& (other
->rfs
!= rfs
)) ||
502 (((dir
== SND_SOC_CLOCK_IN
)
503 && !(mod
& cdcon_mask
)) ||
504 ((dir
== SND_SOC_CLOCK_OUT
)
505 && (mod
& cdcon_mask
))))) {
506 dev_err(&i2s
->pdev
->dev
,
507 "%s:%d Other DAI busy\n", __func__
, __LINE__
);
512 if (dir
== SND_SOC_CLOCK_IN
)
513 val
= 1 << i2s_regs
->cdclkcon_off
;
518 case SAMSUNG_I2S_RCLKSRC_0
: /* clock corrsponding to IISMOD[10] := 0 */
519 case SAMSUNG_I2S_RCLKSRC_1
: /* clock corrsponding to IISMOD[10] := 1 */
520 mask
= 1 << i2s_regs
->rclksrc_off
;
522 if ((i2s
->quirks
& QUIRK_NO_MUXPSR
)
523 || (clk_id
== SAMSUNG_I2S_RCLKSRC_0
))
528 if (!any_active(i2s
)) {
529 if (i2s
->op_clk
&& !IS_ERR(i2s
->op_clk
)) {
530 if ((clk_id
&& !(mod
& rsrc_mask
)) ||
531 (!clk_id
&& (mod
& rsrc_mask
))) {
532 clk_disable_unprepare(i2s
->op_clk
);
533 clk_put(i2s
->op_clk
);
536 clk_get_rate(i2s
->op_clk
);
542 i2s
->op_clk
= clk_get(&i2s
->pdev
->dev
,
545 i2s
->op_clk
= clk_get(&i2s
->pdev
->dev
,
548 if (WARN_ON(IS_ERR(i2s
->op_clk
))) {
549 ret
= PTR_ERR(i2s
->op_clk
);
554 ret
= clk_prepare_enable(i2s
->op_clk
);
556 clk_put(i2s
->op_clk
);
560 i2s
->rclk_srcrate
= clk_get_rate(i2s
->op_clk
);
562 /* Over-ride the other's */
564 other
->op_clk
= i2s
->op_clk
;
565 other
->rclk_srcrate
= i2s
->rclk_srcrate
;
567 } else if ((!clk_id
&& (mod
& rsrc_mask
))
568 || (clk_id
&& !(mod
& rsrc_mask
))) {
569 dev_err(&i2s
->pdev
->dev
,
570 "%s:%d Other DAI busy\n", __func__
, __LINE__
);
574 /* Call can't be on the active DAI */
575 i2s
->op_clk
= other
->op_clk
;
576 i2s
->rclk_srcrate
= other
->rclk_srcrate
;
581 val
= 1 << i2s_regs
->rclksrc_off
;
584 dev_err(&i2s
->pdev
->dev
, "We don't serve that!\n");
589 spin_lock_irqsave(i2s
->lock
, flags
);
590 mod
= readl(i2s
->addr
+ I2SMOD
);
591 mod
= (mod
& ~mask
) | val
;
592 writel(mod
, i2s
->addr
+ I2SMOD
);
593 spin_unlock_irqrestore(i2s
->lock
, flags
);
595 pm_runtime_put(dai
->dev
);
599 pm_runtime_put(dai
->dev
);
603 static int i2s_set_fmt(struct snd_soc_dai
*dai
,
606 struct i2s_dai
*i2s
= to_info(dai
);
607 struct i2s_dai
*other
= get_other_dai(i2s
);
608 int lrp_shift
, sdf_shift
, sdf_mask
, lrp_rlow
, mod_slave
;
612 lrp_shift
= i2s
->variant_regs
->lrp_off
;
613 sdf_shift
= i2s
->variant_regs
->sdf_off
;
614 mod_slave
= 1 << i2s
->variant_regs
->mss_off
;
616 sdf_mask
= MOD_SDF_MASK
<< sdf_shift
;
617 lrp_rlow
= MOD_LR_RLOW
<< lrp_shift
;
619 /* Format is priority */
620 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
621 case SND_SOC_DAIFMT_RIGHT_J
:
623 tmp
|= (MOD_SDF_MSB
<< sdf_shift
);
625 case SND_SOC_DAIFMT_LEFT_J
:
627 tmp
|= (MOD_SDF_LSB
<< sdf_shift
);
629 case SND_SOC_DAIFMT_I2S
:
630 tmp
|= (MOD_SDF_IIS
<< sdf_shift
);
633 dev_err(&i2s
->pdev
->dev
, "Format not supported\n");
638 * INV flag is relative to the FORMAT flag - if set it simply
639 * flips the polarity specified by the Standard
641 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
642 case SND_SOC_DAIFMT_NB_NF
:
644 case SND_SOC_DAIFMT_NB_IF
:
651 dev_err(&i2s
->pdev
->dev
, "Polarity not supported\n");
655 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
656 case SND_SOC_DAIFMT_CBM_CFM
:
659 case SND_SOC_DAIFMT_CBS_CFS
:
661 * Set default source clock in Master mode, only when the
662 * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
663 * clock configuration assigned in DT is not overwritten.
665 if (i2s
->rclk_srcrate
== 0 && i2s
->clk_data
.clks
== NULL
&&
666 other
->clk_data
.clks
== NULL
)
667 i2s_set_sysclk(dai
, SAMSUNG_I2S_RCLKSRC_0
,
668 0, SND_SOC_CLOCK_IN
);
671 dev_err(&i2s
->pdev
->dev
, "master/slave format not supported\n");
675 pm_runtime_get_sync(dai
->dev
);
676 spin_lock_irqsave(i2s
->lock
, flags
);
677 mod
= readl(i2s
->addr
+ I2SMOD
);
679 * Don't change the I2S mode if any controller is active on this
682 if (any_active(i2s
) &&
683 ((mod
& (sdf_mask
| lrp_rlow
| mod_slave
)) != tmp
)) {
684 spin_unlock_irqrestore(i2s
->lock
, flags
);
685 pm_runtime_put(dai
->dev
);
686 dev_err(&i2s
->pdev
->dev
,
687 "%s:%d Other DAI busy\n", __func__
, __LINE__
);
691 mod
&= ~(sdf_mask
| lrp_rlow
| mod_slave
);
693 writel(mod
, i2s
->addr
+ I2SMOD
);
694 spin_unlock_irqrestore(i2s
->lock
, flags
);
695 pm_runtime_put(dai
->dev
);
700 static int i2s_hw_params(struct snd_pcm_substream
*substream
,
701 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
703 struct i2s_dai
*i2s
= to_info(dai
);
704 struct i2s_dai
*other
= get_other_dai(i2s
);
705 u32 mod
, mask
= 0, val
= 0;
709 WARN_ON(!pm_runtime_active(dai
->dev
));
711 if (!is_secondary(i2s
))
712 mask
|= (MOD_DC2_EN
| MOD_DC1_EN
);
714 switch (params_channels(params
)) {
721 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
722 i2s
->dma_playback
.addr_width
= 4;
724 i2s
->dma_capture
.addr_width
= 4;
727 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
728 i2s
->dma_playback
.addr_width
= 2;
730 i2s
->dma_capture
.addr_width
= 2;
734 dev_err(&i2s
->pdev
->dev
, "%d channels not supported\n",
735 params_channels(params
));
739 if (is_secondary(i2s
))
740 mask
|= MOD_BLCS_MASK
;
742 mask
|= MOD_BLCP_MASK
;
745 mask
|= MOD_BLC_MASK
;
747 switch (params_width(params
)) {
749 if (is_secondary(i2s
))
750 val
|= MOD_BLCS_8BIT
;
752 val
|= MOD_BLCP_8BIT
;
757 if (is_secondary(i2s
))
758 val
|= MOD_BLCS_16BIT
;
760 val
|= MOD_BLCP_16BIT
;
762 val
|= MOD_BLC_16BIT
;
765 if (is_secondary(i2s
))
766 val
|= MOD_BLCS_24BIT
;
768 val
|= MOD_BLCP_24BIT
;
770 val
|= MOD_BLC_24BIT
;
773 dev_err(&i2s
->pdev
->dev
, "Format(%d) not supported\n",
774 params_format(params
));
778 spin_lock_irqsave(i2s
->lock
, flags
);
779 mod
= readl(i2s
->addr
+ I2SMOD
);
780 mod
= (mod
& ~mask
) | val
;
781 writel(mod
, i2s
->addr
+ I2SMOD
);
782 spin_unlock_irqrestore(i2s
->lock
, flags
);
784 snd_soc_dai_init_dma_data(dai
, &i2s
->dma_playback
, &i2s
->dma_capture
);
786 i2s
->frmclk
= params_rate(params
);
788 rclksrc
= i2s
->clk_table
[CLK_I2S_RCLK_SRC
];
789 if (!rclksrc
|| IS_ERR(rclksrc
))
790 rclksrc
= other
->clk_table
[CLK_I2S_RCLK_SRC
];
792 if (rclksrc
&& !IS_ERR(rclksrc
))
793 i2s
->rclk_srcrate
= clk_get_rate(rclksrc
);
798 /* We set constraints on the substream acc to the version of I2S */
799 static int i2s_startup(struct snd_pcm_substream
*substream
,
800 struct snd_soc_dai
*dai
)
802 struct i2s_dai
*i2s
= to_info(dai
);
803 struct i2s_dai
*other
= get_other_dai(i2s
);
806 pm_runtime_get_sync(dai
->dev
);
808 spin_lock_irqsave(&lock
, flags
);
810 i2s
->mode
|= DAI_OPENED
;
812 if (is_manager(other
))
813 i2s
->mode
&= ~DAI_MANAGER
;
815 i2s
->mode
|= DAI_MANAGER
;
817 if (!any_active(i2s
) && (i2s
->quirks
& QUIRK_NEED_RSTCLR
))
818 writel(CON_RSTCLR
, i2s
->addr
+ I2SCON
);
820 spin_unlock_irqrestore(&lock
, flags
);
825 static void i2s_shutdown(struct snd_pcm_substream
*substream
,
826 struct snd_soc_dai
*dai
)
828 struct i2s_dai
*i2s
= to_info(dai
);
829 struct i2s_dai
*other
= get_other_dai(i2s
);
832 spin_lock_irqsave(&lock
, flags
);
834 i2s
->mode
&= ~DAI_OPENED
;
835 i2s
->mode
&= ~DAI_MANAGER
;
837 if (is_opened(other
))
838 other
->mode
|= DAI_MANAGER
;
840 /* Reset any constraint on RFS and BFS */
844 spin_unlock_irqrestore(&lock
, flags
);
846 pm_runtime_put(dai
->dev
);
849 static int config_setup(struct i2s_dai
*i2s
)
851 struct i2s_dai
*other
= get_other_dai(i2s
);
852 unsigned rfs
, bfs
, blc
;
862 /* Select least possible multiple(2) if no constraint set */
871 if ((rfs
== 256 || rfs
== 512) && (blc
== 24)) {
872 dev_err(&i2s
->pdev
->dev
,
873 "%d-RFS not supported for 24-blc\n", rfs
);
878 if (bfs
== 16 || bfs
== 32)
884 /* If already setup and running */
885 if (any_active(i2s
) && (get_rfs(i2s
) != rfs
|| get_bfs(i2s
) != bfs
)) {
886 dev_err(&i2s
->pdev
->dev
,
887 "%s:%d Other DAI busy\n", __func__
, __LINE__
);
894 /* Don't bother with PSR in Slave mode */
898 if (!(i2s
->quirks
& QUIRK_NO_MUXPSR
)) {
899 psr
= i2s
->rclk_srcrate
/ i2s
->frmclk
/ rfs
;
900 writel(((psr
- 1) << 8) | PSR_PSREN
, i2s
->addr
+ I2SPSR
);
901 dev_dbg(&i2s
->pdev
->dev
,
902 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
903 i2s
->rclk_srcrate
, psr
, rfs
, bfs
);
909 static int i2s_trigger(struct snd_pcm_substream
*substream
,
910 int cmd
, struct snd_soc_dai
*dai
)
912 int capture
= (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
);
913 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
914 struct i2s_dai
*i2s
= to_info(rtd
->cpu_dai
);
918 case SNDRV_PCM_TRIGGER_START
:
919 case SNDRV_PCM_TRIGGER_RESUME
:
920 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
921 pm_runtime_get_sync(dai
->dev
);
922 spin_lock_irqsave(i2s
->lock
, flags
);
924 if (config_setup(i2s
)) {
925 spin_unlock_irqrestore(i2s
->lock
, flags
);
934 spin_unlock_irqrestore(i2s
->lock
, flags
);
936 case SNDRV_PCM_TRIGGER_STOP
:
937 case SNDRV_PCM_TRIGGER_SUSPEND
:
938 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
939 spin_lock_irqsave(i2s
->lock
, flags
);
943 i2s_fifo(i2s
, FIC_RXFLUSH
);
946 i2s_fifo(i2s
, FIC_TXFLUSH
);
949 spin_unlock_irqrestore(i2s
->lock
, flags
);
950 pm_runtime_put(dai
->dev
);
957 static int i2s_set_clkdiv(struct snd_soc_dai
*dai
,
960 struct i2s_dai
*i2s
= to_info(dai
);
961 struct i2s_dai
*other
= get_other_dai(i2s
);
964 case SAMSUNG_I2S_DIV_BCLK
:
965 pm_runtime_get_sync(dai
->dev
);
966 if ((any_active(i2s
) && div
&& (get_bfs(i2s
) != div
))
967 || (other
&& other
->bfs
&& (other
->bfs
!= div
))) {
968 pm_runtime_put(dai
->dev
);
969 dev_err(&i2s
->pdev
->dev
,
970 "%s:%d Other DAI busy\n", __func__
, __LINE__
);
974 pm_runtime_put(dai
->dev
);
977 dev_err(&i2s
->pdev
->dev
,
978 "Invalid clock divider(%d)\n", div_id
);
985 static snd_pcm_sframes_t
986 i2s_delay(struct snd_pcm_substream
*substream
, struct snd_soc_dai
*dai
)
988 struct i2s_dai
*i2s
= to_info(dai
);
989 u32 reg
= readl(i2s
->addr
+ I2SFIC
);
990 snd_pcm_sframes_t delay
;
991 const struct samsung_i2s_variant_regs
*i2s_regs
= i2s
->variant_regs
;
993 WARN_ON(!pm_runtime_active(dai
->dev
));
995 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
)
996 delay
= FIC_RXCOUNT(reg
);
997 else if (is_secondary(i2s
))
998 delay
= FICS_TXCOUNT(readl(i2s
->addr
+ I2SFICS
));
1000 delay
= (reg
>> i2s_regs
->ftx0cnt_off
) & 0x7f;
1006 static int i2s_suspend(struct snd_soc_dai
*dai
)
1008 return pm_runtime_force_suspend(dai
->dev
);
1011 static int i2s_resume(struct snd_soc_dai
*dai
)
1013 return pm_runtime_force_resume(dai
->dev
);
1016 #define i2s_suspend NULL
1017 #define i2s_resume NULL
1020 static int samsung_i2s_dai_probe(struct snd_soc_dai
*dai
)
1022 struct i2s_dai
*i2s
= to_info(dai
);
1023 struct i2s_dai
*other
= get_other_dai(i2s
);
1024 unsigned long flags
;
1026 pm_runtime_get_sync(dai
->dev
);
1028 if (is_secondary(i2s
)) { /* If this is probe on the secondary DAI */
1029 snd_soc_dai_init_dma_data(dai
, &other
->sec_dai
->dma_playback
,
1032 snd_soc_dai_init_dma_data(dai
, &i2s
->dma_playback
,
1035 if (i2s
->quirks
& QUIRK_NEED_RSTCLR
)
1036 writel(CON_RSTCLR
, i2s
->addr
+ I2SCON
);
1038 if (i2s
->quirks
& QUIRK_SUPPORTS_IDMA
)
1039 idma_reg_addr_init(i2s
->addr
,
1040 i2s
->sec_dai
->idma_playback
.addr
);
1043 /* Reset any constraint on RFS and BFS */
1046 i2s
->rclk_srcrate
= 0;
1048 spin_lock_irqsave(i2s
->lock
, flags
);
1051 i2s_fifo(i2s
, FIC_TXFLUSH
);
1052 i2s_fifo(other
, FIC_TXFLUSH
);
1053 i2s_fifo(i2s
, FIC_RXFLUSH
);
1054 spin_unlock_irqrestore(i2s
->lock
, flags
);
1056 /* Gate CDCLK by default */
1057 if (!is_opened(other
))
1058 i2s_set_sysclk(dai
, SAMSUNG_I2S_CDCLK
,
1059 0, SND_SOC_CLOCK_IN
);
1060 pm_runtime_put(dai
->dev
);
1065 static int samsung_i2s_dai_remove(struct snd_soc_dai
*dai
)
1067 struct i2s_dai
*i2s
= snd_soc_dai_get_drvdata(dai
);
1068 unsigned long flags
;
1070 pm_runtime_get_sync(dai
->dev
);
1072 if (!is_secondary(i2s
)) {
1073 if (i2s
->quirks
& QUIRK_NEED_RSTCLR
) {
1074 spin_lock_irqsave(i2s
->lock
, flags
);
1075 writel(0, i2s
->addr
+ I2SCON
);
1076 spin_unlock_irqrestore(i2s
->lock
, flags
);
1080 pm_runtime_put(dai
->dev
);
1085 static const struct snd_soc_dai_ops samsung_i2s_dai_ops
= {
1086 .trigger
= i2s_trigger
,
1087 .hw_params
= i2s_hw_params
,
1088 .set_fmt
= i2s_set_fmt
,
1089 .set_clkdiv
= i2s_set_clkdiv
,
1090 .set_sysclk
= i2s_set_sysclk
,
1091 .startup
= i2s_startup
,
1092 .shutdown
= i2s_shutdown
,
1096 static const struct snd_soc_component_driver samsung_i2s_component
= {
1097 .name
= "samsung-i2s",
1100 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1101 SNDRV_PCM_FMTBIT_S16_LE | \
1102 SNDRV_PCM_FMTBIT_S24_LE)
1104 static struct i2s_dai
*i2s_alloc_dai(struct platform_device
*pdev
,
1105 const struct samsung_i2s_dai_data
*i2s_dai_data
,
1108 struct i2s_dai
*i2s
;
1110 i2s
= devm_kzalloc(&pdev
->dev
, sizeof(struct i2s_dai
), GFP_KERNEL
);
1115 i2s
->pri_dai
= NULL
;
1116 i2s
->sec_dai
= NULL
;
1117 i2s
->i2s_dai_drv
.id
= 1;
1118 i2s
->i2s_dai_drv
.symmetric_rates
= 1;
1119 i2s
->i2s_dai_drv
.probe
= samsung_i2s_dai_probe
;
1120 i2s
->i2s_dai_drv
.remove
= samsung_i2s_dai_remove
;
1121 i2s
->i2s_dai_drv
.ops
= &samsung_i2s_dai_ops
;
1122 i2s
->i2s_dai_drv
.suspend
= i2s_suspend
;
1123 i2s
->i2s_dai_drv
.resume
= i2s_resume
;
1124 i2s
->i2s_dai_drv
.playback
.channels_min
= 1;
1125 i2s
->i2s_dai_drv
.playback
.channels_max
= 2;
1126 i2s
->i2s_dai_drv
.playback
.rates
= i2s_dai_data
->pcm_rates
;
1127 i2s
->i2s_dai_drv
.playback
.formats
= SAMSUNG_I2S_FMTS
;
1130 i2s
->i2s_dai_drv
.name
= SAMSUNG_I2S_DAI
;
1131 i2s
->i2s_dai_drv
.capture
.channels_min
= 1;
1132 i2s
->i2s_dai_drv
.capture
.channels_max
= 2;
1133 i2s
->i2s_dai_drv
.capture
.rates
= i2s_dai_data
->pcm_rates
;
1134 i2s
->i2s_dai_drv
.capture
.formats
= SAMSUNG_I2S_FMTS
;
1136 i2s
->i2s_dai_drv
.name
= SAMSUNG_I2S_DAI_SEC
;
1142 static int i2s_runtime_suspend(struct device
*dev
)
1144 struct i2s_dai
*i2s
= dev_get_drvdata(dev
);
1146 i2s
->suspend_i2smod
= readl(i2s
->addr
+ I2SMOD
);
1147 i2s
->suspend_i2scon
= readl(i2s
->addr
+ I2SCON
);
1148 i2s
->suspend_i2spsr
= readl(i2s
->addr
+ I2SPSR
);
1151 clk_disable_unprepare(i2s
->op_clk
);
1152 clk_disable_unprepare(i2s
->clk
);
1157 static int i2s_runtime_resume(struct device
*dev
)
1159 struct i2s_dai
*i2s
= dev_get_drvdata(dev
);
1162 ret
= clk_prepare_enable(i2s
->clk
);
1167 ret
= clk_prepare_enable(i2s
->op_clk
);
1169 clk_disable_unprepare(i2s
->clk
);
1174 writel(i2s
->suspend_i2scon
, i2s
->addr
+ I2SCON
);
1175 writel(i2s
->suspend_i2smod
, i2s
->addr
+ I2SMOD
);
1176 writel(i2s
->suspend_i2spsr
, i2s
->addr
+ I2SPSR
);
1180 #endif /* CONFIG_PM */
1182 static void i2s_unregister_clocks(struct i2s_dai
*i2s
)
1186 for (i
= 0; i
< i2s
->clk_data
.clk_num
; i
++) {
1187 if (!IS_ERR(i2s
->clk_table
[i
]))
1188 clk_unregister(i2s
->clk_table
[i
]);
1192 static void i2s_unregister_clock_provider(struct platform_device
*pdev
)
1194 struct i2s_dai
*i2s
= dev_get_drvdata(&pdev
->dev
);
1196 of_clk_del_provider(pdev
->dev
.of_node
);
1197 i2s_unregister_clocks(i2s
);
1200 static int i2s_register_clock_provider(struct platform_device
*pdev
)
1202 struct device
*dev
= &pdev
->dev
;
1203 struct i2s_dai
*i2s
= dev_get_drvdata(dev
);
1204 const char *clk_name
[2] = { "i2s_opclk0", "i2s_opclk1" };
1205 const char *p_names
[2] = { NULL
};
1206 const struct samsung_i2s_variant_regs
*reg_info
= i2s
->variant_regs
;
1207 struct clk
*rclksrc
;
1210 /* Register the clock provider only if it's expected in the DTB */
1211 if (!of_find_property(dev
->of_node
, "#clock-cells", NULL
))
1214 /* Get the RCLKSRC mux clock parent clock names */
1215 for (i
= 0; i
< ARRAY_SIZE(p_names
); i
++) {
1216 rclksrc
= clk_get(dev
, clk_name
[i
]);
1217 if (IS_ERR(rclksrc
))
1219 p_names
[i
] = __clk_get_name(rclksrc
);
1223 if (!(i2s
->quirks
& QUIRK_NO_MUXPSR
)) {
1224 /* Activate the prescaler */
1225 u32 val
= readl(i2s
->addr
+ I2SPSR
);
1226 writel(val
| PSR_PSREN
, i2s
->addr
+ I2SPSR
);
1228 i2s
->clk_table
[CLK_I2S_RCLK_SRC
] = clk_register_mux(dev
,
1229 "i2s_rclksrc", p_names
, ARRAY_SIZE(p_names
),
1230 CLK_SET_RATE_NO_REPARENT
| CLK_SET_RATE_PARENT
,
1231 i2s
->addr
+ I2SMOD
, reg_info
->rclksrc_off
,
1234 i2s
->clk_table
[CLK_I2S_RCLK_PSR
] = clk_register_divider(dev
,
1235 "i2s_presc", "i2s_rclksrc",
1236 CLK_SET_RATE_PARENT
,
1237 i2s
->addr
+ I2SPSR
, 8, 6, 0, i2s
->lock
);
1239 p_names
[0] = "i2s_presc";
1240 i2s
->clk_data
.clk_num
= 2;
1242 of_property_read_string_index(dev
->of_node
,
1243 "clock-output-names", 0, &clk_name
[0]);
1245 i2s
->clk_table
[CLK_I2S_CDCLK
] = clk_register_gate(dev
, clk_name
[0],
1246 p_names
[0], CLK_SET_RATE_PARENT
,
1247 i2s
->addr
+ I2SMOD
, reg_info
->cdclkcon_off
,
1248 CLK_GATE_SET_TO_DISABLE
, i2s
->lock
);
1250 i2s
->clk_data
.clk_num
+= 1;
1251 i2s
->clk_data
.clks
= i2s
->clk_table
;
1253 ret
= of_clk_add_provider(dev
->of_node
, of_clk_src_onecell_get
,
1256 dev_err(dev
, "failed to add clock provider: %d\n", ret
);
1257 i2s_unregister_clocks(i2s
);
1263 static int samsung_i2s_probe(struct platform_device
*pdev
)
1265 struct i2s_dai
*pri_dai
, *sec_dai
= NULL
;
1266 struct s3c_audio_pdata
*i2s_pdata
= pdev
->dev
.platform_data
;
1267 struct resource
*res
;
1268 u32 regs_base
, quirks
= 0, idma_addr
= 0;
1269 struct device_node
*np
= pdev
->dev
.of_node
;
1270 const struct samsung_i2s_dai_data
*i2s_dai_data
;
1273 if (IS_ENABLED(CONFIG_OF
) && pdev
->dev
.of_node
)
1274 i2s_dai_data
= of_device_get_match_data(&pdev
->dev
);
1276 i2s_dai_data
= (struct samsung_i2s_dai_data
*)
1277 platform_get_device_id(pdev
)->driver_data
;
1279 pri_dai
= i2s_alloc_dai(pdev
, i2s_dai_data
, false);
1281 dev_err(&pdev
->dev
, "Unable to alloc I2S_pri\n");
1285 spin_lock_init(&pri_dai
->spinlock
);
1286 pri_dai
->lock
= &pri_dai
->spinlock
;
1289 if (i2s_pdata
== NULL
) {
1290 dev_err(&pdev
->dev
, "Can't work without s3c_audio_pdata\n");
1294 pri_dai
->dma_playback
.filter_data
= i2s_pdata
->dma_playback
;
1295 pri_dai
->dma_capture
.filter_data
= i2s_pdata
->dma_capture
;
1296 pri_dai
->filter
= i2s_pdata
->dma_filter
;
1298 quirks
= i2s_pdata
->type
.quirks
;
1299 idma_addr
= i2s_pdata
->type
.idma_addr
;
1301 quirks
= i2s_dai_data
->quirks
;
1302 if (of_property_read_u32(np
, "samsung,idma-addr",
1304 if (quirks
& QUIRK_SUPPORTS_IDMA
) {
1305 dev_info(&pdev
->dev
, "idma address is not"\
1310 quirks
&= ~(QUIRK_SEC_DAI
| QUIRK_SUPPORTS_IDMA
);
1312 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1313 pri_dai
->addr
= devm_ioremap_resource(&pdev
->dev
, res
);
1314 if (IS_ERR(pri_dai
->addr
))
1315 return PTR_ERR(pri_dai
->addr
);
1317 regs_base
= res
->start
;
1319 pri_dai
->clk
= devm_clk_get(&pdev
->dev
, "iis");
1320 if (IS_ERR(pri_dai
->clk
)) {
1321 dev_err(&pdev
->dev
, "Failed to get iis clock\n");
1322 return PTR_ERR(pri_dai
->clk
);
1325 ret
= clk_prepare_enable(pri_dai
->clk
);
1327 dev_err(&pdev
->dev
, "failed to enable clock: %d\n", ret
);
1330 pri_dai
->dma_playback
.addr
= regs_base
+ I2STXD
;
1331 pri_dai
->dma_capture
.addr
= regs_base
+ I2SRXD
;
1332 pri_dai
->dma_playback
.chan_name
= "tx";
1333 pri_dai
->dma_capture
.chan_name
= "rx";
1334 pri_dai
->dma_playback
.addr_width
= 4;
1335 pri_dai
->dma_capture
.addr_width
= 4;
1336 pri_dai
->quirks
= quirks
;
1337 pri_dai
->variant_regs
= i2s_dai_data
->i2s_variant_regs
;
1339 if (quirks
& QUIRK_PRI_6CHAN
)
1340 pri_dai
->i2s_dai_drv
.playback
.channels_max
= 6;
1342 ret
= samsung_asoc_dma_platform_register(&pdev
->dev
, pri_dai
->filter
,
1345 goto err_disable_clk
;
1347 ret
= devm_snd_soc_register_component(&pdev
->dev
,
1348 &samsung_i2s_component
,
1349 &pri_dai
->i2s_dai_drv
, 1);
1351 goto err_disable_clk
;
1353 if (quirks
& QUIRK_SEC_DAI
) {
1354 sec_dai
= i2s_alloc_dai(pdev
, i2s_dai_data
, true);
1356 dev_err(&pdev
->dev
, "Unable to alloc I2S_sec\n");
1358 goto err_disable_clk
;
1361 sec_dai
->lock
= &pri_dai
->spinlock
;
1362 sec_dai
->variant_regs
= pri_dai
->variant_regs
;
1363 sec_dai
->dma_playback
.addr
= regs_base
+ I2STXDS
;
1364 sec_dai
->dma_playback
.chan_name
= "tx-sec";
1367 sec_dai
->dma_playback
.filter_data
= i2s_pdata
->dma_play_sec
;
1368 sec_dai
->filter
= i2s_pdata
->dma_filter
;
1371 sec_dai
->dma_playback
.addr_width
= 4;
1372 sec_dai
->addr
= pri_dai
->addr
;
1373 sec_dai
->clk
= pri_dai
->clk
;
1374 sec_dai
->quirks
= quirks
;
1375 sec_dai
->idma_playback
.addr
= idma_addr
;
1376 sec_dai
->pri_dai
= pri_dai
;
1377 pri_dai
->sec_dai
= sec_dai
;
1379 ret
= samsung_asoc_dma_platform_register(&pdev
->dev
,
1380 sec_dai
->filter
, "tx-sec", NULL
);
1382 goto err_disable_clk
;
1384 ret
= devm_snd_soc_register_component(&pdev
->dev
,
1385 &samsung_i2s_component
,
1386 &sec_dai
->i2s_dai_drv
, 1);
1388 goto err_disable_clk
;
1391 if (i2s_pdata
&& i2s_pdata
->cfg_gpio
&& i2s_pdata
->cfg_gpio(pdev
)) {
1392 dev_err(&pdev
->dev
, "Unable to configure gpio\n");
1394 goto err_disable_clk
;
1397 dev_set_drvdata(&pdev
->dev
, pri_dai
);
1399 pm_runtime_set_active(&pdev
->dev
);
1400 pm_runtime_enable(&pdev
->dev
);
1402 ret
= i2s_register_clock_provider(pdev
);
1406 pm_runtime_disable(&pdev
->dev
);
1408 clk_disable_unprepare(pri_dai
->clk
);
1412 static int samsung_i2s_remove(struct platform_device
*pdev
)
1414 struct i2s_dai
*pri_dai
;
1416 pri_dai
= dev_get_drvdata(&pdev
->dev
);
1418 pm_runtime_get_sync(&pdev
->dev
);
1419 pm_runtime_disable(&pdev
->dev
);
1421 i2s_unregister_clock_provider(pdev
);
1422 clk_disable_unprepare(pri_dai
->clk
);
1423 pm_runtime_put_noidle(&pdev
->dev
);
1428 static const struct samsung_i2s_variant_regs i2sv3_regs
= {
1442 static const struct samsung_i2s_variant_regs i2sv6_regs
= {
1456 static const struct samsung_i2s_variant_regs i2sv7_regs
= {
1470 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs
= {
1484 static const struct samsung_i2s_dai_data i2sv3_dai_type
= {
1485 .quirks
= QUIRK_NO_MUXPSR
,
1486 .pcm_rates
= SNDRV_PCM_RATE_8000_96000
,
1487 .i2s_variant_regs
= &i2sv3_regs
,
1490 static const struct samsung_i2s_dai_data i2sv5_dai_type
= {
1491 .quirks
= QUIRK_PRI_6CHAN
| QUIRK_SEC_DAI
| QUIRK_NEED_RSTCLR
|
1492 QUIRK_SUPPORTS_IDMA
,
1493 .pcm_rates
= SNDRV_PCM_RATE_8000_96000
,
1494 .i2s_variant_regs
= &i2sv3_regs
,
1497 static const struct samsung_i2s_dai_data i2sv6_dai_type
= {
1498 .quirks
= QUIRK_PRI_6CHAN
| QUIRK_SEC_DAI
| QUIRK_NEED_RSTCLR
|
1499 QUIRK_SUPPORTS_TDM
| QUIRK_SUPPORTS_IDMA
,
1500 .pcm_rates
= SNDRV_PCM_RATE_8000_96000
,
1501 .i2s_variant_regs
= &i2sv6_regs
,
1504 static const struct samsung_i2s_dai_data i2sv7_dai_type
= {
1505 .quirks
= QUIRK_PRI_6CHAN
| QUIRK_SEC_DAI
| QUIRK_NEED_RSTCLR
|
1507 .pcm_rates
= SNDRV_PCM_RATE_8000_192000
,
1508 .i2s_variant_regs
= &i2sv7_regs
,
1511 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1
= {
1512 .quirks
= QUIRK_PRI_6CHAN
| QUIRK_NEED_RSTCLR
,
1513 .pcm_rates
= SNDRV_PCM_RATE_8000_96000
,
1514 .i2s_variant_regs
= &i2sv5_i2s1_regs
,
1517 static const struct platform_device_id samsung_i2s_driver_ids
[] = {
1519 .name
= "samsung-i2s",
1520 .driver_data
= (kernel_ulong_t
)&i2sv3_dai_type
,
1524 MODULE_DEVICE_TABLE(platform
, samsung_i2s_driver_ids
);
1527 static const struct of_device_id exynos_i2s_match
[] = {
1529 .compatible
= "samsung,s3c6410-i2s",
1530 .data
= &i2sv3_dai_type
,
1532 .compatible
= "samsung,s5pv210-i2s",
1533 .data
= &i2sv5_dai_type
,
1535 .compatible
= "samsung,exynos5420-i2s",
1536 .data
= &i2sv6_dai_type
,
1538 .compatible
= "samsung,exynos7-i2s",
1539 .data
= &i2sv7_dai_type
,
1541 .compatible
= "samsung,exynos7-i2s1",
1542 .data
= &i2sv5_dai_type_i2s1
,
1546 MODULE_DEVICE_TABLE(of
, exynos_i2s_match
);
1549 static const struct dev_pm_ops samsung_i2s_pm
= {
1550 SET_RUNTIME_PM_OPS(i2s_runtime_suspend
,
1551 i2s_runtime_resume
, NULL
)
1552 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend
,
1553 pm_runtime_force_resume
)
1556 static struct platform_driver samsung_i2s_driver
= {
1557 .probe
= samsung_i2s_probe
,
1558 .remove
= samsung_i2s_remove
,
1559 .id_table
= samsung_i2s_driver_ids
,
1561 .name
= "samsung-i2s",
1562 .of_match_table
= of_match_ptr(exynos_i2s_match
),
1563 .pm
= &samsung_i2s_pm
,
1567 module_platform_driver(samsung_i2s_driver
);
1569 /* Module information */
1570 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1571 MODULE_DESCRIPTION("Samsung I2S Interface");
1572 MODULE_ALIAS("platform:samsung-i2s");
1573 MODULE_LICENSE("GPL");