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1 /*
2 * Huawei SSD device driver
3 * Copyright (c) 2016, Huawei Technologies Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15 #ifndef LINUX_VERSION_CODE
16 #include <linux/version.h>
17 #endif
18 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
19 #include <linux/config.h>
20 #endif
21 #include <linux/types.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/bio.h>
25 #include <linux/timer.h>
26 #include <linux/init.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/spinlock.h>
30 #include <linux/blkdev.h>
31 #include <linux/sched.h>
32 #include <linux/fcntl.h>
33 #include <linux/interrupt.h>
34 #include <linux/compiler.h>
35 #include <linux/bitops.h>
36 #include <linux/delay.h>
37 #include <linux/time.h>
38 #include <linux/stat.h>
39 #include <linux/fs.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/completion.h>
42 #include <linux/workqueue.h>
43 #include <linux/mm.h>
44 #include <linux/ioctl.h>
45 #include <linux/hdreg.h> /* HDIO_GETGEO */
46 #include <linux/list.h>
47 #include <linux/reboot.h>
48 #include <linux/kthread.h>
49 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
50 #include <linux/seq_file.h>
51 #endif
52 #include <asm/uaccess.h>
53 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
54 #include <linux/scatterlist.h>
55 #include <linux/vmalloc.h>
56 #else
57 #include <asm/scatterlist.h>
58 #endif
59 #include <asm/io.h>
60 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
61 #include <linux/devfs_fs_kernel.h>
62 #endif
63
64 /* driver */
65 #define MODULE_NAME "hio"
66 #define DRIVER_VERSION "2.1.0.40"
67 #define DRIVER_VERSION_LEN 16
68
69 #define SSD_FW_MIN 0x1
70
71 #define SSD_DEV_NAME MODULE_NAME
72 #define SSD_DEV_NAME_LEN 16
73 #define SSD_CDEV_NAME "c"SSD_DEV_NAME
74 #define SSD_SDEV_NAME "s"SSD_DEV_NAME
75
76
77 #define SSD_CMAJOR 0
78 #define SSD_MAJOR 0
79 #define SSD_MAJOR_SL 0
80 #define SSD_MINORS 16
81
82 #define SSD_MAX_DEV 702
83 #define SSD_ALPHABET_NUM 26
84
85 #define hio_info(f, arg...) printk(KERN_INFO MODULE_NAME"info: " f , ## arg)
86 #define hio_note(f, arg...) printk(KERN_NOTICE MODULE_NAME"note: " f , ## arg)
87 #define hio_warn(f, arg...) printk(KERN_WARNING MODULE_NAME"warn: " f , ## arg)
88 #define hio_err(f, arg...) printk(KERN_ERR MODULE_NAME"err: " f , ## arg)
89
90 /* slave port */
91 #define SSD_SLAVE_PORT_DEVID 0x000a
92
93 /* int mode */
94
95 /* 2.6.9 msi affinity bug, should turn msi & msi-x off */
96 //#define SSD_MSI
97 #define SSD_ESCAPE_IRQ
98
99 //#define SSD_MSIX
100 #ifndef MODULE
101 #define SSD_MSIX
102 #endif
103 #define SSD_MSIX_VEC 8
104 #ifdef SSD_MSIX
105 #undef SSD_MSI
106 #undef SSD_ESCAPE_IRQ
107 #define SSD_MSIX_AFFINITY_FORCE
108 #endif
109
110 #define SSD_TRIM
111
112 /* Over temperature protect */
113 #define SSD_OT_PROTECT
114
115 #ifdef SSD_QUEUE_PBIO
116 #define BIO_SSD_PBIO 20
117 #endif
118
119 /* debug */
120 //#define SSD_DEBUG_ERR
121
122 /* cmd timer */
123 #define SSD_CMD_TIMEOUT (60*HZ)
124
125 /* i2c & smbus */
126 #define SSD_SPI_TIMEOUT (5*HZ)
127 #define SSD_I2C_TIMEOUT (5*HZ)
128
129 #define SSD_I2C_MAX_DATA (127)
130 #define SSD_SMBUS_BLOCK_MAX (32)
131 #define SSD_SMBUS_DATA_MAX (SSD_SMBUS_BLOCK_MAX + 2)
132
133 /* wait for init */
134 #define SSD_INIT_WAIT (1000) //1s
135 #define SSD_CONTROLLER_WAIT (20*1000/SSD_INIT_WAIT) //20s
136 #define SSD_INIT_MAX_WAIT (500*1000/SSD_INIT_WAIT) //500s
137 #define SSD_INIT_MAX_WAIT_V3_2 (1400*1000/SSD_INIT_WAIT) //1400s
138 #define SSD_RAM_INIT_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
139 #define SSD_CH_INFO_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
140
141 /* blkdev busy wait */
142 #define SSD_DEV_BUSY_WAIT 1000 //ms
143 #define SSD_DEV_BUSY_MAX_WAIT (8*1000/SSD_DEV_BUSY_WAIT) //8s
144
145 /* smbus retry */
146 #define SSD_SMBUS_RETRY_INTERVAL (5) //ms
147 #define SSD_SMBUS_RETRY_MAX (1000/SSD_SMBUS_RETRY_INTERVAL)
148
149 #define SSD_BM_RETRY_MAX 7
150
151 /* bm routine interval */
152 #define SSD_BM_CAP_LEARNING_DELAY (10*60*1000)
153
154 /* routine interval */
155 #define SSD_ROUTINE_INTERVAL (10*1000) //10s
156 #define SSD_HWMON_ROUTINE_TICK (60*1000/SSD_ROUTINE_INTERVAL)
157 #define SSD_CAPMON_ROUTINE_TICK ((3600*1000/SSD_ROUTINE_INTERVAL)*24*30)
158 #define SSD_CAPMON2_ROUTINE_TICK (10*60*1000/SSD_ROUTINE_INTERVAL) //fault recover
159
160 /* dma align */
161 #define SSD_DMA_ALIGN (16)
162
163 /* some hw defalut */
164 #define SSD_LOG_MAX_SZ 4096
165
166 #define SSD_NAND_OOB_SZ 1024
167 #define SSD_NAND_ID_SZ 8
168 #define SSD_NAND_ID_BUFF_SZ 1024
169 #define SSD_NAND_MAX_CE 2
170
171 #define SSD_BBT_RESERVED 8
172
173 #define SSD_ECC_MAX_FLIP (64+1)
174
175 #define SSD_RAM_ALIGN 16
176
177
178 #define SSD_RELOAD_FLAG 0x3333CCCC
179 #define SSD_RELOAD_FW 0xAA5555AA
180 #define SSD_RESET_NOINIT 0xAA5555AA
181 #define SSD_RESET 0x55AAAA55
182 #define SSD_RESET_FULL 0x5A
183 //#define SSD_RESET_WAIT 1000 //1s
184 //#define SSD_RESET_MAX_WAIT (200*1000/SSD_RESET_WAIT) //200s
185
186
187 /* reverion 1 */
188 #define SSD_PROTOCOL_V1 0x0
189
190 #define SSD_ROM_SIZE (16*1024*1024)
191 #define SSD_ROM_BLK_SIZE (256*1024)
192 #define SSD_ROM_PAGE_SIZE (256)
193 #define SSD_ROM_NR_BRIDGE_FW 2
194 #define SSD_ROM_NR_CTRL_FW 2
195 #define SSD_ROM_BRIDGE_FW_BASE 0
196 #define SSD_ROM_BRIDGE_FW_SIZE (2*1024*1024)
197 #define SSD_ROM_CTRL_FW_BASE (SSD_ROM_NR_BRIDGE_FW*SSD_ROM_BRIDGE_FW_SIZE)
198 #define SSD_ROM_CTRL_FW_SIZE (5*1024*1024)
199 #define SSD_ROM_LABEL_BASE (SSD_ROM_CTRL_FW_BASE+SSD_ROM_CTRL_FW_SIZE*SSD_ROM_NR_CTRL_FW)
200 #define SSD_ROM_VP_BASE (SSD_ROM_LABEL_BASE+SSD_ROM_BLK_SIZE)
201
202 /* reverion 3 */
203 #define SSD_PROTOCOL_V3 0x3000000
204 #define SSD_PROTOCOL_V3_1_1 0x3010001
205 #define SSD_PROTOCOL_V3_1_3 0x3010003
206 #define SSD_PROTOCOL_V3_2 0x3020000
207 #define SSD_PROTOCOL_V3_2_1 0x3020001 /* <4KB improved */
208 #define SSD_PROTOCOL_V3_2_2 0x3020002 /* ot protect */
209 #define SSD_PROTOCOL_V3_2_4 0x3020004
210
211
212 #define SSD_PV3_ROM_NR_BM_FW 1
213 #define SSD_PV3_ROM_BM_FW_SZ (64*1024*8)
214
215 #define SSD_ROM_LOG_SZ (64*1024*4)
216
217 #define SSD_ROM_NR_SMART_MAX 2
218 #define SSD_PV3_ROM_NR_SMART SSD_ROM_NR_SMART_MAX
219 #define SSD_PV3_ROM_SMART_SZ (64*1024)
220
221 /* reverion 3.2 */
222 #define SSD_PV3_2_ROM_LOG_SZ (64*1024*80) /* 5MB */
223 #define SSD_PV3_2_ROM_SEC_SZ (256*1024) /* 256KB */
224
225
226 /* register */
227 #define SSD_REQ_FIFO_REG 0x0000
228 #define SSD_RESP_FIFO_REG 0x0008 //0x0010
229 #define SSD_RESP_PTR_REG 0x0010 //0x0018
230 #define SSD_INTR_INTERVAL_REG 0x0018
231 #define SSD_READY_REG 0x001C
232 #define SSD_BRIDGE_TEST_REG 0x0020
233 #define SSD_STRIPE_SIZE_REG 0x0028
234 #define SSD_CTRL_VER_REG 0x0030 //controller
235 #define SSD_BRIDGE_VER_REG 0x0034 //bridge
236 #define SSD_PCB_VER_REG 0x0038
237 #define SSD_BURN_FLAG_REG 0x0040
238 #define SSD_BRIDGE_INFO_REG 0x0044
239
240 #define SSD_WL_VAL_REG 0x0048 //32-bit
241
242 #define SSD_BB_INFO_REG 0x004C
243
244 #define SSD_ECC_TEST_REG 0x0050 //test only
245 #define SSD_ERASE_TEST_REG 0x0058 //test only
246 #define SSD_WRITE_TEST_REG 0x0060 //test only
247
248 #define SSD_RESET_REG 0x0068
249 #define SSD_RELOAD_FW_REG 0x0070
250
251 #define SSD_RESERVED_BLKS_REG 0x0074
252 #define SSD_VALID_PAGES_REG 0x0078
253 #define SSD_CH_INFO_REG 0x007C
254
255 #define SSD_CTRL_TEST_REG_SZ 0x8
256 #define SSD_CTRL_TEST_REG0 0x0080
257 #define SSD_CTRL_TEST_REG1 0x0088
258 #define SSD_CTRL_TEST_REG2 0x0090
259 #define SSD_CTRL_TEST_REG3 0x0098
260 #define SSD_CTRL_TEST_REG4 0x00A0
261 #define SSD_CTRL_TEST_REG5 0x00A8
262 #define SSD_CTRL_TEST_REG6 0x00B0
263 #define SSD_CTRL_TEST_REG7 0x00B8
264
265 #define SSD_FLASH_INFO_REG0 0x00C0
266 #define SSD_FLASH_INFO_REG1 0x00C8
267 #define SSD_FLASH_INFO_REG2 0x00D0
268 #define SSD_FLASH_INFO_REG3 0x00D8
269 #define SSD_FLASH_INFO_REG4 0x00E0
270 #define SSD_FLASH_INFO_REG5 0x00E8
271 #define SSD_FLASH_INFO_REG6 0x00F0
272 #define SSD_FLASH_INFO_REG7 0x00F8
273
274 #define SSD_RESP_INFO_REG 0x01B8
275 #define SSD_NAND_BUFF_BASE 0x01BC //for nand write
276
277 #define SSD_CHIP_INFO_REG_SZ 0x10
278 #define SSD_CHIP_INFO_REG0 0x0100 //128 bit
279 #define SSD_CHIP_INFO_REG1 0x0110
280 #define SSD_CHIP_INFO_REG2 0x0120
281 #define SSD_CHIP_INFO_REG3 0x0130
282 #define SSD_CHIP_INFO_REG4 0x0140
283 #define SSD_CHIP_INFO_REG5 0x0150
284 #define SSD_CHIP_INFO_REG6 0x0160
285 #define SSD_CHIP_INFO_REG7 0x0170
286
287 #define SSD_RAM_INFO_REG 0x01C4
288
289 #define SSD_BBT_BASE_REG 0x01C8
290 #define SSD_ECT_BASE_REG 0x01CC
291
292 #define SSD_CLEAR_INTR_REG 0x01F0
293
294 #define SSD_INIT_STATE_REG_SZ 0x8
295 #define SSD_INIT_STATE_REG0 0x0200
296 #define SSD_INIT_STATE_REG1 0x0208
297 #define SSD_INIT_STATE_REG2 0x0210
298 #define SSD_INIT_STATE_REG3 0x0218
299 #define SSD_INIT_STATE_REG4 0x0220
300 #define SSD_INIT_STATE_REG5 0x0228
301 #define SSD_INIT_STATE_REG6 0x0230
302 #define SSD_INIT_STATE_REG7 0x0238
303
304 #define SSD_ROM_INFO_REG 0x0600
305 #define SSD_ROM_BRIDGE_FW_INFO_REG 0x0604
306 #define SSD_ROM_CTRL_FW_INFO_REG 0x0608
307 #define SSD_ROM_VP_INFO_REG 0x060C
308
309 #define SSD_LOG_INFO_REG 0x0610
310 #define SSD_LED_REG 0x0614
311 #define SSD_MSG_BASE_REG 0x06F8
312
313 /*spi reg */
314 #define SSD_SPI_REG_CMD 0x0180
315 #define SSD_SPI_REG_CMD_HI 0x0184
316 #define SSD_SPI_REG_WDATA 0x0188
317 #define SSD_SPI_REG_ID 0x0190
318 #define SSD_SPI_REG_STATUS 0x0198
319 #define SSD_SPI_REG_RDATA 0x01A0
320 #define SSD_SPI_REG_READY 0x01A8
321
322 /* i2c register */
323 #define SSD_I2C_CTRL_REG 0x06F0
324 #define SSD_I2C_RDATA_REG 0x06F4
325
326 /* temperature reg */
327 #define SSD_BRIGE_TEMP_REG 0x0618
328
329 #define SSD_CTRL_TEMP_REG0 0x0700
330 #define SSD_CTRL_TEMP_REG1 0x0708
331 #define SSD_CTRL_TEMP_REG2 0x0710
332 #define SSD_CTRL_TEMP_REG3 0x0718
333 #define SSD_CTRL_TEMP_REG4 0x0720
334 #define SSD_CTRL_TEMP_REG5 0x0728
335 #define SSD_CTRL_TEMP_REG6 0x0730
336 #define SSD_CTRL_TEMP_REG7 0x0738
337
338 /* reversion 3 reg */
339 #define SSD_PROTOCOL_VER_REG 0x01B4
340
341 #define SSD_FLUSH_TIMEOUT_REG 0x02A4
342 #define SSD_BM_FAULT_REG 0x0660
343
344 #define SSD_PV3_RAM_STATUS_REG_SZ 0x4
345 #define SSD_PV3_RAM_STATUS_REG0 0x0260
346 #define SSD_PV3_RAM_STATUS_REG1 0x0264
347 #define SSD_PV3_RAM_STATUS_REG2 0x0268
348 #define SSD_PV3_RAM_STATUS_REG3 0x026C
349 #define SSD_PV3_RAM_STATUS_REG4 0x0270
350 #define SSD_PV3_RAM_STATUS_REG5 0x0274
351 #define SSD_PV3_RAM_STATUS_REG6 0x0278
352 #define SSD_PV3_RAM_STATUS_REG7 0x027C
353
354 #define SSD_PV3_CHIP_INFO_REG_SZ 0x40
355 #define SSD_PV3_CHIP_INFO_REG0 0x0300
356 #define SSD_PV3_CHIP_INFO_REG1 0x0340
357 #define SSD_PV3_CHIP_INFO_REG2 0x0380
358 #define SSD_PV3_CHIP_INFO_REG3 0x03B0
359 #define SSD_PV3_CHIP_INFO_REG4 0x0400
360 #define SSD_PV3_CHIP_INFO_REG5 0x0440
361 #define SSD_PV3_CHIP_INFO_REG6 0x0480
362 #define SSD_PV3_CHIP_INFO_REG7 0x04B0
363
364 #define SSD_PV3_INIT_STATE_REG_SZ 0x20
365 #define SSD_PV3_INIT_STATE_REG0 0x0500
366 #define SSD_PV3_INIT_STATE_REG1 0x0520
367 #define SSD_PV3_INIT_STATE_REG2 0x0540
368 #define SSD_PV3_INIT_STATE_REG3 0x0560
369 #define SSD_PV3_INIT_STATE_REG4 0x0580
370 #define SSD_PV3_INIT_STATE_REG5 0x05A0
371 #define SSD_PV3_INIT_STATE_REG6 0x05C0
372 #define SSD_PV3_INIT_STATE_REG7 0x05E0
373
374 /* reversion 3.1.1 reg */
375 #define SSD_FULL_RESET_REG 0x01B0
376
377 #define SSD_CTRL_REG_ZONE_SZ 0x800
378
379 #define SSD_BB_THRESHOLD_L1_REG 0x2C0
380 #define SSD_BB_THRESHOLD_L2_REG 0x2C4
381
382 #define SSD_BB_ACC_REG_SZ 0x4
383 #define SSD_BB_ACC_REG0 0x21C0
384 #define SSD_BB_ACC_REG1 0x29C0
385 #define SSD_BB_ACC_REG2 0x31C0
386
387 #define SSD_EC_THRESHOLD_L1_REG 0x2C8
388 #define SSD_EC_THRESHOLD_L2_REG 0x2CC
389
390 #define SSD_EC_ACC_REG_SZ 0x4
391 #define SSD_EC_ACC_REG0 0x21E0
392 #define SSD_EC_ACC_REG1 0x29E0
393 #define SSD_EC_ACC_REG2 0x31E0
394
395 /* reversion 3.1.2 & 3.1.3 reg */
396 #define SSD_HW_STATUS_REG 0x02AC
397
398 #define SSD_PLP_INFO_REG 0x0664
399
400 /*reversion 3.2 reg*/
401 #define SSD_POWER_ON_REG 0x01EC
402 #define SSD_PCIE_LINKSTATUS_REG 0x01F8
403 #define SSD_PL_CAP_LEARN_REG 0x01FC
404
405 #define SSD_FPGA_1V0_REG0 0x2070
406 #define SSD_FPGA_1V8_REG0 0x2078
407 #define SSD_FPGA_1V0_REG1 0x2870
408 #define SSD_FPGA_1V8_REG1 0x2878
409
410 /*reversion 3.2 reg*/
411 #define SSD_READ_OT_REG0 0x2260
412 #define SSD_WRITE_OT_REG0 0x2264
413 #define SSD_READ_OT_REG1 0x2A60
414 #define SSD_WRITE_OT_REG1 0x2A64
415
416
417 /* function */
418 #define SSD_FUNC_READ 0x01
419 #define SSD_FUNC_WRITE 0x02
420 #define SSD_FUNC_NAND_READ_WOOB 0x03
421 #define SSD_FUNC_NAND_READ 0x04
422 #define SSD_FUNC_NAND_WRITE 0x05
423 #define SSD_FUNC_NAND_ERASE 0x06
424 #define SSD_FUNC_NAND_READ_ID 0x07
425 #define SSD_FUNC_READ_LOG 0x08
426 #define SSD_FUNC_TRIM 0x09
427 #define SSD_FUNC_RAM_READ 0x10
428 #define SSD_FUNC_RAM_WRITE 0x11
429 #define SSD_FUNC_FLUSH 0x12 //cache / bbt
430
431 /* spi function */
432 #define SSD_SPI_CMD_PROGRAM 0x02
433 #define SSD_SPI_CMD_READ 0x03
434 #define SSD_SPI_CMD_W_DISABLE 0x04
435 #define SSD_SPI_CMD_READ_STATUS 0x05
436 #define SSD_SPI_CMD_W_ENABLE 0x06
437 #define SSD_SPI_CMD_ERASE 0xd8
438 #define SSD_SPI_CMD_CLSR 0x30
439 #define SSD_SPI_CMD_READ_ID 0x9f
440
441 /* i2c */
442 #define SSD_I2C_CTRL_READ 0x00
443 #define SSD_I2C_CTRL_WRITE 0x01
444
445 /* i2c internal register */
446 #define SSD_I2C_CFG_REG 0x00
447 #define SSD_I2C_DATA_REG 0x01
448 #define SSD_I2C_CMD_REG 0x02
449 #define SSD_I2C_STATUS_REG 0x03
450 #define SSD_I2C_SADDR_REG 0x04
451 #define SSD_I2C_LEN_REG 0x05
452 #define SSD_I2C_RLEN_REG 0x06
453 #define SSD_I2C_WLEN_REG 0x07
454 #define SSD_I2C_RESET_REG 0x08 //write for reset
455 #define SSD_I2C_PRER_REG 0x09
456
457
458 /* hw mon */
459 /* FPGA volt = ADC_value / 4096 * 3v */
460 #define SSD_FPGA_1V0_ADC_MIN 1228 // 0.9v
461 #define SSD_FPGA_1V0_ADC_MAX 1502 // 1.1v
462 #define SSD_FPGA_1V8_ADC_MIN 2211 // 1.62v
463 #define SSD_FPGA_1V8_ADC_MAX 2703 // 1.98
464
465 /* ADC value */
466 #define SSD_FPGA_VOLT_MAX(val) (((val) & 0xffff) >> 4)
467 #define SSD_FPGA_VOLT_MIN(val) (((val >> 16) & 0xffff) >> 4)
468 #define SSD_FPGA_VOLT_CUR(val) (((val >> 32) & 0xffff) >> 4)
469 #define SSD_FPGA_VOLT(val) ((val * 3000) >> 12)
470
471 #define SSD_VOLT_LOG_DATA(idx, ctrl, volt) (((uint32_t)idx << 24) | ((uint32_t)ctrl << 16) | ((uint32_t)volt))
472
473 enum ssd_fpga_volt
474 {
475 SSD_FPGA_1V0 = 0,
476 SSD_FPGA_1V8,
477 SSD_FPGA_VOLT_NR
478 };
479
480 enum ssd_clock
481 {
482 SSD_CLOCK_166M_LOST = 0,
483 SSD_CLOCK_166M_SKEW,
484 SSD_CLOCK_156M_LOST,
485 SSD_CLOCK_156M_SKEW,
486 SSD_CLOCK_NR
487 };
488
489 /* sensor */
490 #define SSD_SENSOR_LM75_SADDRESS (0x49 << 1)
491 #define SSD_SENSOR_LM80_SADDRESS (0x28 << 1)
492
493 #define SSD_SENSOR_CONVERT_TEMP(val) ((int)(val >> 8))
494
495 #define SSD_INLET_OT_TEMP (55) //55 DegC
496 #define SSD_INLET_OT_HYST (50) //50 DegC
497 #define SSD_FLASH_OT_TEMP (70) //70 DegC
498 #define SSD_FLASH_OT_HYST (65) //65 DegC
499
500 enum ssd_sensor
501 {
502 SSD_SENSOR_LM80 = 0,
503 SSD_SENSOR_LM75,
504 SSD_SENSOR_NR
505 };
506
507
508 /* lm75 */
509 enum ssd_lm75_reg
510 {
511 SSD_LM75_REG_TEMP = 0,
512 SSD_LM75_REG_CONF,
513 SSD_LM75_REG_THYST,
514 SSD_LM75_REG_TOS
515 };
516
517 /* lm96080 */
518 #define SSD_LM80_REG_IN_MAX(nr) (0x2a + (nr) * 2)
519 #define SSD_LM80_REG_IN_MIN(nr) (0x2b + (nr) * 2)
520 #define SSD_LM80_REG_IN(nr) (0x20 + (nr))
521
522 #define SSD_LM80_REG_FAN1 0x28
523 #define SSD_LM80_REG_FAN2 0x29
524 #define SSD_LM80_REG_FAN_MIN(nr) (0x3b + (nr))
525
526 #define SSD_LM80_REG_TEMP 0x27
527 #define SSD_LM80_REG_TEMP_HOT_MAX 0x38
528 #define SSD_LM80_REG_TEMP_HOT_HYST 0x39
529 #define SSD_LM80_REG_TEMP_OS_MAX 0x3a
530 #define SSD_LM80_REG_TEMP_OS_HYST 0x3b
531
532 #define SSD_LM80_REG_CONFIG 0x00
533 #define SSD_LM80_REG_ALARM1 0x01
534 #define SSD_LM80_REG_ALARM2 0x02
535 #define SSD_LM80_REG_MASK1 0x03
536 #define SSD_LM80_REG_MASK2 0x04
537 #define SSD_LM80_REG_FANDIV 0x05
538 #define SSD_LM80_REG_RES 0x06
539
540 #define SSD_LM80_CONVERT_VOLT(val) ((val * 10) >> 8)
541
542 #define SSD_LM80_3V3_VOLT(val) ((val)*33/19)
543
544 #define SSD_LM80_CONV_INTERVAL (1000)
545
546 enum ssd_lm80_in
547 {
548 SSD_LM80_IN_CAP = 0,
549 SSD_LM80_IN_1V2,
550 SSD_LM80_IN_1V2a,
551 SSD_LM80_IN_1V5,
552 SSD_LM80_IN_1V8,
553 SSD_LM80_IN_FPGA_3V3,
554 SSD_LM80_IN_3V3,
555 SSD_LM80_IN_NR
556 };
557
558 struct ssd_lm80_limit
559 {
560 uint8_t low;
561 uint8_t high;
562 };
563
564 /* +/- 5% except cap in*/
565 static struct ssd_lm80_limit ssd_lm80_limit[SSD_LM80_IN_NR] = {
566 {171, 217}, /* CAP in: 1710 ~ 2170 */
567 {114, 126},
568 {114, 126},
569 {142, 158},
570 {171, 189},
571 {180, 200},
572 {180, 200},
573 };
574
575 /* temperature sensors */
576 enum ssd_temp_sensor
577 {
578 SSD_TEMP_INLET = 0,
579 SSD_TEMP_FLASH,
580 SSD_TEMP_CTRL,
581 SSD_TEMP_NR
582 };
583
584
585 #ifdef SSD_OT_PROTECT
586 #define SSD_OT_DELAY (60) //ms
587
588 #define SSD_OT_TEMP (90) //90 DegC
589
590 #define SSD_OT_TEMP_HYST (85) //85 DegC
591 #endif
592
593 /* fpga temperature */
594 //#define CONVERT_TEMP(val) ((float)(val)*503.975f/4096.0f-273.15f)
595 #define CONVERT_TEMP(val) ((val)*504/4096-273)
596
597 #define MAX_TEMP(val) CONVERT_TEMP(((val & 0xffff) >> 4))
598 #define MIN_TEMP(val) CONVERT_TEMP((((val>>16) & 0xffff) >> 4))
599 #define CUR_TEMP(val) CONVERT_TEMP((((val>>32) & 0xffff) >> 4))
600
601
602 /* CAP monitor */
603 #define SSD_PL_CAP_U1 SSD_LM80_REG_IN(SSD_LM80_IN_CAP)
604 #define SSD_PL_CAP_U2 SSD_LM80_REG_IN(SSD_LM80_IN_1V8)
605 #define SSD_PL_CAP_LEARN(u1, u2, t) ((t*(u1+u2))/(2*162*(u1-u2)))
606 #define SSD_PL_CAP_LEARN_WAIT (20) //20ms
607 #define SSD_PL_CAP_LEARN_MAX_WAIT (1000/SSD_PL_CAP_LEARN_WAIT) //1s
608
609 #define SSD_PL_CAP_CHARGE_WAIT (1000)
610 #define SSD_PL_CAP_CHARGE_MAX_WAIT ((120*1000)/SSD_PL_CAP_CHARGE_WAIT) //120s
611
612 #define SSD_PL_CAP_VOLT(val) (val*7)
613
614 #define SSD_PL_CAP_VOLT_FULL (13700)
615 #define SSD_PL_CAP_VOLT_READY (12880)
616
617 #define SSD_PL_CAP_THRESHOLD (8900)
618 #define SSD_PL_CAP_CP_THRESHOLD (5800)
619 #define SSD_PL_CAP_THRESHOLD_HYST (100)
620
621 enum ssd_pl_cap_status
622 {
623 SSD_PL_CAP = 0,
624 SSD_PL_CAP_NR
625 };
626
627 enum ssd_pl_cap_type
628 {
629 SSD_PL_CAP_DEFAULT = 0, /* 4 cap */
630 SSD_PL_CAP_CP /* 3 cap */
631 };
632
633
634 /* hwmon offset */
635 #define SSD_HWMON_OFFS_TEMP (0)
636 #define SSD_HWMON_OFFS_SENSOR (SSD_HWMON_OFFS_TEMP + SSD_TEMP_NR)
637 #define SSD_HWMON_OFFS_PL_CAP (SSD_HWMON_OFFS_SENSOR + SSD_SENSOR_NR)
638 #define SSD_HWMON_OFFS_LM80 (SSD_HWMON_OFFS_PL_CAP + SSD_PL_CAP_NR)
639 #define SSD_HWMON_OFFS_CLOCK (SSD_HWMON_OFFS_LM80 + SSD_LM80_IN_NR)
640 #define SSD_HWMON_OFFS_FPGA (SSD_HWMON_OFFS_CLOCK + SSD_CLOCK_NR)
641
642 #define SSD_HWMON_TEMP(idx) (SSD_HWMON_OFFS_TEMP + idx)
643 #define SSD_HWMON_SENSOR(idx) (SSD_HWMON_OFFS_SENSOR + idx)
644 #define SSD_HWMON_PL_CAP(idx) (SSD_HWMON_OFFS_PL_CAP + idx)
645 #define SSD_HWMON_LM80(idx) (SSD_HWMON_OFFS_LM80 + idx)
646 #define SSD_HWMON_CLOCK(idx) (SSD_HWMON_OFFS_CLOCK + idx)
647 #define SSD_HWMON_FPGA(ctrl, idx) (SSD_HWMON_OFFS_FPGA + (ctrl * SSD_FPGA_VOLT_NR) + idx)
648
649
650
651 /* fifo */
652 typedef struct sfifo
653 {
654 uint32_t in;
655 uint32_t out;
656 uint32_t size;
657 uint32_t esize;
658 uint32_t mask;
659 spinlock_t lock;
660 void *data;
661 } sfifo_t;
662
663 static int sfifo_alloc(struct sfifo *fifo, uint32_t size, uint32_t esize)
664 {
665 uint32_t __size = 1;
666
667 if (!fifo || size > INT_MAX || esize == 0) {
668 return -EINVAL;
669 }
670
671 while (__size < size) __size <<= 1;
672
673 if (__size < 2) {
674 return -EINVAL;
675 }
676
677 fifo->data = vmalloc(esize * __size);
678 if (!fifo->data) {
679 return -ENOMEM;
680 }
681
682 fifo->in = 0;
683 fifo->out = 0;
684 fifo->mask = __size - 1;
685 fifo->size = __size;
686 fifo->esize = esize;
687 spin_lock_init(&fifo->lock);
688
689 return 0;
690 }
691
692 static void sfifo_free(struct sfifo *fifo)
693 {
694 if (!fifo) {
695 return;
696 }
697
698 vfree(fifo->data);
699 fifo->data = NULL;
700 fifo->in = 0;
701 fifo->out = 0;
702 fifo->mask = 0;
703 fifo->size = 0;
704 fifo->esize = 0;
705 }
706
707 static int __sfifo_put(struct sfifo *fifo, void *val)
708 {
709 if (((fifo->in + 1) & fifo->mask) == fifo->out) {
710 return -1;
711 }
712
713 memcpy((fifo->data + (fifo->in * fifo->esize)), val, fifo->esize);
714 fifo->in = (fifo->in + 1) & fifo->mask;
715
716 return 0;
717 }
718
719 static int sfifo_put(struct sfifo *fifo, void *val)
720 {
721 int ret = 0;
722
723 if (!fifo || !val) {
724 return -EINVAL;
725 }
726
727 if (!in_interrupt()) {
728 spin_lock_irq(&fifo->lock);
729 ret = __sfifo_put(fifo, val);
730 spin_unlock_irq(&fifo->lock);
731 } else {
732 spin_lock(&fifo->lock);
733 ret = __sfifo_put(fifo, val);
734 spin_unlock(&fifo->lock);
735 }
736
737 return ret;
738 }
739
740 static int __sfifo_get(struct sfifo *fifo, void *val)
741 {
742 if (fifo->out == fifo->in) {
743 return -1;
744 }
745
746 memcpy(val, (fifo->data + (fifo->out * fifo->esize)), fifo->esize);
747 fifo->out = (fifo->out + 1) & fifo->mask;
748
749 return 0;
750 }
751
752 static int sfifo_get(struct sfifo *fifo, void *val)
753 {
754 int ret = 0;
755
756 if (!fifo || !val) {
757 return -EINVAL;
758 }
759
760 if (!in_interrupt()) {
761 spin_lock_irq(&fifo->lock);
762 ret = __sfifo_get(fifo, val);
763 spin_unlock_irq(&fifo->lock);
764 } else {
765 spin_lock(&fifo->lock);
766 ret = __sfifo_get(fifo, val);
767 spin_unlock(&fifo->lock);
768 }
769
770 return ret;
771 }
772
773 /* bio list */
774 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
775 struct ssd_blist {
776 struct bio *prev;
777 struct bio *next;
778 };
779
780 static inline void ssd_blist_init(struct ssd_blist *ssd_bl)
781 {
782 ssd_bl->prev = NULL;
783 ssd_bl->next = NULL;
784 }
785
786 static inline struct bio *ssd_blist_get(struct ssd_blist *ssd_bl)
787 {
788 struct bio *bio = ssd_bl->prev;
789
790 ssd_bl->prev = NULL;
791 ssd_bl->next = NULL;
792
793 return bio;
794 }
795
796 static inline void ssd_blist_add(struct ssd_blist *ssd_bl, struct bio *bio)
797 {
798 bio->bi_next = NULL;
799
800 if (ssd_bl->next) {
801 ssd_bl->next->bi_next = bio;
802 } else {
803 ssd_bl->prev = bio;
804 }
805
806 ssd_bl->next = bio;
807 }
808
809 #else
810 #define ssd_blist bio_list
811 #define ssd_blist_init bio_list_init
812 #define ssd_blist_get bio_list_get
813 #define ssd_blist_add bio_list_add
814 #endif
815
816 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
817 #define bio_start(bio) (bio->bi_sector)
818 #else
819 #define bio_start(bio) (bio->bi_iter.bi_sector)
820 #endif
821
822 /* mutex */
823 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
824 #define mutex_lock down
825 #define mutex_unlock up
826 #define mutex semaphore
827 #define mutex_init init_MUTEX
828 #endif
829
830 /* i2c */
831 typedef union ssd_i2c_ctrl {
832 uint32_t val;
833 struct {
834 uint8_t wdata;
835 uint8_t addr;
836 uint16_t rw:1;
837 uint16_t pad:15;
838 } bits;
839 }__attribute__((packed)) ssd_i2c_ctrl_t;
840
841 typedef union ssd_i2c_data {
842 uint32_t val;
843 struct {
844 uint32_t rdata:8;
845 uint32_t valid:1;
846 uint32_t pad:23;
847 } bits;
848 }__attribute__((packed)) ssd_i2c_data_t;
849
850 /* write mode */
851 enum ssd_write_mode
852 {
853 SSD_WMODE_BUFFER = 0,
854 SSD_WMODE_BUFFER_EX,
855 SSD_WMODE_FUA,
856 /* dummy */
857 SSD_WMODE_AUTO,
858 SSD_WMODE_DEFAULT
859 };
860
861 /* reset type */
862 enum ssd_reset_type
863 {
864 SSD_RST_NOINIT = 0,
865 SSD_RST_NORMAL,
866 SSD_RST_FULL
867 };
868
869 /* ssd msg */
870 typedef struct ssd_sg_entry
871 {
872 uint64_t block:48;
873 uint64_t length:16;
874 uint64_t buf;
875 }__attribute__((packed))ssd_sg_entry_t;
876
877 typedef struct ssd_rw_msg
878 {
879 uint8_t tag;
880 uint8_t flag;
881 uint8_t nsegs;
882 uint8_t fun;
883 uint32_t reserved; //for 64-bit align
884 struct ssd_sg_entry sge[1]; //base
885 }__attribute__((packed))ssd_rw_msg_t;
886
887 typedef struct ssd_resp_msg
888 {
889 uint8_t tag;
890 uint8_t status:2;
891 uint8_t bitflip:6;
892 uint8_t log;
893 uint8_t fun;
894 uint32_t reserved;
895 }__attribute__((packed))ssd_resp_msg_t;
896
897 typedef struct ssd_flush_msg
898 {
899 uint8_t tag;
900 uint8_t flag:2; //flash cache 0 or bbt 1
901 uint8_t flash:6;
902 uint8_t ctrl_idx;
903 uint8_t fun;
904 uint32_t reserved; //align
905 }__attribute__((packed))ssd_flush_msg_t;
906
907 typedef struct ssd_nand_op_msg
908 {
909 uint8_t tag;
910 uint8_t flag;
911 uint8_t ctrl_idx;
912 uint8_t fun;
913 uint32_t reserved; //align
914 uint16_t page_count;
915 uint8_t chip_ce;
916 uint8_t chip_no;
917 uint32_t page_no;
918 uint64_t buf;
919 }__attribute__((packed))ssd_nand_op_msg_t;
920
921 typedef struct ssd_ram_op_msg
922 {
923 uint8_t tag;
924 uint8_t flag;
925 uint8_t ctrl_idx;
926 uint8_t fun;
927 uint32_t reserved; //align
928 uint32_t start;
929 uint32_t length;
930 uint64_t buf;
931 }__attribute__((packed))ssd_ram_op_msg_t;
932
933
934 /* log msg */
935 typedef struct ssd_log_msg
936 {
937 uint8_t tag;
938 uint8_t flag;
939 uint8_t ctrl_idx;
940 uint8_t fun;
941 uint32_t reserved; //align
942 uint64_t buf;
943 }__attribute__((packed))ssd_log_msg_t;
944
945 typedef struct ssd_log_op_msg
946 {
947 uint8_t tag;
948 uint8_t flag;
949 uint8_t ctrl_idx;
950 uint8_t fun;
951 uint32_t reserved; //align
952 uint64_t reserved1; //align
953 uint64_t buf;
954 }__attribute__((packed))ssd_log_op_msg_t;
955
956 typedef struct ssd_log_resp_msg
957 {
958 uint8_t tag;
959 uint16_t status :2;
960 uint16_t reserved1 :2; //align with the normal resp msg
961 uint16_t nr_log :12;
962 uint8_t fun;
963 uint32_t reserved;
964 }__attribute__((packed))ssd_log_resp_msg_t;
965
966
967 /* resp msg */
968 typedef union ssd_response_msq
969 {
970 ssd_resp_msg_t resp_msg;
971 ssd_log_resp_msg_t log_resp_msg;
972 uint64_t u64_msg;
973 uint32_t u32_msg[2];
974 } ssd_response_msq_t;
975
976
977 /* custom struct */
978 typedef struct ssd_protocol_info
979 {
980 uint32_t ver;
981 uint32_t init_state_reg;
982 uint32_t init_state_reg_sz;
983 uint32_t chip_info_reg;
984 uint32_t chip_info_reg_sz;
985 } ssd_protocol_info_t;
986
987 typedef struct ssd_hw_info
988 {
989 uint32_t bridge_ver;
990 uint32_t ctrl_ver;
991
992 uint32_t cmd_fifo_sz;
993 uint32_t cmd_fifo_sz_mask;
994 uint32_t cmd_max_sg;
995 uint32_t sg_max_sec;
996 uint32_t resp_ptr_sz;
997 uint32_t resp_msg_sz;
998
999 uint16_t nr_ctrl;
1000
1001 uint16_t nr_data_ch;
1002 uint16_t nr_ch;
1003 uint16_t max_ch;
1004 uint16_t nr_chip;
1005
1006 uint8_t pcb_ver;
1007 uint8_t upper_pcb_ver;
1008
1009 uint8_t nand_vendor_id;
1010 uint8_t nand_dev_id;
1011
1012 uint8_t max_ce;
1013 uint8_t id_size;
1014 uint16_t oob_size;
1015
1016 uint16_t bbf_pages;
1017 uint16_t bbf_seek; //
1018
1019 uint16_t page_count; //per block
1020 uint32_t page_size;
1021 uint32_t block_count; //per flash
1022
1023 uint64_t ram_size;
1024 uint32_t ram_align;
1025 uint32_t ram_max_len;
1026
1027 uint64_t bbt_base;
1028 uint32_t bbt_size;
1029 uint64_t md_base; //metadata
1030 uint32_t md_size;
1031 uint32_t md_entry_sz;
1032
1033 uint32_t log_sz;
1034
1035 uint64_t nand_wbuff_base;
1036
1037 uint32_t md_reserved_blks;
1038 uint32_t reserved_blks;
1039 uint32_t valid_pages;
1040 uint32_t max_valid_pages;
1041 uint64_t size;
1042 } ssd_hw_info_t;
1043
1044 typedef struct ssd_hw_info_extend
1045 {
1046 uint8_t board_type;
1047 uint8_t cap_type;
1048 uint8_t plp_type;
1049 uint8_t work_mode;
1050 uint8_t form_factor;
1051
1052 uint8_t pad[59];
1053 }ssd_hw_info_extend_t;
1054
1055 typedef struct ssd_rom_info
1056 {
1057 uint32_t size;
1058 uint32_t block_size;
1059 uint16_t page_size;
1060 uint8_t nr_bridge_fw;
1061 uint8_t nr_ctrl_fw;
1062 uint8_t nr_bm_fw;
1063 uint8_t nr_smart;
1064 uint32_t bridge_fw_base;
1065 uint32_t bridge_fw_sz;
1066 uint32_t ctrl_fw_base;
1067 uint32_t ctrl_fw_sz;
1068 uint32_t bm_fw_base;
1069 uint32_t bm_fw_sz;
1070 uint32_t log_base;
1071 uint32_t log_sz;
1072 uint32_t smart_base;
1073 uint32_t smart_sz;
1074 uint32_t vp_base;
1075 uint32_t label_base;
1076 } ssd_rom_info_t;
1077
1078 /* debug info */
1079 enum ssd_debug_type
1080 {
1081 SSD_DEBUG_NONE = 0,
1082 SSD_DEBUG_READ_ERR,
1083 SSD_DEBUG_WRITE_ERR,
1084 SSD_DEBUG_RW_ERR,
1085 SSD_DEBUG_READ_TO,
1086 SSD_DEBUG_WRITE_TO,
1087 SSD_DEBUG_RW_TO,
1088 SSD_DEBUG_LOG,
1089 SSD_DEBUG_OFFLINE,
1090 SSD_DEBUG_NR
1091 };
1092
1093 typedef struct ssd_debug_info
1094 {
1095 int type;
1096 union {
1097 struct {
1098 uint64_t off;
1099 uint32_t len;
1100 } loc;
1101 struct {
1102 int event;
1103 uint32_t extra;
1104 } log;
1105 } data;
1106 }ssd_debug_info_t;
1107
1108 /* label */
1109 #define SSD_LABEL_FIELD_SZ 32
1110 #define SSD_SN_SZ 16
1111
1112 typedef struct ssd_label
1113 {
1114 char date[SSD_LABEL_FIELD_SZ];
1115 char sn[SSD_LABEL_FIELD_SZ];
1116 char part[SSD_LABEL_FIELD_SZ];
1117 char desc[SSD_LABEL_FIELD_SZ];
1118 char other[SSD_LABEL_FIELD_SZ];
1119 char maf[SSD_LABEL_FIELD_SZ];
1120 } ssd_label_t;
1121
1122 #define SSD_LABEL_DESC_SZ 256
1123
1124 typedef struct ssd_labelv3
1125 {
1126 char boardtype[SSD_LABEL_FIELD_SZ];
1127 char barcode[SSD_LABEL_FIELD_SZ];
1128 char item[SSD_LABEL_FIELD_SZ];
1129 char description[SSD_LABEL_DESC_SZ];
1130 char manufactured[SSD_LABEL_FIELD_SZ];
1131 char vendorname[SSD_LABEL_FIELD_SZ];
1132 char issuenumber[SSD_LABEL_FIELD_SZ];
1133 char cleicode[SSD_LABEL_FIELD_SZ];
1134 char bom[SSD_LABEL_FIELD_SZ];
1135 } ssd_labelv3_t;
1136
1137 /* battery */
1138 typedef struct ssd_battery_info
1139 {
1140 uint32_t fw_ver;
1141 } ssd_battery_info_t;
1142
1143 /* ssd power stat */
1144 typedef struct ssd_power_stat
1145 {
1146 uint64_t nr_poweron;
1147 uint64_t nr_powerloss;
1148 uint64_t init_failed;
1149 } ssd_power_stat_t;
1150
1151 /* io stat */
1152 typedef struct ssd_io_stat
1153 {
1154 uint64_t run_time;
1155 uint64_t nr_to;
1156 uint64_t nr_ioerr;
1157 uint64_t nr_rwerr;
1158 uint64_t nr_read;
1159 uint64_t nr_write;
1160 uint64_t rsectors;
1161 uint64_t wsectors;
1162 } ssd_io_stat_t;
1163
1164 /* ecc */
1165 typedef struct ssd_ecc_info
1166 {
1167 uint64_t bitflip[SSD_ECC_MAX_FLIP];
1168 } ssd_ecc_info_t;
1169
1170 /* log */
1171 enum ssd_log_level
1172 {
1173 SSD_LOG_LEVEL_INFO = 0,
1174 SSD_LOG_LEVEL_NOTICE,
1175 SSD_LOG_LEVEL_WARNING,
1176 SSD_LOG_LEVEL_ERR,
1177 SSD_LOG_NR_LEVEL
1178 };
1179
1180 typedef struct ssd_log_info
1181 {
1182 uint64_t nr_log;
1183 uint64_t stat[SSD_LOG_NR_LEVEL];
1184 } ssd_log_info_t;
1185
1186 /* S.M.A.R.T. */
1187 #define SSD_SMART_MAGIC (0x5452414D53445353ull)
1188
1189 typedef struct ssd_smart
1190 {
1191 struct ssd_power_stat pstat;
1192 struct ssd_io_stat io_stat;
1193 struct ssd_ecc_info ecc_info;
1194 struct ssd_log_info log_info;
1195 uint64_t version;
1196 uint64_t magic;
1197 } ssd_smart_t;
1198
1199 /* internal log */
1200 typedef struct ssd_internal_log
1201 {
1202 uint32_t nr_log;
1203 void *log;
1204 } ssd_internal_log_t;
1205
1206 /* ssd cmd */
1207 typedef struct ssd_cmd
1208 {
1209 struct bio *bio;
1210 struct scatterlist *sgl;
1211 struct list_head list;
1212 void *dev;
1213 int nsegs;
1214 int flag; /*pbio(1) or bio(0)*/
1215
1216 int tag;
1217 void *msg;
1218 dma_addr_t msg_dma;
1219
1220 unsigned long start_time;
1221
1222 int errors;
1223 unsigned int nr_log;
1224
1225 struct timer_list cmd_timer;
1226 struct completion *waiting;
1227 } ssd_cmd_t;
1228
1229 typedef void (*send_cmd_func)(struct ssd_cmd *);
1230 typedef int (*ssd_event_call)(struct gendisk *, int, int); /* gendisk, event id, event level */
1231
1232 /* dcmd sz */
1233 #define SSD_DCMD_MAX_SZ 32
1234
1235 typedef struct ssd_dcmd
1236 {
1237 struct list_head list;
1238 void *dev;
1239 uint8_t msg[SSD_DCMD_MAX_SZ];
1240 } ssd_dcmd_t;
1241
1242
1243 enum ssd_state {
1244 SSD_INIT_WORKQ,
1245 SSD_INIT_BD,
1246 SSD_ONLINE,
1247 /* full reset */
1248 SSD_RESETING,
1249 /* hw log */
1250 SSD_LOG_HW,
1251 /* log err */
1252 SSD_LOG_ERR,
1253 };
1254
1255 #define SSD_QUEUE_NAME_LEN 16
1256 typedef struct ssd_queue {
1257 char name[SSD_QUEUE_NAME_LEN];
1258 void *dev;
1259
1260 int idx;
1261
1262 uint32_t resp_idx;
1263 uint32_t resp_idx_mask;
1264 uint32_t resp_msg_sz;
1265
1266 void *resp_msg;
1267 void *resp_ptr;
1268
1269 struct ssd_cmd *cmd;
1270
1271 struct ssd_io_stat io_stat;
1272 struct ssd_ecc_info ecc_info;
1273 } ssd_queue_t;
1274
1275 typedef struct ssd_device {
1276 char name[SSD_DEV_NAME_LEN];
1277
1278 int idx;
1279 int major;
1280 int readonly;
1281
1282 int int_mode;
1283 #ifdef SSD_ESCAPE_IRQ
1284 int irq_cpu;
1285 #endif
1286
1287 int reload_fw;
1288
1289 int ot_delay; //in ms
1290
1291 atomic_t refcnt;
1292 atomic_t tocnt;
1293 atomic_t in_flight[2]; //r&w
1294
1295 uint64_t uptime;
1296
1297 struct list_head list;
1298 struct pci_dev *pdev;
1299
1300 unsigned long mmio_base;
1301 unsigned long mmio_len;
1302 void __iomem *ctrlp;
1303
1304 struct mutex spi_mutex;
1305 struct mutex i2c_mutex;
1306
1307 struct ssd_protocol_info protocol_info;
1308 struct ssd_hw_info hw_info;
1309 struct ssd_rom_info rom_info;
1310 struct ssd_label label;
1311
1312 struct ssd_smart smart;
1313
1314 atomic_t in_sendq;
1315 spinlock_t sendq_lock;
1316 struct ssd_blist sendq;
1317 struct task_struct *send_thread;
1318 wait_queue_head_t send_waitq;
1319
1320 atomic_t in_doneq;
1321 spinlock_t doneq_lock;
1322 struct ssd_blist doneq;
1323 struct task_struct *done_thread;
1324 wait_queue_head_t done_waitq;
1325
1326 struct ssd_dcmd *dcmd;
1327 spinlock_t dcmd_lock;
1328 struct list_head dcmd_list; /* direct cmd list */
1329 wait_queue_head_t dcmd_wq;
1330
1331 unsigned long *tag_map;
1332 wait_queue_head_t tag_wq;
1333
1334 spinlock_t cmd_lock;
1335 struct ssd_cmd *cmd;
1336 send_cmd_func scmd;
1337
1338 ssd_event_call event_call;
1339 void *msg_base;
1340 dma_addr_t msg_base_dma;
1341
1342 uint32_t resp_idx;
1343 void *resp_msg_base;
1344 void *resp_ptr_base;
1345 dma_addr_t resp_msg_base_dma;
1346 dma_addr_t resp_ptr_base_dma;
1347
1348 int nr_queue;
1349 struct msix_entry entry[SSD_MSIX_VEC];
1350 struct ssd_queue queue[SSD_MSIX_VEC];
1351
1352 struct request_queue *rq; /* The device request queue */
1353 struct gendisk *gd; /* The gendisk structure */
1354
1355 struct mutex internal_log_mutex;
1356 struct ssd_internal_log internal_log;
1357 struct workqueue_struct *workq;
1358 struct work_struct log_work; /* get log */
1359 void *log_buf;
1360
1361 unsigned long state; /* device state, for example, block device inited */
1362
1363 struct module *owner;
1364
1365 /* extend */
1366
1367 int slave;
1368 int cmajor;
1369 int save_md;
1370 int ot_protect;
1371
1372 struct kref kref;
1373
1374 struct mutex gd_mutex;
1375 struct ssd_log_info log_info; /* volatile */
1376
1377 atomic_t queue_depth;
1378 struct mutex barrier_mutex;
1379 struct mutex fw_mutex;
1380
1381 struct ssd_hw_info_extend hw_info_ext;
1382 struct ssd_labelv3 labelv3;
1383
1384 int wmode;
1385 int user_wmode;
1386 struct mutex bm_mutex;
1387 struct work_struct bm_work; /* check bm */
1388 struct timer_list bm_timer;
1389 struct sfifo log_fifo;
1390
1391 struct timer_list routine_timer;
1392 unsigned long routine_tick;
1393 unsigned long hwmon;
1394
1395 struct work_struct hwmon_work; /* check hw */
1396 struct work_struct capmon_work; /* check battery */
1397 struct work_struct tempmon_work; /* check temp */
1398
1399 /* debug info */
1400 struct ssd_debug_info db_info;
1401 uint64_t reset_time;
1402 int has_non_0x98_reg_access;
1403 spinlock_t in_flight_lock;
1404
1405 uint64_t last_poweron_id;
1406
1407 } ssd_device_t;
1408
1409
1410 /* Ioctl struct */
1411 typedef struct ssd_acc_info {
1412 uint32_t threshold_l1;
1413 uint32_t threshold_l2;
1414 uint32_t val;
1415 } ssd_acc_info_t;
1416
1417 typedef struct ssd_reg_op_info
1418 {
1419 uint32_t offset;
1420 uint32_t value;
1421 } ssd_reg_op_info_t;
1422
1423 typedef struct ssd_spi_op_info
1424 {
1425 void __user *buf;
1426 uint32_t off;
1427 uint32_t len;
1428 } ssd_spi_op_info_t;
1429
1430 typedef struct ssd_i2c_op_info
1431 {
1432 uint8_t saddr;
1433 uint8_t wsize;
1434 uint8_t rsize;
1435 void __user *wbuf;
1436 void __user *rbuf;
1437 } ssd_i2c_op_info_t;
1438
1439 typedef struct ssd_smbus_op_info
1440 {
1441 uint8_t saddr;
1442 uint8_t cmd;
1443 uint8_t size;
1444 void __user *buf;
1445 } ssd_smbus_op_info_t;
1446
1447 typedef struct ssd_ram_op_info {
1448 uint8_t ctrl_idx;
1449 uint32_t length;
1450 uint64_t start;
1451 uint8_t __user *buf;
1452 } ssd_ram_op_info_t;
1453
1454 typedef struct ssd_flash_op_info {
1455 uint32_t page;
1456 uint16_t flash;
1457 uint8_t chip;
1458 uint8_t ctrl_idx;
1459 uint8_t __user *buf;
1460 } ssd_flash_op_info_t;
1461
1462 typedef struct ssd_sw_log_info {
1463 uint16_t event;
1464 uint16_t pad;
1465 uint32_t data;
1466 } ssd_sw_log_info_t;
1467
1468 typedef struct ssd_version_info
1469 {
1470 uint32_t bridge_ver; /* bridge fw version */
1471 uint32_t ctrl_ver; /* controller fw version */
1472 uint32_t bm_ver; /* battery manager fw version */
1473 uint8_t pcb_ver; /* main pcb version */
1474 uint8_t upper_pcb_ver;
1475 uint8_t pad0;
1476 uint8_t pad1;
1477 } ssd_version_info_t;
1478
1479 typedef struct pci_addr
1480 {
1481 uint16_t domain;
1482 uint8_t bus;
1483 uint8_t slot;
1484 uint8_t func;
1485 } pci_addr_t;
1486
1487 typedef struct ssd_drv_param_info {
1488 int mode;
1489 int status_mask;
1490 int int_mode;
1491 int threaded_irq;
1492 int log_level;
1493 int wmode;
1494 int ot_protect;
1495 int finject;
1496 int pad[8];
1497 } ssd_drv_param_info_t;
1498
1499
1500 /* form factor */
1501 enum ssd_form_factor
1502 {
1503 SSD_FORM_FACTOR_HHHL = 0,
1504 SSD_FORM_FACTOR_FHHL
1505 };
1506
1507
1508 /* ssd power loss protect */
1509 enum ssd_plp_type
1510 {
1511 SSD_PLP_SCAP = 0,
1512 SSD_PLP_CAP,
1513 SSD_PLP_NONE
1514 };
1515
1516 /* ssd bm */
1517 #define SSD_BM_SLAVE_ADDRESS 0x16
1518 #define SSD_BM_CAP 5
1519
1520 /* SBS cmd */
1521 #define SSD_BM_SAFETYSTATUS 0x51
1522 #define SSD_BM_OPERATIONSTATUS 0x54
1523
1524 /* ManufacturerAccess */
1525 #define SSD_BM_MANUFACTURERACCESS 0x00
1526 #define SSD_BM_ENTER_CAP_LEARNING 0x0023 /* cap learning */
1527
1528 /* Data flash access */
1529 #define SSD_BM_DATA_FLASH_SUBCLASS_ID 0x77
1530 #define SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1 0x78
1531 #define SSD_BM_SYSTEM_DATA_SUBCLASS_ID 56
1532 #define SSD_BM_CONFIGURATION_REGISTERS_ID 64
1533
1534 /* min cap voltage */
1535 #define SSD_BM_CAP_VOLT_MIN 500
1536
1537 /*
1538 enum ssd_bm_cap
1539 {
1540 SSD_BM_CAP_VINA = 1,
1541 SSD_BM_CAP_JH = 3
1542 };*/
1543
1544 enum ssd_bmstatus
1545 {
1546 SSD_BMSTATUS_OK = 0,
1547 SSD_BMSTATUS_CHARGING, /* not fully charged */
1548 SSD_BMSTATUS_WARNING
1549 };
1550
1551 enum sbs_unit {
1552 SBS_UNIT_VALUE = 0,
1553 SBS_UNIT_TEMPERATURE,
1554 SBS_UNIT_VOLTAGE,
1555 SBS_UNIT_CURRENT,
1556 SBS_UNIT_ESR,
1557 SBS_UNIT_PERCENT,
1558 SBS_UNIT_CAPACITANCE
1559 };
1560
1561 enum sbs_size {
1562 SBS_SIZE_BYTE = 1,
1563 SBS_SIZE_WORD,
1564 SBS_SIZE_BLK,
1565 };
1566
1567 struct sbs_cmd {
1568 uint8_t cmd;
1569 uint8_t size;
1570 uint8_t unit;
1571 uint8_t off;
1572 uint16_t mask;
1573 char *desc;
1574 };
1575
1576 struct ssd_bm {
1577 uint16_t temp;
1578 uint16_t volt;
1579 uint16_t curr;
1580 uint16_t esr;
1581 uint16_t rsoc;
1582 uint16_t health;
1583 uint16_t cap;
1584 uint16_t chg_curr;
1585 uint16_t chg_volt;
1586 uint16_t cap_volt[SSD_BM_CAP];
1587 uint16_t sf_alert;
1588 uint16_t sf_status;
1589 uint16_t op_status;
1590 uint16_t sys_volt;
1591 };
1592
1593 struct ssd_bm_manufacturer_data
1594 {
1595 uint16_t pack_lot_code;
1596 uint16_t pcb_lot_code;
1597 uint16_t firmware_ver;
1598 uint16_t hardware_ver;
1599 };
1600
1601 struct ssd_bm_configuration_registers
1602 {
1603 struct {
1604 uint16_t cc:3;
1605 uint16_t rsvd:5;
1606 uint16_t stack:1;
1607 uint16_t rsvd1:2;
1608 uint16_t temp:2;
1609 uint16_t rsvd2:1;
1610 uint16_t lt_en:1;
1611 uint16_t rsvd3:1;
1612 } operation_cfg;
1613 uint16_t pad;
1614 uint16_t fet_action;
1615 uint16_t pad1;
1616 uint16_t fault;
1617 };
1618
1619 #define SBS_VALUE_MASK 0xffff
1620
1621 #define bm_var_offset(var) ((size_t) &((struct ssd_bm *)0)->var)
1622 #define bm_var(start, offset) ((void *) start + (offset))
1623
1624 static struct sbs_cmd ssd_bm_sbs[] = {
1625 {0x08, SBS_SIZE_WORD, SBS_UNIT_TEMPERATURE, bm_var_offset(temp), SBS_VALUE_MASK, "Temperature"},
1626 {0x09, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(volt), SBS_VALUE_MASK, "Voltage"},
1627 {0x0a, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(curr), SBS_VALUE_MASK, "Current"},
1628 {0x0b, SBS_SIZE_WORD, SBS_UNIT_ESR, bm_var_offset(esr), SBS_VALUE_MASK, "ESR"},
1629 {0x0d, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(rsoc), SBS_VALUE_MASK, "RelativeStateOfCharge"},
1630 {0x0e, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(health), SBS_VALUE_MASK, "Health"},
1631 {0x10, SBS_SIZE_WORD, SBS_UNIT_CAPACITANCE, bm_var_offset(cap), SBS_VALUE_MASK, "Capacitance"},
1632 {0x14, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(chg_curr), SBS_VALUE_MASK, "ChargingCurrent"},
1633 {0x15, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(chg_volt), SBS_VALUE_MASK, "ChargingVoltage"},
1634 {0x3b, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[4]), SBS_VALUE_MASK, "CapacitorVoltage5"},
1635 {0x3c, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[3]), SBS_VALUE_MASK, "CapacitorVoltage4"},
1636 {0x3d, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[2]), SBS_VALUE_MASK, "CapacitorVoltage3"},
1637 {0x3e, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[1]), SBS_VALUE_MASK, "CapacitorVoltage2"},
1638 {0x3f, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[0]), SBS_VALUE_MASK, "CapacitorVoltage1"},
1639 {0x50, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_alert), 0x870F, "SafetyAlert"},
1640 {0x51, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_status), 0xE7BF, "SafetyStatus"},
1641 {0x54, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(op_status), 0x79F4, "OperationStatus"},
1642 {0x5a, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(sys_volt), SBS_VALUE_MASK, "SystemVoltage"},
1643 {0, 0, 0, 0, 0, NULL},
1644 };
1645
1646 /* ssd ioctl */
1647 #define SSD_CMD_GET_PROTOCOL_INFO _IOR('H', 100, struct ssd_protocol_info)
1648 #define SSD_CMD_GET_HW_INFO _IOR('H', 101, struct ssd_hw_info)
1649 #define SSD_CMD_GET_ROM_INFO _IOR('H', 102, struct ssd_rom_info)
1650 #define SSD_CMD_GET_SMART _IOR('H', 103, struct ssd_smart)
1651 #define SSD_CMD_GET_IDX _IOR('H', 105, int)
1652 #define SSD_CMD_GET_AMOUNT _IOR('H', 106, int)
1653 #define SSD_CMD_GET_TO_INFO _IOR('H', 107, int)
1654 #define SSD_CMD_GET_DRV_VER _IOR('H', 108, char[DRIVER_VERSION_LEN])
1655
1656 #define SSD_CMD_GET_BBACC_INFO _IOR('H', 109, struct ssd_acc_info)
1657 #define SSD_CMD_GET_ECACC_INFO _IOR('H', 110, struct ssd_acc_info)
1658
1659 #define SSD_CMD_GET_HW_INFO_EXT _IOR('H', 111, struct ssd_hw_info_extend)
1660
1661 #define SSD_CMD_REG_READ _IOWR('H', 120, struct ssd_reg_op_info)
1662 #define SSD_CMD_REG_WRITE _IOWR('H', 121, struct ssd_reg_op_info)
1663
1664 #define SSD_CMD_SPI_READ _IOWR('H', 125, struct ssd_spi_op_info)
1665 #define SSD_CMD_SPI_WRITE _IOWR('H', 126, struct ssd_spi_op_info)
1666 #define SSD_CMD_SPI_ERASE _IOWR('H', 127, struct ssd_spi_op_info)
1667
1668 #define SSD_CMD_I2C_READ _IOWR('H', 128, struct ssd_i2c_op_info)
1669 #define SSD_CMD_I2C_WRITE _IOWR('H', 129, struct ssd_i2c_op_info)
1670 #define SSD_CMD_I2C_WRITE_READ _IOWR('H', 130, struct ssd_i2c_op_info)
1671
1672 #define SSD_CMD_SMBUS_SEND_BYTE _IOWR('H', 131, struct ssd_smbus_op_info)
1673 #define SSD_CMD_SMBUS_RECEIVE_BYTE _IOWR('H', 132, struct ssd_smbus_op_info)
1674 #define SSD_CMD_SMBUS_WRITE_BYTE _IOWR('H', 133, struct ssd_smbus_op_info)
1675 #define SSD_CMD_SMBUS_READ_BYTE _IOWR('H', 135, struct ssd_smbus_op_info)
1676 #define SSD_CMD_SMBUS_WRITE_WORD _IOWR('H', 136, struct ssd_smbus_op_info)
1677 #define SSD_CMD_SMBUS_READ_WORD _IOWR('H', 137, struct ssd_smbus_op_info)
1678 #define SSD_CMD_SMBUS_WRITE_BLOCK _IOWR('H', 138, struct ssd_smbus_op_info)
1679 #define SSD_CMD_SMBUS_READ_BLOCK _IOWR('H', 139, struct ssd_smbus_op_info)
1680
1681 #define SSD_CMD_BM_GET_VER _IOR('H', 140, uint16_t)
1682 #define SSD_CMD_BM_GET_NR_CAP _IOR('H', 141, int)
1683 #define SSD_CMD_BM_CAP_LEARNING _IOW('H', 142, int)
1684 #define SSD_CMD_CAP_LEARN _IOR('H', 143, uint32_t)
1685 #define SSD_CMD_GET_CAP_STATUS _IOR('H', 144, int)
1686
1687 #define SSD_CMD_RAM_READ _IOWR('H', 150, struct ssd_ram_op_info)
1688 #define SSD_CMD_RAM_WRITE _IOWR('H', 151, struct ssd_ram_op_info)
1689
1690 #define SSD_CMD_NAND_READ_ID _IOR('H', 160, struct ssd_flash_op_info)
1691 #define SSD_CMD_NAND_READ _IOWR('H', 161, struct ssd_flash_op_info) //with oob
1692 #define SSD_CMD_NAND_WRITE _IOWR('H', 162, struct ssd_flash_op_info)
1693 #define SSD_CMD_NAND_ERASE _IOWR('H', 163, struct ssd_flash_op_info)
1694 #define SSD_CMD_NAND_READ_EXT _IOWR('H', 164, struct ssd_flash_op_info) //ingore EIO
1695
1696 #define SSD_CMD_UPDATE_BBT _IOW('H', 180, struct ssd_flash_op_info)
1697
1698 #define SSD_CMD_CLEAR_ALARM _IOW('H', 190, int)
1699 #define SSD_CMD_SET_ALARM _IOW('H', 191, int)
1700
1701 #define SSD_CMD_RESET _IOW('H', 200, int)
1702 #define SSD_CMD_RELOAD_FW _IOW('H', 201, int)
1703 #define SSD_CMD_UNLOAD_DEV _IOW('H', 202, int)
1704 #define SSD_CMD_LOAD_DEV _IOW('H', 203, int)
1705 #define SSD_CMD_UPDATE_VP _IOWR('H', 205, uint32_t)
1706 #define SSD_CMD_FULL_RESET _IOW('H', 206, int)
1707
1708 #define SSD_CMD_GET_NR_LOG _IOR('H', 220, uint32_t)
1709 #define SSD_CMD_GET_LOG _IOR('H', 221, void *)
1710 #define SSD_CMD_LOG_LEVEL _IOW('H', 222, int)
1711
1712 #define SSD_CMD_OT_PROTECT _IOW('H', 223, int)
1713 #define SSD_CMD_GET_OT_STATUS _IOR('H', 224, int)
1714
1715 #define SSD_CMD_CLEAR_LOG _IOW('H', 230, int)
1716 #define SSD_CMD_CLEAR_SMART _IOW('H', 231, int)
1717
1718 #define SSD_CMD_SW_LOG _IOW('H', 232, struct ssd_sw_log_info)
1719
1720 #define SSD_CMD_GET_LABEL _IOR('H', 235, struct ssd_label)
1721 #define SSD_CMD_GET_VERSION _IOR('H', 236, struct ssd_version_info)
1722 #define SSD_CMD_GET_TEMPERATURE _IOR('H', 237, int)
1723 #define SSD_CMD_GET_BMSTATUS _IOR('H', 238, int)
1724 #define SSD_CMD_GET_LABEL2 _IOR('H', 239, void *)
1725
1726
1727 #define SSD_CMD_FLUSH _IOW('H', 240, int)
1728 #define SSD_CMD_SAVE_MD _IOW('H', 241, int)
1729
1730 #define SSD_CMD_SET_WMODE _IOW('H', 242, int)
1731 #define SSD_CMD_GET_WMODE _IOR('H', 243, int)
1732 #define SSD_CMD_GET_USER_WMODE _IOR('H', 244, int)
1733
1734 #define SSD_CMD_DEBUG _IOW('H', 250, struct ssd_debug_info)
1735 #define SSD_CMD_DRV_PARAM_INFO _IOR('H', 251, struct ssd_drv_param_info)
1736
1737 #define SSD_CMD_CLEAR_WARNING _IOW('H', 260, int)
1738
1739
1740 /* log */
1741 #define SSD_LOG_MAX_SZ 4096
1742 #define SSD_LOG_LEVEL SSD_LOG_LEVEL_NOTICE
1743 #define SSD_DIF_WITH_OLD_LOG 0x3f
1744
1745 enum ssd_log_data
1746 {
1747 SSD_LOG_DATA_NONE = 0,
1748 SSD_LOG_DATA_LOC,
1749 SSD_LOG_DATA_HEX
1750 };
1751
1752 typedef struct ssd_log_entry
1753 {
1754 union {
1755 struct {
1756 uint32_t page:10;
1757 uint32_t block:14;
1758 uint32_t flash:8;
1759 } loc;
1760 struct {
1761 uint32_t page:12;
1762 uint32_t block:12;
1763 uint32_t flash:8;
1764 } loc1;
1765 uint32_t val;
1766 } data;
1767 uint16_t event:10;
1768 uint16_t mod:6;
1769 uint16_t idx;
1770 }__attribute__((packed))ssd_log_entry_t;
1771
1772 typedef struct ssd_log
1773 {
1774 uint64_t time:56;
1775 uint64_t ctrl_idx:8;
1776 ssd_log_entry_t le;
1777 } __attribute__((packed)) ssd_log_t;
1778
1779 typedef struct ssd_log_desc
1780 {
1781 uint16_t event;
1782 uint8_t level;
1783 uint8_t data;
1784 uint8_t sblock;
1785 uint8_t spage;
1786 char *desc;
1787 } __attribute__((packed)) ssd_log_desc_t;
1788
1789 #define SSD_LOG_SW_IDX 0xF
1790 #define SSD_UNKNOWN_EVENT ((uint16_t)-1)
1791 static struct ssd_log_desc ssd_log_desc[] = {
1792 /* event, level, show flash, show block, show page, desc */
1793 {0x0, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Create BBT failure"}, //g3
1794 {0x1, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Read BBT failure"}, //g3
1795 {0x2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Mark bad block"},
1796 {0x3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flush BBT failure"},
1797 {0x4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1798 {0x7, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "No available blocks"},
1799 {0x8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Bad EC header"},
1800 {0x9, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 0, "Bad VID header"}, //g3
1801 {0xa, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Wear leveling"},
1802 {0xb, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "WL read back failure"},
1803 {0x11, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Data recovery failure"}, // err
1804 {0x20, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan mapping table failure"}, // err g3
1805 {0x21, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1806 {0x22, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1807 {0x23, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1808 {0x24, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Merge: read mapping page failure"},
1809 {0x25, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: read back failure"},
1810 {0x26, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1811 {0x27, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Data corrupted for abnormal power down"}, //g3
1812 {0x28, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: mapping page corrupted"},
1813 {0x29, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: no mapping page"},
1814 {0x2a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: mapping pages incomplete"},
1815 {0x2b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read back failure after programming failure"}, // err
1816 {0xf1, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read failure without recovery"}, // err
1817 {0xf2, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available blocks"}, // maybe err g3
1818 {0xf3, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: RAID incomplete"}, // err g3
1819 {0xf4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1820 {0xf5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read failure in moving data"},
1821 {0xf6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1822 {0xf7, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Init: RAID not complete"},
1823 {0xf8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: data moving interrupted"},
1824 {0xfe, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Data inspection failure"},
1825 {0xff, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "IO: ECC failed"},
1826
1827 /* new */
1828 {0x2e, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available reserved blocks" }, // err
1829 {0x30, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PMT membership not found"},
1830 {0x31, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PMT corrupted"},
1831 {0x32, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT membership not found"},
1832 {0x33, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT not found"},
1833 {0x34, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT corrupted"},
1834 {0x35, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT page read failure"},
1835 {0x36, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT page read failure"},
1836 {0x37, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT backup page read failure"},
1837 {0x38, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT read failure"},
1838 {0x39, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT scan failure"}, // err
1839 {0x3a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page read failure"},
1840 {0x3b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: first page scan failure"}, // err
1841 {0x3c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan unclosed block failure"}, // err
1842 {0x3d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: write pointer mismatch"},
1843 {0x3e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: PBMT read failure"},
1844 {0x3f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: PMT recovery: PBMT scan failure"},
1845 {0x40, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: data page read failure"}, //err
1846 {0x41, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT write pointer mismatch"},
1847 {0x42, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT latest version corrupted"},
1848 {0x43, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: too many unclosed blocks"},
1849 {0x44, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PDW block found"},
1850 {0x45, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Init: more than one PDW block found"}, //err
1851 {0x46, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page is blank or read failure"},
1852 {0x47, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PDW block not found"},
1853
1854 {0x50, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: hit error data"}, // err
1855 {0x51, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: read back failure"}, // err
1856 {0x52, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Cache: unknown command"}, //?
1857 {0x53, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "GC/WL read back failure"}, // err
1858
1859 {0x60, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Erase failure"},
1860
1861 {0x70, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "LPA not matched"},
1862 {0x71, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "PBN not matched"},
1863 {0x72, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read retry failure"},
1864 {0x73, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Need raid recovery"},
1865 {0x74, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "Need read retry"},
1866 {0x75, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read invalid data page"},
1867 {0x76, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN matched"},
1868 {0x77, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN not matched"},
1869 {0x78, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in flash, PBN not matched"},
1870 {0x79, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in cache, LPA not matched"},
1871 {0x7a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in flash, LPA not matched"},
1872 {0x7b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in cache, LPA not matched"},
1873 {0x7c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in flash, LPA not matched"},
1874 {0x7d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data page status error"},
1875 {0x7e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1876 {0x7f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Access flash timeout"},
1877
1878 {0x80, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "EC overflow"},
1879 {0x81, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_NONE, 0, 0, "Scrubbing completed"},
1880 {0x82, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Unstable block(too much bit flip)"},
1881 {0x83, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: ram error"}, //?
1882 {0x84, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: one PBMT read failure"},
1883
1884 {0x88, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: mark bad block"},
1885 {0x89, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: invalid page count error"}, // maybe err
1886 {0x8a, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: Bad Block close to limit"},
1887 {0x8b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: Bad Block over limit"},
1888 {0x8c, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: P/E cycles close to limit"},
1889 {0x8d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: P/E cycles over limit"},
1890
1891 {0x90, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Warning: Over temperature"}, //90
1892 {0x91, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Info: Temperature is OK"}, //80
1893 {0x92, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Battery fault"},
1894 {0x93, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "SEU fault"}, //err
1895 {0x94, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "DDR error"}, //err
1896 {0x95, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Controller serdes error"}, //err
1897 {0x96, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 1 error"}, //err
1898 {0x97, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 2 error"}, //err
1899 {0x98, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "SEU fault (corrected)"}, //err
1900 {0x99, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Battery is OK"},
1901 {0x9a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Info: Temperature close to limit"}, //85
1902
1903 {0x9b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (low)"},
1904 {0x9c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (high)"},
1905 {0x9d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "I2C fault" },
1906 {0x9e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "DDR single bit error" },
1907 {0x9f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Board voltage fault" },
1908
1909 {0xa0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "LPA not matched"},
1910 {0xa1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Re-read data in cache"},
1911 {0xa2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1912 {0xa3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Read blank page"},
1913 {0xa4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: new data in cache"},
1914 {0xa5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: PBN not matched"},
1915 {0xa6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data with error flag"},
1916 {0xa7, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: recoverd data with error flag"},
1917 {0xa8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Blank page in cache, PBN matched"},
1918 {0xa9, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Blank page in cache, PBN matched"},
1919 {0xaa, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flash init failure"},
1920 {0xab, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Mapping table recovery failure"},
1921 {0xac, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: ECC failed"},
1922 {0xb0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Warning: Temperature is 95 degrees C"},
1923 {0xb1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Warning: Temperature is 100 degrees C"},
1924
1925 {0x300, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "CMD timeout"},
1926 {0x301, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Power on"},
1927 {0x302, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Power off"},
1928 {0x303, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear log"},
1929 {0x304, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity"},
1930 {0x305, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data"},
1931 {0x306, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "BM safety status"},
1932 {0x307, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "I/O error"},
1933 {0x308, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CMD error"},
1934 {0x309, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set wmode"},
1935 {0x30a, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "DDR init failed" },
1936 {0x30b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "PCIe link status" },
1937 {0x30c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Controller reset sync error" },
1938 {0x30d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Clock fault" },
1939 {0x30e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "FPGA voltage fault status" },
1940 {0x30f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity finished"},
1941 {0x310, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data finished"},
1942 {0x311, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Reset"},
1943 {0x312, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "CAP: voltage fault"},
1944 {0x313, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: learn fault"},
1945 {0x314, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CAP status"},
1946 {0x315, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Board voltage fault status"},
1947 {0x316, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Info: Inlet temperature is 55 degrees C"}, //55
1948 {0x317, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Info: Inlet temperature is 50 degrees C"}, //50
1949 {0x318, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Info: Flash over temperature"}, //70
1950 {0x319, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Info: Flash temperature is OK"}, //65
1951 {0x31a, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: short circuit"},
1952 {0x31b, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "Sensor fault"},
1953 {0x31c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data"},
1954 {0x31d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data finished"},
1955 {0x320, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Temperature sensor event"},
1956
1957 {0x350, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear smart"},
1958 {0x351, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear warning"},
1959
1960 {SSD_UNKNOWN_EVENT, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "unknown event"},
1961 };
1962 /* */
1963 #define SSD_LOG_OVER_TEMP 0x90
1964 #define SSD_LOG_NORMAL_TEMP 0x91
1965 #define SSD_LOG_WARN_TEMP 0x9a
1966 #define SSD_LOG_SEU_FAULT 0x93
1967 #define SSD_LOG_SEU_FAULT1 0x98
1968 #define SSD_LOG_BATTERY_FAULT 0x92
1969 #define SSD_LOG_BATTERY_OK 0x99
1970 #define SSD_LOG_BOARD_VOLT_FAULT 0x9f
1971
1972 /* software log */
1973 #define SSD_LOG_TIMEOUT 0x300
1974 #define SSD_LOG_POWER_ON 0x301
1975 #define SSD_LOG_POWER_OFF 0x302
1976 #define SSD_LOG_CLEAR_LOG 0x303
1977 #define SSD_LOG_SET_CAPACITY 0x304
1978 #define SSD_LOG_CLEAR_DATA 0x305
1979 #define SSD_LOG_BM_SFSTATUS 0x306
1980 #define SSD_LOG_EIO 0x307
1981 #define SSD_LOG_ECMD 0x308
1982 #define SSD_LOG_SET_WMODE 0x309
1983 #define SSD_LOG_DDR_INIT_ERR 0x30a
1984 #define SSD_LOG_PCIE_LINK_STATUS 0x30b
1985 #define SSD_LOG_CTRL_RST_SYNC 0x30c
1986 #define SSD_LOG_CLK_FAULT 0x30d
1987 #define SSD_LOG_VOLT_FAULT 0x30e
1988 #define SSD_LOG_SET_CAPACITY_END 0x30F
1989 #define SSD_LOG_CLEAR_DATA_END 0x310
1990 #define SSD_LOG_RESET 0x311
1991 #define SSD_LOG_CAP_VOLT_FAULT 0x312
1992 #define SSD_LOG_CAP_LEARN_FAULT 0x313
1993 #define SSD_LOG_CAP_STATUS 0x314
1994 #define SSD_LOG_VOLT_STATUS 0x315
1995 #define SSD_LOG_INLET_OVER_TEMP 0x316
1996 #define SSD_LOG_INLET_NORMAL_TEMP 0x317
1997 #define SSD_LOG_FLASH_OVER_TEMP 0x318
1998 #define SSD_LOG_FLASH_NORMAL_TEMP 0x319
1999 #define SSD_LOG_CAP_SHORT_CIRCUIT 0x31a
2000 #define SSD_LOG_SENSOR_FAULT 0x31b
2001 #define SSD_LOG_ERASE_ALL 0x31c
2002 #define SSD_LOG_ERASE_ALL_END 0x31d
2003 #define SSD_LOG_TEMP_SENSOR_EVENT 0x320
2004 #define SSD_LOG_CLEAR_SMART 0x350
2005 #define SSD_LOG_CLEAR_WARNING 0x351
2006
2007
2008 /* sw log fifo depth */
2009 #define SSD_LOG_FIFO_SZ 1024
2010
2011
2012 /* done queue */
2013 static DEFINE_PER_CPU(struct list_head, ssd_doneq);
2014 static DEFINE_PER_CPU(struct tasklet_struct, ssd_tasklet);
2015
2016
2017 /* unloading driver */
2018 static volatile int ssd_exiting = 0;
2019
2020 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
2021 static struct class_simple *ssd_class;
2022 #else
2023 static struct class *ssd_class;
2024 #endif
2025
2026 static int ssd_cmajor = SSD_CMAJOR;
2027
2028 /* ssd block device major, minors */
2029 static int ssd_major = SSD_MAJOR;
2030 static int ssd_major_sl = SSD_MAJOR_SL;
2031 static int ssd_minors = SSD_MINORS;
2032
2033 /* ssd device list */
2034 static struct list_head ssd_list;
2035 static unsigned long ssd_index_bits[SSD_MAX_DEV / BITS_PER_LONG + 1];
2036 static unsigned long ssd_index_bits_sl[SSD_MAX_DEV / BITS_PER_LONG + 1];
2037 static atomic_t ssd_nr;
2038
2039 /* module param */
2040 enum ssd_drv_mode
2041 {
2042 SSD_DRV_MODE_STANDARD = 0, /* full */
2043 SSD_DRV_MODE_DEBUG = 2, /* debug */
2044 SSD_DRV_MODE_BASE /* base only */
2045 };
2046
2047 enum ssd_int_mode
2048 {
2049 SSD_INT_LEGACY = 0,
2050 SSD_INT_MSI,
2051 SSD_INT_MSIX
2052 };
2053
2054 #if (defined SSD_MSIX)
2055 #define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2056 #elif (defined SSD_MSI)
2057 #define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2058 #else
2059 /* auto select the defaut int mode according to the kernel version*/
2060 /* suse 11 sp1 irqbalance bug: use msi instead*/
2061 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6) || (defined RHEL_MAJOR && RHEL_MAJOR == 5 && RHEL_MINOR >= 5))
2062 #define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2063 #else
2064 #define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2065 #endif
2066 #endif
2067
2068 static int mode = SSD_DRV_MODE_STANDARD;
2069 static int status_mask = 0xFF;
2070 static int int_mode = SSD_INT_MODE_DEFAULT;
2071 static int threaded_irq = 0;
2072 static int log_level = SSD_LOG_LEVEL_WARNING;
2073 static int ot_protect = 1;
2074 static int wmode = SSD_WMODE_DEFAULT;
2075 static int finject = 0;
2076
2077 module_param(mode, int, 0);
2078 module_param(status_mask, int, 0);
2079 module_param(int_mode, int, 0);
2080 module_param(threaded_irq, int, 0);
2081 module_param(log_level, int, 0);
2082 module_param(ot_protect, int, 0);
2083 module_param(wmode, int, 0);
2084 module_param(finject, int, 0);
2085
2086
2087 MODULE_PARM_DESC(mode, "driver mode, 0 - standard, 1 - debug, 2 - debug without IO, 3 - basic debug mode");
2088 MODULE_PARM_DESC(status_mask, "command status mask, 0 - without command error, 0xff - with command error");
2089 MODULE_PARM_DESC(int_mode, "preferred interrupt mode, 0 - legacy, 1 - msi, 2 - msix");
2090 MODULE_PARM_DESC(threaded_irq, "threaded irq, 0 - normal irq, 1 - threaded irq");
2091 MODULE_PARM_DESC(log_level, "log level to display, 0 - info and above, 1 - notice and above, 2 - warning and above, 3 - error only");
2092 MODULE_PARM_DESC(ot_protect, "over temperature protect, 0 - disable, 1 - enable");
2093 MODULE_PARM_DESC(wmode, "write mode, 0 - write buffer (with risk for the 6xx firmware), 1 - write buffer ex, 2 - write through, 3 - auto, 4 - default");
2094 MODULE_PARM_DESC(finject, "enable fault simulation, 0 - off, 1 - on, for debug purpose only");
2095
2096 // API adaption layer
2097 static inline void ssd_bio_endio(struct bio *bio, int error)
2098 {
2099 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0))
2100 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,13,0))
2101 bio->bi_error = error;
2102 #else
2103 bio->bi_status = errno_to_blk_status(error);
2104 #endif
2105 bio_endio(bio);
2106 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
2107 bio_endio(bio, error);
2108 #else
2109 bio_endio(bio, bio->bi_size, error);
2110 #endif
2111 }
2112
2113 static inline int ssd_bio_has_discard(struct bio *bio)
2114 {
2115 #ifndef SSD_TRIM
2116 return 0;
2117 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
2118 return bio_op(bio) == REQ_OP_DISCARD;
2119 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36))
2120 return bio->bi_rw & REQ_DISCARD;
2121 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
2122 return bio_rw_flagged(bio, BIO_RW_DISCARD);
2123 #else
2124 return 0;
2125 #endif
2126 }
2127
2128 static inline int ssd_bio_has_flush(struct bio *bio)
2129 {
2130 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
2131 return bio_op(bio) == REQ_OP_FLUSH;
2132 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
2133 return bio->bi_rw & REQ_FLUSH;
2134 #else
2135 return 0;
2136 #endif
2137 }
2138
2139 static inline int ssd_bio_has_barrier_or_fua(struct bio * bio)
2140 {
2141 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
2142 return bio->bi_opf & REQ_FUA;
2143 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37))
2144 return bio->bi_rw & REQ_FUA;
2145 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36))
2146 return bio->bi_rw & REQ_HARDBARRIER;
2147 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32))
2148 return bio_rw_flagged(bio, BIO_RW_BARRIER);
2149 #else
2150 return bio_barrier(bio);
2151 #endif
2152 }
2153
2154 #ifndef MODULE
2155 static int __init ssd_drv_mode(char *str)
2156 {
2157 mode = (int)simple_strtoul(str, NULL, 0);
2158
2159 return 1;
2160 }
2161
2162 static int __init ssd_status_mask(char *str)
2163 {
2164 status_mask = (int)simple_strtoul(str, NULL, 16);
2165
2166 return 1;
2167 }
2168
2169 static int __init ssd_int_mode(char *str)
2170 {
2171 int_mode = (int)simple_strtoul(str, NULL, 0);
2172
2173 return 1;
2174 }
2175
2176 static int __init ssd_threaded_irq(char *str)
2177 {
2178 threaded_irq = (int)simple_strtoul(str, NULL, 0);
2179
2180 return 1;
2181 }
2182
2183 static int __init ssd_log_level(char *str)
2184 {
2185 log_level = (int)simple_strtoul(str, NULL, 0);
2186
2187 return 1;
2188 }
2189
2190 static int __init ssd_ot_protect(char *str)
2191 {
2192 ot_protect = (int)simple_strtoul(str, NULL, 0);
2193
2194 return 1;
2195 }
2196
2197 static int __init ssd_wmode(char *str)
2198 {
2199 wmode = (int)simple_strtoul(str, NULL, 0);
2200
2201 return 1;
2202 }
2203
2204 static int __init ssd_finject(char *str)
2205 {
2206 finject = (int)simple_strtoul(str, NULL, 0);
2207
2208 return 1;
2209 }
2210
2211 __setup(MODULE_NAME"_mode=", ssd_drv_mode);
2212 __setup(MODULE_NAME"_status_mask=", ssd_status_mask);
2213 __setup(MODULE_NAME"_int_mode=", ssd_int_mode);
2214 __setup(MODULE_NAME"_threaded_irq=", ssd_threaded_irq);
2215 __setup(MODULE_NAME"_log_level=", ssd_log_level);
2216 __setup(MODULE_NAME"_ot_protect=", ssd_ot_protect);
2217 __setup(MODULE_NAME"_wmode=", ssd_wmode);
2218 __setup(MODULE_NAME"_finject=", ssd_finject);
2219 #endif
2220
2221
2222 #ifdef CONFIG_PROC_FS
2223 #include <linux/proc_fs.h>
2224 #include <asm/uaccess.h>
2225
2226 #define SSD_PROC_DIR MODULE_NAME
2227 #define SSD_PROC_INFO "info"
2228
2229 static struct proc_dir_entry *ssd_proc_dir = NULL;
2230 static struct proc_dir_entry *ssd_proc_info = NULL;
2231
2232 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2233 static int ssd_proc_read(char *page, char **start,
2234 off_t off, int count, int *eof, void *data)
2235 {
2236 struct ssd_device *dev = NULL;
2237 struct ssd_device *n = NULL;
2238 uint64_t size;
2239 int idx;
2240 int len = 0;
2241 //char type; //xx
2242
2243 if (ssd_exiting || off != 0) {
2244 return 0;
2245 }
2246
2247 len += snprintf((page + len), (count - len), "Driver Version:\t%s\n", DRIVER_VERSION);
2248
2249 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2250 idx = dev->idx + 1;
2251 size = dev->hw_info.size ;
2252 do_div(size, 1000000000);
2253
2254 len += snprintf((page + len), (count - len), "\n");
2255
2256 len += snprintf((page + len), (count - len), "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2257
2258 len += snprintf((page + len), (count - len), "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2259 if (dev->hw_info.ctrl_ver != 0) {
2260 len += snprintf((page + len), (count - len), "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2261 }
2262
2263 len += snprintf((page + len), (count - len), "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2264
2265 if (dev->hw_info.upper_pcb_ver >= 'A') {
2266 len += snprintf((page + len), (count - len), "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2267 }
2268
2269 len += snprintf((page + len), (count - len), "HIO %d Device:\t%s\n", idx, dev->name);
2270 }
2271
2272 *eof = 1;
2273 return len;
2274 }
2275
2276 #else
2277
2278 static int ssd_proc_show(struct seq_file *m, void *v)
2279 {
2280 struct ssd_device *dev = NULL;
2281 struct ssd_device *n = NULL;
2282 uint64_t size;
2283 int idx;
2284
2285 if (ssd_exiting) {
2286 return 0;
2287 }
2288
2289 seq_printf(m, "Driver Version:\t%s\n", DRIVER_VERSION);
2290
2291 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2292 idx = dev->idx + 1;
2293 size = dev->hw_info.size ;
2294 do_div(size, 1000000000);
2295
2296 seq_printf(m, "\n");
2297
2298 seq_printf(m, "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2299
2300 seq_printf(m, "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2301 if (dev->hw_info.ctrl_ver != 0) {
2302 seq_printf(m, "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2303 }
2304
2305 seq_printf(m, "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2306
2307 if (dev->hw_info.upper_pcb_ver >= 'A') {
2308 seq_printf(m, "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2309 }
2310
2311 seq_printf(m, "HIO %d Device:\t%s\n", idx, dev->name);
2312 }
2313
2314 return 0;
2315 }
2316
2317 static int ssd_proc_open(struct inode *inode, struct file *file)
2318 {
2319 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
2320 return single_open(file, ssd_proc_show, PDE(inode)->data);
2321 #else
2322 return single_open(file, ssd_proc_show, PDE_DATA(inode));
2323 #endif
2324 }
2325
2326 static const struct file_operations ssd_proc_fops = {
2327 .open = ssd_proc_open,
2328 .read = seq_read,
2329 .llseek = seq_lseek,
2330 .release = single_release,
2331 };
2332 #endif
2333
2334
2335 static void ssd_cleanup_proc(void)
2336 {
2337 if (ssd_proc_info) {
2338 remove_proc_entry(SSD_PROC_INFO, ssd_proc_dir);
2339 ssd_proc_info = NULL;
2340 }
2341 if (ssd_proc_dir) {
2342 remove_proc_entry(SSD_PROC_DIR, NULL);
2343 ssd_proc_dir = NULL;
2344 }
2345 }
2346 static int ssd_init_proc(void)
2347 {
2348 ssd_proc_dir = proc_mkdir(SSD_PROC_DIR, NULL);
2349 if (!ssd_proc_dir)
2350 goto out_proc_mkdir;
2351
2352 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2353 ssd_proc_info = create_proc_entry(SSD_PROC_INFO, S_IFREG | S_IRUGO | S_IWUSR, ssd_proc_dir);
2354 if (!ssd_proc_info)
2355 goto out_create_proc_entry;
2356
2357 ssd_proc_info->read_proc = ssd_proc_read;
2358
2359 /* kernel bug */
2360 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
2361 ssd_proc_info->owner = THIS_MODULE;
2362 #endif
2363 #else
2364 ssd_proc_info = proc_create(SSD_PROC_INFO, 0600, ssd_proc_dir, &ssd_proc_fops);
2365 if (!ssd_proc_info)
2366 goto out_create_proc_entry;
2367 #endif
2368
2369 return 0;
2370
2371 out_create_proc_entry:
2372 remove_proc_entry(SSD_PROC_DIR, NULL);
2373 out_proc_mkdir:
2374 return -ENOMEM;
2375 }
2376
2377 #else
2378 static void ssd_cleanup_proc(void)
2379 {
2380 return;
2381 }
2382 static int ssd_init_proc(void)
2383 {
2384 return 0;
2385 }
2386 #endif /* CONFIG_PROC_FS */
2387
2388 /* sysfs */
2389 static void ssd_unregister_sysfs(struct ssd_device *dev)
2390 {
2391 return;
2392 }
2393
2394 static int ssd_register_sysfs(struct ssd_device *dev)
2395 {
2396 return 0;
2397 }
2398
2399 static void ssd_cleanup_sysfs(void)
2400 {
2401 return;
2402 }
2403
2404 static int ssd_init_sysfs(void)
2405 {
2406 return 0;
2407 }
2408
2409 static inline void ssd_put_index(int slave, int index)
2410 {
2411 unsigned long *index_bits = ssd_index_bits;
2412
2413 if (slave) {
2414 index_bits = ssd_index_bits_sl;
2415 }
2416
2417 if (test_and_clear_bit(index, index_bits)) {
2418 atomic_dec(&ssd_nr);
2419 }
2420 }
2421
2422 static inline int ssd_get_index(int slave)
2423 {
2424 unsigned long *index_bits = ssd_index_bits;
2425 int index;
2426
2427 if (slave) {
2428 index_bits = ssd_index_bits_sl;
2429 }
2430
2431 find_index:
2432 if ((index = find_first_zero_bit(index_bits, SSD_MAX_DEV)) >= SSD_MAX_DEV) {
2433 return -1;
2434 }
2435
2436 if (test_and_set_bit(index, index_bits)) {
2437 goto find_index;
2438 }
2439
2440 atomic_inc(&ssd_nr);
2441
2442 return index;
2443 }
2444
2445 static void ssd_cleanup_index(void)
2446 {
2447 return;
2448 }
2449
2450 static int ssd_init_index(void)
2451 {
2452 INIT_LIST_HEAD(&ssd_list);
2453 atomic_set(&ssd_nr, 0);
2454 memset(ssd_index_bits, 0, sizeof(ssd_index_bits));
2455 memset(ssd_index_bits_sl, 0, sizeof(ssd_index_bits_sl));
2456
2457 return 0;
2458 }
2459
2460 static void ssd_set_dev_name(char *name, size_t size, int idx)
2461 {
2462 if(idx < SSD_ALPHABET_NUM) {
2463 snprintf(name, size, "%c", 'a'+idx);
2464 } else {
2465 idx -= SSD_ALPHABET_NUM;
2466 snprintf(name, size, "%c%c", 'a'+(idx/SSD_ALPHABET_NUM), 'a'+(idx%SSD_ALPHABET_NUM));
2467 }
2468 }
2469
2470 /* pci register r&w */
2471 static inline void ssd_reg_write(void *addr, uint64_t val)
2472 {
2473 iowrite32((uint32_t)val, addr);
2474 iowrite32((uint32_t)(val >> 32), addr + 4);
2475 wmb();
2476 }
2477
2478 static inline uint64_t ssd_reg_read(void *addr)
2479 {
2480 uint64_t val;
2481 uint32_t val_lo, val_hi;
2482
2483 val_lo = ioread32(addr);
2484 val_hi = ioread32(addr + 4);
2485
2486 rmb();
2487 val = val_lo | ((uint64_t)val_hi << 32);
2488
2489 return val;
2490 }
2491
2492
2493 #define ssd_reg32_write(addr, val) writel(val, addr)
2494 #define ssd_reg32_read(addr) readl(addr)
2495
2496 /* alarm led */
2497 static void ssd_clear_alarm(struct ssd_device *dev)
2498 {
2499 uint32_t val;
2500
2501 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2502 return;
2503 }
2504
2505 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2506
2507 /* firmware control */
2508 val &= ~0x2;
2509
2510 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2511 }
2512
2513 static void ssd_set_alarm(struct ssd_device *dev)
2514 {
2515 uint32_t val;
2516
2517 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2518 return;
2519 }
2520
2521 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2522
2523 /* light up */
2524 val &= ~0x1;
2525 /* software control */
2526 val |= 0x2;
2527
2528 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2529 }
2530
2531 #define u32_swap(x) \
2532 ((uint32_t)( \
2533 (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
2534 (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
2535 (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
2536 (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
2537
2538 #define u16_swap(x) \
2539 ((uint16_t)( \
2540 (((uint16_t)(x) & (uint16_t)0x00ff) << 8) | \
2541 (((uint16_t)(x) & (uint16_t)0xff00) >> 8) ))
2542
2543
2544 #if 0
2545 /* No lock, for init only*/
2546 static int ssd_spi_read_id(struct ssd_device *dev, uint32_t *id)
2547 {
2548 uint32_t val;
2549 unsigned long st;
2550 int ret = 0;
2551
2552 if (!dev || !id) {
2553 return -EINVAL;
2554 }
2555
2556 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_ID);
2557
2558 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2559 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2560 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2561 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2562
2563 st = jiffies;
2564 for (;;) {
2565 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2566 if (val == 0x1000000) {
2567 break;
2568 }
2569
2570 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2571 ret = -ETIMEDOUT;
2572 goto out;
2573 }
2574 cond_resched();
2575 }
2576
2577 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_ID);
2578 *id = val;
2579
2580 out:
2581 return ret;
2582 }
2583 #endif
2584
2585 /* spi access */
2586 static int ssd_init_spi(struct ssd_device *dev)
2587 {
2588 uint32_t val;
2589 unsigned long st;
2590 int ret = 0;
2591
2592 mutex_lock(&dev->spi_mutex);
2593 st = jiffies;
2594 for(;;) {
2595 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2596
2597 do {
2598 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2599
2600 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2601 ret = -ETIMEDOUT;
2602 goto out;
2603 }
2604 cond_resched();
2605 } while (val != 0x1000000);
2606
2607 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2608 if (!(val & 0x1)) {
2609 break;
2610 }
2611
2612 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2613 ret = -ETIMEDOUT;
2614 goto out;
2615 }
2616 cond_resched();
2617 }
2618
2619 out:
2620 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2621 if (val & 0x1) {
2622 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2623 }
2624 }
2625 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2626 mutex_unlock(&dev->spi_mutex);
2627
2628 ret = 0;
2629
2630 return ret;
2631 }
2632
2633 static int ssd_spi_page_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2634 {
2635 uint32_t val;
2636 uint32_t rlen = 0;
2637 unsigned long st;
2638 int ret = 0;
2639
2640 if (!dev || !buf) {
2641 return -EINVAL;
2642 }
2643
2644 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2645 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size) {
2646 return -EINVAL;
2647 }
2648
2649 mutex_lock(&dev->spi_mutex);
2650 while (rlen < size) {
2651 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, ((off + rlen) >> 24));
2652 wmb();
2653 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, (((off + rlen) << 8) | SSD_SPI_CMD_READ));
2654
2655 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2656 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2657 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2658 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2659
2660 st = jiffies;
2661 for (;;) {
2662 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2663 if (val == 0x1000000) {
2664 break;
2665 }
2666
2667 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2668 ret = -ETIMEDOUT;
2669 goto out;
2670 }
2671 cond_resched();
2672 }
2673
2674 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
2675 *(uint32_t *)(buf + rlen)= u32_swap(val);
2676
2677 rlen += sizeof(uint32_t);
2678 }
2679
2680 out:
2681 mutex_unlock(&dev->spi_mutex);
2682 return ret;
2683 }
2684
2685 static int ssd_spi_page_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2686 {
2687 uint32_t val;
2688 uint32_t wlen;
2689 unsigned long st;
2690 int i;
2691 int ret = 0;
2692
2693 if (!dev || !buf) {
2694 return -EINVAL;
2695 }
2696
2697 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2698 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size ||
2699 (off / dev->rom_info.page_size) != ((off + size - 1) / dev->rom_info.page_size)) {
2700 return -EINVAL;
2701 }
2702
2703 mutex_lock(&dev->spi_mutex);
2704
2705 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2706
2707 wlen = size / sizeof(uint32_t);
2708 for (i=0; i<(int)wlen; i++) {
2709 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_WDATA, u32_swap(*((uint32_t *)buf + i)));
2710 }
2711
2712 wmb();
2713 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2714 wmb();
2715 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_PROGRAM));
2716
2717 udelay(1);
2718
2719 st = jiffies;
2720 for (;;) {
2721 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2722 do {
2723 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2724
2725 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2726 ret = -ETIMEDOUT;
2727 goto out;
2728 }
2729 cond_resched();
2730 } while (val != 0x1000000);
2731
2732 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2733 if (!(val & 0x1)) {
2734 break;
2735 }
2736
2737 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2738 ret = -ETIMEDOUT;
2739 goto out;
2740 }
2741 cond_resched();
2742 }
2743
2744 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2745 if ((val >> 6) & 0x1) {
2746 ret = -EIO;
2747 goto out;
2748 }
2749 }
2750
2751 out:
2752 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2753 if (val & 0x1) {
2754 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2755 }
2756 }
2757 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2758
2759 mutex_unlock(&dev->spi_mutex);
2760
2761 return ret;
2762 }
2763
2764 static int ssd_spi_block_erase(struct ssd_device *dev, uint32_t off)
2765 {
2766 uint32_t val;
2767 unsigned long st;
2768 int ret = 0;
2769
2770 if (!dev) {
2771 return -EINVAL;
2772 }
2773
2774 if ((off % dev->rom_info.block_size) != 0 || off >= dev->rom_info.size) {
2775 return -EINVAL;
2776 }
2777
2778 mutex_lock(&dev->spi_mutex);
2779
2780 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2781 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2782
2783 wmb();
2784 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2785 wmb();
2786 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_ERASE));
2787
2788 st = jiffies;
2789 for (;;) {
2790 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2791
2792 do {
2793 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2794
2795 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2796 ret = -ETIMEDOUT;
2797 goto out;
2798 }
2799 cond_resched();
2800 } while (val != 0x1000000);
2801
2802 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2803 if (!(val & 0x1)) {
2804 break;
2805 }
2806
2807 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2808 ret = -ETIMEDOUT;
2809 goto out;
2810 }
2811 cond_resched();
2812 }
2813
2814 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2815 if ((val >> 5) & 0x1) {
2816 ret = -EIO;
2817 goto out;
2818 }
2819 }
2820
2821 out:
2822 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2823 if (val & 0x1) {
2824 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2825 }
2826 }
2827 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2828
2829 mutex_unlock(&dev->spi_mutex);
2830
2831 return ret;
2832 }
2833
2834 static int ssd_spi_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2835 {
2836 uint32_t len = 0;
2837 uint32_t roff;
2838 uint32_t rsize;
2839 int ret = 0;
2840
2841 if (!dev || !buf) {
2842 return -EINVAL;
2843 }
2844
2845 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2846 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2847 return -EINVAL;
2848 }
2849
2850 while (len < size) {
2851 roff = (off + len) % dev->rom_info.page_size;
2852 rsize = dev->rom_info.page_size - roff;
2853 if ((size - len) < rsize) {
2854 rsize = (size - len);
2855 }
2856 roff = off + len;
2857
2858 ret = ssd_spi_page_read(dev, (buf + len), roff, rsize);
2859 if (ret) {
2860 goto out;
2861 }
2862
2863 len += rsize;
2864
2865 cond_resched();
2866 }
2867
2868 out:
2869 return ret;
2870 }
2871
2872 static int ssd_spi_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2873 {
2874 uint32_t len = 0;
2875 uint32_t woff;
2876 uint32_t wsize;
2877 int ret = 0;
2878
2879 if (!dev || !buf) {
2880 return -EINVAL;
2881 }
2882
2883 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2884 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2885 return -EINVAL;
2886 }
2887
2888 while (len < size) {
2889 woff = (off + len) % dev->rom_info.page_size;
2890 wsize = dev->rom_info.page_size - woff;
2891 if ((size - len) < wsize) {
2892 wsize = (size - len);
2893 }
2894 woff = off + len;
2895
2896 ret = ssd_spi_page_write(dev, (buf + len), woff, wsize);
2897 if (ret) {
2898 goto out;
2899 }
2900
2901 len += wsize;
2902
2903 cond_resched();
2904 }
2905
2906 out:
2907 return ret;
2908 }
2909
2910 static int ssd_spi_erase(struct ssd_device *dev, uint32_t off, uint32_t size)
2911 {
2912 uint32_t len = 0;
2913 uint32_t eoff;
2914 int ret = 0;
2915
2916 if (!dev) {
2917 return -EINVAL;
2918 }
2919
2920 if (size == 0 || ((uint64_t)off + (uint64_t)size) > dev->rom_info.size ||
2921 (off % dev->rom_info.block_size) != 0 || (size % dev->rom_info.block_size) != 0) {
2922 return -EINVAL;
2923 }
2924
2925 while (len < size) {
2926 eoff = (off + len);
2927
2928 ret = ssd_spi_block_erase(dev, eoff);
2929 if (ret) {
2930 goto out;
2931 }
2932
2933 len += dev->rom_info.block_size;
2934
2935 cond_resched();
2936 }
2937
2938 out:
2939 return ret;
2940 }
2941
2942 /* i2c access */
2943 static uint32_t __ssd_i2c_reg32_read(void *addr)
2944 {
2945 return ssd_reg32_read(addr);
2946 }
2947
2948 static void __ssd_i2c_reg32_write(void *addr, uint32_t val)
2949 {
2950 ssd_reg32_write(addr, val);
2951 ssd_reg32_read(addr);
2952 }
2953
2954 static int __ssd_i2c_clear(struct ssd_device *dev, uint8_t saddr)
2955 {
2956 ssd_i2c_ctrl_t ctrl;
2957 ssd_i2c_data_t data;
2958 uint8_t status = 0;
2959 int nr_data = 0;
2960 unsigned long st;
2961 int ret = 0;
2962
2963 check_status:
2964 ctrl.bits.wdata = 0;
2965 ctrl.bits.addr = SSD_I2C_STATUS_REG;
2966 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2967 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2968
2969 st = jiffies;
2970 for (;;) {
2971 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2972 if (data.bits.valid == 0) {
2973 break;
2974 }
2975
2976 /* retry */
2977 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
2978 ret = -ETIMEDOUT;
2979 goto out;
2980 }
2981 cond_resched();
2982 }
2983 status = data.bits.rdata;
2984
2985 if (!(status & 0x4)) {
2986 /* clear read fifo data */
2987 ctrl.bits.wdata = 0;
2988 ctrl.bits.addr = SSD_I2C_DATA_REG;
2989 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2990 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2991
2992 st = jiffies;
2993 for (;;) {
2994 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2995 if (data.bits.valid == 0) {
2996 break;
2997 }
2998
2999 /* retry */
3000 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3001 ret = -ETIMEDOUT;
3002 goto out;
3003 }
3004 cond_resched();
3005 }
3006
3007 nr_data++;
3008 if (nr_data <= SSD_I2C_MAX_DATA) {
3009 goto check_status;
3010 } else {
3011 goto out_reset;
3012 }
3013 }
3014
3015 if (status & 0x3) {
3016 /* clear int */
3017 ctrl.bits.wdata = 0x04;
3018 ctrl.bits.addr = SSD_I2C_CMD_REG;
3019 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3020 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3021 }
3022
3023 if (!(status & 0x8)) {
3024 out_reset:
3025 /* reset i2c controller */
3026 ctrl.bits.wdata = 0x0;
3027 ctrl.bits.addr = SSD_I2C_RESET_REG;
3028 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3029 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3030 }
3031
3032 out:
3033 return ret;
3034 }
3035
3036 static int ssd_i2c_write(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
3037 {
3038 ssd_i2c_ctrl_t ctrl;
3039 ssd_i2c_data_t data;
3040 uint8_t off = 0;
3041 uint8_t status = 0;
3042 unsigned long st;
3043 int ret = 0;
3044
3045 mutex_lock(&dev->i2c_mutex);
3046
3047 ctrl.val = 0;
3048
3049 /* slave addr */
3050 ctrl.bits.wdata = saddr;
3051 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3052 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3053 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3054
3055 /* data */
3056 while (off < size) {
3057 ctrl.bits.wdata = buf[off];
3058 ctrl.bits.addr = SSD_I2C_DATA_REG;
3059 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3060 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3061
3062 off++;
3063 }
3064
3065 /* write */
3066 ctrl.bits.wdata = 0x01;
3067 ctrl.bits.addr = SSD_I2C_CMD_REG;
3068 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3069 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3070
3071 /* wait */
3072 st = jiffies;
3073 for (;;) {
3074 ctrl.bits.wdata = 0;
3075 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3076 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3077 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3078
3079 for (;;) {
3080 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3081 if (data.bits.valid == 0) {
3082 break;
3083 }
3084
3085 /* retry */
3086 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3087 ret = -ETIMEDOUT;
3088 goto out_clear;
3089 }
3090 cond_resched();
3091 }
3092
3093 status = data.bits.rdata;
3094 if (status & 0x1) {
3095 break;
3096 }
3097
3098 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3099 ret = -ETIMEDOUT;
3100 goto out_clear;
3101 }
3102 cond_resched();
3103 }
3104
3105 if (!(status & 0x1)) {
3106 ret = -1;
3107 goto out_clear;
3108 }
3109
3110 /* busy ? */
3111 if (status & 0x20) {
3112 ret = -2;
3113 goto out_clear;
3114 }
3115
3116 /* ack ? */
3117 if (status & 0x10) {
3118 ret = -3;
3119 goto out_clear;
3120 }
3121
3122 /* clear */
3123 out_clear:
3124 if (__ssd_i2c_clear(dev, saddr)) {
3125 if (!ret) ret = -4;
3126 }
3127
3128 mutex_unlock(&dev->i2c_mutex);
3129
3130 return ret;
3131 }
3132
3133 static int ssd_i2c_read(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
3134 {
3135 ssd_i2c_ctrl_t ctrl;
3136 ssd_i2c_data_t data;
3137 uint8_t off = 0;
3138 uint8_t status = 0;
3139 unsigned long st;
3140 int ret = 0;
3141
3142 mutex_lock(&dev->i2c_mutex);
3143
3144 ctrl.val = 0;
3145
3146 /* slave addr */
3147 ctrl.bits.wdata = saddr;
3148 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3149 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3150 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3151
3152 /* read len */
3153 ctrl.bits.wdata = size;
3154 ctrl.bits.addr = SSD_I2C_LEN_REG;
3155 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3156 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3157
3158 /* read */
3159 ctrl.bits.wdata = 0x02;
3160 ctrl.bits.addr = SSD_I2C_CMD_REG;
3161 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3162 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3163
3164 /* wait */
3165 st = jiffies;
3166 for (;;) {
3167 ctrl.bits.wdata = 0;
3168 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3169 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3170 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3171
3172 for (;;) {
3173 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3174 if (data.bits.valid == 0) {
3175 break;
3176 }
3177
3178 /* retry */
3179 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3180 ret = -ETIMEDOUT;
3181 goto out_clear;
3182 }
3183 cond_resched();
3184 }
3185
3186 status = data.bits.rdata;
3187 if (status & 0x2) {
3188 break;
3189 }
3190
3191 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3192 ret = -ETIMEDOUT;
3193 goto out_clear;
3194 }
3195 cond_resched();
3196 }
3197
3198 if (!(status & 0x2)) {
3199 ret = -1;
3200 goto out_clear;
3201 }
3202
3203 /* busy ? */
3204 if (status & 0x20) {
3205 ret = -2;
3206 goto out_clear;
3207 }
3208
3209 /* ack ? */
3210 if (status & 0x10) {
3211 ret = -3;
3212 goto out_clear;
3213 }
3214
3215 /* data */
3216 while (off < size) {
3217 ctrl.bits.wdata = 0;
3218 ctrl.bits.addr = SSD_I2C_DATA_REG;
3219 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3220 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3221
3222 st = jiffies;
3223 for (;;) {
3224 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3225 if (data.bits.valid == 0) {
3226 break;
3227 }
3228
3229 /* retry */
3230 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3231 ret = -ETIMEDOUT;
3232 goto out_clear;
3233 }
3234 cond_resched();
3235 }
3236
3237 buf[off] = data.bits.rdata;
3238
3239 off++;
3240 }
3241
3242 /* clear */
3243 out_clear:
3244 if (__ssd_i2c_clear(dev, saddr)) {
3245 if (!ret) ret = -4;
3246 }
3247
3248 mutex_unlock(&dev->i2c_mutex);
3249
3250 return ret;
3251 }
3252
3253 static int ssd_i2c_write_read(struct ssd_device *dev, uint8_t saddr, uint8_t wsize, uint8_t *wbuf, uint8_t rsize, uint8_t *rbuf)
3254 {
3255 ssd_i2c_ctrl_t ctrl;
3256 ssd_i2c_data_t data;
3257 uint8_t off = 0;
3258 uint8_t status = 0;
3259 unsigned long st;
3260 int ret = 0;
3261
3262 mutex_lock(&dev->i2c_mutex);
3263
3264 ctrl.val = 0;
3265
3266 /* slave addr */
3267 ctrl.bits.wdata = saddr;
3268 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3269 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3270 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3271
3272 /* data */
3273 off = 0;
3274 while (off < wsize) {
3275 ctrl.bits.wdata = wbuf[off];
3276 ctrl.bits.addr = SSD_I2C_DATA_REG;
3277 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3278 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3279
3280 off++;
3281 }
3282
3283 /* read len */
3284 ctrl.bits.wdata = rsize;
3285 ctrl.bits.addr = SSD_I2C_LEN_REG;
3286 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3287 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3288
3289 /* write -> read */
3290 ctrl.bits.wdata = 0x03;
3291 ctrl.bits.addr = SSD_I2C_CMD_REG;
3292 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3293 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3294
3295 /* wait */
3296 st = jiffies;
3297 for (;;) {
3298 ctrl.bits.wdata = 0;
3299 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3300 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3301 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3302
3303 for (;;) {
3304 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3305 if (data.bits.valid == 0) {
3306 break;
3307 }
3308
3309 /* retry */
3310 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3311 ret = -ETIMEDOUT;
3312 goto out_clear;
3313 }
3314 cond_resched();
3315 }
3316
3317 status = data.bits.rdata;
3318 if (status & 0x2) {
3319 break;
3320 }
3321
3322 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3323 ret = -ETIMEDOUT;
3324 goto out_clear;
3325 }
3326 cond_resched();
3327 }
3328
3329 if (!(status & 0x2)) {
3330 ret = -1;
3331 goto out_clear;
3332 }
3333
3334 /* busy ? */
3335 if (status & 0x20) {
3336 ret = -2;
3337 goto out_clear;
3338 }
3339
3340 /* ack ? */
3341 if (status & 0x10) {
3342 ret = -3;
3343 goto out_clear;
3344 }
3345
3346 /* data */
3347 off = 0;
3348 while (off < rsize) {
3349 ctrl.bits.wdata = 0;
3350 ctrl.bits.addr = SSD_I2C_DATA_REG;
3351 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3352 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3353
3354 st = jiffies;
3355 for (;;) {
3356 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3357 if (data.bits.valid == 0) {
3358 break;
3359 }
3360
3361 /* retry */
3362 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3363 ret = -ETIMEDOUT;
3364 goto out_clear;
3365 }
3366 cond_resched();
3367 }
3368
3369 rbuf[off] = data.bits.rdata;
3370
3371 off++;
3372 }
3373
3374 /* clear */
3375 out_clear:
3376 if (__ssd_i2c_clear(dev, saddr)) {
3377 if (!ret) ret = -4;
3378 }
3379 mutex_unlock(&dev->i2c_mutex);
3380
3381 return ret;
3382 }
3383
3384 static int ssd_smbus_send_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3385 {
3386 int i = 0;
3387 int ret = 0;
3388
3389 for (;;) {
3390 ret = ssd_i2c_write(dev, saddr, 1, buf);
3391 if (!ret || -ETIMEDOUT == ret) {
3392 break;
3393 }
3394
3395 i++;
3396 if (i >= SSD_SMBUS_RETRY_MAX) {
3397 break;
3398 }
3399 msleep(SSD_SMBUS_RETRY_INTERVAL);
3400 }
3401
3402 return ret;
3403 }
3404
3405 static int ssd_smbus_receive_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3406 {
3407 int i = 0;
3408 int ret = 0;
3409
3410 for (;;) {
3411 ret = ssd_i2c_read(dev, saddr, 1, buf);
3412 if (!ret || -ETIMEDOUT == ret) {
3413 break;
3414 }
3415
3416 i++;
3417 if (i >= SSD_SMBUS_RETRY_MAX) {
3418 break;
3419 }
3420 msleep(SSD_SMBUS_RETRY_INTERVAL);
3421 }
3422
3423 return ret;
3424 }
3425
3426 static int ssd_smbus_write_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3427 {
3428 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3429 int i = 0;
3430 int ret = 0;
3431
3432 smb_data[0] = cmd;
3433 memcpy((smb_data + 1), buf, 1);
3434
3435 for (;;) {
3436 ret = ssd_i2c_write(dev, saddr, 2, smb_data);
3437 if (!ret || -ETIMEDOUT == ret) {
3438 break;
3439 }
3440
3441 i++;
3442 if (i >= SSD_SMBUS_RETRY_MAX) {
3443 break;
3444 }
3445 msleep(SSD_SMBUS_RETRY_INTERVAL);
3446 }
3447
3448 return ret;
3449 }
3450
3451 static int ssd_smbus_read_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3452 {
3453 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3454 int i = 0;
3455 int ret = 0;
3456
3457 smb_data[0] = cmd;
3458
3459 for (;;) {
3460 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 1, buf);
3461 if (!ret || -ETIMEDOUT == ret) {
3462 break;
3463 }
3464
3465 i++;
3466 if (i >= SSD_SMBUS_RETRY_MAX) {
3467 break;
3468 }
3469 msleep(SSD_SMBUS_RETRY_INTERVAL);
3470 }
3471
3472 return ret;
3473 }
3474
3475 static int ssd_smbus_write_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3476 {
3477 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3478 int i = 0;
3479 int ret = 0;
3480
3481 smb_data[0] = cmd;
3482 memcpy((smb_data + 1), buf, 2);
3483
3484 for (;;) {
3485 ret = ssd_i2c_write(dev, saddr, 3, smb_data);
3486 if (!ret || -ETIMEDOUT == ret) {
3487 break;
3488 }
3489
3490 i++;
3491 if (i >= SSD_SMBUS_RETRY_MAX) {
3492 break;
3493 }
3494 msleep(SSD_SMBUS_RETRY_INTERVAL);
3495 }
3496
3497 return ret;
3498 }
3499
3500 static int ssd_smbus_read_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3501 {
3502 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3503 int i = 0;
3504 int ret = 0;
3505
3506 smb_data[0] = cmd;
3507
3508 for (;;) {
3509 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 2, buf);
3510 if (!ret || -ETIMEDOUT == ret) {
3511 break;
3512 }
3513
3514 i++;
3515 if (i >= SSD_SMBUS_RETRY_MAX) {
3516 break;
3517 }
3518 msleep(SSD_SMBUS_RETRY_INTERVAL);
3519 }
3520
3521 return ret;
3522 }
3523
3524 static int ssd_smbus_write_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3525 {
3526 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3527 int i = 0;
3528 int ret = 0;
3529
3530 smb_data[0] = cmd;
3531 smb_data[1] = size;
3532 memcpy((smb_data + 2), buf, size);
3533
3534 for (;;) {
3535 ret = ssd_i2c_write(dev, saddr, (2 + size), smb_data);
3536 if (!ret || -ETIMEDOUT == ret) {
3537 break;
3538 }
3539
3540 i++;
3541 if (i >= SSD_SMBUS_RETRY_MAX) {
3542 break;
3543 }
3544 msleep(SSD_SMBUS_RETRY_INTERVAL);
3545 }
3546
3547 return ret;
3548 }
3549
3550 static int ssd_smbus_read_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3551 {
3552 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3553 uint8_t rsize;
3554 int i = 0;
3555 int ret = 0;
3556
3557 smb_data[0] = cmd;
3558
3559 for (;;) {
3560 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, (SSD_SMBUS_BLOCK_MAX + 1), (smb_data + 1));
3561 if (!ret || -ETIMEDOUT == ret) {
3562 break;
3563 }
3564
3565 i++;
3566 if (i >= SSD_SMBUS_RETRY_MAX) {
3567 break;
3568 }
3569 msleep(SSD_SMBUS_RETRY_INTERVAL);
3570 }
3571 if (ret) {
3572 return ret;
3573 }
3574
3575 rsize = smb_data[1];
3576
3577 if (rsize > size ) {
3578 rsize = size;
3579 }
3580
3581 memcpy(buf, (smb_data + 2), rsize);
3582
3583 return 0;
3584 }
3585
3586
3587 static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data);
3588
3589 /* sensor */
3590 static int ssd_init_lm75(struct ssd_device *dev, uint8_t saddr)
3591 {
3592 uint8_t conf = 0;
3593 int ret = 0;
3594
3595 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3596 if (ret) {
3597 goto out;
3598 }
3599
3600 conf &= (uint8_t)(~1u);
3601
3602 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3603 if (ret) {
3604 goto out;
3605 }
3606
3607 out:
3608 return ret;
3609 }
3610
3611 static int ssd_lm75_read(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3612 {
3613 uint16_t val = 0;
3614 int ret;
3615
3616 ret = ssd_smbus_read_word(dev, saddr, SSD_LM75_REG_TEMP, (uint8_t *)&val);
3617 if (ret) {
3618 return ret;
3619 }
3620
3621 *data = u16_swap(val);
3622
3623 return 0;
3624 }
3625
3626 static int ssd_init_lm80(struct ssd_device *dev, uint8_t saddr)
3627 {
3628 uint8_t val;
3629 uint8_t low, high;
3630 int i;
3631 int ret = 0;
3632
3633 /* init */
3634 val = 0x80;
3635 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3636 if (ret) {
3637 goto out;
3638 }
3639
3640 /* 11-bit temp */
3641 val = 0x08;
3642 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_RES, &val);
3643 if (ret) {
3644 goto out;
3645 }
3646
3647 /* set volt limit */
3648 for (i=0; i<SSD_LM80_IN_NR; i++) {
3649 high = ssd_lm80_limit[i].high;
3650 low = ssd_lm80_limit[i].low;
3651
3652 if (SSD_LM80_IN_CAP == i) {
3653 low = 0;
3654 }
3655
3656 if (dev->hw_info.nr_ctrl <= 1 && SSD_LM80_IN_1V2 == i) {
3657 high = 0xFF;
3658 low = 0;
3659 }
3660
3661 /* high limit */
3662 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MAX(i), &high);
3663 if (ret) {
3664 goto out;
3665 }
3666
3667 /* low limit*/
3668 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MIN(i), &low);
3669 if (ret) {
3670 goto out;
3671 }
3672 }
3673
3674 /* set interrupt mask: allow volt in interrupt except cap in*/
3675 val = 0x81;
3676 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3677 if (ret) {
3678 goto out;
3679 }
3680
3681 /* set interrupt mask: disable others */
3682 val = 0xFF;
3683 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK2, &val);
3684 if (ret) {
3685 goto out;
3686 }
3687
3688 /* start */
3689 val = 0x03;
3690 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3691 if (ret) {
3692 goto out;
3693 }
3694
3695 out:
3696 return ret;
3697 }
3698
3699 static int ssd_lm80_enable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3700 {
3701 uint8_t val = 0;
3702 int ret = 0;
3703
3704 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3705 return -EINVAL;
3706 }
3707
3708 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3709 if (ret) {
3710 goto out;
3711 }
3712
3713 val &= ~(1UL << (uint32_t)idx);
3714
3715 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3716 if (ret) {
3717 goto out;
3718 }
3719
3720 out:
3721 return ret;
3722 }
3723
3724 static int ssd_lm80_disable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3725 {
3726 uint8_t val = 0;
3727 int ret = 0;
3728
3729 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3730 return -EINVAL;
3731 }
3732
3733 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3734 if (ret) {
3735 goto out;
3736 }
3737
3738 val |= (1UL << (uint32_t)idx);
3739
3740 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3741 if (ret) {
3742 goto out;
3743 }
3744
3745 out:
3746 return ret;
3747 }
3748
3749 static int ssd_lm80_read_temp(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3750 {
3751 uint16_t val = 0;
3752 int ret;
3753
3754 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_TEMP, (uint8_t *)&val);
3755 if (ret) {
3756 return ret;
3757 }
3758
3759 *data = u16_swap(val);
3760
3761 return 0;
3762 }
3763 static int ssd_generate_sensor_fault_log(struct ssd_device *dev, uint16_t event, uint8_t addr,uint32_t ret)
3764 {
3765 uint32_t data;
3766 data = ((ret & 0xffff) << 16) | (addr << 8) | addr;
3767 ssd_gen_swlog(dev,event,data);
3768 return 0;
3769 }
3770 static int ssd_lm80_check_event(struct ssd_device *dev, uint8_t saddr)
3771 {
3772 uint32_t volt;
3773 uint16_t val = 0, status;
3774 uint8_t alarm1 = 0, alarm2 = 0;
3775 uint32_t low, high;
3776 int i,j=0;
3777 int ret = 0;
3778
3779 /* read interrupt status to clear interrupt */
3780 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM1, &alarm1);
3781 if (ret) {
3782 goto out;
3783 }
3784
3785 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM2, &alarm2);
3786 if (ret) {
3787 goto out;
3788 }
3789
3790 status = (uint16_t)alarm1 | ((uint16_t)alarm2 << 8);
3791
3792 /* parse inetrrupt status */
3793 for (i=0; i<SSD_LM80_IN_NR; i++) {
3794 if (!((status >> (uint32_t)i) & 0x1)) {
3795 if (test_and_clear_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3796 /* enable INx irq */
3797 ret = ssd_lm80_enable_in(dev, saddr, i);
3798 if (ret) {
3799 goto out;
3800 }
3801 }
3802
3803 continue;
3804 }
3805
3806 /* disable INx irq */
3807 ret = ssd_lm80_disable_in(dev, saddr, i);
3808 if (ret) {
3809 goto out;
3810 }
3811
3812 if (test_and_set_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3813 continue;
3814 }
3815
3816 high = (uint32_t)ssd_lm80_limit[i].high * (uint32_t)10;
3817 low = (uint32_t)ssd_lm80_limit[i].low * (uint32_t)10;
3818
3819 for (j=0; j<3; j++) {
3820 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_IN(i), (uint8_t *)&val);
3821 if (ret) {
3822 goto out;
3823 }
3824 volt = SSD_LM80_CONVERT_VOLT(u16_swap(val));
3825 if ((volt>high) || (volt<=low)) {
3826 if(j<2) {
3827 msleep(SSD_LM80_CONV_INTERVAL);
3828 }
3829 } else {
3830 break;
3831 }
3832 }
3833
3834 if (j<3) {
3835 continue;
3836 }
3837
3838 switch (i) {
3839 case SSD_LM80_IN_CAP: {
3840 if (0 == volt) {
3841 ssd_gen_swlog(dev, SSD_LOG_CAP_SHORT_CIRCUIT, 0);
3842 } else {
3843 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(volt));
3844 }
3845 break;
3846 }
3847
3848 case SSD_LM80_IN_1V2:
3849 case SSD_LM80_IN_1V2a:
3850 case SSD_LM80_IN_1V5:
3851 case SSD_LM80_IN_1V8: {
3852 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, volt));
3853 break;
3854 }
3855 case SSD_LM80_IN_FPGA_3V3:
3856 case SSD_LM80_IN_3V3: {
3857 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, SSD_LM80_3V3_VOLT(volt)));
3858 break;
3859 }
3860 default:
3861 break;
3862 }
3863 }
3864
3865 out:
3866 if (ret) {
3867 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3868 ssd_generate_sensor_fault_log(dev, SSD_LOG_SENSOR_FAULT, (uint32_t)saddr,ret);
3869 }
3870 } else {
3871 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3872 }
3873 return ret;
3874 }
3875
3876
3877 static int ssd_init_sensor(struct ssd_device *dev)
3878 {
3879 int ret = 0;
3880
3881 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3882 goto out;
3883 }
3884
3885 ret = ssd_init_lm75(dev, SSD_SENSOR_LM75_SADDRESS);
3886 if (ret) {
3887 hio_warn("%s: init lm75 failed\n", dev->name);
3888 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3889 ssd_generate_sensor_fault_log(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM75_SADDRESS,ret);
3890 }
3891 goto out;
3892 }
3893
3894 if (dev->hw_info.pcb_ver >= 'B' || dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_HHHL) {
3895 ret = ssd_init_lm80(dev, SSD_SENSOR_LM80_SADDRESS);
3896 if (ret) {
3897 hio_warn("%s: init lm80 failed\n", dev->name);
3898 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3899 ssd_generate_sensor_fault_log(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS,ret);
3900 }
3901 goto out;
3902 }
3903 }
3904
3905 out:
3906 /* skip error if not in standard mode */
3907 if (mode != SSD_DRV_MODE_STANDARD) {
3908 ret = 0;
3909 }
3910 return ret;
3911 }
3912
3913 /* board volt */
3914 static int ssd_mon_boardvolt(struct ssd_device *dev)
3915 {
3916 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3917 return 0;
3918 }
3919
3920 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3921 return 0;
3922 }
3923
3924 return ssd_lm80_check_event(dev, SSD_SENSOR_LM80_SADDRESS);
3925 }
3926
3927 /* temperature */
3928 static int ssd_mon_temp(struct ssd_device *dev)
3929 {
3930 int cur;
3931 uint16_t val = 0;
3932 int ret = 0;
3933
3934 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3935 return 0;
3936 }
3937
3938 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3939 return 0;
3940 }
3941
3942 /* inlet */
3943 ret = ssd_lm80_read_temp(dev, SSD_SENSOR_LM80_SADDRESS, &val);
3944 if (ret) {
3945 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3946 ssd_generate_sensor_fault_log(dev, SSD_LOG_TEMP_SENSOR_EVENT, SSD_SENSOR_LM80_SADDRESS,ret);
3947 }
3948 goto out;
3949 }
3950 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3951
3952 cur = SSD_SENSOR_CONVERT_TEMP(val);
3953 if (cur >= SSD_INLET_OT_TEMP) {
3954 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3955 ssd_gen_swlog(dev, SSD_LOG_INLET_OVER_TEMP, (uint32_t)cur);
3956 }
3957 } else if(cur < SSD_INLET_OT_HYST) {
3958 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3959 ssd_gen_swlog(dev, SSD_LOG_INLET_NORMAL_TEMP, (uint32_t)cur);
3960 }
3961 }
3962
3963 /* flash */
3964 ret = ssd_lm75_read(dev, SSD_SENSOR_LM75_SADDRESS, &val);
3965 if (ret) {
3966 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3967 ssd_generate_sensor_fault_log(dev, SSD_LOG_TEMP_SENSOR_EVENT, SSD_SENSOR_LM75_SADDRESS,ret);
3968 }
3969 goto out;
3970 }
3971 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon);
3972
3973 cur = SSD_SENSOR_CONVERT_TEMP(val);
3974 if (cur >= SSD_FLASH_OT_TEMP) {
3975 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3976 ssd_gen_swlog(dev, SSD_LOG_FLASH_OVER_TEMP, (uint32_t)cur);
3977 }
3978 } else if(cur < SSD_FLASH_OT_HYST) {
3979 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3980 ssd_gen_swlog(dev, SSD_LOG_FLASH_NORMAL_TEMP, (uint32_t)cur);
3981 }
3982 }
3983
3984 out:
3985 return ret;
3986 }
3987
3988 /* cmd tag */
3989 static inline void ssd_put_tag(struct ssd_device *dev, int tag)
3990 {
3991 test_and_clear_bit(tag, dev->tag_map);
3992 wake_up(&dev->tag_wq);
3993 }
3994
3995 static inline int ssd_get_tag(struct ssd_device *dev, int wait)
3996 {
3997 int tag;
3998
3999 find_tag:
4000 while ((tag = find_first_zero_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz)) >= atomic_read(&dev->queue_depth)) {
4001 DEFINE_WAIT(__wait);
4002
4003 if (!wait) {
4004 return -1;
4005 }
4006
4007 prepare_to_wait_exclusive(&dev->tag_wq, &__wait, TASK_UNINTERRUPTIBLE);
4008 schedule();
4009
4010 finish_wait(&dev->tag_wq, &__wait);
4011 }
4012
4013 if (test_and_set_bit(tag, dev->tag_map)) {
4014 goto find_tag;
4015 }
4016
4017 return tag;
4018 }
4019
4020 static void ssd_barrier_put_tag(struct ssd_device *dev, int tag)
4021 {
4022 test_and_clear_bit(tag, dev->tag_map);
4023 }
4024
4025 static int ssd_barrier_get_tag(struct ssd_device *dev)
4026 {
4027 int tag = 0;
4028
4029 if (test_and_set_bit(tag, dev->tag_map)) {
4030 return -1;
4031 }
4032
4033 return tag;
4034 }
4035
4036 static void ssd_barrier_end(struct ssd_device *dev)
4037 {
4038 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
4039 wake_up_all(&dev->tag_wq);
4040
4041 mutex_unlock(&dev->barrier_mutex);
4042 }
4043
4044 static int ssd_barrier_start(struct ssd_device *dev)
4045 {
4046 int i;
4047
4048 mutex_lock(&dev->barrier_mutex);
4049
4050 atomic_set(&dev->queue_depth, 0);
4051
4052 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
4053 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
4054 return 0;
4055 }
4056
4057 __set_current_state(TASK_INTERRUPTIBLE);
4058 schedule_timeout(1);
4059 }
4060
4061 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
4062 wake_up_all(&dev->tag_wq);
4063
4064 mutex_unlock(&dev->barrier_mutex);
4065
4066 return -EBUSY;
4067 }
4068
4069 static int ssd_busy(struct ssd_device *dev)
4070 {
4071 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
4072 return 0;
4073 }
4074
4075 return 1;
4076 }
4077
4078 static int ssd_wait_io(struct ssd_device *dev)
4079 {
4080 int i;
4081
4082 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
4083 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
4084 return 0;
4085 }
4086
4087 __set_current_state(TASK_INTERRUPTIBLE);
4088 schedule_timeout(1);
4089 }
4090
4091 return -EBUSY;
4092 }
4093
4094 #if 0
4095 static int ssd_in_barrier(struct ssd_device *dev)
4096 {
4097 return (0 == atomic_read(&dev->queue_depth));
4098 }
4099 #endif
4100
4101 static void ssd_cleanup_tag(struct ssd_device *dev)
4102 {
4103 kfree(dev->tag_map);
4104 }
4105
4106 static int ssd_init_tag(struct ssd_device *dev)
4107 {
4108 int nr_ulongs = ALIGN(dev->hw_info.cmd_fifo_sz, BITS_PER_LONG) / BITS_PER_LONG;
4109
4110 mutex_init(&dev->barrier_mutex);
4111
4112 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
4113
4114 dev->tag_map = kmalloc(nr_ulongs * sizeof(unsigned long), GFP_ATOMIC);
4115 if (!dev->tag_map) {
4116 return -ENOMEM;
4117 }
4118
4119 memset(dev->tag_map, 0, nr_ulongs * sizeof(unsigned long));
4120
4121 init_waitqueue_head(&dev->tag_wq);
4122
4123 return 0;
4124 }
4125
4126 /* io stat */
4127 static void ssd_end_io_acct(struct ssd_cmd *cmd)
4128 {
4129 struct ssd_device *dev = cmd->dev;
4130 struct bio *bio = cmd->bio;
4131 unsigned long dur = jiffies - cmd->start_time;
4132 int rw = bio_data_dir(bio);
4133 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4134 #else
4135 unsigned long flag;
4136 #endif
4137
4138 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,14,0))
4139 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4140 generic_end_io_acct(dev->rq, rw, part, cmd->start_time);
4141 #elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4142 int cpu = part_stat_lock();
4143 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4144 part_round_stats(cpu, part);
4145 part_stat_add(cpu, part, ticks[rw], dur);
4146 part_dec_in_flight(part, rw);
4147 part_stat_unlock();
4148 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4149 int cpu = part_stat_lock();
4150 struct hd_struct *part = &dev->gd->part0;
4151 part_round_stats(cpu, part);
4152 part_stat_add(cpu, part, ticks[rw], dur);
4153
4154 spin_lock_irqsave(&dev->in_flight_lock,flag);
4155 part->in_flight[rw]--;
4156 spin_unlock_irqrestore(&dev->in_flight_lock,flag);
4157
4158 part_stat_unlock();
4159
4160 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4161 preempt_disable();
4162 disk_round_stats(dev->gd);
4163 disk_stat_add(dev->gd, ticks[rw], dur);
4164
4165 spin_lock_irqsave(&dev->in_flight_lock,flag);
4166 dev->gd->in_flight--;
4167 spin_unlock_irqrestore(&dev->in_flight_lock,flag);
4168
4169 preempt_enable();
4170
4171 #else
4172 preempt_disable();
4173 disk_round_stats(dev->gd);
4174 if (rw == WRITE) {
4175 disk_stat_add(dev->gd, write_ticks, dur);
4176 } else {
4177 disk_stat_add(dev->gd, read_ticks, dur);
4178 }
4179 spin_lock_irqsave(&dev->in_flight_lock,flag);
4180 dev->gd->in_flight--;
4181 spin_unlock_irqrestore(&dev->in_flight_lock,flag);
4182
4183 preempt_enable();
4184
4185 #endif
4186 }
4187
4188 static void ssd_start_io_acct(struct ssd_cmd *cmd)
4189 {
4190 struct ssd_device *dev = cmd->dev;
4191 struct bio *bio = cmd->bio;
4192 int rw = bio_data_dir(bio);
4193 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4194 #else
4195 unsigned long flag;
4196 #endif
4197
4198 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,14,0))
4199 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4200 generic_start_io_acct(dev->rq, rw, bio_sectors(bio), part);
4201 #elif ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4202 int cpu = part_stat_lock();
4203 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4204 part_round_stats(cpu, part);
4205 part_stat_inc(cpu, part, ios[rw]);
4206 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4207 part_inc_in_flight(part, rw);
4208 part_stat_unlock();
4209 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4210 int cpu = part_stat_lock();
4211 struct hd_struct *part = &dev->gd->part0;
4212 part_round_stats(cpu, part);
4213 part_stat_inc(cpu, part, ios[rw]);
4214 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4215
4216 spin_lock_irqsave(&dev->in_flight_lock,flag);
4217 part->in_flight[rw]++;
4218 spin_unlock_irqrestore(&dev->in_flight_lock,flag);
4219
4220 part_stat_unlock();
4221
4222 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4223 preempt_disable();
4224 disk_round_stats(dev->gd);
4225 disk_stat_inc(dev->gd, ios[rw]);
4226 disk_stat_add(dev->gd, sectors[rw], bio_sectors(bio));
4227
4228 spin_lock_irqsave(&dev->in_flight_lock,flag);
4229 dev->gd->in_flight++;
4230 spin_unlock_irqrestore(&dev->in_flight_lock,flag);
4231
4232 preempt_enable();
4233 #else
4234 preempt_disable();
4235 disk_round_stats(dev->gd);
4236 if (rw == WRITE) {
4237 disk_stat_inc(dev->gd, writes);
4238 disk_stat_add(dev->gd, write_sectors, bio_sectors(bio));
4239 } else {
4240 disk_stat_inc(dev->gd, reads);
4241 disk_stat_add(dev->gd, read_sectors, bio_sectors(bio));
4242 }
4243
4244 spin_lock_irqsave(&dev->in_flight_lock,flag);
4245 dev->gd->in_flight++;
4246 spin_unlock_irqrestore(&dev->in_flight_lock,flag);
4247
4248 preempt_enable();
4249
4250 #endif
4251
4252 cmd->start_time = jiffies;
4253 }
4254
4255 /* io */
4256 static void ssd_queue_bio(struct ssd_device *dev, struct bio *bio)
4257 {
4258 spin_lock(&dev->sendq_lock);
4259 ssd_blist_add(&dev->sendq, bio);
4260 spin_unlock(&dev->sendq_lock);
4261
4262 atomic_inc(&dev->in_sendq);
4263 wake_up(&dev->send_waitq);
4264 }
4265
4266 static inline void ssd_end_request(struct ssd_cmd *cmd)
4267 {
4268 struct ssd_device *dev = cmd->dev;
4269 struct bio *bio = cmd->bio;
4270 int errors = cmd->errors;
4271 int tag = cmd->tag;
4272
4273 if (bio) {
4274 if (!ssd_bio_has_discard(bio)) {
4275 ssd_end_io_acct(cmd);
4276 if (!cmd->flag) {
4277 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4278 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4279 }
4280 }
4281
4282 cmd->bio = NULL;
4283 ssd_put_tag(dev, tag);
4284
4285 if (SSD_INT_MSIX == dev->int_mode || tag < 16 || errors) {
4286 ssd_bio_endio(bio, errors);
4287 } else /* if (bio->bi_idx >= bio->bi_vcnt)*/ {
4288 spin_lock(&dev->doneq_lock);
4289 ssd_blist_add(&dev->doneq, bio);
4290 spin_unlock(&dev->doneq_lock);
4291
4292 atomic_inc(&dev->in_doneq);
4293 wake_up(&dev->done_waitq);
4294 }
4295 } else {
4296 if (cmd->waiting) {
4297 complete(cmd->waiting);
4298 }
4299 }
4300 }
4301
4302 static void ssd_end_timeout_request(struct ssd_cmd *cmd)
4303 {
4304 struct ssd_device *dev = cmd->dev;
4305 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4306 int i;
4307
4308 for (i=0; i<dev->nr_queue; i++) {
4309 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
4310 disable_irq(dev->entry[i].vector);
4311 #else
4312 disable_irq(pci_irq_vector(dev->pdev, i));
4313 #endif
4314 }
4315
4316 atomic_inc(&dev->tocnt);
4317 //if (cmd->bio) {
4318 hio_err("%s: cmd timeout: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4319 cmd->errors = -ETIMEDOUT;
4320 ssd_end_request(cmd);
4321 //}
4322
4323 for (i=0; i<dev->nr_queue; i++) {
4324 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
4325 enable_irq(dev->entry[i].vector);
4326 #else
4327 enable_irq(pci_irq_vector(dev->pdev, i));
4328 #endif
4329 }
4330
4331 /* alarm led */
4332 ssd_set_alarm(dev);
4333 }
4334
4335 /* cmd timer */
4336 static void ssd_cmd_add_timer(struct ssd_cmd *cmd, int timeout, void (*complt)(struct ssd_cmd *))
4337 {
4338 init_timer(&cmd->cmd_timer);
4339
4340 cmd->cmd_timer.data = (unsigned long)cmd;
4341 cmd->cmd_timer.expires = jiffies + timeout;
4342 cmd->cmd_timer.function = (void (*)(unsigned long)) complt;
4343
4344 add_timer(&cmd->cmd_timer);
4345 }
4346
4347 static int ssd_cmd_del_timer(struct ssd_cmd *cmd)
4348 {
4349 return del_timer(&cmd->cmd_timer);
4350 }
4351
4352 static void ssd_add_timer(struct timer_list *timer, int timeout, void (*complt)(void *), void *data)
4353 {
4354 init_timer(timer);
4355
4356 timer->data = (unsigned long)data;
4357 timer->expires = jiffies + timeout;
4358 timer->function = (void (*)(unsigned long)) complt;
4359
4360 add_timer(timer);
4361 }
4362
4363 static int ssd_del_timer(struct timer_list *timer)
4364 {
4365 return del_timer(timer);
4366 }
4367
4368 static void ssd_cmd_timeout(struct ssd_cmd *cmd)
4369 {
4370 struct ssd_device *dev = cmd->dev;
4371 uint32_t msg = *(uint32_t *)cmd->msg;
4372
4373 ssd_end_timeout_request(cmd);
4374
4375 ssd_gen_swlog(dev, SSD_LOG_TIMEOUT, msg);
4376 }
4377
4378
4379 static void __ssd_done(unsigned long data)
4380 {
4381 struct ssd_cmd *cmd;
4382 LIST_HEAD(localq);
4383
4384 local_irq_disable();
4385 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4386 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4387 #else
4388 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4389 #endif
4390 local_irq_enable();
4391
4392 while (!list_empty(&localq)) {
4393 cmd = list_entry(localq.next, struct ssd_cmd, list);
4394 list_del_init(&cmd->list);
4395
4396 ssd_end_request(cmd);
4397 }
4398 }
4399
4400 static void __ssd_done_db(unsigned long data)
4401 {
4402 struct ssd_cmd *cmd;
4403 struct ssd_device *dev;
4404 struct bio *bio;
4405 LIST_HEAD(localq);
4406
4407 local_irq_disable();
4408 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4409 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4410 #else
4411 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4412 #endif
4413 local_irq_enable();
4414
4415 while (!list_empty(&localq)) {
4416 cmd = list_entry(localq.next, struct ssd_cmd, list);
4417 list_del_init(&cmd->list);
4418
4419 dev = (struct ssd_device *)cmd->dev;
4420 bio = cmd->bio;
4421
4422 if (bio) {
4423 sector_t off = dev->db_info.data.loc.off;
4424 uint32_t len = dev->db_info.data.loc.len;
4425
4426 switch (dev->db_info.type) {
4427 case SSD_DEBUG_READ_ERR:
4428 if (bio_data_dir(bio) == READ &&
4429 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4430 cmd->errors = -EIO;
4431 }
4432 break;
4433 case SSD_DEBUG_WRITE_ERR:
4434 if (bio_data_dir(bio) == WRITE &&
4435 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4436 cmd->errors = -EROFS;
4437 }
4438 break;
4439 case SSD_DEBUG_RW_ERR:
4440 if (!((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4441 if (bio_data_dir(bio) == READ) {
4442 cmd->errors = -EIO;
4443 } else {
4444 cmd->errors = -EROFS;
4445 }
4446 }
4447 break;
4448 default:
4449 break;
4450 }
4451 }
4452
4453 ssd_end_request(cmd);
4454 }
4455 }
4456
4457 static inline void ssd_done_bh(struct ssd_cmd *cmd)
4458 {
4459 unsigned long flags = 0;
4460
4461 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4462 struct ssd_device *dev = cmd->dev;
4463 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4464 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4465
4466 /* alarm led */
4467 ssd_set_alarm(dev);
4468 return;
4469 }
4470
4471 local_irq_save(flags);
4472 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4473 list_add_tail(&cmd->list, &__get_cpu_var(ssd_doneq));
4474 tasklet_hi_schedule(&__get_cpu_var(ssd_tasklet));
4475 #else
4476 list_add_tail(&cmd->list, this_cpu_ptr(&ssd_doneq));
4477 tasklet_hi_schedule(this_cpu_ptr(&ssd_tasklet));
4478 #endif
4479 local_irq_restore(flags);
4480
4481 return;
4482 }
4483
4484 static inline void ssd_done(struct ssd_cmd *cmd)
4485 {
4486 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4487 struct ssd_device *dev = cmd->dev;
4488 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4489 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4490
4491 /* alarm led */
4492 ssd_set_alarm(dev);
4493 return;
4494 }
4495
4496 ssd_end_request(cmd);
4497
4498 return;
4499 }
4500
4501 static inline void ssd_dispatch_cmd(struct ssd_cmd *cmd)
4502 {
4503 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4504
4505 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4506
4507 spin_lock(&dev->cmd_lock);
4508 ssd_reg_write(dev->ctrlp + SSD_REQ_FIFO_REG, cmd->msg_dma);
4509 spin_unlock(&dev->cmd_lock);
4510 }
4511
4512 static inline void ssd_send_cmd(struct ssd_cmd *cmd)
4513 {
4514 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4515
4516 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4517
4518 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4519 }
4520
4521 static inline void ssd_send_cmd_db(struct ssd_cmd *cmd)
4522 {
4523 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4524 struct bio *bio = cmd->bio;
4525
4526 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4527
4528 if (bio) {
4529 switch (dev->db_info.type) {
4530 case SSD_DEBUG_READ_TO:
4531 if (bio_data_dir(bio) == READ) {
4532 return;
4533 }
4534 break;
4535 case SSD_DEBUG_WRITE_TO:
4536 if (bio_data_dir(bio) == WRITE) {
4537 return;
4538 }
4539 break;
4540 case SSD_DEBUG_RW_TO:
4541 return;
4542 break;
4543 default:
4544 break;
4545 }
4546 }
4547
4548 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4549 }
4550
4551
4552 /* fixed for BIOVEC_PHYS_MERGEABLE */
4553 #ifdef SSD_BIOVEC_PHYS_MERGEABLE_FIXED
4554 #include <linux/bio.h>
4555 #include <linux/io.h>
4556 #include <xen/page.h>
4557
4558 static bool xen_biovec_phys_mergeable_fixed(const struct bio_vec *vec1,
4559 const struct bio_vec *vec2)
4560 {
4561 unsigned long mfn1 = pfn_to_mfn(page_to_pfn(vec1->bv_page));
4562 unsigned long mfn2 = pfn_to_mfn(page_to_pfn(vec2->bv_page));
4563
4564 return __BIOVEC_PHYS_MERGEABLE(vec1, vec2) &&
4565 ((mfn1 == mfn2) || ((mfn1+1) == mfn2));
4566 }
4567
4568 #ifdef BIOVEC_PHYS_MERGEABLE
4569 #undef BIOVEC_PHYS_MERGEABLE
4570 #endif
4571 #define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
4572 (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
4573 (!xen_domain() || xen_biovec_phys_mergeable_fixed(vec1, vec2)))
4574
4575 #endif
4576
4577 static inline int ssd_bio_map_sg(struct ssd_device *dev, struct bio *bio, struct scatterlist *sgl)
4578 {
4579 #if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
4580 struct bio_vec *bvec, *bvprv = NULL;
4581 struct scatterlist *sg = NULL;
4582 int i = 0, nsegs = 0;
4583
4584 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,23))
4585 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4586 #endif
4587
4588 /*
4589 * for each segment in bio
4590 */
4591 bio_for_each_segment(bvec, bio, i) {
4592 if (bvprv && BIOVEC_PHYS_MERGEABLE(bvprv, bvec)) {
4593 sg->length += bvec->bv_len;
4594 } else {
4595 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4596 break;
4597 }
4598
4599 sg = sg ? (sg + 1) : sgl;
4600 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4601 sg_set_page(sg, bvec->bv_page, bvec->bv_len, bvec->bv_offset);
4602 #else
4603 sg->page = bvec->bv_page;
4604 sg->length = bvec->bv_len;
4605 sg->offset = bvec->bv_offset;
4606 #endif
4607 nsegs++;
4608 }
4609 bvprv = bvec;
4610 }
4611
4612 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4613 if (sg) {
4614 sg_mark_end(sg);
4615 }
4616 #endif
4617
4618 bio->bi_idx = i;
4619
4620 return nsegs;
4621 #else
4622 struct bio_vec bvec, bvprv;
4623 struct bvec_iter iter;
4624 struct scatterlist *sg = NULL;
4625 int nsegs = 0;
4626 int first = 1;
4627
4628 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4629
4630 /*
4631 * for each segment in bio
4632 */
4633 bio_for_each_segment(bvec, bio, iter) {
4634 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
4635 sg->length += bvec.bv_len;
4636 } else {
4637 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4638 break;
4639 }
4640
4641 sg = sg ? (sg + 1) : sgl;
4642
4643 sg_set_page(sg, bvec.bv_page, bvec.bv_len, bvec.bv_offset);
4644
4645 nsegs++;
4646 first = 0;
4647 }
4648 bvprv = bvec;
4649 }
4650
4651 if (sg) {
4652 sg_mark_end(sg);
4653 }
4654
4655 return nsegs;
4656 #endif
4657 }
4658
4659
4660 static int __ssd_submit_pbio(struct ssd_device *dev, struct bio *bio, int wait)
4661 {
4662 struct ssd_cmd *cmd;
4663 struct ssd_rw_msg *msg;
4664 struct ssd_sg_entry *sge;
4665 sector_t block = bio_start(bio);
4666 int tag;
4667 int i;
4668
4669 tag = ssd_get_tag(dev, wait);
4670 if (tag < 0) {
4671 return -EBUSY;
4672 }
4673
4674 cmd = &dev->cmd[tag];
4675 cmd->bio = bio;
4676 cmd->flag = 1;
4677
4678 msg = (struct ssd_rw_msg *)cmd->msg;
4679
4680 if (ssd_bio_has_discard(bio)) {
4681 unsigned int length = bio_sectors(bio);
4682
4683 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4684 msg->tag = tag;
4685 msg->fun = SSD_FUNC_TRIM;
4686
4687 sge = msg->sge;
4688 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4689 sge->block = block;
4690 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4691 sge->buf = 0;
4692
4693 block += sge->length;
4694 length -= sge->length;
4695 sge++;
4696
4697 if (length <= 0) {
4698 ++i;
4699 break;
4700 }
4701 }
4702 msg->nsegs = cmd->nsegs = i;
4703
4704 dev->scmd(cmd);
4705 return 0;
4706 }
4707
4708 //msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4709 msg->nsegs = cmd->nsegs = bio->bi_vcnt;
4710
4711 //xx
4712 if (bio_data_dir(bio) == READ) {
4713 msg->fun = SSD_FUNC_READ;
4714 msg->flag = 0;
4715 } else {
4716 msg->fun = SSD_FUNC_WRITE;
4717 msg->flag = dev->wmode;
4718 }
4719
4720 sge = msg->sge;
4721 for (i=0; i<bio->bi_vcnt; i++) {
4722 sge->block = block;
4723 sge->length = bio->bi_io_vec[i].bv_len >> 9;
4724 sge->buf = (uint64_t)((void *)bio->bi_io_vec[i].bv_page + bio->bi_io_vec[i].bv_offset);
4725
4726 block += sge->length;
4727 sge++;
4728 }
4729
4730 msg->tag = tag;
4731
4732 #ifdef SSD_OT_PROTECT
4733 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4734 msleep_interruptible(dev->ot_delay);
4735 }
4736 #endif
4737
4738 ssd_start_io_acct(cmd);
4739 dev->scmd(cmd);
4740
4741 return 0;
4742 }
4743
4744 static inline int ssd_submit_bio(struct ssd_device *dev, struct bio *bio, int wait)
4745 {
4746 struct ssd_cmd *cmd;
4747 struct ssd_rw_msg *msg;
4748 struct ssd_sg_entry *sge;
4749 struct scatterlist *sgl;
4750 sector_t block = bio_start(bio);
4751 int tag;
4752 int i;
4753
4754 tag = ssd_get_tag(dev, wait);
4755 if (tag < 0) {
4756 return -EBUSY;
4757 }
4758
4759 cmd = &dev->cmd[tag];
4760 cmd->bio = bio;
4761 cmd->flag = 0;
4762
4763 msg = (struct ssd_rw_msg *)cmd->msg;
4764
4765 sgl = cmd->sgl;
4766
4767 if (ssd_bio_has_discard(bio)) {
4768 unsigned int length = bio_sectors(bio);
4769
4770 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4771 msg->tag = tag;
4772 msg->fun = SSD_FUNC_TRIM;
4773
4774 sge = msg->sge;
4775 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4776 sge->block = block;
4777 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4778 sge->buf = 0;
4779
4780 block += sge->length;
4781 length -= sge->length;
4782 sge++;
4783
4784 if (length <= 0) {
4785 ++i;
4786 break;
4787 }
4788 }
4789 msg->nsegs = cmd->nsegs = i;
4790
4791 dev->scmd(cmd);
4792 return 0;
4793 }
4794
4795 msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4796
4797 //xx
4798 if (bio_data_dir(bio) == READ) {
4799 msg->fun = SSD_FUNC_READ;
4800 msg->flag = 0;
4801 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_FROMDEVICE);
4802 } else {
4803 msg->fun = SSD_FUNC_WRITE;
4804 msg->flag = dev->wmode;
4805 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_TODEVICE);
4806 }
4807
4808 sge = msg->sge;
4809 for (i=0; i<cmd->nsegs; i++) {
4810 sge->block = block;
4811 sge->length = sg_dma_len(sgl) >> 9;
4812 sge->buf = sg_dma_address(sgl);
4813
4814 block += sge->length;
4815 sgl++;
4816 sge++;
4817 }
4818
4819 msg->tag = tag;
4820
4821 #ifdef SSD_OT_PROTECT
4822 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4823 msleep_interruptible(dev->ot_delay);
4824 }
4825 #endif
4826
4827 ssd_start_io_acct(cmd);
4828 dev->scmd(cmd);
4829
4830 return 0;
4831 }
4832
4833 /* threads */
4834 static int ssd_done_thread(void *data)
4835 {
4836 struct ssd_device *dev;
4837 struct bio *bio;
4838 struct bio *next;
4839
4840 if (!data) {
4841 return -EINVAL;
4842 }
4843 dev = data;
4844
4845 current->flags |= PF_NOFREEZE;
4846 //set_user_nice(current, -5);
4847
4848 while (!kthread_should_stop()) {
4849 wait_event_interruptible(dev->done_waitq, (atomic_read(&dev->in_doneq) || kthread_should_stop()));
4850
4851 while (atomic_read(&dev->in_doneq)) {
4852 if (threaded_irq) {
4853 spin_lock(&dev->doneq_lock);
4854 bio = ssd_blist_get(&dev->doneq);
4855 spin_unlock(&dev->doneq_lock);
4856 } else {
4857 spin_lock_irq(&dev->doneq_lock);
4858 bio = ssd_blist_get(&dev->doneq);
4859 spin_unlock_irq(&dev->doneq_lock);
4860 }
4861
4862 while (bio) {
4863 next = bio->bi_next;
4864 bio->bi_next = NULL;
4865 ssd_bio_endio(bio, 0);
4866 atomic_dec(&dev->in_doneq);
4867 bio = next;
4868 }
4869
4870 cond_resched();
4871
4872 #ifdef SSD_ESCAPE_IRQ
4873 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4874 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
4875 cpumask_var_t new_mask;
4876 if (alloc_cpumask_var(&new_mask, GFP_ATOMIC)) {
4877 cpumask_setall(new_mask);
4878 cpumask_clear_cpu(dev->irq_cpu, new_mask);
4879 set_cpus_allowed_ptr(current, new_mask);
4880 free_cpumask_var(new_mask);
4881 }
4882 #else
4883 cpumask_t new_mask;
4884 cpus_setall(new_mask);
4885 cpu_clear(dev->irq_cpu, new_mask);
4886 set_cpus_allowed(current, new_mask);
4887 #endif
4888 }
4889 #endif
4890 }
4891 }
4892 return 0;
4893 }
4894
4895 static int ssd_send_thread(void *data)
4896 {
4897 struct ssd_device *dev;
4898 struct bio *bio;
4899 struct bio *next;
4900
4901 if (!data) {
4902 return -EINVAL;
4903 }
4904 dev = data;
4905
4906 current->flags |= PF_NOFREEZE;
4907 //set_user_nice(current, -5);
4908
4909 while (!kthread_should_stop()) {
4910 wait_event_interruptible(dev->send_waitq, (atomic_read(&dev->in_sendq) || kthread_should_stop()));
4911
4912 while (atomic_read(&dev->in_sendq)) {
4913 spin_lock(&dev->sendq_lock);
4914 bio = ssd_blist_get(&dev->sendq);
4915 spin_unlock(&dev->sendq_lock);
4916
4917 while (bio) {
4918 next = bio->bi_next;
4919 bio->bi_next = NULL;
4920 #ifdef SSD_QUEUE_PBIO
4921 if (test_and_clear_bit(BIO_SSD_PBIO, &bio->bi_flags)) {
4922 __ssd_submit_pbio(dev, bio, 1);
4923 } else {
4924 ssd_submit_bio(dev, bio, 1);
4925 }
4926 #else
4927 ssd_submit_bio(dev, bio, 1);
4928 #endif
4929 atomic_dec(&dev->in_sendq);
4930 bio = next;
4931 }
4932
4933 cond_resched();
4934
4935 #ifdef SSD_ESCAPE_IRQ
4936 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4937 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
4938 cpumask_var_t new_mask;
4939 if (alloc_cpumask_var(&new_mask, GFP_ATOMIC)) {
4940 cpumask_setall(new_mask);
4941 cpumask_clear_cpu(dev->irq_cpu, new_mask);
4942 set_cpus_allowed_ptr(current, new_mask);
4943 free_cpumask_var(new_mask);
4944 }
4945 #else
4946 cpumask_t new_mask;
4947 cpus_setall(new_mask);
4948 cpu_clear(dev->irq_cpu, new_mask);
4949 set_cpus_allowed(current, new_mask);
4950 #endif
4951 }
4952 #endif
4953 }
4954 }
4955
4956 return 0;
4957 }
4958
4959 static void ssd_cleanup_thread(struct ssd_device *dev)
4960 {
4961 kthread_stop(dev->send_thread);
4962 kthread_stop(dev->done_thread);
4963 }
4964
4965 static int ssd_init_thread(struct ssd_device *dev)
4966 {
4967 int ret;
4968
4969 atomic_set(&dev->in_doneq, 0);
4970 atomic_set(&dev->in_sendq, 0);
4971
4972 spin_lock_init(&dev->doneq_lock);
4973 spin_lock_init(&dev->sendq_lock);
4974
4975 ssd_blist_init(&dev->doneq);
4976 ssd_blist_init(&dev->sendq);
4977
4978 init_waitqueue_head(&dev->done_waitq);
4979 init_waitqueue_head(&dev->send_waitq);
4980
4981 dev->done_thread = kthread_run(ssd_done_thread, dev, "%s/d", dev->name);
4982 if (IS_ERR(dev->done_thread)) {
4983 ret = PTR_ERR(dev->done_thread);
4984 goto out_done_thread;
4985 }
4986
4987 dev->send_thread = kthread_run(ssd_send_thread, dev, "%s/s", dev->name);
4988 if (IS_ERR(dev->send_thread)) {
4989 ret = PTR_ERR(dev->send_thread);
4990 goto out_send_thread;
4991 }
4992
4993 return 0;
4994
4995 out_send_thread:
4996 kthread_stop(dev->done_thread);
4997 out_done_thread:
4998 return ret;
4999 }
5000
5001 /* dcmd pool */
5002 static void ssd_put_dcmd(struct ssd_dcmd *dcmd)
5003 {
5004 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
5005
5006 spin_lock(&dev->dcmd_lock);
5007 list_add_tail(&dcmd->list, &dev->dcmd_list);
5008 spin_unlock(&dev->dcmd_lock);
5009 }
5010
5011 static struct ssd_dcmd *ssd_get_dcmd(struct ssd_device *dev)
5012 {
5013 struct ssd_dcmd *dcmd = NULL;
5014
5015 spin_lock(&dev->dcmd_lock);
5016 if (!list_empty(&dev->dcmd_list)) {
5017 dcmd = list_entry(dev->dcmd_list.next,
5018 struct ssd_dcmd, list);
5019 list_del_init(&dcmd->list);
5020 }
5021 spin_unlock(&dev->dcmd_lock);
5022
5023 return dcmd;
5024 }
5025
5026 static void ssd_cleanup_dcmd(struct ssd_device *dev)
5027 {
5028 kfree(dev->dcmd);
5029 }
5030
5031 static int ssd_init_dcmd(struct ssd_device *dev)
5032 {
5033 struct ssd_dcmd *dcmd;
5034 int dcmd_sz = sizeof(struct ssd_dcmd)*dev->hw_info.cmd_fifo_sz;
5035 int i;
5036
5037 spin_lock_init(&dev->dcmd_lock);
5038 INIT_LIST_HEAD(&dev->dcmd_list);
5039 init_waitqueue_head(&dev->dcmd_wq);
5040
5041 dev->dcmd = kmalloc(dcmd_sz, GFP_KERNEL);
5042 if (!dev->dcmd) {
5043 hio_warn("%s: can not alloc dcmd\n", dev->name);
5044 goto out_alloc_dcmd;
5045 }
5046 memset(dev->dcmd, 0, dcmd_sz);
5047
5048 for (i=0, dcmd=dev->dcmd; i<(int)dev->hw_info.cmd_fifo_sz; i++, dcmd++) {
5049 dcmd->dev = dev;
5050 INIT_LIST_HEAD(&dcmd->list);
5051 list_add_tail(&dcmd->list, &dev->dcmd_list);
5052 }
5053
5054 return 0;
5055
5056 out_alloc_dcmd:
5057 return -ENOMEM;
5058 }
5059
5060 static void ssd_put_dmsg(void *msg)
5061 {
5062 struct ssd_dcmd *dcmd = container_of(msg, struct ssd_dcmd, msg);
5063 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
5064
5065 memset(dcmd->msg, 0, SSD_DCMD_MAX_SZ);
5066 ssd_put_dcmd(dcmd);
5067 wake_up(&dev->dcmd_wq);
5068 }
5069
5070 static void *ssd_get_dmsg(struct ssd_device *dev)
5071 {
5072 struct ssd_dcmd *dcmd = ssd_get_dcmd(dev);
5073
5074 while (!dcmd) {
5075 DEFINE_WAIT(wait);
5076 prepare_to_wait_exclusive(&dev->dcmd_wq, &wait, TASK_UNINTERRUPTIBLE);
5077 schedule();
5078
5079 dcmd = ssd_get_dcmd(dev);
5080
5081 finish_wait(&dev->dcmd_wq, &wait);
5082 }
5083 return dcmd->msg;
5084 }
5085
5086 /* do direct cmd */
5087 static int ssd_do_request(struct ssd_device *dev, int rw, void *msg, int *done)
5088 {
5089 DECLARE_COMPLETION(wait);
5090 struct ssd_cmd *cmd;
5091 int tag;
5092 int ret = 0;
5093
5094 tag = ssd_get_tag(dev, 1);
5095 if (tag < 0) {
5096 return -EBUSY;
5097 }
5098
5099 cmd = &dev->cmd[tag];
5100 cmd->nsegs = 1;
5101 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5102 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5103
5104 cmd->waiting = &wait;
5105
5106 dev->scmd(cmd);
5107
5108 wait_for_completion(cmd->waiting);
5109 cmd->waiting = NULL;
5110
5111 if (cmd->errors == -ETIMEDOUT) {
5112 ret = cmd->errors;
5113 } else if (cmd->errors) {
5114 ret = -EIO;
5115 }
5116
5117 if (done != NULL) {
5118 *done = cmd->nr_log;
5119 }
5120 ssd_put_tag(dev, cmd->tag);
5121
5122 return ret;
5123 }
5124
5125 static int ssd_do_barrier_request(struct ssd_device *dev, int rw, void *msg, int *done)
5126 {
5127 DECLARE_COMPLETION(wait);
5128 struct ssd_cmd *cmd;
5129 int tag;
5130 int ret = 0;
5131
5132 tag = ssd_barrier_get_tag(dev);
5133 if (tag < 0) {
5134 return -EBUSY;
5135 }
5136
5137 cmd = &dev->cmd[tag];
5138 cmd->nsegs = 1;
5139 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5140 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5141
5142 cmd->waiting = &wait;
5143
5144 dev->scmd(cmd);
5145
5146 wait_for_completion(cmd->waiting);
5147 cmd->waiting = NULL;
5148
5149 if (cmd->errors == -ETIMEDOUT) {
5150 ret = cmd->errors;
5151 } else if (cmd->errors) {
5152 ret = -EIO;
5153 }
5154
5155 if (done != NULL) {
5156 *done = cmd->nr_log;
5157 }
5158 ssd_barrier_put_tag(dev, cmd->tag);
5159
5160 return ret;
5161 }
5162
5163 #ifdef SSD_OT_PROTECT
5164 static void ssd_check_temperature(struct ssd_device *dev, int temp)
5165 {
5166 uint64_t val;
5167 uint32_t off;
5168 int cur;
5169 int i;
5170
5171 if (mode != SSD_DRV_MODE_STANDARD) {
5172 return;
5173 }
5174
5175 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5176 }
5177
5178 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5179 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
5180
5181 val = ssd_reg_read(dev->ctrlp + off);
5182 if (val == 0xffffffffffffffffull) {
5183 continue;
5184 }
5185
5186 cur = (int)CUR_TEMP(val);
5187 if (cur >= temp) {
5188 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5189 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5190 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5191 dev->ot_delay = SSD_OT_DELAY;
5192 }
5193 }
5194 return;
5195 }
5196 }
5197
5198 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5199 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5200 hio_warn("%s: Temperature is OK.\n", dev->name);
5201 dev->ot_delay = 0;
5202 }
5203 }
5204 }
5205 #endif
5206
5207 static int ssd_get_ot_status(struct ssd_device *dev, int *status)
5208 {
5209 uint32_t off;
5210 uint32_t val;
5211 int i;
5212
5213 if (!dev || !status) {
5214 return -EINVAL;
5215 }
5216
5217 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5218 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5219 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5220 val = ssd_reg32_read(dev->ctrlp + off);
5221 if ((val >> 22) & 0x1) {
5222 *status = 1;
5223 goto out;
5224 }
5225
5226
5227 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5228 val = ssd_reg32_read(dev->ctrlp + off);
5229 if ((val >> 22) & 0x1) {
5230 *status = 1;
5231 goto out;
5232 }
5233 }
5234 } else {
5235 *status = !!dev->ot_delay;
5236 }
5237
5238 out:
5239 return 0;
5240 }
5241
5242 static void ssd_set_ot_protect(struct ssd_device *dev, int protect)
5243 {
5244 uint32_t off;
5245 uint32_t val;
5246 int i;
5247
5248 mutex_lock(&dev->fw_mutex);
5249
5250 dev->ot_protect = !!protect;
5251
5252 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5253 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5254 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5255 val = ssd_reg32_read(dev->ctrlp + off);
5256 if (dev->ot_protect) {
5257 val |= (1U << 21);
5258 } else {
5259 val &= ~(1U << 21);
5260 }
5261 ssd_reg32_write(dev->ctrlp + off, val);
5262
5263
5264 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5265 val = ssd_reg32_read(dev->ctrlp + off);
5266 if (dev->ot_protect) {
5267 val |= (1U << 21);
5268 } else {
5269 val &= ~(1U << 21);
5270 }
5271 ssd_reg32_write(dev->ctrlp + off, val);
5272 }
5273 }
5274
5275 mutex_unlock(&dev->fw_mutex);
5276 }
5277
5278 static int ssd_init_ot_protect(struct ssd_device *dev)
5279 {
5280 ssd_set_ot_protect(dev, ot_protect);
5281
5282 #ifdef SSD_OT_PROTECT
5283 ssd_check_temperature(dev, SSD_OT_TEMP);
5284 #endif
5285
5286 return 0;
5287 }
5288
5289 /* log */
5290 static int ssd_read_log(struct ssd_device *dev, int ctrl_idx, void *buf, int *nr_log)
5291 {
5292 struct ssd_log_op_msg *msg;
5293 struct ssd_log_msg *lmsg;
5294 dma_addr_t buf_dma;
5295 size_t length = dev->hw_info.log_sz;
5296 int ret = 0;
5297
5298 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
5299 return -EINVAL;
5300 }
5301
5302 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
5303 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
5304 ret = dma_mapping_error(buf_dma);
5305 #else
5306 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
5307 #endif
5308 if (ret) {
5309 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
5310 goto out_dma_mapping;
5311 }
5312
5313 msg = (struct ssd_log_op_msg *)ssd_get_dmsg(dev);
5314
5315 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5316 lmsg = (struct ssd_log_msg *)msg;
5317 lmsg->fun = SSD_FUNC_READ_LOG;
5318 lmsg->ctrl_idx = ctrl_idx;
5319 lmsg->buf = buf_dma;
5320 } else {
5321 msg->fun = SSD_FUNC_READ_LOG;
5322 msg->ctrl_idx = ctrl_idx;
5323 msg->buf = buf_dma;
5324 }
5325
5326 ret = ssd_do_request(dev, READ, msg, nr_log);
5327 ssd_put_dmsg(msg);
5328
5329 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
5330
5331 out_dma_mapping:
5332 return ret;
5333 }
5334
5335 #define SSD_LOG_PRINT_BUF_SZ 256
5336 static int ssd_parse_log(struct ssd_device *dev, struct ssd_log *log, int print)
5337 {
5338 struct ssd_log_desc *log_desc = ssd_log_desc;
5339 struct ssd_log_entry *le;
5340 char *sn = NULL;
5341 char print_buf[SSD_LOG_PRINT_BUF_SZ];
5342 int print_len;
5343
5344 le = &log->le;
5345
5346 /* find desc */
5347 while (log_desc->event != SSD_UNKNOWN_EVENT) {
5348 if (log_desc->event == le->event) {
5349 break;
5350 }
5351 log_desc++;
5352 }
5353
5354 if (!print) {
5355 goto out;
5356 }
5357
5358 if (log_desc->level < log_level) {
5359 goto out;
5360 }
5361
5362 /* parse */
5363 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5364 sn = dev->label.sn;
5365 } else {
5366 sn = dev->labelv3.barcode;
5367 }
5368
5369 print_len = snprintf(print_buf, SSD_LOG_PRINT_BUF_SZ, "%s (%s): <%#x>", dev->name, sn, le->event);
5370
5371 if (log->ctrl_idx != SSD_LOG_SW_IDX) {
5372 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " controller %d", log->ctrl_idx);
5373 }
5374
5375 switch (log_desc->data) {
5376 case SSD_LOG_DATA_NONE:
5377 break;
5378 case SSD_LOG_DATA_LOC:
5379 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5380 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc.flash);
5381 if (log_desc->sblock) {
5382 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc.block);
5383 }
5384 if (log_desc->spage) {
5385 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc.page);
5386 }
5387 } else {
5388 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc1.flash);
5389 if (log_desc->sblock) {
5390 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc1.block);
5391 }
5392 if (log_desc->spage) {
5393 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc1.page);
5394 }
5395 }
5396 break;
5397 case SSD_LOG_DATA_HEX:
5398 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " info %#x", le->data.val);
5399 break;
5400 default:
5401 break;
5402 }
5403 /*print_len += */snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), ": %s", log_desc->desc);
5404
5405 switch (log_desc->level) {
5406 case SSD_LOG_LEVEL_INFO:
5407 hio_info("%s\n", print_buf);
5408 break;
5409 case SSD_LOG_LEVEL_NOTICE:
5410 hio_note("%s\n", print_buf);
5411 break;
5412 case SSD_LOG_LEVEL_WARNING:
5413 hio_warn("%s\n", print_buf);
5414 break;
5415 case SSD_LOG_LEVEL_ERR:
5416 hio_err("%s\n", print_buf);
5417 //printk(KERN_ERR MODULE_NAME": some exception occurred, please check the data or refer to FAQ.");
5418 break;
5419 default:
5420 hio_warn("%s\n", print_buf);
5421 break;
5422 }
5423
5424 out:
5425 return log_desc->level;
5426 }
5427
5428 static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status);
5429 static int ssd_switch_wmode(struct ssd_device *dev, int wmode);
5430
5431
5432 static int ssd_handle_event(struct ssd_device *dev, uint16_t event, int level)
5433 {
5434 int ret = 0;
5435
5436 switch (event) {
5437 case SSD_LOG_OVER_TEMP: {
5438 #ifdef SSD_OT_PROTECT
5439 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5440 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5441 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5442 dev->ot_delay = SSD_OT_DELAY;
5443 }
5444 }
5445 #endif
5446 break;
5447 }
5448
5449 case SSD_LOG_NORMAL_TEMP: {
5450 #ifdef SSD_OT_PROTECT
5451 /* need to check all controller's temperature */
5452 ssd_check_temperature(dev, SSD_OT_TEMP_HYST);
5453 #endif
5454 break;
5455 }
5456
5457 case SSD_LOG_BATTERY_FAULT: {
5458 uint16_t sfstatus;
5459
5460 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5461 if (!ssd_bm_get_sfstatus(dev, &sfstatus)) {
5462 ssd_gen_swlog(dev, SSD_LOG_BM_SFSTATUS, sfstatus);
5463 }
5464 }
5465
5466 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5467 ssd_switch_wmode(dev, dev->user_wmode);
5468 }
5469 break;
5470 }
5471
5472 case SSD_LOG_BATTERY_OK: {
5473 if (test_and_clear_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5474 ssd_switch_wmode(dev, dev->user_wmode);
5475 }
5476 break;
5477 }
5478
5479 case SSD_LOG_BOARD_VOLT_FAULT: {
5480 ssd_mon_boardvolt(dev);
5481 break;
5482 }
5483
5484 case SSD_LOG_CLEAR_LOG: {
5485 /* update smart */
5486 memset(&dev->smart.log_info, 0, sizeof(struct ssd_log_info));
5487 break;
5488 }
5489
5490 case SSD_LOG_CAP_VOLT_FAULT:
5491 case SSD_LOG_CAP_LEARN_FAULT:
5492 case SSD_LOG_CAP_SHORT_CIRCUIT: {
5493 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5494 ssd_switch_wmode(dev, dev->user_wmode);
5495 }
5496 break;
5497 }
5498
5499 default:
5500 break;
5501 }
5502
5503 /* ssd event call */
5504 if (dev->event_call) {
5505 dev->event_call(dev->gd, event, level);
5506
5507 /* FIXME */
5508 if (SSD_LOG_CAP_VOLT_FAULT == event || SSD_LOG_CAP_LEARN_FAULT == event || SSD_LOG_CAP_SHORT_CIRCUIT == event) {
5509 dev->event_call(dev->gd, SSD_LOG_BATTERY_FAULT, level);
5510 }
5511 }
5512
5513 return ret;
5514 }
5515
5516 static int ssd_save_log(struct ssd_device *dev, struct ssd_log *log)
5517 {
5518 uint32_t off, size;
5519 void *internal_log;
5520 int ret = 0;
5521
5522 mutex_lock(&dev->internal_log_mutex);
5523
5524 size = sizeof(struct ssd_log);
5525 off = dev->internal_log.nr_log * size;
5526
5527 if (off == dev->rom_info.log_sz) {
5528 if (dev->internal_log.nr_log == dev->smart.log_info.nr_log) {
5529 hio_warn("%s: internal log is full\n", dev->name);
5530 }
5531 goto out;
5532 }
5533
5534 internal_log = dev->internal_log.log + off;
5535 memcpy(internal_log, log, size);
5536
5537 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
5538 off += dev->rom_info.log_base;
5539
5540 ret = ssd_spi_write(dev, log, off, size);
5541 if (ret) {
5542 goto out;
5543 }
5544 }
5545
5546 dev->internal_log.nr_log++;
5547
5548 out:
5549 mutex_unlock(&dev->internal_log_mutex);
5550 return ret;
5551 }
5552
5553 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */
5554 static unsigned short const crc16_table[256] = {
5555 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
5556 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
5557 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
5558 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
5559 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
5560 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
5561 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
5562 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
5563 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
5564 0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441,
5565 0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41,
5566 0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840,
5567 0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41,
5568 0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40,
5569 0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640,
5570 0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041,
5571 0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240,
5572 0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,
5573 0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41,
5574 0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840,
5575 0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41,
5576 0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40,
5577 0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640,
5578 0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041,
5579 0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241,
5580 0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440,
5581 0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40,
5582 0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841,
5583 0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40,
5584 0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41,
5585 0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641,
5586 0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040
5587 };
5588
5589 static unsigned short crc16_byte(unsigned short crc, const unsigned char data)
5590 {
5591 return (crc >> 8) ^ crc16_table[(crc ^ data) & 0xff];
5592 }
5593 /**
5594 * crc16 - compute the CRC-16 for the data buffer
5595 * @crc: previous CRC value
5596 * @buffer: data pointer
5597 * @len: number of bytes in the buffer
5598 *
5599 * Returns the updated CRC value.
5600 */
5601 static unsigned short crc16(unsigned short crc, unsigned char const *buffer, int len)
5602 {
5603 while (len--)
5604 crc = crc16_byte(crc, *buffer++);
5605 return crc;
5606 }
5607
5608 static int ssd_save_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5609 {
5610 struct ssd_log log;
5611 struct timeval tv;
5612 int level;
5613 int ret = 0;
5614
5615 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5616 return 0;
5617
5618 memset(&log, 0, sizeof(struct ssd_log));
5619
5620 do_gettimeofday(&tv);
5621 log.ctrl_idx = SSD_LOG_SW_IDX;
5622 log.time = tv.tv_sec;
5623 log.le.event = event;
5624 log.le.data.val = data;
5625
5626 log.le.mod = SSD_DIF_WITH_OLD_LOG;
5627 log.le.idx = crc16(0,(const unsigned char *)&log,14);
5628 level = ssd_parse_log(dev, &log, 0);
5629 if (level >= SSD_LOG_LEVEL) {
5630 ret = ssd_save_log(dev, &log);
5631 }
5632
5633 /* set alarm */
5634 if (SSD_LOG_LEVEL_ERR == level) {
5635 ssd_set_alarm(dev);
5636 }
5637
5638 /* update smart */
5639 dev->smart.log_info.nr_log++;
5640 dev->smart.log_info.stat[level]++;
5641
5642 /* handle event */
5643 ssd_handle_event(dev, event, level);
5644
5645 return ret;
5646 }
5647
5648 static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5649 {
5650 struct ssd_log_entry le;
5651 int ret;
5652
5653 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5654 return 0;
5655
5656 /* slave port ? */
5657 if (dev->slave) {
5658 return 0;
5659 }
5660
5661 memset(&le, 0, sizeof(struct ssd_log_entry));
5662 le.event = event;
5663 le.data.val = data;
5664
5665 ret = sfifo_put(&dev->log_fifo, &le);
5666 if (ret) {
5667 return ret;
5668 }
5669
5670 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
5671 queue_work(dev->workq, &dev->log_work);
5672 }
5673
5674 return 0;
5675 }
5676
5677 static int ssd_do_swlog(struct ssd_device *dev)
5678 {
5679 struct ssd_log_entry le;
5680 int ret = 0;
5681
5682 memset(&le, 0, sizeof(struct ssd_log_entry));
5683 while (!sfifo_get(&dev->log_fifo, &le)) {
5684 ret = ssd_save_swlog(dev, le.event, le.data.val);
5685 if (ret) {
5686 break;
5687 }
5688 }
5689
5690 return ret;
5691 }
5692
5693 static int __ssd_clear_log(struct ssd_device *dev)
5694 {
5695 uint32_t off, length;
5696 int ret;
5697
5698 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5699 return 0;
5700 }
5701
5702 if (dev->internal_log.nr_log == 0) {
5703 return 0;
5704 }
5705
5706 mutex_lock(&dev->internal_log_mutex);
5707
5708 off = dev->rom_info.log_base;
5709 length = dev->rom_info.log_sz;
5710
5711 ret = ssd_spi_erase(dev, off, length);
5712 if (ret) {
5713 hio_warn("%s: log erase: failed\n", dev->name);
5714 goto out;
5715 }
5716
5717 dev->internal_log.nr_log = 0;
5718
5719 out:
5720 mutex_unlock(&dev->internal_log_mutex);
5721 return ret;
5722 }
5723
5724 static int ssd_clear_log(struct ssd_device *dev)
5725 {
5726 int ret;
5727
5728 ret = __ssd_clear_log(dev);
5729 if(!ret) {
5730 ssd_gen_swlog(dev, SSD_LOG_CLEAR_LOG, 0);
5731 }
5732
5733 return ret;
5734 }
5735
5736 static int ssd_do_log(struct ssd_device *dev, int ctrl_idx, void *buf)
5737 {
5738 struct ssd_log_entry *le;
5739 struct ssd_log log;
5740 struct timeval tv;
5741 int nr_log = 0;
5742 int level;
5743 int ret = 0;
5744
5745 ret = ssd_read_log(dev, ctrl_idx, buf, &nr_log);
5746 if (ret) {
5747 return ret;
5748 }
5749
5750 do_gettimeofday(&tv);
5751
5752 log.time = tv.tv_sec;
5753 log.ctrl_idx = ctrl_idx;
5754
5755 le = (ssd_log_entry_t *)buf;
5756 while (nr_log > 0) {
5757 memcpy(&log.le, le, sizeof(struct ssd_log_entry));
5758
5759 log.le.mod = SSD_DIF_WITH_OLD_LOG;
5760 log.le.idx = crc16(0,(const unsigned char *)&log,14);
5761 level = ssd_parse_log(dev, &log, 1);
5762 if (level >= SSD_LOG_LEVEL) {
5763 ssd_save_log(dev, &log);
5764 }
5765
5766 /* set alarm */
5767 if (SSD_LOG_LEVEL_ERR == level) {
5768 ssd_set_alarm(dev);
5769 }
5770
5771 dev->smart.log_info.nr_log++;
5772 if (SSD_LOG_SEU_FAULT != le->event && SSD_LOG_SEU_FAULT1 != le->event) {
5773 dev->smart.log_info.stat[level]++;
5774 } else {
5775 /* SEU fault */
5776
5777 /* log to the volatile log info */
5778 dev->log_info.nr_log++;
5779 dev->log_info.stat[level]++;
5780
5781 /* do something */
5782 dev->reload_fw = 1;
5783 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
5784 if (le->event != SSD_LOG_SEU_FAULT1) {
5785 dev->has_non_0x98_reg_access = 1;
5786 }
5787
5788 /*dev->readonly = 1;
5789 set_disk_ro(dev->gd, 1);
5790 hio_warn("%s: switched to read-only mode.\n", dev->name);*/
5791 }
5792
5793 /* handle event */
5794 ssd_handle_event(dev, le->event, level);
5795
5796 le++;
5797 nr_log--;
5798 }
5799
5800 return 0;
5801 }
5802
5803 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5804 static void ssd_log_worker(void *data)
5805 {
5806 struct ssd_device *dev = (struct ssd_device *)data;
5807 #else
5808 static void ssd_log_worker(struct work_struct *work)
5809 {
5810 struct ssd_device *dev = container_of(work, struct ssd_device, log_work);
5811 #endif
5812 int i;
5813 int ret;
5814
5815 if (!test_bit(SSD_LOG_ERR, &dev->state) && test_bit(SSD_ONLINE, &dev->state)) {
5816 /* alloc log buf */
5817 if (!dev->log_buf) {
5818 dev->log_buf = kmalloc(dev->hw_info.log_sz, GFP_KERNEL);
5819 if (!dev->log_buf) {
5820 hio_warn("%s: ssd_log_worker: no mem\n", dev->name);
5821 return;
5822 }
5823 }
5824
5825 /* get log */
5826 if (test_and_clear_bit(SSD_LOG_HW, &dev->state)) {
5827 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5828 ret = ssd_do_log(dev, i, dev->log_buf);
5829 if (ret) {
5830 (void)test_and_set_bit(SSD_LOG_ERR, &dev->state);
5831 hio_warn("%s: do log fail\n", dev->name);
5832 }
5833 }
5834 }
5835 }
5836
5837 ret = ssd_do_swlog(dev);
5838 if (ret) {
5839 hio_warn("%s: do swlog fail\n", dev->name);
5840 }
5841 }
5842
5843 static void ssd_cleanup_log(struct ssd_device *dev)
5844 {
5845 if (dev->log_buf) {
5846 kfree(dev->log_buf);
5847 dev->log_buf = NULL;
5848 }
5849
5850 sfifo_free(&dev->log_fifo);
5851
5852 if (dev->internal_log.log) {
5853 vfree(dev->internal_log.log);
5854 dev->internal_log.nr_log = 0;
5855 dev->internal_log.log = NULL;
5856 }
5857 }
5858
5859 static int ssd_init_log(struct ssd_device *dev)
5860 {
5861 struct ssd_log *log;
5862 uint32_t off, size;
5863 uint32_t len = 0;
5864 int ret = 0;
5865
5866 mutex_init(&dev->internal_log_mutex);
5867
5868 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5869 INIT_WORK(&dev->log_work, ssd_log_worker, dev);
5870 #else
5871 INIT_WORK(&dev->log_work, ssd_log_worker);
5872 #endif
5873
5874 off = dev->rom_info.log_base;
5875 size = dev->rom_info.log_sz;
5876
5877 dev->internal_log.nr_log = 0;
5878 dev->internal_log.log = vmalloc(size);
5879 if (!dev->internal_log.log) {
5880 ret = -ENOMEM;
5881 goto out_alloc_log;
5882 }
5883
5884 ret = sfifo_alloc(&dev->log_fifo, SSD_LOG_FIFO_SZ, sizeof(struct ssd_log_entry));
5885 if (ret < 0) {
5886 goto out_alloc_log_fifo;
5887 }
5888
5889 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5890 return 0;
5891 }
5892
5893 log = (struct ssd_log *)dev->internal_log.log;
5894 while (len < size) {
5895 ret = ssd_spi_read(dev, log, off, sizeof(struct ssd_log));
5896 if (ret) {
5897 goto out_read_log;
5898 }
5899
5900 if (log->ctrl_idx == 0xff) {
5901 break;
5902 }
5903
5904 if (log->le.event == SSD_LOG_POWER_ON) {
5905 if (dev->internal_log.nr_log > dev->last_poweron_id) {
5906 dev->last_poweron_id = dev->internal_log.nr_log;
5907 }
5908 }
5909
5910 dev->internal_log.nr_log++;
5911 log++;
5912 len += sizeof(struct ssd_log);
5913 off += sizeof(struct ssd_log);
5914 }
5915
5916 return 0;
5917
5918 out_read_log:
5919 sfifo_free(&dev->log_fifo);
5920 out_alloc_log_fifo:
5921 vfree(dev->internal_log.log);
5922 dev->internal_log.log = NULL;
5923 dev->internal_log.nr_log = 0;
5924 out_alloc_log:
5925 /* skip error if not in standard mode */
5926 if (mode != SSD_DRV_MODE_STANDARD) {
5927 ret = 0;
5928 }
5929 return ret;
5930 }
5931
5932 /* work queue */
5933 static void ssd_stop_workq(struct ssd_device *dev)
5934 {
5935 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
5936 flush_workqueue(dev->workq);
5937 }
5938
5939 static void ssd_start_workq(struct ssd_device *dev)
5940 {
5941 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
5942
5943 /* log ? */
5944 queue_work(dev->workq, &dev->log_work);
5945 }
5946
5947 static void ssd_cleanup_workq(struct ssd_device *dev)
5948 {
5949 flush_workqueue(dev->workq);
5950 destroy_workqueue(dev->workq);
5951 dev->workq = NULL;
5952 }
5953
5954 static int ssd_init_workq(struct ssd_device *dev)
5955 {
5956 int ret = 0;
5957
5958 dev->workq = create_singlethread_workqueue(dev->name);
5959 if (!dev->workq) {
5960 ret = -ESRCH;
5961 goto out;
5962 }
5963
5964 out:
5965 return ret;
5966 }
5967
5968 /* rom */
5969 static int ssd_init_rom_info(struct ssd_device *dev)
5970 {
5971 uint32_t val;
5972
5973 mutex_init(&dev->spi_mutex);
5974 mutex_init(&dev->i2c_mutex);
5975
5976 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5977 /* fix bug: read data to clear status */
5978 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
5979
5980 dev->rom_info.size = SSD_ROM_SIZE;
5981 dev->rom_info.block_size = SSD_ROM_BLK_SIZE;
5982 dev->rom_info.page_size = SSD_ROM_PAGE_SIZE;
5983
5984 dev->rom_info.bridge_fw_base = SSD_ROM_BRIDGE_FW_BASE;
5985 dev->rom_info.bridge_fw_sz = SSD_ROM_BRIDGE_FW_SIZE;
5986 dev->rom_info.nr_bridge_fw = SSD_ROM_NR_BRIDGE_FW;
5987
5988 dev->rom_info.ctrl_fw_base = SSD_ROM_CTRL_FW_BASE;
5989 dev->rom_info.ctrl_fw_sz = SSD_ROM_CTRL_FW_SIZE;
5990 dev->rom_info.nr_ctrl_fw = SSD_ROM_NR_CTRL_FW;
5991
5992 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
5993
5994 dev->rom_info.vp_base = SSD_ROM_VP_BASE;
5995 dev->rom_info.label_base = SSD_ROM_LABEL_BASE;
5996 } else if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5997 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
5998 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
5999 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
6000 dev->rom_info.page_size = (val>>16) & 0xFFFF;
6001
6002 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
6003 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
6004 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
6005 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
6006
6007 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
6008 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
6009 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
6010 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
6011
6012 dev->rom_info.bm_fw_base = dev->rom_info.ctrl_fw_base + (dev->rom_info.nr_ctrl_fw * dev->rom_info.ctrl_fw_sz);
6013 dev->rom_info.bm_fw_sz = SSD_PV3_ROM_BM_FW_SZ;
6014 dev->rom_info.nr_bm_fw = SSD_PV3_ROM_NR_BM_FW;
6015
6016 dev->rom_info.log_base = dev->rom_info.bm_fw_base + (dev->rom_info.nr_bm_fw * dev->rom_info.bm_fw_sz);
6017 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
6018
6019 dev->rom_info.smart_base = dev->rom_info.log_base + dev->rom_info.log_sz;
6020 dev->rom_info.smart_sz = SSD_PV3_ROM_SMART_SZ;
6021 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
6022
6023 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
6024 dev->rom_info.vp_base = dev->rom_info.block_size * val;
6025 dev->rom_info.label_base = dev->rom_info.vp_base + dev->rom_info.block_size;
6026 if (dev->rom_info.label_base >= dev->rom_info.size) {
6027 dev->rom_info.label_base = dev->rom_info.vp_base - dev->rom_info.block_size;
6028 }
6029 } else {
6030 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
6031 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
6032 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
6033 dev->rom_info.page_size = (val>>16) & 0xFFFF;
6034
6035 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
6036 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
6037 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
6038 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
6039
6040 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
6041 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
6042 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
6043 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
6044
6045 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
6046 dev->rom_info.vp_base = dev->rom_info.block_size * val;
6047 dev->rom_info.label_base = dev->rom_info.vp_base - SSD_PV3_2_ROM_SEC_SZ;
6048
6049 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
6050 dev->rom_info.smart_sz = SSD_PV3_2_ROM_SEC_SZ;
6051 dev->rom_info.smart_base = dev->rom_info.label_base - (dev->rom_info.smart_sz * dev->rom_info.nr_smart);
6052 if (dev->rom_info.smart_sz > dev->rom_info.block_size) {
6053 dev->rom_info.smart_sz = dev->rom_info.block_size;
6054 }
6055
6056 dev->rom_info.log_sz = SSD_PV3_2_ROM_LOG_SZ;
6057 dev->rom_info.log_base = dev->rom_info.smart_base - dev->rom_info.log_sz;
6058 }
6059
6060 return ssd_init_spi(dev);
6061 }
6062
6063 /* smart */
6064 static int ssd_update_smart(struct ssd_device *dev, struct ssd_smart *smart)
6065 {
6066 struct timeval tv;
6067 uint64_t run_time;
6068 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
6069 struct hd_struct *part;
6070 int cpu;
6071 #endif
6072 int i, j;
6073 int ret = 0;
6074
6075 if (!test_bit(SSD_INIT_BD, &dev->state)) {
6076 return 0;
6077 }
6078
6079 do_gettimeofday(&tv);
6080 if ((uint64_t)tv.tv_sec < dev->uptime) {
6081 run_time = 0;
6082 } else {
6083 run_time = tv.tv_sec - dev->uptime;
6084 }
6085
6086 /* avoid frequently update */
6087 if (run_time >= 60) {
6088 ret = 1;
6089 }
6090
6091 /* io stat */
6092 smart->io_stat.run_time += run_time;
6093
6094 #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
6095 cpu = part_stat_lock();
6096 part = &dev->gd->part0;
6097 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,14,0))
6098 part_round_stats(dev->rq, cpu, part);
6099 #else
6100 part_round_stats(cpu, part);
6101 #endif
6102 part_stat_unlock();
6103
6104 smart->io_stat.nr_read += part_stat_read(part, ios[READ]);
6105 smart->io_stat.nr_write += part_stat_read(part, ios[WRITE]);
6106 smart->io_stat.rsectors += part_stat_read(part, sectors[READ]);
6107 smart->io_stat.wsectors += part_stat_read(part, sectors[WRITE]);
6108 #elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
6109 preempt_disable();
6110 disk_round_stats(dev->gd);
6111 preempt_enable();
6112
6113 smart->io_stat.nr_read += disk_stat_read(dev->gd, ios[READ]);
6114 smart->io_stat.nr_write += disk_stat_read(dev->gd, ios[WRITE]);
6115 smart->io_stat.rsectors += disk_stat_read(dev->gd, sectors[READ]);
6116 smart->io_stat.wsectors += disk_stat_read(dev->gd, sectors[WRITE]);
6117 #else
6118 preempt_disable();
6119 disk_round_stats(dev->gd);
6120 preempt_enable();
6121
6122 smart->io_stat.nr_read += disk_stat_read(dev->gd, reads);
6123 smart->io_stat.nr_write += disk_stat_read(dev->gd, writes);
6124 smart->io_stat.rsectors += disk_stat_read(dev->gd, read_sectors);
6125 smart->io_stat.wsectors += disk_stat_read(dev->gd, write_sectors);
6126 #endif
6127
6128 smart->io_stat.nr_to += atomic_read(&dev->tocnt);
6129
6130 for (i=0; i<dev->nr_queue; i++) {
6131 smart->io_stat.nr_rwerr += dev->queue[i].io_stat.nr_rwerr;
6132 smart->io_stat.nr_ioerr += dev->queue[i].io_stat.nr_ioerr;
6133 }
6134
6135 for (i=0; i<dev->nr_queue; i++) {
6136 for (j=0; j<SSD_ECC_MAX_FLIP; j++) {
6137 smart->ecc_info.bitflip[j] += dev->queue[i].ecc_info.bitflip[j];
6138 }
6139 }
6140
6141 //dev->uptime = tv.tv_sec;
6142
6143 return ret;
6144 }
6145
6146 static int __ssd_clear_smart(struct ssd_device *dev)
6147 {
6148 struct timeval tv;
6149 uint64_t sversion;
6150 uint32_t off, length;
6151 int i;
6152 int ret;
6153
6154 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6155 return 0;
6156 }
6157
6158 /* clear smart */
6159 off = dev->rom_info.smart_base;
6160 length = dev->rom_info.smart_sz * dev->rom_info.nr_smart;
6161
6162 ret = ssd_spi_erase(dev, off, length);
6163 if (ret) {
6164 hio_warn("%s: info erase: failed\n", dev->name);
6165 goto out;
6166 }
6167
6168 sversion = dev->smart.version;
6169
6170 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6171 dev->smart.version = sversion + 1;
6172 dev->smart.magic = SSD_SMART_MAGIC;
6173
6174 /* clear all tmp acc */
6175 for (i=0; i<dev->nr_queue; i++) {
6176 memset(&(dev->queue[i].io_stat), 0, sizeof(struct ssd_io_stat));
6177 memset(&(dev->queue[i].ecc_info), 0, sizeof(struct ssd_ecc_info));
6178 }
6179
6180 atomic_set(&dev->tocnt, 0);
6181
6182 /* clear tmp log info */
6183 memset(&dev->log_info, 0, sizeof(struct ssd_log_info));
6184
6185 do_gettimeofday(&tv);
6186 dev->uptime = tv.tv_sec;
6187
6188 /* clear alarm ? */
6189 //ssd_clear_alarm(dev);
6190 out:
6191 return ret;
6192 }
6193
6194 static int __ssd_clear_warning(struct ssd_device *dev)
6195 {
6196 uint32_t off, size;
6197 int i, ret = 0;
6198
6199 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6200 return 0;
6201 }
6202
6203 /* clear log_info warning */
6204 memset(&dev->smart.log_info, 0, sizeof(dev->smart.log_info));
6205
6206 /* clear io_stat warning */
6207 dev->smart.io_stat.nr_to = 0;
6208 dev->smart.io_stat.nr_rwerr = 0;
6209 dev->smart.io_stat.nr_ioerr = 0;
6210
6211 /* clear ecc_info warning */
6212 memset(&dev->smart.ecc_info, 0, sizeof(dev->smart.ecc_info));
6213
6214 /* clear queued warnings */
6215 for (i=0; i<dev->nr_queue; i++) {
6216 /* queued io_stat warning */
6217 dev->queue[i].io_stat.nr_to = 0;
6218 dev->queue[i].io_stat.nr_rwerr = 0;
6219 dev->queue[i].io_stat.nr_ioerr = 0;
6220
6221 /* queued ecc_info warning */
6222 memset(&(dev->queue[i].ecc_info), 0, sizeof(dev->queue[i].ecc_info));
6223 }
6224
6225 /* write smart back to nor */
6226 for (i = 0; i < dev->rom_info.nr_smart; i++) {
6227 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6228 size = dev->rom_info.smart_sz;
6229
6230 ret = ssd_spi_erase(dev, off, size);
6231 if (ret) {
6232 hio_warn("%s: warning erase: failed with code 1\n", dev->name);
6233 goto out;
6234 }
6235
6236 size = sizeof(struct ssd_smart);
6237
6238 ret = ssd_spi_write(dev, &dev->smart, off, size);
6239 if (ret) {
6240 hio_warn("%s: warning erase: failed with code 2\n", dev->name);
6241 goto out;
6242 }
6243 }
6244
6245 dev->smart.version++;
6246
6247 /* clear cmd timeout warning */
6248 atomic_set(&dev->tocnt, 0);
6249
6250 /* clear tmp log info */
6251 memset(&dev->log_info, 0, sizeof(dev->log_info));
6252
6253 out:
6254 return ret;
6255 }
6256
6257 static int ssd_clear_smart(struct ssd_device *dev)
6258 {
6259 int ret;
6260
6261 ret = __ssd_clear_smart(dev);
6262 if(!ret) {
6263 ssd_gen_swlog(dev, SSD_LOG_CLEAR_SMART, 0);
6264 }
6265
6266 return ret;
6267 }
6268
6269 static int ssd_clear_warning(struct ssd_device *dev)
6270 {
6271 int ret;
6272
6273 ret = __ssd_clear_warning(dev);
6274 if(!ret) {
6275 ssd_gen_swlog(dev, SSD_LOG_CLEAR_WARNING, 0);
6276 }
6277
6278 return ret;
6279 }
6280
6281 static int ssd_save_smart(struct ssd_device *dev)
6282 {
6283 uint32_t off, size;
6284 int i;
6285 int ret = 0;
6286
6287 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
6288 return 0;
6289
6290 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6291 return 0;
6292 }
6293
6294 if (!ssd_update_smart(dev, &dev->smart)) {
6295 return 0;
6296 }
6297
6298 dev->smart.version++;
6299
6300 for (i=0; i<dev->rom_info.nr_smart; i++) {
6301 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6302 size = dev->rom_info.smart_sz;
6303
6304 ret = ssd_spi_erase(dev, off, size);
6305 if (ret) {
6306 hio_warn("%s: info erase failed\n", dev->name);
6307 goto out;
6308 }
6309
6310 size = sizeof(struct ssd_smart);
6311
6312 ret = ssd_spi_write(dev, &dev->smart, off, size);
6313 if (ret) {
6314 hio_warn("%s: info write failed\n", dev->name);
6315 goto out;
6316 }
6317
6318 //xx
6319 }
6320
6321 out:
6322 return ret;
6323 }
6324
6325 static int ssd_init_smart(struct ssd_device *dev)
6326 {
6327 struct ssd_smart *smart;
6328 struct timeval tv;
6329 uint32_t off, size, val;
6330 int i;
6331 int ret = 0;
6332 int update_smart = 0;
6333
6334 do_gettimeofday(&tv);
6335 dev->uptime = tv.tv_sec;
6336
6337 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6338 return 0;
6339 }
6340
6341 smart = kmalloc(sizeof(struct ssd_smart) * SSD_ROM_NR_SMART_MAX, GFP_KERNEL);
6342 if (!smart) {
6343 ret = -ENOMEM;
6344 goto out_nomem;
6345 }
6346
6347 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6348
6349 /* read smart */
6350 for (i=0; i<dev->rom_info.nr_smart; i++) {
6351 memset(&smart[i], 0, sizeof(struct ssd_smart));
6352
6353 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6354 size = sizeof(struct ssd_smart);
6355
6356 ret = ssd_spi_read(dev, &smart[i], off, size);
6357 if (ret) {
6358 hio_warn("%s: info read failed\n", dev->name);
6359 goto out;
6360 }
6361
6362 if (smart[i].magic != SSD_SMART_MAGIC) {
6363 smart[i].magic = 0;
6364 smart[i].version = 0;
6365 continue;
6366 }
6367
6368 if (smart[i].version > dev->smart.version) {
6369 memcpy(&dev->smart, &smart[i], sizeof(struct ssd_smart));
6370 }
6371 }
6372
6373 if (dev->smart.magic != SSD_SMART_MAGIC) {
6374 /* first time power up */
6375 dev->smart.magic = SSD_SMART_MAGIC;
6376 dev->smart.version = 1;
6377 }
6378
6379 val = ssd_reg32_read(dev->ctrlp + SSD_INTR_INTERVAL_REG);
6380 if (!val) {
6381 dev->last_poweron_id = ~0;
6382 ssd_gen_swlog(dev, SSD_LOG_POWER_ON, dev->hw_info.bridge_ver);
6383 if (dev->smart.io_stat.nr_to) {
6384 dev->smart.io_stat.nr_to = 0;
6385 update_smart = 1;
6386 }
6387 }
6388
6389 /* check log info */
6390 {
6391 struct ssd_log_info log_info;
6392 struct ssd_log *log = (struct ssd_log *)dev->internal_log.log;
6393
6394 memset(&log_info, 0, sizeof(struct ssd_log_info));
6395
6396 while (log_info.nr_log < dev->internal_log.nr_log) {
6397 int skip = 0;
6398
6399 switch (log->le.event) {
6400 /* skip the volatile log info */
6401 case SSD_LOG_SEU_FAULT:
6402 case SSD_LOG_SEU_FAULT1:
6403 skip = 1;
6404 break;
6405 case SSD_LOG_TIMEOUT:
6406 skip = (dev->last_poweron_id >= log_info.nr_log);
6407 break;
6408 }
6409
6410 if (!skip) {
6411 log_info.stat[ssd_parse_log(dev, log, 0)]++;
6412 }
6413
6414 log_info.nr_log++;
6415 log++;
6416 }
6417
6418 /* check */
6419 for (i=(SSD_LOG_NR_LEVEL-1); i>=0; i--) {
6420 if (log_info.stat[i] != dev->smart.log_info.stat[i]) {
6421 /* unclean */
6422 memcpy(&dev->smart.log_info, &log_info, sizeof(struct ssd_log_info));
6423 update_smart = 1;
6424 break;
6425 }
6426 }
6427
6428 if (update_smart) {
6429 ++dev->smart.version;
6430 }
6431 }
6432
6433 for (i=0; i<dev->rom_info.nr_smart; i++) {
6434 if (smart[i].magic == SSD_SMART_MAGIC && smart[i].version == dev->smart.version) {
6435 continue;
6436 }
6437
6438 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6439 size = dev->rom_info.smart_sz;
6440
6441 ret = ssd_spi_erase(dev, off, size);
6442 if (ret) {
6443 hio_warn("%s: info erase failed\n", dev->name);
6444 goto out;
6445 }
6446
6447 size = sizeof(struct ssd_smart);
6448 ret = ssd_spi_write(dev, &dev->smart, off, size);
6449 if (ret) {
6450 hio_warn("%s: info write failed\n", dev->name);
6451 goto out;
6452 }
6453
6454 //xx
6455 }
6456
6457 /* sync smart with alarm led */
6458 if (dev->smart.io_stat.nr_to || dev->smart.io_stat.nr_rwerr || dev->smart.log_info.stat[SSD_LOG_LEVEL_ERR]) {
6459 hio_warn("%s: some fault found in the history info\n", dev->name);
6460 ssd_set_alarm(dev);
6461 }
6462
6463 out:
6464 kfree(smart);
6465 out_nomem:
6466 /* skip error if not in standard mode */
6467 if (mode != SSD_DRV_MODE_STANDARD) {
6468 ret = 0;
6469 }
6470 return ret;
6471 }
6472
6473 /* bm */
6474 static int __ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6475 {
6476 struct ssd_bm_manufacturer_data bm_md = {0};
6477 uint16_t sc_id = SSD_BM_SYSTEM_DATA_SUBCLASS_ID;
6478 uint8_t cmd;
6479 int ret = 0;
6480
6481 if (!dev || !ver) {
6482 return -EINVAL;
6483 }
6484
6485 mutex_lock(&dev->bm_mutex);
6486
6487 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6488 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6489 if (ret) {
6490 goto out;
6491 }
6492
6493 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6494 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_manufacturer_data), (uint8_t *)&bm_md);
6495 if (ret) {
6496 goto out;
6497 }
6498
6499 if (bm_md.firmware_ver & 0xF000) {
6500 ret = -EIO;
6501 goto out;
6502 }
6503
6504 *ver = bm_md.firmware_ver;
6505
6506 out:
6507 mutex_unlock(&dev->bm_mutex);
6508 return ret;
6509 }
6510
6511 static int ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6512 {
6513 uint16_t tmp = 0;
6514 int i = SSD_BM_RETRY_MAX;
6515 int ret = 0;
6516
6517 while (i-- > 0) {
6518 ret = __ssd_bm_get_version(dev, &tmp);
6519 if (!ret) {
6520 break;
6521 }
6522 }
6523 if (ret) {
6524 return ret;
6525 }
6526
6527 *ver = tmp;
6528
6529 return 0;
6530 }
6531
6532 static int __ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6533 {
6534 struct ssd_bm_configuration_registers bm_cr;
6535 uint16_t sc_id = SSD_BM_CONFIGURATION_REGISTERS_ID;
6536 uint8_t cmd;
6537 int ret;
6538
6539 mutex_lock(&dev->bm_mutex);
6540
6541 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6542 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6543 if (ret) {
6544 goto out;
6545 }
6546
6547 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6548 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_configuration_registers), (uint8_t *)&bm_cr);
6549 if (ret) {
6550 goto out;
6551 }
6552
6553 if (bm_cr.operation_cfg.cc == 0 || bm_cr.operation_cfg.cc > 4) {
6554 ret = -EIO;
6555 goto out;
6556 }
6557
6558 *nr_cap = bm_cr.operation_cfg.cc + 1;
6559
6560 out:
6561 mutex_unlock(&dev->bm_mutex);
6562 return ret;
6563 }
6564
6565 static int ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6566 {
6567 int tmp = 0;
6568 int i = SSD_BM_RETRY_MAX;
6569 int ret = 0;
6570
6571 while (i-- > 0) {
6572 ret = __ssd_bm_nr_cap(dev, &tmp);
6573 if (!ret) {
6574 break;
6575 }
6576 }
6577 if (ret) {
6578 return ret;
6579 }
6580
6581 *nr_cap = tmp;
6582
6583 return 0;
6584 }
6585
6586 static int ssd_bm_enter_cap_learning(struct ssd_device *dev)
6587 {
6588 uint16_t buf = SSD_BM_ENTER_CAP_LEARNING;
6589 uint8_t cmd = SSD_BM_MANUFACTURERACCESS;
6590 int ret;
6591
6592 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&buf);
6593 if (ret) {
6594 goto out;
6595 }
6596
6597 out:
6598 return ret;
6599 }
6600
6601 static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status)
6602 {
6603 uint16_t val = 0;
6604 uint8_t cmd = SSD_BM_SAFETYSTATUS;
6605 int ret;
6606
6607 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6608 if (ret) {
6609 goto out;
6610 }
6611
6612 *status = val;
6613 out:
6614 return ret;
6615 }
6616
6617 static int ssd_bm_get_opstatus(struct ssd_device *dev, uint16_t *status)
6618 {
6619 uint16_t val = 0;
6620 uint8_t cmd = SSD_BM_OPERATIONSTATUS;
6621 int ret;
6622
6623 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6624 if (ret) {
6625 goto out;
6626 }
6627
6628 *status = val;
6629 out:
6630 return ret;
6631 }
6632
6633 static int ssd_get_bmstruct(struct ssd_device *dev, struct ssd_bm *bm_status_out)
6634 {
6635 struct sbs_cmd *bm_sbs = ssd_bm_sbs;
6636 struct ssd_bm bm_status;
6637 uint8_t buf[2] = {0, };
6638 uint16_t val = 0;
6639 uint16_t cval;
6640 int ret = 0;
6641
6642 memset(&bm_status, 0, sizeof(struct ssd_bm));
6643
6644 while (bm_sbs->desc != NULL) {
6645 switch (bm_sbs->size) {
6646 case SBS_SIZE_BYTE:
6647 ret = ssd_smbus_read_byte(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, buf);
6648 if (ret) {
6649 //printf("Error: smbus read byte %#x\n", bm_sbs->cmd);
6650 goto out;
6651 }
6652 val = buf[0];
6653 break;
6654 case SBS_SIZE_WORD:
6655 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, (uint8_t *)&val);
6656 if (ret) {
6657 //printf("Error: smbus read word %#x\n", bm_sbs->cmd);
6658 goto out;
6659 }
6660 //val = *(uint16_t *)buf;
6661 break;
6662 default:
6663 ret = -1;
6664 goto out;
6665 break;
6666 }
6667
6668 switch (bm_sbs->unit) {
6669 case SBS_UNIT_VALUE:
6670 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val & bm_sbs->mask;
6671 break;
6672 case SBS_UNIT_TEMPERATURE:
6673 cval = (uint16_t)(val - 2731) / 10;
6674 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = cval;
6675 break;
6676 case SBS_UNIT_VOLTAGE:
6677 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6678 break;
6679 case SBS_UNIT_CURRENT:
6680 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6681 break;
6682 case SBS_UNIT_ESR:
6683 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6684 break;
6685 case SBS_UNIT_PERCENT:
6686 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6687 break;
6688 case SBS_UNIT_CAPACITANCE:
6689 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6690 break;
6691 default:
6692 ret = -1;
6693 goto out;
6694 break;
6695 }
6696
6697 bm_sbs++;
6698 }
6699
6700 memcpy(bm_status_out, &bm_status, sizeof(struct ssd_bm));
6701
6702 out:
6703 return ret;
6704 }
6705
6706 static int __ssd_bm_status(struct ssd_device *dev, int *status)
6707 {
6708 struct ssd_bm bm_status = {0};
6709 int nr_cap = 0;
6710 int i;
6711 int ret = 0;
6712
6713 ret = ssd_get_bmstruct(dev, &bm_status);
6714 if (ret) {
6715 goto out;
6716 }
6717
6718 /* capacitor voltage */
6719 ret = ssd_bm_nr_cap(dev, &nr_cap);
6720 if (ret) {
6721 goto out;
6722 }
6723
6724 for (i=0; i<nr_cap; i++) {
6725 if (bm_status.cap_volt[i] < SSD_BM_CAP_VOLT_MIN) {
6726 *status = SSD_BMSTATUS_WARNING;
6727 goto out;
6728 }
6729 }
6730
6731 /* Safety Status */
6732 if (bm_status.sf_status) {
6733 *status = SSD_BMSTATUS_WARNING;
6734 goto out;
6735 }
6736
6737 /* charge status */
6738 if (!((bm_status.op_status >> 12) & 0x1)) {
6739 *status = SSD_BMSTATUS_CHARGING;
6740 }else{
6741 *status = SSD_BMSTATUS_OK;
6742 }
6743
6744 out:
6745 return ret;
6746 }
6747
6748 static void ssd_set_flush_timeout(struct ssd_device *dev, int mode);
6749
6750 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
6751 static void ssd_bm_worker(void *data)
6752 {
6753 struct ssd_device *dev = (struct ssd_device *)data;
6754 #else
6755 static void ssd_bm_worker(struct work_struct *work)
6756 {
6757 struct ssd_device *dev = container_of(work, struct ssd_device, bm_work);
6758 #endif
6759
6760 uint16_t opstatus;
6761 int ret = 0;
6762
6763 if (mode != SSD_DRV_MODE_STANDARD) {
6764 return;
6765 }
6766
6767 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
6768 return;
6769 }
6770
6771 if (dev->hw_info_ext.plp_type != SSD_PLP_SCAP) {
6772 return;
6773 }
6774
6775 ret = ssd_bm_get_opstatus(dev, &opstatus);
6776 if (ret) {
6777 hio_warn("%s: get bm operationstatus failed\n", dev->name);
6778 return;
6779 }
6780
6781 /* need cap learning ? */
6782 if (!(opstatus & 0xF0)) {
6783 ret = ssd_bm_enter_cap_learning(dev);
6784 if (ret) {
6785 hio_warn("%s: enter capacitance learning failed\n", dev->name);
6786 return;
6787 }
6788 }
6789 }
6790
6791 static void ssd_bm_routine_start(void *data)
6792 {
6793 struct ssd_device *dev;
6794
6795 if (!data) {
6796 return;
6797 }
6798 dev = data;
6799
6800 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
6801 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6802 queue_work(dev->workq, &dev->bm_work);
6803 } else {
6804 queue_work(dev->workq, &dev->capmon_work);
6805 }
6806 }
6807 }
6808
6809 /* CAP */
6810 static int ssd_do_cap_learn(struct ssd_device *dev, uint32_t *cap)
6811 {
6812 uint32_t u1, u2, t;
6813 uint16_t val = 0;
6814 int wait = 0;
6815 int ret = 0;
6816
6817 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6818 *cap = 0;
6819 return 0;
6820 }
6821
6822 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6823 *cap = 0;
6824 return 0;
6825 }
6826
6827 /* make sure the lm80 voltage value is updated */
6828 msleep(SSD_LM80_CONV_INTERVAL);
6829
6830 /* check if full charged */
6831 wait = 0;
6832 for (;;) {
6833 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6834 if (ret) {
6835 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6836 ssd_generate_sensor_fault_log(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS,ret);
6837 }
6838 goto out;
6839 }
6840 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6841 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_FULL) {
6842 break;
6843 }
6844
6845 wait++;
6846 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6847 ret = -ETIMEDOUT;
6848 goto out;
6849 }
6850 msleep(SSD_PL_CAP_CHARGE_WAIT);
6851 }
6852
6853 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U2, (uint8_t *)&val);
6854 if (ret) {
6855 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6856 ssd_generate_sensor_fault_log(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS,ret);
6857 }
6858 goto out;
6859 }
6860 u2 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6861
6862 if (u1 == u2) {
6863 ret = -EINVAL;
6864 goto out;
6865 }
6866
6867 /* enter cap learn */
6868 ssd_reg32_write(dev->ctrlp + SSD_PL_CAP_LEARN_REG, 0x1);
6869
6870 wait = 0;
6871 for (;;) {
6872 msleep(SSD_PL_CAP_LEARN_WAIT);
6873
6874 t = ssd_reg32_read(dev->ctrlp + SSD_PL_CAP_LEARN_REG);
6875 if (!((t >> 1) & 0x1)) {
6876 break;
6877 }
6878
6879 wait++;
6880 if (wait > SSD_PL_CAP_LEARN_MAX_WAIT) {
6881 ret = -ETIMEDOUT;
6882 goto out;
6883 }
6884 }
6885
6886 if ((t >> 4) & 0x1) {
6887 ret = -ETIMEDOUT;
6888 goto out;
6889 }
6890
6891 t = (t >> 8);
6892 if (0 == t) {
6893 ret = -EINVAL;
6894 goto out;
6895 }
6896
6897 *cap = SSD_PL_CAP_LEARN(u1, u2, t);
6898
6899 out:
6900 return ret;
6901 }
6902
6903 static int ssd_cap_learn(struct ssd_device *dev, uint32_t *cap)
6904 {
6905 int ret = 0;
6906
6907 if (!dev || !cap) {
6908 return -EINVAL;
6909 }
6910
6911 mutex_lock(&dev->bm_mutex);
6912
6913 ssd_stop_workq(dev);
6914
6915 ret = ssd_do_cap_learn(dev, cap);
6916 if (ret) {
6917 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
6918 goto out;
6919 }
6920
6921 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, *cap);
6922
6923 out:
6924 ssd_start_workq(dev);
6925 mutex_unlock(&dev->bm_mutex);
6926
6927 return ret;
6928 }
6929
6930 static int ssd_check_pl_cap(struct ssd_device *dev)
6931 {
6932 uint32_t u1;
6933 uint16_t val = 0;
6934 uint8_t low = 0;
6935 int wait = 0;
6936 int ret = 0;
6937
6938 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6939 return 0;
6940 }
6941
6942 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6943 return 0;
6944 }
6945
6946 /* cap ready ? */
6947 wait = 0;
6948 for (;;) {
6949 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6950 if (ret) {
6951 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6952 ssd_generate_sensor_fault_log(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS,ret);
6953 }
6954 goto out;
6955 }
6956 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6957 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_READY) {
6958 break;
6959 }
6960
6961 wait++;
6962 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6963 ret = -ETIMEDOUT;
6964 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(u1));
6965 goto out;
6966 }
6967 msleep(SSD_PL_CAP_CHARGE_WAIT);
6968 }
6969
6970 low = ssd_lm80_limit[SSD_LM80_IN_CAP].low;
6971 ret = ssd_smbus_write_byte(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_REG_IN_MIN(SSD_LM80_IN_CAP), &low);
6972 if (ret) {
6973 goto out;
6974 }
6975
6976 /* enable cap INx */
6977 ret = ssd_lm80_enable_in(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_IN_CAP);
6978 if (ret) {
6979 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6980 ssd_generate_sensor_fault_log(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS,ret);
6981 }
6982 goto out;
6983 }
6984
6985 out:
6986 /* skip error if not in standard mode */
6987 if (mode != SSD_DRV_MODE_STANDARD) {
6988 ret = 0;
6989 }
6990 return ret;
6991 }
6992
6993 static int ssd_check_pl_cap_fast(struct ssd_device *dev)
6994 {
6995 uint32_t u1;
6996 uint16_t val = 0;
6997 int ret = 0;
6998
6999 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7000 return 0;
7001 }
7002
7003 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
7004 return 0;
7005 }
7006
7007 /* cap ready ? */
7008 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
7009 if (ret) {
7010 goto out;
7011 }
7012 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
7013 if (SSD_PL_CAP_VOLT(u1) < SSD_PL_CAP_VOLT_READY) {
7014 ret = 1;
7015 }
7016
7017 out:
7018 return ret;
7019 }
7020
7021 static int ssd_init_pl_cap(struct ssd_device *dev)
7022 {
7023 int ret = 0;
7024
7025 /* set here: user write mode */
7026 dev->user_wmode = wmode;
7027
7028 mutex_init(&dev->bm_mutex);
7029
7030 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7031 uint32_t val;
7032 val = ssd_reg32_read(dev->ctrlp + SSD_BM_FAULT_REG);
7033 if ((val >> 1) & 0x1) {
7034 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
7035 }
7036 } else {
7037 ret = ssd_check_pl_cap(dev);
7038 if (ret) {
7039 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
7040 }
7041 }
7042
7043 return 0;
7044 }
7045
7046 /* label */
7047 static void __end_str(char *str, int len)
7048 {
7049 int i;
7050
7051 for(i=0; i<len; i++) {
7052 if (*(str+i) == '\0')
7053 return;
7054 }
7055 *str = '\0';
7056 }
7057
7058 static int ssd_init_label(struct ssd_device *dev)
7059 {
7060 uint32_t off;
7061 uint32_t size;
7062 int ret;
7063
7064 /* label location */
7065 off = dev->rom_info.label_base;
7066
7067 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7068 size = sizeof(struct ssd_label);
7069
7070 /* read label */
7071 ret = ssd_spi_read(dev, &dev->label, off, size);
7072 if (ret) {
7073 memset(&dev->label, 0, size);
7074 goto out;
7075 }
7076
7077 __end_str(dev->label.date, SSD_LABEL_FIELD_SZ);
7078 __end_str(dev->label.sn, SSD_LABEL_FIELD_SZ);
7079 __end_str(dev->label.part, SSD_LABEL_FIELD_SZ);
7080 __end_str(dev->label.desc, SSD_LABEL_FIELD_SZ);
7081 __end_str(dev->label.other, SSD_LABEL_FIELD_SZ);
7082 __end_str(dev->label.maf, SSD_LABEL_FIELD_SZ);
7083 } else {
7084 size = sizeof(struct ssd_labelv3);
7085
7086 /* read label */
7087 ret = ssd_spi_read(dev, &dev->labelv3, off, size);
7088 if (ret) {
7089 memset(&dev->labelv3, 0, size);
7090 goto out;
7091 }
7092
7093 __end_str(dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
7094 __end_str(dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
7095 __end_str(dev->labelv3.item, SSD_LABEL_FIELD_SZ);
7096 __end_str(dev->labelv3.description, SSD_LABEL_DESC_SZ);
7097 __end_str(dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
7098 __end_str(dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
7099 __end_str(dev->labelv3.issuenumber, SSD_LABEL_FIELD_SZ);
7100 __end_str(dev->labelv3.cleicode, SSD_LABEL_FIELD_SZ);
7101 __end_str(dev->labelv3.bom, SSD_LABEL_FIELD_SZ);
7102 }
7103
7104 out:
7105 /* skip error if not in standard mode */
7106 if (mode != SSD_DRV_MODE_STANDARD) {
7107 ret = 0;
7108 }
7109 return ret;
7110 }
7111
7112 int ssd_get_label(struct block_device *bdev, struct ssd_label *label)
7113 {
7114 struct ssd_device *dev;
7115
7116 if (!bdev || !label || !(bdev->bd_disk)) {
7117 return -EINVAL;
7118 }
7119
7120 dev = bdev->bd_disk->private_data;
7121
7122 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7123 memset(label, 0, sizeof(struct ssd_label));
7124 memcpy(label->date, dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
7125 memcpy(label->sn, dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
7126 memcpy(label->desc, dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
7127 memcpy(label->maf, dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
7128 } else {
7129 memcpy(label, &dev->label, sizeof(struct ssd_label));
7130 }
7131
7132 return 0;
7133 }
7134
7135 static int __ssd_get_version(struct ssd_device *dev, struct ssd_version_info *ver)
7136 {
7137 uint16_t bm_ver = 0;
7138 int ret = 0;
7139
7140 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7141 ret = ssd_bm_get_version(dev, &bm_ver);
7142 if(ret){
7143 goto out;
7144 }
7145 }
7146
7147 ver->bridge_ver = dev->hw_info.bridge_ver;
7148 ver->ctrl_ver = dev->hw_info.ctrl_ver;
7149 ver->bm_ver = bm_ver;
7150 ver->pcb_ver = dev->hw_info.pcb_ver;
7151 ver->upper_pcb_ver = dev->hw_info.upper_pcb_ver;
7152
7153 out:
7154 return ret;
7155
7156 }
7157
7158 int ssd_get_version(struct block_device *bdev, struct ssd_version_info *ver)
7159 {
7160 struct ssd_device *dev;
7161 int ret;
7162
7163 if (!bdev || !ver || !(bdev->bd_disk)) {
7164 return -EINVAL;
7165 }
7166
7167 dev = bdev->bd_disk->private_data;
7168
7169 mutex_lock(&dev->fw_mutex);
7170 ret = __ssd_get_version(dev, ver);
7171 mutex_unlock(&dev->fw_mutex);
7172
7173 return ret;
7174 }
7175
7176 static int __ssd_get_temperature(struct ssd_device *dev, int *temp)
7177 {
7178 uint64_t val;
7179 uint32_t off;
7180 int max = -300;
7181 int cur;
7182 int i;
7183
7184 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
7185 *temp = 0;
7186 return 0;
7187 }
7188
7189 if (finject) {
7190 if (dev->db_info.type == SSD_DEBUG_LOG &&
7191 (dev->db_info.data.log.event == SSD_LOG_OVER_TEMP ||
7192 dev->db_info.data.log.event == SSD_LOG_NORMAL_TEMP ||
7193 dev->db_info.data.log.event == SSD_LOG_WARN_TEMP)) {
7194 *temp = (int)dev->db_info.data.log.extra;
7195 return 0;
7196 }
7197 }
7198
7199 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7200 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
7201
7202 val = ssd_reg_read(dev->ctrlp + off);
7203 if (val == 0xffffffffffffffffull) {
7204 continue;
7205 }
7206
7207 cur = (int)CUR_TEMP(val);
7208 if (cur >= max) {
7209 max = cur;
7210 }
7211 }
7212
7213 *temp = max;
7214
7215 return 0;
7216 }
7217
7218 int ssd_get_temperature(struct block_device *bdev, int *temp)
7219 {
7220 struct ssd_device *dev;
7221 int ret;
7222
7223 if (!bdev || !temp || !(bdev->bd_disk)) {
7224 return -EINVAL;
7225 }
7226
7227 dev = bdev->bd_disk->private_data;
7228
7229
7230 mutex_lock(&dev->fw_mutex);
7231 ret = __ssd_get_temperature(dev, temp);
7232 mutex_unlock(&dev->fw_mutex);
7233
7234 return ret;
7235 }
7236
7237 int ssd_set_otprotect(struct block_device *bdev, int otprotect)
7238 {
7239 struct ssd_device *dev;
7240
7241 if (!bdev || !(bdev->bd_disk)) {
7242 return -EINVAL;
7243 }
7244
7245 dev = bdev->bd_disk->private_data;
7246 ssd_set_ot_protect(dev, !!otprotect);
7247
7248 return 0;
7249 }
7250
7251 int ssd_bm_status(struct block_device *bdev, int *status)
7252 {
7253 struct ssd_device *dev;
7254 int ret = 0;
7255
7256 if (!bdev || !status || !(bdev->bd_disk)) {
7257 return -EINVAL;
7258 }
7259
7260 dev = bdev->bd_disk->private_data;
7261
7262 mutex_lock(&dev->fw_mutex);
7263 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7264 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7265 *status = SSD_BMSTATUS_WARNING;
7266 } else {
7267 *status = SSD_BMSTATUS_OK;
7268 }
7269 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7270 ret = __ssd_bm_status(dev, status);
7271 } else {
7272 *status = SSD_BMSTATUS_OK;
7273 }
7274 mutex_unlock(&dev->fw_mutex);
7275
7276 return ret;
7277 }
7278
7279 int ssd_get_pciaddr(struct block_device *bdev, struct pci_addr *paddr)
7280 {
7281 struct ssd_device *dev;
7282
7283 if (!bdev || !paddr || !bdev->bd_disk) {
7284 return -EINVAL;
7285 }
7286
7287 dev = bdev->bd_disk->private_data;
7288
7289 paddr->domain = pci_domain_nr(dev->pdev->bus);
7290 paddr->bus = dev->pdev->bus->number;
7291 paddr->slot = PCI_SLOT(dev->pdev->devfn);
7292 paddr->func= PCI_FUNC(dev->pdev->devfn);
7293
7294 return 0;
7295 }
7296
7297 /* acc */
7298 static int ssd_bb_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7299 {
7300 uint32_t val;
7301 int ctrl, chip;
7302
7303 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7304 return -EOPNOTSUPP;
7305 }
7306
7307 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L1_REG);
7308 if (0xffffffffull == acc->threshold_l1) {
7309 return -EIO;
7310 }
7311 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L2_REG);
7312 if (0xffffffffull == acc->threshold_l2) {
7313 return -EIO;
7314 }
7315 acc->val = 0;
7316
7317 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7318 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7319 val = ssd_reg32_read(dev->ctrlp + SSD_BB_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_BB_ACC_REG_SZ * chip));
7320 if (0xffffffffull == acc->val) {
7321 return -EIO;
7322 }
7323 if (val > acc->val) {
7324 acc->val = val;
7325 }
7326 }
7327 }
7328
7329 return 0;
7330 }
7331
7332 static int ssd_ec_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7333 {
7334 uint32_t val;
7335 int ctrl, chip;
7336
7337 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7338 return -EOPNOTSUPP;
7339 }
7340
7341 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L1_REG);
7342 if (0xffffffffull == acc->threshold_l1) {
7343 return -EIO;
7344 }
7345 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L2_REG);
7346 if (0xffffffffull == acc->threshold_l2) {
7347 return -EIO;
7348 }
7349 acc->val = 0;
7350
7351 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7352 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7353 val = ssd_reg32_read(dev->ctrlp + SSD_EC_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_EC_ACC_REG_SZ * chip));
7354 if (0xffffffffull == acc->val) {
7355 return -EIO;
7356 }
7357
7358 if (val > acc->val) {
7359 acc->val = val;
7360 }
7361 }
7362 }
7363
7364 return 0;
7365 }
7366
7367
7368 /* ram r&w */
7369 static int ssd_ram_read_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7370 {
7371 struct ssd_ram_op_msg *msg;
7372 dma_addr_t buf_dma;
7373 size_t len = length;
7374 loff_t ofs_w = ofs;
7375 int ret = 0;
7376
7377 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7378 || !length || length > dev->hw_info.ram_max_len
7379 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7380 return -EINVAL;
7381 }
7382
7383 len /= dev->hw_info.ram_align;
7384 do_div(ofs_w, dev->hw_info.ram_align);
7385
7386 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7387 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7388 ret = dma_mapping_error(buf_dma);
7389 #else
7390 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7391 #endif
7392 if (ret) {
7393 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7394 goto out_dma_mapping;
7395 }
7396
7397 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7398
7399 msg->fun = SSD_FUNC_RAM_READ;
7400 msg->ctrl_idx = ctrl_idx;
7401 msg->start = (uint32_t)ofs_w;
7402 msg->length = len;
7403 msg->buf = buf_dma;
7404
7405 ret = ssd_do_request(dev, READ, msg, NULL);
7406 ssd_put_dmsg(msg);
7407
7408 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7409
7410 out_dma_mapping:
7411 return ret;
7412 }
7413
7414 static int ssd_ram_write_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7415 {
7416 struct ssd_ram_op_msg *msg;
7417 dma_addr_t buf_dma;
7418 size_t len = length;
7419 loff_t ofs_w = ofs;
7420 int ret = 0;
7421
7422 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7423 || !length || length > dev->hw_info.ram_max_len
7424 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7425 return -EINVAL;
7426 }
7427
7428 len /= dev->hw_info.ram_align;
7429 do_div(ofs_w, dev->hw_info.ram_align);
7430
7431 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7432 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7433 ret = dma_mapping_error(buf_dma);
7434 #else
7435 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7436 #endif
7437 if (ret) {
7438 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7439 goto out_dma_mapping;
7440 }
7441
7442 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7443
7444 msg->fun = SSD_FUNC_RAM_WRITE;
7445 msg->ctrl_idx = ctrl_idx;
7446 msg->start = (uint32_t)ofs_w;
7447 msg->length = len;
7448 msg->buf = buf_dma;
7449
7450 ret = ssd_do_request(dev, WRITE, msg, NULL);
7451 ssd_put_dmsg(msg);
7452
7453 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7454
7455 out_dma_mapping:
7456 return ret;
7457
7458 }
7459
7460 static int ssd_ram_read(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7461 {
7462 int left = length;
7463 size_t len;
7464 loff_t off = ofs;
7465 int ret = 0;
7466
7467 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7468 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7469 return -EINVAL;
7470 }
7471
7472 while (left > 0) {
7473 len = dev->hw_info.ram_max_len;
7474 if (left < (int)dev->hw_info.ram_max_len) {
7475 len = left;
7476 }
7477
7478 ret = ssd_ram_read_4k(dev, buf, len, off, ctrl_idx);
7479 if (ret) {
7480 break;
7481 }
7482
7483 left -= len;
7484 off += len;
7485 buf += len;
7486 }
7487
7488 return ret;
7489 }
7490
7491 static int ssd_ram_write(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7492 {
7493 int left = length;
7494 size_t len;
7495 loff_t off = ofs;
7496 int ret = 0;
7497
7498 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7499 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7500 return -EINVAL;
7501 }
7502
7503 while (left > 0) {
7504 len = dev->hw_info.ram_max_len;
7505 if (left < (int)dev->hw_info.ram_max_len) {
7506 len = left;
7507 }
7508
7509 ret = ssd_ram_write_4k(dev, buf, len, off, ctrl_idx);
7510 if (ret) {
7511 break;
7512 }
7513
7514 left -= len;
7515 off += len;
7516 buf += len;
7517 }
7518
7519 return ret;
7520 }
7521
7522
7523 /* flash op */
7524 static int ssd_check_flash(struct ssd_device *dev, int flash, int page, int ctrl_idx)
7525 {
7526 int cur_ch = flash % dev->hw_info.max_ch;
7527 int cur_chip = flash /dev->hw_info.max_ch;
7528
7529 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
7530 return -EINVAL;
7531 }
7532
7533 if (cur_ch >= dev->hw_info.nr_ch || cur_chip >= dev->hw_info.nr_chip) {
7534 return -EINVAL;
7535 }
7536
7537 if (page >= (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7538 return -EINVAL;
7539 }
7540 return 0;
7541 }
7542
7543 static int ssd_nand_read_id(struct ssd_device *dev, void *id, int flash, int chip, int ctrl_idx)
7544 {
7545 struct ssd_nand_op_msg *msg;
7546 dma_addr_t buf_dma;
7547 int ret = 0;
7548
7549 if (unlikely(!id))
7550 return -EINVAL;
7551
7552 buf_dma = pci_map_single(dev->pdev, id, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7553 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7554 ret = dma_mapping_error(buf_dma);
7555 #else
7556 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7557 #endif
7558 if (ret) {
7559 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7560 goto out_dma_mapping;
7561 }
7562
7563 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7564 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7565 chip = 0;
7566 }
7567
7568 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7569
7570 msg->fun = SSD_FUNC_NAND_READ_ID;
7571 msg->chip_no = flash;
7572 msg->chip_ce = chip;
7573 msg->ctrl_idx = ctrl_idx;
7574 msg->buf = buf_dma;
7575
7576 ret = ssd_do_request(dev, READ, msg, NULL);
7577 ssd_put_dmsg(msg);
7578
7579 pci_unmap_single(dev->pdev, buf_dma, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7580
7581 out_dma_mapping:
7582 return ret;
7583 }
7584
7585 #if 0
7586 static int ssd_nand_read(struct ssd_device *dev, void *buf,
7587 int flash, int chip, int page, int page_count, int ctrl_idx)
7588 {
7589 struct ssd_nand_op_msg *msg;
7590 dma_addr_t buf_dma;
7591 int length;
7592 int ret = 0;
7593
7594 if (!buf) {
7595 return -EINVAL;
7596 }
7597
7598 if ((page + page_count) > dev->hw_info.block_count*dev->hw_info.page_count) {
7599 return -EINVAL;
7600 }
7601
7602 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7603 if (ret) {
7604 return ret;
7605 }
7606
7607 length = page_count * dev->hw_info.page_size;
7608
7609 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7610 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7611 ret = dma_mapping_error(buf_dma);
7612 #else
7613 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7614 #endif
7615 if (ret) {
7616 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7617 goto out_dma_mapping;
7618 }
7619
7620 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7621 flash = (flash << 1) | chip;
7622 chip = 0;
7623 }
7624
7625 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7626
7627 msg->fun = SSD_FUNC_NAND_READ;
7628 msg->ctrl_idx = ctrl_idx;
7629 msg->chip_no = flash;
7630 msg->chip_ce = chip;
7631 msg->page_no = page;
7632 msg->page_count = page_count;
7633 msg->buf = buf_dma;
7634
7635 ret = ssd_do_request(dev, READ, msg, NULL);
7636 ssd_put_dmsg(msg);
7637
7638 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7639
7640 out_dma_mapping:
7641 return ret;
7642 }
7643 #endif
7644
7645 static int ssd_nand_read_w_oob(struct ssd_device *dev, void *buf,
7646 int flash, int chip, int page, int count, int ctrl_idx)
7647 {
7648 struct ssd_nand_op_msg *msg;
7649 dma_addr_t buf_dma;
7650 int length;
7651 int ret = 0;
7652
7653 if (!buf) {
7654 return -EINVAL;
7655 }
7656
7657 if ((page + count) > (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7658 return -EINVAL;
7659 }
7660
7661 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7662 if (ret) {
7663 return ret;
7664 }
7665
7666 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7667
7668 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7669 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7670 ret = dma_mapping_error(buf_dma);
7671 #else
7672 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7673 #endif
7674 if (ret) {
7675 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7676 goto out_dma_mapping;
7677 }
7678
7679 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7680 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7681 chip = 0;
7682 }
7683
7684 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7685
7686 msg->fun = SSD_FUNC_NAND_READ_WOOB;
7687 msg->ctrl_idx = ctrl_idx;
7688 msg->chip_no = flash;
7689 msg->chip_ce = chip;
7690 msg->page_no = page;
7691 msg->page_count = count;
7692 msg->buf = buf_dma;
7693
7694 ret = ssd_do_request(dev, READ, msg, NULL);
7695 ssd_put_dmsg(msg);
7696
7697 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7698
7699 out_dma_mapping:
7700 return ret;
7701 }
7702
7703 /* write 1 page */
7704 static int ssd_nand_write(struct ssd_device *dev, void *buf,
7705 int flash, int chip, int page, int count, int ctrl_idx)
7706 {
7707 struct ssd_nand_op_msg *msg;
7708 dma_addr_t buf_dma;
7709 int length;
7710 int ret = 0;
7711
7712 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7713 return -EINVAL;
7714 }
7715
7716 if (!buf) {
7717 return -EINVAL;
7718 }
7719
7720 if (count != 1) {
7721 return -EINVAL;
7722 }
7723
7724 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7725 if (ret) {
7726 return ret;
7727 }
7728
7729 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7730
7731 /* write data to ram */
7732 /*ret = ssd_ram_write(dev, buf, length, dev->hw_info.nand_wbuff_base, ctrl_idx);
7733 if (ret) {
7734 return ret;
7735 }*/
7736
7737 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7738 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7739 ret = dma_mapping_error(buf_dma);
7740 #else
7741 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7742 #endif
7743 if (ret) {
7744 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7745 goto out_dma_mapping;
7746 }
7747
7748 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7749 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7750 chip = 0;
7751 }
7752
7753 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7754
7755 msg->fun = SSD_FUNC_NAND_WRITE;
7756 msg->ctrl_idx = ctrl_idx;
7757 msg->chip_no = flash;
7758 msg->chip_ce = chip;
7759
7760 msg->page_no = page;
7761 msg->page_count = count;
7762 msg->buf = buf_dma;
7763
7764 ret = ssd_do_request(dev, WRITE, msg, NULL);
7765 ssd_put_dmsg(msg);
7766
7767 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7768
7769 out_dma_mapping:
7770 return ret;
7771 }
7772
7773 static int ssd_nand_erase(struct ssd_device *dev, int flash, int chip, int page, int ctrl_idx)
7774 {
7775 struct ssd_nand_op_msg *msg;
7776 int ret = 0;
7777
7778 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7779 if (ret) {
7780 return ret;
7781 }
7782
7783 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7784 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7785 chip = 0;
7786 }
7787
7788 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7789
7790 msg->fun = SSD_FUNC_NAND_ERASE;
7791 msg->ctrl_idx = ctrl_idx;
7792 msg->chip_no = flash;
7793 msg->chip_ce = chip;
7794 msg->page_no = page;
7795
7796 ret = ssd_do_request(dev, WRITE, msg, NULL);
7797 ssd_put_dmsg(msg);
7798
7799 return ret;
7800 }
7801
7802 static int ssd_update_bbt(struct ssd_device *dev, int flash, int ctrl_idx)
7803 {
7804 struct ssd_nand_op_msg *msg;
7805 struct ssd_flush_msg *fmsg;
7806 int ret = 0;
7807
7808 ret = ssd_check_flash(dev, flash, 0, ctrl_idx);
7809 if (ret) {
7810 return ret;
7811 }
7812
7813 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7814
7815 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7816 fmsg = (struct ssd_flush_msg *)msg;
7817
7818 fmsg->fun = SSD_FUNC_FLUSH;
7819 fmsg->flag = 0x1;
7820 fmsg->flash = flash;
7821 fmsg->ctrl_idx = ctrl_idx;
7822 } else {
7823 msg->fun = SSD_FUNC_FLUSH;
7824 msg->flag = 0x1;
7825 msg->chip_no = flash;
7826 msg->ctrl_idx = ctrl_idx;
7827 }
7828
7829 ret = ssd_do_request(dev, WRITE, msg, NULL);
7830 ssd_put_dmsg(msg);
7831
7832 return ret;
7833 }
7834
7835 /* flash controller init state */
7836 static int __ssd_check_init_state(struct ssd_device *dev)
7837 {
7838 uint32_t *init_state = NULL;
7839 int reg_base, reg_sz;
7840 int max_wait = SSD_INIT_MAX_WAIT;
7841 int init_wait = 0;
7842 int i, j, k;
7843 int ch_start = 0;
7844
7845 /*
7846 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7847 ssd_reg32_write(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8, test_data);
7848 read_data = ssd_reg32_read(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8);
7849 if (read_data == ~test_data) {
7850 //dev->hw_info.nr_ctrl++;
7851 dev->hw_info.nr_ctrl_map |= 1<<i;
7852 }
7853 }
7854 */
7855
7856 /*
7857 read_data = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
7858 j=0;
7859 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7860 if (((read_data>>i) & 0x1) == 0) {
7861 j++;
7862 }
7863 }
7864
7865 if (dev->hw_info.nr_ctrl != j) {
7866 printk(KERN_WARNING "%s: nr_ctrl mismatch: %d %d\n", dev->name, dev->hw_info.nr_ctrl, j);
7867 return -1;
7868 }
7869 */
7870
7871 /*
7872 init_state = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
7873 for (j=1; j<dev->hw_info.nr_ctrl;j++) {
7874 if (init_state != ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0 + j*8)) {
7875 printk(KERN_WARNING "SSD_FLASH_INFO_REG[%d], not match\n", j);
7876 return -1;
7877 }
7878 }
7879 */
7880
7881 /* init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0);
7882 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7883 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + j*16)) {
7884 printk(KERN_WARNING "SSD_CHIP_INFO_REG Lo [%d], not match\n", j);
7885 return -1;
7886 }
7887 }
7888
7889 init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8);
7890 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7891 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8 + j*16)) {
7892 printk(KERN_WARNING "SSD_CHIP_INFO_REG Hi [%d], not match\n", j);
7893 return -1;
7894 }
7895 }
7896 */
7897
7898 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7899 max_wait = SSD_INIT_MAX_WAIT_V3_2;
7900 }
7901
7902 reg_base = dev->protocol_info.init_state_reg;
7903 reg_sz = dev->protocol_info.init_state_reg_sz;
7904
7905 init_state = (uint32_t *)kmalloc(reg_sz, GFP_KERNEL);
7906 if (!init_state) {
7907 return -ENOMEM;
7908 }
7909
7910 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7911 check_init:
7912 for (j=0, k=0; j<reg_sz; j+=sizeof(uint32_t), k++) {
7913 init_state[k] = ssd_reg32_read(dev->ctrlp + reg_base + j);
7914 }
7915
7916 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7917 /* just check the last bit, no need to check all channel */
7918 ch_start = dev->hw_info.max_ch - 1;
7919 } else {
7920 ch_start = 0;
7921 }
7922
7923 for (j=0; j<dev->hw_info.nr_chip; j++) {
7924 for (k=ch_start; k<dev->hw_info.max_ch; k++) {
7925 if (test_bit((j*dev->hw_info.max_ch + k), (void *)init_state)) {
7926 continue;
7927 }
7928
7929 init_wait++;
7930 if (init_wait <= max_wait) {
7931 msleep(SSD_INIT_WAIT);
7932 goto check_init;
7933 } else {
7934 if (k < dev->hw_info.nr_ch) {
7935 hio_warn("%s: controller %d chip %d ch %d init failed\n",
7936 dev->name, i, j, k);
7937 } else {
7938 hio_warn("%s: controller %d chip %d init failed\n",
7939 dev->name, i, j);
7940 }
7941
7942 kfree(init_state);
7943 return -1;
7944 }
7945 }
7946 }
7947 reg_base += reg_sz;
7948 }
7949 //printk(KERN_WARNING "%s: init wait %d\n", dev->name, init_wait);
7950
7951 kfree(init_state);
7952 return 0;
7953 }
7954
7955 static int ssd_check_init_state(struct ssd_device *dev)
7956 {
7957 if (mode != SSD_DRV_MODE_STANDARD) {
7958 return 0;
7959 }
7960
7961 return __ssd_check_init_state(dev);
7962 }
7963
7964 static void ssd_reset_resp_ptr(struct ssd_device *dev);
7965
7966 /* reset flash controller etc */
7967 static int __ssd_reset(struct ssd_device *dev, int type)
7968 {
7969 struct timeval tv;
7970 if (type < SSD_RST_NOINIT || type > SSD_RST_FULL) {
7971 return -EINVAL;
7972 }
7973
7974 mutex_lock(&dev->fw_mutex);
7975
7976 if (type == SSD_RST_NOINIT) { //no init
7977 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET_NOINIT);
7978 } else if (type == SSD_RST_NORMAL) { //reset & init
7979 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET);
7980 } else { // full reset
7981 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7982 mutex_unlock(&dev->fw_mutex);
7983 return -EINVAL;
7984 }
7985
7986 ssd_reg32_write(dev->ctrlp + SSD_FULL_RESET_REG, SSD_RESET_FULL);
7987
7988 /* ?? */
7989 ssd_reset_resp_ptr(dev);
7990 }
7991
7992 #ifdef SSD_OT_PROTECT
7993 dev->ot_delay = 0;
7994 #endif
7995
7996 msleep(1000);
7997
7998 /* xx */
7999 ssd_set_flush_timeout(dev, dev->wmode);
8000
8001 mutex_unlock(&dev->fw_mutex);
8002 ssd_gen_swlog(dev, SSD_LOG_RESET, (uint32_t)type);
8003 do_gettimeofday(&tv);
8004 dev->reset_time = tv.tv_sec;
8005
8006 return __ssd_check_init_state(dev);
8007 }
8008
8009 static int ssd_save_md(struct ssd_device *dev)
8010 {
8011 struct ssd_nand_op_msg *msg;
8012 int ret = 0;
8013
8014 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
8015 return 0;
8016
8017 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
8018 return 0;
8019 }
8020
8021 if (!dev->save_md) {
8022 return 0;
8023 }
8024
8025 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
8026
8027 msg->fun = SSD_FUNC_FLUSH;
8028 msg->flag = 0x2;
8029 msg->ctrl_idx = 0;
8030 msg->chip_no = 0;
8031
8032 ret = ssd_do_request(dev, WRITE, msg, NULL);
8033 ssd_put_dmsg(msg);
8034
8035 return ret;
8036 }
8037
8038 static int ssd_barrier_save_md(struct ssd_device *dev)
8039 {
8040 struct ssd_nand_op_msg *msg;
8041 int ret = 0;
8042
8043 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
8044 return 0;
8045
8046 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
8047 return 0;
8048 }
8049
8050 if (!dev->save_md) {
8051 return 0;
8052 }
8053
8054 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
8055
8056 msg->fun = SSD_FUNC_FLUSH;
8057 msg->flag = 0x2;
8058 msg->ctrl_idx = 0;
8059 msg->chip_no = 0;
8060
8061 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
8062 ssd_put_dmsg(msg);
8063
8064 return ret;
8065 }
8066
8067 static int ssd_flush(struct ssd_device *dev)
8068 {
8069 struct ssd_nand_op_msg *msg;
8070 struct ssd_flush_msg *fmsg;
8071 int ret = 0;
8072
8073 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
8074 return 0;
8075
8076 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
8077
8078 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
8079 fmsg = (struct ssd_flush_msg *)msg;
8080
8081 fmsg->fun = SSD_FUNC_FLUSH;
8082 fmsg->flag = 0;
8083 fmsg->ctrl_idx = 0;
8084 fmsg->flash = 0;
8085 } else {
8086 msg->fun = SSD_FUNC_FLUSH;
8087 msg->flag = 0;
8088 msg->ctrl_idx = 0;
8089 msg->chip_no = 0;
8090 }
8091
8092 ret = ssd_do_request(dev, WRITE, msg, NULL);
8093 ssd_put_dmsg(msg);
8094
8095 return ret;
8096 }
8097
8098 static int ssd_barrier_flush(struct ssd_device *dev)
8099 {
8100 struct ssd_nand_op_msg *msg;
8101 struct ssd_flush_msg *fmsg;
8102 int ret = 0;
8103
8104 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
8105 return 0;
8106
8107 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
8108
8109 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
8110 fmsg = (struct ssd_flush_msg *)msg;
8111
8112 fmsg->fun = SSD_FUNC_FLUSH;
8113 fmsg->flag = 0;
8114 fmsg->ctrl_idx = 0;
8115 fmsg->flash = 0;
8116 } else {
8117 msg->fun = SSD_FUNC_FLUSH;
8118 msg->flag = 0;
8119 msg->ctrl_idx = 0;
8120 msg->chip_no = 0;
8121 }
8122
8123 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
8124 ssd_put_dmsg(msg);
8125
8126 return ret;
8127 }
8128
8129 #define SSD_WMODE_BUFFER_TIMEOUT 0x00c82710
8130 #define SSD_WMODE_BUFFER_EX_TIMEOUT 0x000500c8
8131 #define SSD_WMODE_FUA_TIMEOUT 0x000503E8
8132 static void ssd_set_flush_timeout(struct ssd_device *dev, int m)
8133 {
8134 uint32_t to;
8135 uint32_t val = 0;
8136
8137 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
8138 return;
8139 }
8140
8141 switch(m) {
8142 case SSD_WMODE_BUFFER:
8143 to = SSD_WMODE_BUFFER_TIMEOUT;
8144 break;
8145 case SSD_WMODE_BUFFER_EX:
8146 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_1) {
8147 to = SSD_WMODE_BUFFER_EX_TIMEOUT;
8148 } else {
8149 to = SSD_WMODE_BUFFER_TIMEOUT;
8150 }
8151 break;
8152 case SSD_WMODE_FUA:
8153 to = SSD_WMODE_FUA_TIMEOUT;
8154 break;
8155 default:
8156 return;
8157 }
8158
8159 val = (((uint32_t)((uint32_t)m & 0x3) << 28) | to);
8160
8161 ssd_reg32_write(dev->ctrlp + SSD_FLUSH_TIMEOUT_REG, val);
8162 }
8163
8164 static int ssd_do_switch_wmode(struct ssd_device *dev, int m)
8165 {
8166 int ret = 0;
8167
8168 ret = ssd_barrier_start(dev);
8169 if (ret) {
8170 goto out;
8171 }
8172
8173 ret = ssd_barrier_flush(dev);
8174 if (ret) {
8175 goto out_barrier_end;
8176 }
8177
8178 /* set contoller flush timeout */
8179 ssd_set_flush_timeout(dev, m);
8180
8181 dev->wmode = m;
8182 mb();
8183
8184 out_barrier_end:
8185 ssd_barrier_end(dev);
8186 out:
8187 return ret;
8188 }
8189
8190 static int ssd_switch_wmode(struct ssd_device *dev, int m)
8191 {
8192 int default_wmode;
8193 int next_wmode;
8194 int ret = 0;
8195
8196 if (!test_bit(SSD_ONLINE, &dev->state)) {
8197 return -ENODEV;
8198 }
8199
8200 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8201 default_wmode = SSD_WMODE_BUFFER;
8202 } else {
8203 default_wmode = SSD_WMODE_BUFFER_EX;
8204 }
8205
8206 if (SSD_WMODE_AUTO == m) {
8207 /* battery fault ? */
8208 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
8209 next_wmode = SSD_WMODE_FUA;
8210 } else {
8211 next_wmode = default_wmode;
8212 }
8213 } else if (SSD_WMODE_DEFAULT == m) {
8214 next_wmode = default_wmode;
8215 } else {
8216 next_wmode = m;
8217 }
8218
8219 if (next_wmode != dev->wmode) {
8220 hio_warn("%s: switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
8221 ret = ssd_do_switch_wmode(dev, next_wmode);
8222 if (ret) {
8223 hio_err("%s: can not switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
8224 }
8225 }
8226
8227 return ret;
8228 }
8229
8230 static int ssd_init_wmode(struct ssd_device *dev)
8231 {
8232 int default_wmode;
8233 int ret = 0;
8234
8235 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8236 default_wmode = SSD_WMODE_BUFFER;
8237 } else {
8238 default_wmode = SSD_WMODE_BUFFER_EX;
8239 }
8240
8241 /* dummy mode */
8242 if (SSD_WMODE_AUTO == dev->user_wmode) {
8243 /* battery fault ? */
8244 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
8245 dev->wmode = SSD_WMODE_FUA;
8246 } else {
8247 dev->wmode = default_wmode;
8248 }
8249 } else if (SSD_WMODE_DEFAULT == dev->user_wmode) {
8250 dev->wmode = default_wmode;
8251 } else {
8252 dev->wmode = dev->user_wmode;
8253 }
8254 ssd_set_flush_timeout(dev, dev->wmode);
8255
8256 return ret;
8257 }
8258
8259 static int __ssd_set_wmode(struct ssd_device *dev, int m)
8260 {
8261 int ret = 0;
8262
8263 /* not support old fw*/
8264 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
8265 ret = -EOPNOTSUPP;
8266 goto out;
8267 }
8268
8269 if (m < SSD_WMODE_BUFFER || m > SSD_WMODE_DEFAULT) {
8270 ret = -EINVAL;
8271 goto out;
8272 }
8273
8274 ssd_gen_swlog(dev, SSD_LOG_SET_WMODE, m);
8275
8276 dev->user_wmode = m;
8277
8278 ret = ssd_switch_wmode(dev, dev->user_wmode);
8279 if (ret) {
8280 goto out;
8281 }
8282
8283 out:
8284 return ret;
8285 }
8286
8287 int ssd_set_wmode(struct block_device *bdev, int m)
8288 {
8289 struct ssd_device *dev;
8290
8291 if (!bdev || !(bdev->bd_disk)) {
8292 return -EINVAL;
8293 }
8294
8295 dev = bdev->bd_disk->private_data;
8296
8297 return __ssd_set_wmode(dev, m);
8298 }
8299
8300 static int ssd_do_reset(struct ssd_device *dev)
8301 {
8302 int ret = 0;
8303
8304 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8305 return 0;
8306 }
8307
8308 ssd_stop_workq(dev);
8309
8310 ret = ssd_barrier_start(dev);
8311 if (ret) {
8312 goto out;
8313 }
8314
8315 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8316 /* old reset */
8317 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8318 } else {
8319 /* full reset */
8320 //ret = __ssd_reset(dev, SSD_RST_FULL);
8321 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8322 }
8323 if (ret) {
8324 goto out_barrier_end;
8325 }
8326
8327 out_barrier_end:
8328 ssd_barrier_end(dev);
8329 out:
8330 ssd_start_workq(dev);
8331 test_and_clear_bit(SSD_RESETING, &dev->state);
8332 return ret;
8333 }
8334
8335 static int ssd_full_reset(struct ssd_device *dev)
8336 {
8337 int ret = 0;
8338
8339 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8340 return 0;
8341 }
8342
8343 ssd_stop_workq(dev);
8344
8345 ret = ssd_barrier_start(dev);
8346 if (ret) {
8347 goto out;
8348 }
8349
8350 ret = ssd_barrier_flush(dev);
8351 if (ret) {
8352 goto out_barrier_end;
8353 }
8354
8355 ret = ssd_barrier_save_md(dev);
8356 if (ret) {
8357 goto out_barrier_end;
8358 }
8359
8360 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8361 /* old reset */
8362 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8363 } else {
8364 /* full reset */
8365 //ret = __ssd_reset(dev, SSD_RST_FULL);
8366 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8367 }
8368 if (ret) {
8369 goto out_barrier_end;
8370 }
8371
8372 out_barrier_end:
8373 ssd_barrier_end(dev);
8374 out:
8375 ssd_start_workq(dev);
8376 test_and_clear_bit(SSD_RESETING, &dev->state);
8377 return ret;
8378 }
8379
8380 int ssd_reset(struct block_device *bdev)
8381 {
8382 int ret;
8383 struct ssd_device *dev;
8384
8385 if (!bdev || !(bdev->bd_disk)) {
8386 return -EINVAL;
8387 }
8388
8389 dev = bdev->bd_disk->private_data;
8390
8391 ret = ssd_full_reset(dev);
8392 if (!ret) {
8393 if (!dev->has_non_0x98_reg_access) {
8394 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, 0);
8395 }
8396 }
8397
8398 return ret ;
8399 }
8400
8401 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
8402 static int ssd_issue_flush_fn(struct request_queue *q, struct gendisk *disk,
8403 sector_t *error_sector)
8404 {
8405 struct ssd_device *dev = q->queuedata;
8406
8407 return ssd_flush(dev);
8408 }
8409 #endif
8410
8411 void ssd_submit_pbio(struct request_queue *q, struct bio *bio)
8412 {
8413 struct ssd_device *dev = q->queuedata;
8414 #ifdef SSD_QUEUE_PBIO
8415 int ret = -EBUSY;
8416 #endif
8417
8418 if (!test_bit(SSD_ONLINE, &dev->state)) {
8419 ssd_bio_endio(bio, -ENODEV);
8420 goto out;
8421 }
8422
8423 #ifdef SSD_DEBUG_ERR
8424 if (atomic_read(&dev->tocnt)) {
8425 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8426 ssd_bio_endio(bio, -EIO);
8427 goto out;
8428 }
8429 #endif
8430
8431 if (unlikely(ssd_bio_has_barrier_or_fua(bio))) {
8432 ssd_bio_endio(bio, -EOPNOTSUPP);
8433 goto out;
8434 }
8435
8436 if (unlikely(dev->readonly && bio_data_dir(bio) == WRITE)) {
8437 ssd_bio_endio(bio, -EROFS);
8438 goto out;
8439 }
8440
8441 #ifdef SSD_QUEUE_PBIO
8442 if (0 == atomic_read(&dev->in_sendq)) {
8443 ret = __ssd_submit_pbio(dev, bio, 0);
8444 }
8445
8446 if (ret) {
8447 (void)test_and_set_bit(BIO_SSD_PBIO, &bio->bi_flags);
8448 ssd_queue_bio(dev, bio);
8449 }
8450 #else
8451 __ssd_submit_pbio(dev, bio, 1);
8452 #endif
8453
8454 out:
8455 return;
8456 }
8457
8458 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0))
8459 static blk_qc_t ssd_make_request(struct request_queue *q, struct bio *bio)
8460 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
8461 static void ssd_make_request(struct request_queue *q, struct bio *bio)
8462 #else
8463 static int ssd_make_request(struct request_queue *q, struct bio *bio)
8464 #endif
8465 {
8466 struct ssd_device *dev = q->queuedata;
8467 int ret = -EBUSY;
8468
8469 if (!test_bit(SSD_ONLINE, &dev->state)) {
8470 ssd_bio_endio(bio, -ENODEV);
8471 goto out;
8472 }
8473
8474 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,13,0))
8475 blk_queue_split(q, &bio);
8476 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4,3,0))
8477 blk_queue_split(q, &bio, q->bio_split);
8478 #endif
8479
8480 #ifdef SSD_DEBUG_ERR
8481 if (atomic_read(&dev->tocnt)) {
8482 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8483 ssd_bio_endio(bio, -EIO);
8484 goto out;
8485 }
8486 #endif
8487
8488 if (unlikely(ssd_bio_has_barrier_or_fua(bio))) {
8489 ssd_bio_endio(bio, -EOPNOTSUPP);
8490 goto out;
8491 }
8492
8493 /* writeback_cache_control.txt: REQ_FLUSH requests without data can be completed successfully without doing any work */
8494 if (unlikely(ssd_bio_has_flush(bio) && !bio_sectors(bio))) {
8495 ssd_bio_endio(bio, 0);
8496 goto out;
8497 }
8498
8499 if (0 == atomic_read(&dev->in_sendq)) {
8500 ret = ssd_submit_bio(dev, bio, 0);
8501 }
8502
8503 if (ret) {
8504 ssd_queue_bio(dev, bio);
8505 }
8506
8507 out:
8508 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0))
8509 return BLK_QC_T_NONE;
8510 #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
8511 return;
8512 #else
8513 return 0;
8514 #endif
8515 }
8516
8517 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
8518 static int ssd_block_getgeo(struct block_device *bdev, struct hd_geometry *geo)
8519 {
8520 struct ssd_device *dev;
8521
8522 if (!bdev) {
8523 return -EINVAL;
8524 }
8525
8526 dev = bdev->bd_disk->private_data;
8527 if (!dev) {
8528 return -EINVAL;
8529 }
8530
8531 geo->heads = 4;
8532 geo->sectors = 16;
8533 geo->cylinders = (dev->hw_info.size & ~0x3f) >> 6;
8534 return 0;
8535 }
8536 #endif
8537
8538 static int ssd_init_queue(struct ssd_device *dev);
8539 static void ssd_cleanup_queue(struct ssd_device *dev);
8540 static void ssd_cleanup_blkdev(struct ssd_device *dev);
8541 static int ssd_init_blkdev(struct ssd_device *dev);
8542 static int ssd_ioctl_common(struct ssd_device *dev, unsigned int cmd, unsigned long arg)
8543 {
8544 void __user *argp = (void __user *)arg;
8545 void __user *buf = NULL;
8546 void *kbuf = NULL;
8547 int ret = 0;
8548
8549 switch (cmd) {
8550 case SSD_CMD_GET_PROTOCOL_INFO:
8551 if (copy_to_user(argp, &dev->protocol_info, sizeof(struct ssd_protocol_info))) {
8552 hio_warn("%s: copy_to_user: failed\n", dev->name);
8553 ret = -EFAULT;
8554 break;
8555 }
8556 break;
8557
8558 case SSD_CMD_GET_HW_INFO:
8559 if (copy_to_user(argp, &dev->hw_info, sizeof(struct ssd_hw_info))) {
8560 hio_warn("%s: copy_to_user: failed\n", dev->name);
8561 ret = -EFAULT;
8562 break;
8563 }
8564 break;
8565
8566 case SSD_CMD_GET_ROM_INFO:
8567 if (copy_to_user(argp, &dev->rom_info, sizeof(struct ssd_rom_info))) {
8568 hio_warn("%s: copy_to_user: failed\n", dev->name);
8569 ret = -EFAULT;
8570 break;
8571 }
8572 break;
8573
8574 case SSD_CMD_GET_SMART: {
8575 struct ssd_smart smart;
8576 int i;
8577
8578 memcpy(&smart, &dev->smart, sizeof(struct ssd_smart));
8579
8580 mutex_lock(&dev->gd_mutex);
8581 ssd_update_smart(dev, &smart);
8582 mutex_unlock(&dev->gd_mutex);
8583
8584 /* combine the volatile log info */
8585 if (dev->log_info.nr_log) {
8586 for (i=0; i<SSD_LOG_NR_LEVEL; i++) {
8587 smart.log_info.stat[i] += dev->log_info.stat[i];
8588 }
8589 }
8590
8591 if (copy_to_user(argp, &smart, sizeof(struct ssd_smart))) {
8592 hio_warn("%s: copy_to_user: failed\n", dev->name);
8593 ret = -EFAULT;
8594 break;
8595 }
8596
8597 break;
8598 }
8599
8600 case SSD_CMD_GET_IDX:
8601 if (copy_to_user(argp, &dev->idx, sizeof(int))) {
8602 hio_warn("%s: copy_to_user: failed\n", dev->name);
8603 ret = -EFAULT;
8604 break;
8605 }
8606 break;
8607
8608 case SSD_CMD_GET_AMOUNT: {
8609 int nr_ssd = atomic_read(&ssd_nr);
8610 if (copy_to_user(argp, &nr_ssd, sizeof(int))) {
8611 hio_warn("%s: copy_to_user: failed\n", dev->name);
8612 ret = -EFAULT;
8613 break;
8614 }
8615 break;
8616 }
8617
8618 case SSD_CMD_GET_TO_INFO: {
8619 int tocnt = atomic_read(&dev->tocnt);
8620
8621 if (copy_to_user(argp, &tocnt, sizeof(int))) {
8622 hio_warn("%s: copy_to_user: failed\n", dev->name);
8623 ret = -EFAULT;
8624 break;
8625 }
8626 break;
8627 }
8628
8629 case SSD_CMD_GET_DRV_VER: {
8630 char ver[] = DRIVER_VERSION;
8631 int len = sizeof(ver);
8632
8633 if (len > (DRIVER_VERSION_LEN - 1)) {
8634 len = (DRIVER_VERSION_LEN - 1);
8635 }
8636 if (copy_to_user(argp, ver, len)) {
8637 hio_warn("%s: copy_to_user: failed\n", dev->name);
8638 ret = -EFAULT;
8639 break;
8640 }
8641 break;
8642 }
8643
8644 case SSD_CMD_GET_BBACC_INFO: {
8645 struct ssd_acc_info acc;
8646
8647 mutex_lock(&dev->fw_mutex);
8648 ret = ssd_bb_acc(dev, &acc);
8649 mutex_unlock(&dev->fw_mutex);
8650 if (ret) {
8651 break;
8652 }
8653
8654 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8655 hio_warn("%s: copy_to_user: failed\n", dev->name);
8656 ret = -EFAULT;
8657 break;
8658 }
8659 break;
8660 }
8661
8662 case SSD_CMD_GET_ECACC_INFO: {
8663 struct ssd_acc_info acc;
8664
8665 mutex_lock(&dev->fw_mutex);
8666 ret = ssd_ec_acc(dev, &acc);
8667 mutex_unlock(&dev->fw_mutex);
8668 if (ret) {
8669 break;
8670 }
8671
8672 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8673 hio_warn("%s: copy_to_user: failed\n", dev->name);
8674 ret = -EFAULT;
8675 break;
8676 }
8677 break;
8678 }
8679
8680 case SSD_CMD_GET_HW_INFO_EXT:
8681 if (copy_to_user(argp, &dev->hw_info_ext, sizeof(struct ssd_hw_info_extend))) {
8682 hio_warn("%s: copy_to_user: failed\n", dev->name);
8683 ret = -EFAULT;
8684 break;
8685 }
8686 break;
8687
8688 case SSD_CMD_REG_READ: {
8689 struct ssd_reg_op_info reg_info;
8690
8691 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8692 hio_warn("%s: copy_from_user: failed\n", dev->name);
8693 ret = -EFAULT;
8694 break;
8695 }
8696
8697 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8698 ret = -EINVAL;
8699 break;
8700 }
8701
8702 reg_info.value = ssd_reg32_read(dev->ctrlp + reg_info.offset);
8703 if (copy_to_user(argp, &reg_info, sizeof(struct ssd_reg_op_info))) {
8704 hio_warn("%s: copy_to_user: failed\n", dev->name);
8705 ret = -EFAULT;
8706 break;
8707 }
8708
8709 break;
8710 }
8711
8712 case SSD_CMD_REG_WRITE: {
8713 struct ssd_reg_op_info reg_info;
8714
8715 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8716 hio_warn("%s: copy_from_user: failed\n", dev->name);
8717 ret = -EFAULT;
8718 break;
8719 }
8720
8721 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8722 ret = -EINVAL;
8723 break;
8724 }
8725
8726 ssd_reg32_write(dev->ctrlp + reg_info.offset, reg_info.value);
8727
8728 break;
8729 }
8730
8731 case SSD_CMD_SPI_READ: {
8732 struct ssd_spi_op_info spi_info;
8733 uint32_t off, size;
8734
8735 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8736 hio_warn("%s: copy_from_user: failed\n", dev->name);
8737 ret = -EFAULT;
8738 break;
8739 }
8740
8741 off = spi_info.off;
8742 size = spi_info.len;
8743 buf = spi_info.buf;
8744
8745 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8746 ret = -EINVAL;
8747 break;
8748 }
8749
8750 kbuf = kmalloc(size, GFP_KERNEL);
8751 if (!kbuf) {
8752 ret = -ENOMEM;
8753 break;
8754 }
8755
8756 ret = ssd_spi_page_read(dev, kbuf, off, size);
8757 if (ret) {
8758 kfree(kbuf);
8759 break;
8760 }
8761
8762 if (copy_to_user(buf, kbuf, size)) {
8763 hio_warn("%s: copy_to_user: failed\n", dev->name);
8764 kfree(kbuf);
8765 ret = -EFAULT;
8766 break;
8767 }
8768
8769 kfree(kbuf);
8770
8771 break;
8772 }
8773
8774 case SSD_CMD_SPI_WRITE: {
8775 struct ssd_spi_op_info spi_info;
8776 uint32_t off, size;
8777
8778 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8779 hio_warn("%s: copy_from_user: failed\n", dev->name);
8780 ret = -EFAULT;
8781 break;
8782 }
8783
8784 off = spi_info.off;
8785 size = spi_info.len;
8786 buf = spi_info.buf;
8787
8788 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8789 ret = -EINVAL;
8790 break;
8791 }
8792
8793 kbuf = kmalloc(size, GFP_KERNEL);
8794 if (!kbuf) {
8795 ret = -ENOMEM;
8796 break;
8797 }
8798
8799 if (copy_from_user(kbuf, buf, size)) {
8800 hio_warn("%s: copy_from_user: failed\n", dev->name);
8801 kfree(kbuf);
8802 ret = -EFAULT;
8803 break;
8804 }
8805
8806 ret = ssd_spi_page_write(dev, kbuf, off, size);
8807 if (ret) {
8808 kfree(kbuf);
8809 break;
8810 }
8811
8812 kfree(kbuf);
8813
8814 break;
8815 }
8816
8817 case SSD_CMD_SPI_ERASE: {
8818 struct ssd_spi_op_info spi_info;
8819 uint32_t off;
8820
8821 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8822 hio_warn("%s: copy_from_user: failed\n", dev->name);
8823 ret = -EFAULT;
8824 break;
8825 }
8826
8827 off = spi_info.off;
8828
8829 if ((off + dev->rom_info.block_size) > dev->rom_info.size) {
8830 ret = -EINVAL;
8831 break;
8832 }
8833
8834 ret = ssd_spi_block_erase(dev, off);
8835 if (ret) {
8836 break;
8837 }
8838
8839 break;
8840 }
8841
8842 case SSD_CMD_I2C_READ: {
8843 struct ssd_i2c_op_info i2c_info;
8844 uint8_t saddr;
8845 uint8_t rsize;
8846
8847 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8848 hio_warn("%s: copy_from_user: failed\n", dev->name);
8849 ret = -EFAULT;
8850 break;
8851 }
8852
8853 saddr = i2c_info.saddr;
8854 rsize = i2c_info.rsize;
8855 buf = i2c_info.rbuf;
8856
8857 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8858 ret = -EINVAL;
8859 break;
8860 }
8861
8862 kbuf = kmalloc(rsize, GFP_KERNEL);
8863 if (!kbuf) {
8864 ret = -ENOMEM;
8865 break;
8866 }
8867
8868 ret = ssd_i2c_read(dev, saddr, rsize, kbuf);
8869 if (ret) {
8870 kfree(kbuf);
8871 break;
8872 }
8873
8874 if (copy_to_user(buf, kbuf, rsize)) {
8875 hio_warn("%s: copy_to_user: failed\n", dev->name);
8876 kfree(kbuf);
8877 ret = -EFAULT;
8878 break;
8879 }
8880
8881 kfree(kbuf);
8882
8883 break;
8884 }
8885
8886 case SSD_CMD_I2C_WRITE: {
8887 struct ssd_i2c_op_info i2c_info;
8888 uint8_t saddr;
8889 uint8_t wsize;
8890
8891 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8892 hio_warn("%s: copy_from_user: failed\n", dev->name);
8893 ret = -EFAULT;
8894 break;
8895 }
8896
8897 saddr = i2c_info.saddr;
8898 wsize = i2c_info.wsize;
8899 buf = i2c_info.wbuf;
8900
8901 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8902 ret = -EINVAL;
8903 break;
8904 }
8905
8906 kbuf = kmalloc(wsize, GFP_KERNEL);
8907 if (!kbuf) {
8908 ret = -ENOMEM;
8909 break;
8910 }
8911
8912 if (copy_from_user(kbuf, buf, wsize)) {
8913 hio_warn("%s: copy_from_user: failed\n", dev->name);
8914 kfree(kbuf);
8915 ret = -EFAULT;
8916 break;
8917 }
8918
8919 ret = ssd_i2c_write(dev, saddr, wsize, kbuf);
8920 if (ret) {
8921 kfree(kbuf);
8922 break;
8923 }
8924
8925 kfree(kbuf);
8926
8927 break;
8928 }
8929
8930 case SSD_CMD_I2C_WRITE_READ: {
8931 struct ssd_i2c_op_info i2c_info;
8932 uint8_t saddr;
8933 uint8_t wsize;
8934 uint8_t rsize;
8935 uint8_t size;
8936
8937 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8938 hio_warn("%s: copy_from_user: failed\n", dev->name);
8939 ret = -EFAULT;
8940 break;
8941 }
8942
8943 saddr = i2c_info.saddr;
8944 wsize = i2c_info.wsize;
8945 rsize = i2c_info.rsize;
8946 buf = i2c_info.wbuf;
8947
8948 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8949 ret = -EINVAL;
8950 break;
8951 }
8952
8953 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8954 ret = -EINVAL;
8955 break;
8956 }
8957
8958 size = wsize + rsize;
8959
8960 kbuf = kmalloc(size, GFP_KERNEL);
8961 if (!kbuf) {
8962 ret = -ENOMEM;
8963 break;
8964 }
8965
8966 if (copy_from_user((kbuf + rsize), buf, wsize)) {
8967 hio_warn("%s: copy_from_user: failed\n", dev->name);
8968 kfree(kbuf);
8969 ret = -EFAULT;
8970 break;
8971 }
8972
8973 buf = i2c_info.rbuf;
8974
8975 ret = ssd_i2c_write_read(dev, saddr, wsize, (kbuf + rsize), rsize, kbuf);
8976 if (ret) {
8977 kfree(kbuf);
8978 break;
8979 }
8980
8981 if (copy_to_user(buf, kbuf, rsize)) {
8982 hio_warn("%s: copy_to_user: failed\n", dev->name);
8983 kfree(kbuf);
8984 ret = -EFAULT;
8985 break;
8986 }
8987
8988 kfree(kbuf);
8989
8990 break;
8991 }
8992
8993 case SSD_CMD_SMBUS_SEND_BYTE: {
8994 struct ssd_smbus_op_info smbus_info;
8995 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8996 uint8_t saddr;
8997 uint8_t size;
8998
8999 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9000 hio_warn("%s: copy_from_user: failed\n", dev->name);
9001 ret = -EFAULT;
9002 break;
9003 }
9004
9005 saddr = smbus_info.saddr;
9006 buf = smbus_info.buf;
9007 size = 1;
9008
9009 if (copy_from_user(smb_data, buf, size)) {
9010 hio_warn("%s: copy_from_user: failed\n", dev->name);
9011 ret = -EFAULT;
9012 break;
9013 }
9014
9015 ret = ssd_smbus_send_byte(dev, saddr, smb_data);
9016 if (ret) {
9017 break;
9018 }
9019
9020 break;
9021 }
9022
9023 case SSD_CMD_SMBUS_RECEIVE_BYTE: {
9024 struct ssd_smbus_op_info smbus_info;
9025 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9026 uint8_t saddr;
9027 uint8_t size;
9028
9029 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9030 hio_warn("%s: copy_from_user: failed\n", dev->name);
9031 ret = -EFAULT;
9032 break;
9033 }
9034
9035 saddr = smbus_info.saddr;
9036 buf = smbus_info.buf;
9037 size = 1;
9038
9039 ret = ssd_smbus_receive_byte(dev, saddr, smb_data);
9040 if (ret) {
9041 break;
9042 }
9043
9044 if (copy_to_user(buf, smb_data, size)) {
9045 hio_warn("%s: copy_to_user: failed\n", dev->name);
9046 ret = -EFAULT;
9047 break;
9048 }
9049
9050 break;
9051 }
9052
9053 case SSD_CMD_SMBUS_WRITE_BYTE: {
9054 struct ssd_smbus_op_info smbus_info;
9055 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9056 uint8_t saddr;
9057 uint8_t command;
9058 uint8_t size;
9059
9060 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9061 hio_warn("%s: copy_from_user: failed\n", dev->name);
9062 ret = -EFAULT;
9063 break;
9064 }
9065
9066 saddr = smbus_info.saddr;
9067 command = smbus_info.cmd;
9068 buf = smbus_info.buf;
9069 size = 1;
9070
9071 if (copy_from_user(smb_data, buf, size)) {
9072 hio_warn("%s: copy_from_user: failed\n", dev->name);
9073 ret = -EFAULT;
9074 break;
9075 }
9076
9077 ret = ssd_smbus_write_byte(dev, saddr, command, smb_data);
9078 if (ret) {
9079 break;
9080 }
9081
9082 break;
9083 }
9084
9085 case SSD_CMD_SMBUS_READ_BYTE: {
9086 struct ssd_smbus_op_info smbus_info;
9087 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9088 uint8_t saddr;
9089 uint8_t command;
9090 uint8_t size;
9091
9092 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9093 hio_warn("%s: copy_from_user: failed\n", dev->name);
9094 ret = -EFAULT;
9095 break;
9096 }
9097
9098 saddr = smbus_info.saddr;
9099 command = smbus_info.cmd;
9100 buf = smbus_info.buf;
9101 size = 1;
9102
9103 ret = ssd_smbus_read_byte(dev, saddr, command, smb_data);
9104 if (ret) {
9105 break;
9106 }
9107
9108 if (copy_to_user(buf, smb_data, size)) {
9109 hio_warn("%s: copy_to_user: failed\n", dev->name);
9110 ret = -EFAULT;
9111 break;
9112 }
9113
9114 break;
9115 }
9116
9117 case SSD_CMD_SMBUS_WRITE_WORD: {
9118 struct ssd_smbus_op_info smbus_info;
9119 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9120 uint8_t saddr;
9121 uint8_t command;
9122 uint8_t size;
9123
9124 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9125 hio_warn("%s: copy_from_user: failed\n", dev->name);
9126 ret = -EFAULT;
9127 break;
9128 }
9129
9130 saddr = smbus_info.saddr;
9131 command = smbus_info.cmd;
9132 buf = smbus_info.buf;
9133 size = 2;
9134
9135 if (copy_from_user(smb_data, buf, size)) {
9136 hio_warn("%s: copy_from_user: failed\n", dev->name);
9137 ret = -EFAULT;
9138 break;
9139 }
9140
9141 ret = ssd_smbus_write_word(dev, saddr, command, smb_data);
9142 if (ret) {
9143 break;
9144 }
9145
9146 break;
9147 }
9148
9149 case SSD_CMD_SMBUS_READ_WORD: {
9150 struct ssd_smbus_op_info smbus_info;
9151 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9152 uint8_t saddr;
9153 uint8_t command;
9154 uint8_t size;
9155
9156 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9157 hio_warn("%s: copy_from_user: failed\n", dev->name);
9158 ret = -EFAULT;
9159 break;
9160 }
9161
9162 saddr = smbus_info.saddr;
9163 command = smbus_info.cmd;
9164 buf = smbus_info.buf;
9165 size = 2;
9166
9167 ret = ssd_smbus_read_word(dev, saddr, command, smb_data);
9168 if (ret) {
9169 break;
9170 }
9171
9172 if (copy_to_user(buf, smb_data, size)) {
9173 hio_warn("%s: copy_to_user: failed\n", dev->name);
9174 ret = -EFAULT;
9175 break;
9176 }
9177
9178 break;
9179 }
9180
9181 case SSD_CMD_SMBUS_WRITE_BLOCK: {
9182 struct ssd_smbus_op_info smbus_info;
9183 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9184 uint8_t saddr;
9185 uint8_t command;
9186 uint8_t size;
9187
9188 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9189 hio_warn("%s: copy_from_user: failed\n", dev->name);
9190 ret = -EFAULT;
9191 break;
9192 }
9193
9194 saddr = smbus_info.saddr;
9195 command = smbus_info.cmd;
9196 buf = smbus_info.buf;
9197 size = smbus_info.size;
9198
9199 if (size > SSD_SMBUS_BLOCK_MAX) {
9200 ret = -EINVAL;
9201 break;
9202 }
9203
9204 if (copy_from_user(smb_data, buf, size)) {
9205 hio_warn("%s: copy_from_user: failed\n", dev->name);
9206 ret = -EFAULT;
9207 break;
9208 }
9209
9210 ret = ssd_smbus_write_block(dev, saddr, command, size, smb_data);
9211 if (ret) {
9212 break;
9213 }
9214
9215 break;
9216 }
9217
9218 case SSD_CMD_SMBUS_READ_BLOCK: {
9219 struct ssd_smbus_op_info smbus_info;
9220 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9221 uint8_t saddr;
9222 uint8_t command;
9223 uint8_t size;
9224
9225 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9226 hio_warn("%s: copy_from_user: failed\n", dev->name);
9227 ret = -EFAULT;
9228 break;
9229 }
9230
9231 saddr = smbus_info.saddr;
9232 command = smbus_info.cmd;
9233 buf = smbus_info.buf;
9234 size = smbus_info.size;
9235
9236 if (size > SSD_SMBUS_BLOCK_MAX) {
9237 ret = -EINVAL;
9238 break;
9239 }
9240
9241 ret = ssd_smbus_read_block(dev, saddr, command, size, smb_data);
9242 if (ret) {
9243 break;
9244 }
9245
9246 if (copy_to_user(buf, smb_data, size)) {
9247 hio_warn("%s: copy_to_user: failed\n", dev->name);
9248 ret = -EFAULT;
9249 break;
9250 }
9251
9252 break;
9253 }
9254
9255 case SSD_CMD_BM_GET_VER: {
9256 uint16_t ver;
9257
9258 ret = ssd_bm_get_version(dev, &ver);
9259 if (ret) {
9260 break;
9261 }
9262
9263 if (copy_to_user(argp, &ver, sizeof(uint16_t))) {
9264 hio_warn("%s: copy_to_user: failed\n", dev->name);
9265 ret = -EFAULT;
9266 break;
9267 }
9268
9269 break;
9270 }
9271
9272 case SSD_CMD_BM_GET_NR_CAP: {
9273 int nr_cap;
9274
9275 ret = ssd_bm_nr_cap(dev, &nr_cap);
9276 if (ret) {
9277 break;
9278 }
9279
9280 if (copy_to_user(argp, &nr_cap, sizeof(int))) {
9281 hio_warn("%s: copy_to_user: failed\n", dev->name);
9282 ret = -EFAULT;
9283 break;
9284 }
9285
9286 break;
9287 }
9288
9289 case SSD_CMD_BM_CAP_LEARNING: {
9290 ret = ssd_bm_enter_cap_learning(dev);
9291
9292 if (ret) {
9293 break;
9294 }
9295
9296 break;
9297 }
9298
9299 case SSD_CMD_CAP_LEARN: {
9300 uint32_t cap = 0;
9301
9302 ret = ssd_cap_learn(dev, &cap);
9303 if (ret) {
9304 break;
9305 }
9306
9307 if (copy_to_user(argp, &cap, sizeof(uint32_t))) {
9308 hio_warn("%s: copy_to_user: failed\n", dev->name);
9309 ret = -EFAULT;
9310 break;
9311 }
9312
9313 break;
9314 }
9315
9316 case SSD_CMD_GET_CAP_STATUS: {
9317 int cap_status = 0;
9318
9319 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9320 cap_status = 1;
9321 }
9322
9323 if (copy_to_user(argp, &cap_status, sizeof(int))) {
9324 hio_warn("%s: copy_to_user: failed\n", dev->name);
9325 ret = -EFAULT;
9326 break;
9327 }
9328
9329 break;
9330 }
9331
9332 case SSD_CMD_RAM_READ: {
9333 struct ssd_ram_op_info ram_info;
9334 uint64_t ofs;
9335 uint32_t length;
9336 size_t rlen, len = dev->hw_info.ram_max_len;
9337 int ctrl_idx;
9338
9339 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9340 hio_warn("%s: copy_from_user: failed\n", dev->name);
9341 ret = -EFAULT;
9342 break;
9343 }
9344
9345 ofs = ram_info.start;
9346 length = ram_info.length;
9347 buf = ram_info.buf;
9348 ctrl_idx = ram_info.ctrl_idx;
9349
9350 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9351 ret = -EINVAL;
9352 break;
9353 }
9354
9355 kbuf = kmalloc(len, GFP_KERNEL);
9356 if (!kbuf) {
9357 ret = -ENOMEM;
9358 break;
9359 }
9360
9361 for (rlen=0; rlen<length; rlen+=len, buf+=len, ofs+=len) {
9362 if ((length - rlen) < len) {
9363 len = length - rlen;
9364 }
9365
9366 ret = ssd_ram_read(dev, kbuf, len, ofs, ctrl_idx);
9367 if (ret) {
9368 break;
9369 }
9370
9371 if (copy_to_user(buf, kbuf, len)) {
9372 ret = -EFAULT;
9373 break;
9374 }
9375 }
9376
9377 kfree(kbuf);
9378
9379 break;
9380 }
9381
9382 case SSD_CMD_RAM_WRITE: {
9383 struct ssd_ram_op_info ram_info;
9384 uint64_t ofs;
9385 uint32_t length;
9386 size_t wlen, len = dev->hw_info.ram_max_len;
9387 int ctrl_idx;
9388
9389 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9390 hio_warn("%s: copy_from_user: failed\n", dev->name);
9391 ret = -EFAULT;
9392 break;
9393 }
9394 ofs = ram_info.start;
9395 length = ram_info.length;
9396 buf = ram_info.buf;
9397 ctrl_idx = ram_info.ctrl_idx;
9398
9399 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9400 ret = -EINVAL;
9401 break;
9402 }
9403
9404 kbuf = kmalloc(len, GFP_KERNEL);
9405 if (!kbuf) {
9406 ret = -ENOMEM;
9407 break;
9408 }
9409
9410 for (wlen=0; wlen<length; wlen+=len, buf+=len, ofs+=len) {
9411 if ((length - wlen) < len) {
9412 len = length - wlen;
9413 }
9414
9415 if (copy_from_user(kbuf, buf, len)) {
9416 ret = -EFAULT;
9417 break;
9418 }
9419
9420 ret = ssd_ram_write(dev, kbuf, len, ofs, ctrl_idx);
9421 if (ret) {
9422 break;
9423 }
9424 }
9425
9426 kfree(kbuf);
9427
9428 break;
9429 }
9430
9431 case SSD_CMD_NAND_READ_ID: {
9432 struct ssd_flash_op_info flash_info;
9433 int chip_no, chip_ce, length, ctrl_idx;
9434
9435 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9436 hio_warn("%s: copy_from_user: failed\n", dev->name);
9437 ret = -EFAULT;
9438 break;
9439 }
9440
9441 chip_no = flash_info.flash;
9442 chip_ce = flash_info.chip;
9443 ctrl_idx = flash_info.ctrl_idx;
9444 buf = flash_info.buf;
9445 length = dev->hw_info.id_size;
9446
9447 //kbuf = kmalloc(length, GFP_KERNEL);
9448 kbuf = kmalloc(SSD_NAND_ID_BUFF_SZ, GFP_KERNEL); //xx
9449 if (!kbuf) {
9450 ret = -ENOMEM;
9451 break;
9452 }
9453 memset(kbuf, 0, length);
9454
9455 ret = ssd_nand_read_id(dev, kbuf, chip_no, chip_ce, ctrl_idx);
9456 if (ret) {
9457 kfree(kbuf);
9458 break;
9459 }
9460
9461 if (copy_to_user(buf, kbuf, length)) {
9462 kfree(kbuf);
9463 ret = -EFAULT;
9464 break;
9465 }
9466
9467 kfree(kbuf);
9468
9469 break;
9470 }
9471
9472 case SSD_CMD_NAND_READ: { //with oob
9473 struct ssd_flash_op_info flash_info;
9474 uint32_t length;
9475 int flash, chip, page, ctrl_idx;
9476 int err = 0;
9477
9478 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9479 hio_warn("%s: copy_from_user: failed\n", dev->name);
9480 ret = -EFAULT;
9481 break;
9482 }
9483
9484 flash = flash_info.flash;
9485 chip = flash_info.chip;
9486 page = flash_info.page;
9487 buf = flash_info.buf;
9488 ctrl_idx = flash_info.ctrl_idx;
9489
9490 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9491
9492 kbuf = kmalloc(length, GFP_KERNEL);
9493 if (!kbuf) {
9494 ret = -ENOMEM;
9495 break;
9496 }
9497
9498 err = ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9499 if (ret && (-EIO != ret)) {
9500 kfree(kbuf);
9501 break;
9502 }
9503
9504 if (copy_to_user(buf, kbuf, length)) {
9505 kfree(kbuf);
9506 ret = -EFAULT;
9507 break;
9508 }
9509
9510 ret = err;
9511
9512 kfree(kbuf);
9513 break;
9514 }
9515
9516 case SSD_CMD_NAND_WRITE: {
9517 struct ssd_flash_op_info flash_info;
9518 int flash, chip, page, ctrl_idx;
9519 uint32_t length;
9520
9521 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9522 hio_warn("%s: copy_from_user: failed\n", dev->name);
9523 ret = -EFAULT;
9524 break;
9525 }
9526
9527 flash = flash_info.flash;
9528 chip = flash_info.chip;
9529 page = flash_info.page;
9530 buf = flash_info.buf;
9531 ctrl_idx = flash_info.ctrl_idx;
9532
9533 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9534
9535 kbuf = kmalloc(length, GFP_KERNEL);
9536 if (!kbuf) {
9537 ret = -ENOMEM;
9538 break;
9539 }
9540
9541 if (copy_from_user(kbuf, buf, length)) {
9542 kfree(kbuf);
9543 ret = -EFAULT;
9544 break;
9545 }
9546
9547 ret = ssd_nand_write(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9548 if (ret) {
9549 kfree(kbuf);
9550 break;
9551 }
9552
9553 kfree(kbuf);
9554 break;
9555 }
9556
9557 case SSD_CMD_NAND_ERASE: {
9558 struct ssd_flash_op_info flash_info;
9559 int flash, chip, page, ctrl_idx;
9560
9561 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9562 hio_warn("%s: copy_from_user: failed\n", dev->name);
9563 ret = -EFAULT;
9564 break;
9565 }
9566
9567 flash = flash_info.flash;
9568 chip = flash_info.chip;
9569 page = flash_info.page;
9570 ctrl_idx = flash_info.ctrl_idx;
9571
9572 if ((page % dev->hw_info.page_count) != 0) {
9573 ret = -EINVAL;
9574 break;
9575 }
9576
9577 //hio_warn("erase fs = %llx\n", ofs);
9578 ret = ssd_nand_erase(dev, flash, chip, page, ctrl_idx);
9579 if (ret) {
9580 break;
9581 }
9582
9583 break;
9584 }
9585
9586 case SSD_CMD_NAND_READ_EXT: { //ingore EIO
9587 struct ssd_flash_op_info flash_info;
9588 uint32_t length;
9589 int flash, chip, page, ctrl_idx;
9590
9591 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9592 hio_warn("%s: copy_from_user: failed\n", dev->name);
9593 ret = -EFAULT;
9594 break;
9595 }
9596
9597 flash = flash_info.flash;
9598 chip = flash_info.chip;
9599 page = flash_info.page;
9600 buf = flash_info.buf;
9601 ctrl_idx = flash_info.ctrl_idx;
9602
9603 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9604
9605 kbuf = kmalloc(length, GFP_KERNEL);
9606 if (!kbuf) {
9607 ret = -ENOMEM;
9608 break;
9609 }
9610
9611 ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9612 if (-EIO == ret) { //ingore EIO
9613 ret = 0;
9614 }
9615 if (ret) {
9616 kfree(kbuf);
9617 break;
9618 }
9619
9620 if (copy_to_user(buf, kbuf, length)) {
9621 kfree(kbuf);
9622 ret = -EFAULT;
9623 break;
9624 }
9625
9626 kfree(kbuf);
9627 break;
9628 }
9629
9630 case SSD_CMD_UPDATE_BBT: {
9631 struct ssd_flash_op_info flash_info;
9632 int ctrl_idx, flash;
9633
9634 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9635 hio_warn("%s: copy_from_user: failed\n", dev->name);
9636 ret = -EFAULT;
9637 break;
9638 }
9639
9640 ctrl_idx = flash_info.ctrl_idx;
9641 flash = flash_info.flash;
9642 ret = ssd_update_bbt(dev, flash, ctrl_idx);
9643 if (ret) {
9644 break;
9645 }
9646
9647 break;
9648 }
9649
9650 case SSD_CMD_CLEAR_ALARM:
9651 ssd_clear_alarm(dev);
9652 break;
9653
9654 case SSD_CMD_SET_ALARM:
9655 ssd_set_alarm(dev);
9656 break;
9657
9658 case SSD_CMD_RESET:
9659 ret = ssd_do_reset(dev);
9660 break;
9661
9662 case SSD_CMD_RELOAD_FW:
9663 dev->reload_fw = 1;
9664 dev->has_non_0x98_reg_access = 1;
9665 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9666 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
9667 } else if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_1_1) {
9668 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
9669
9670 }
9671 break;
9672
9673 case SSD_CMD_UNLOAD_DEV: {
9674 if (atomic_read(&dev->refcnt)) {
9675 ret = -EBUSY;
9676 break;
9677 }
9678
9679 /* save smart */
9680 ssd_save_smart(dev);
9681
9682 ret = ssd_flush(dev);
9683 if (ret) {
9684 break;
9685 }
9686
9687 /* cleanup the block device */
9688 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
9689 mutex_lock(&dev->gd_mutex);
9690 ssd_cleanup_blkdev(dev);
9691 ssd_cleanup_queue(dev);
9692 mutex_unlock(&dev->gd_mutex);
9693 }
9694
9695 break;
9696 }
9697
9698 case SSD_CMD_LOAD_DEV: {
9699
9700 if (test_bit(SSD_INIT_BD, &dev->state)) {
9701 ret = -EINVAL;
9702 break;
9703 }
9704
9705 ret = ssd_init_smart(dev);
9706 if (ret) {
9707 hio_warn("%s: init info: failed\n", dev->name);
9708 break;
9709 }
9710
9711 ret = ssd_init_queue(dev);
9712 if (ret) {
9713 hio_warn("%s: init queue failed\n", dev->name);
9714 break;
9715 }
9716 ret = ssd_init_blkdev(dev);
9717 if (ret) {
9718 hio_warn("%s: register block device: failed\n", dev->name);
9719 break;
9720 }
9721 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
9722
9723 break;
9724 }
9725
9726 case SSD_CMD_UPDATE_VP: {
9727 uint32_t val;
9728 uint32_t new_vp, new_vp1 = 0;
9729
9730 if (test_bit(SSD_INIT_BD, &dev->state)) {
9731 ret = -EINVAL;
9732 break;
9733 }
9734
9735 if (copy_from_user(&new_vp, argp, sizeof(uint32_t))) {
9736 hio_warn("%s: copy_from_user: failed\n", dev->name);
9737 ret = -EFAULT;
9738 break;
9739 }
9740
9741 if (new_vp > dev->hw_info.max_valid_pages || new_vp <= 0) {
9742 ret = -EINVAL;
9743 break;
9744 }
9745
9746 while (new_vp <= dev->hw_info.max_valid_pages) {
9747 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, new_vp);
9748 msleep(10);
9749 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
9750 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9751 new_vp1 = val & 0x3FF;
9752 } else {
9753 new_vp1 = val & 0x7FFF;
9754 }
9755
9756 if (new_vp1 == new_vp) {
9757 break;
9758 }
9759
9760 new_vp++;
9761 /*if (new_vp == dev->hw_info.valid_pages) {
9762 new_vp++;
9763 }*/
9764 }
9765
9766 if (new_vp1 != new_vp || new_vp > dev->hw_info.max_valid_pages) {
9767 /* restore */
9768 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9769 ret = -EINVAL;
9770 break;
9771 }
9772
9773 if (copy_to_user(argp, &new_vp, sizeof(uint32_t))) {
9774 hio_warn("%s: copy_to_user: failed\n", dev->name);
9775 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9776 ret = -EFAULT;
9777 break;
9778 }
9779
9780 /* new */
9781 dev->hw_info.valid_pages = new_vp;
9782 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
9783 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
9784 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
9785
9786 break;
9787 }
9788
9789 case SSD_CMD_FULL_RESET: {
9790 ret = ssd_full_reset(dev);
9791 break;
9792 }
9793
9794 case SSD_CMD_GET_NR_LOG: {
9795 if (copy_to_user(argp, &dev->internal_log.nr_log, sizeof(dev->internal_log.nr_log))) {
9796 ret = -EFAULT;
9797 break;
9798 }
9799 break;
9800 }
9801
9802 case SSD_CMD_GET_LOG: {
9803 uint32_t length = dev->rom_info.log_sz;
9804
9805 buf = argp;
9806
9807 if (copy_to_user(buf, dev->internal_log.log, length)) {
9808 ret = -EFAULT;
9809 break;
9810 }
9811
9812 break;
9813 }
9814
9815 case SSD_CMD_LOG_LEVEL: {
9816 int level = 0;
9817 if (copy_from_user(&level, argp, sizeof(int))) {
9818 hio_warn("%s: copy_from_user: failed\n", dev->name);
9819 ret = -EFAULT;
9820 break;
9821 }
9822
9823 if (level >= SSD_LOG_NR_LEVEL || level < SSD_LOG_LEVEL_INFO) {
9824 level = SSD_LOG_LEVEL_ERR;
9825 }
9826
9827 //just for showing log, no need to protect
9828 log_level = level;
9829 break;
9830 }
9831
9832 case SSD_CMD_OT_PROTECT: {
9833 int protect = 0;
9834
9835 if (copy_from_user(&protect, argp, sizeof(int))) {
9836 hio_warn("%s: copy_from_user: failed\n", dev->name);
9837 ret = -EFAULT;
9838 break;
9839 }
9840
9841 ssd_set_ot_protect(dev, !!protect);
9842 break;
9843 }
9844
9845 case SSD_CMD_GET_OT_STATUS: {
9846 int status = ssd_get_ot_status(dev, &status);
9847
9848 if (copy_to_user(argp, &status, sizeof(int))) {
9849 hio_warn("%s: copy_to_user: failed\n", dev->name);
9850 ret = -EFAULT;
9851 break;
9852 }
9853 break;
9854 }
9855
9856 case SSD_CMD_CLEAR_LOG: {
9857 ret = ssd_clear_log(dev);
9858 break;
9859 }
9860
9861 case SSD_CMD_CLEAR_SMART: {
9862 ret = ssd_clear_smart(dev);
9863 break;
9864 }
9865
9866 case SSD_CMD_CLEAR_WARNING: {
9867 ret = ssd_clear_warning(dev);
9868 break;
9869 }
9870
9871 case SSD_CMD_SW_LOG: {
9872 struct ssd_sw_log_info sw_log;
9873
9874 if (copy_from_user(&sw_log, argp, sizeof(struct ssd_sw_log_info))) {
9875 hio_warn("%s: copy_from_user: failed\n", dev->name);
9876 ret = -EFAULT;
9877 break;
9878 }
9879
9880 ret = ssd_gen_swlog(dev, sw_log.event, sw_log.data);
9881 break;
9882 }
9883
9884 case SSD_CMD_GET_LABEL: {
9885
9886 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9887 ret = -EINVAL;
9888 break;
9889 }
9890
9891 if (copy_to_user(argp, &dev->label, sizeof(struct ssd_label))) {
9892 hio_warn("%s: copy_to_user: failed\n", dev->name);
9893 ret = -EFAULT;
9894 break;
9895 }
9896 break;
9897 }
9898
9899 case SSD_CMD_GET_VERSION: {
9900 struct ssd_version_info ver;
9901
9902 mutex_lock(&dev->fw_mutex);
9903 ret = __ssd_get_version(dev, &ver);
9904 mutex_unlock(&dev->fw_mutex);
9905 if (ret) {
9906 break;
9907 }
9908
9909 if (copy_to_user(argp, &ver, sizeof(struct ssd_version_info))) {
9910 hio_warn("%s: copy_to_user: failed\n", dev->name);
9911 ret = -EFAULT;
9912 break;
9913 }
9914 break;
9915 }
9916
9917 case SSD_CMD_GET_TEMPERATURE: {
9918 int temp;
9919
9920 mutex_lock(&dev->fw_mutex);
9921 ret = __ssd_get_temperature(dev, &temp);
9922 mutex_unlock(&dev->fw_mutex);
9923 if (ret) {
9924 break;
9925 }
9926
9927 if (copy_to_user(argp, &temp, sizeof(int))) {
9928 hio_warn("%s: copy_to_user: failed\n", dev->name);
9929 ret = -EFAULT;
9930 break;
9931 }
9932 break;
9933 }
9934
9935 case SSD_CMD_GET_BMSTATUS: {
9936 int status;
9937
9938 mutex_lock(&dev->fw_mutex);
9939 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9940 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9941 status = SSD_BMSTATUS_WARNING;
9942 } else {
9943 status = SSD_BMSTATUS_OK;
9944 }
9945 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
9946 ret = __ssd_bm_status(dev, &status);
9947 } else {
9948 status = SSD_BMSTATUS_OK;
9949 }
9950 mutex_unlock(&dev->fw_mutex);
9951 if (ret) {
9952 break;
9953 }
9954
9955 if (copy_to_user(argp, &status, sizeof(int))) {
9956 hio_warn("%s: copy_to_user: failed\n", dev->name);
9957 ret = -EFAULT;
9958 break;
9959 }
9960 break;
9961 }
9962
9963 case SSD_CMD_GET_LABEL2: {
9964 void *label;
9965 int length;
9966
9967 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9968 label = &dev->label;
9969 length = sizeof(struct ssd_label);
9970 } else {
9971 label = &dev->labelv3;
9972 length = sizeof(struct ssd_labelv3);
9973 }
9974
9975 if (copy_to_user(argp, label, length)) {
9976 ret = -EFAULT;
9977 break;
9978 }
9979 break;
9980 }
9981
9982 case SSD_CMD_FLUSH:
9983 ret = ssd_flush(dev);
9984 if (ret) {
9985 hio_warn("%s: ssd_flush: failed\n", dev->name);
9986 ret = -EFAULT;
9987 break;
9988 }
9989 break;
9990
9991 case SSD_CMD_SAVE_MD: {
9992 int save_md = 0;
9993
9994 if (copy_from_user(&save_md, argp, sizeof(int))) {
9995 hio_warn("%s: copy_from_user: failed\n", dev->name);
9996 ret = -EFAULT;
9997 break;
9998 }
9999
10000 dev->save_md = !!save_md;
10001 break;
10002 }
10003
10004 case SSD_CMD_SET_WMODE: {
10005 int new_wmode = 0;
10006
10007 if (copy_from_user(&new_wmode, argp, sizeof(int))) {
10008 hio_warn("%s: copy_from_user: failed\n", dev->name);
10009 ret = -EFAULT;
10010 break;
10011 }
10012
10013 ret = __ssd_set_wmode(dev, new_wmode);
10014 if (ret) {
10015 break;
10016 }
10017
10018 break;
10019 }
10020
10021 case SSD_CMD_GET_WMODE: {
10022 if (copy_to_user(argp, &dev->wmode, sizeof(int))) {
10023 hio_warn("%s: copy_to_user: failed\n", dev->name);
10024 ret = -EFAULT;
10025 break;
10026 }
10027
10028 break;
10029 }
10030
10031 case SSD_CMD_GET_USER_WMODE: {
10032 if (copy_to_user(argp, &dev->user_wmode, sizeof(int))) {
10033 hio_warn("%s: copy_to_user: failed\n", dev->name);
10034 ret = -EFAULT;
10035 break;
10036 }
10037
10038 break;
10039 }
10040
10041 case SSD_CMD_DEBUG: {
10042 struct ssd_debug_info db_info;
10043
10044 if (!finject) {
10045 ret = -EOPNOTSUPP;
10046 break;
10047 }
10048
10049 if (copy_from_user(&db_info, argp, sizeof(struct ssd_debug_info))) {
10050 hio_warn("%s: copy_from_user: failed\n", dev->name);
10051 ret = -EFAULT;
10052 break;
10053 }
10054
10055 if (db_info.type < SSD_DEBUG_NONE || db_info.type >= SSD_DEBUG_NR) {
10056 ret = -EINVAL;
10057 break;
10058 }
10059
10060 /* IO */
10061 if (db_info.type >= SSD_DEBUG_READ_ERR && db_info.type <= SSD_DEBUG_RW_ERR &&
10062 (db_info.data.loc.off + db_info.data.loc.len) > (dev->hw_info.size >> 9)) {
10063 ret = -EINVAL;
10064 break;
10065 }
10066
10067 memcpy(&dev->db_info, &db_info, sizeof(struct ssd_debug_info));
10068
10069 #ifdef SSD_OT_PROTECT
10070 /* temperature */
10071 if (db_info.type == SSD_DEBUG_NONE) {
10072 ssd_check_temperature(dev, SSD_OT_TEMP);
10073 } else if (db_info.type == SSD_DEBUG_LOG) {
10074 if (db_info.data.log.event == SSD_LOG_OVER_TEMP) {
10075 dev->ot_delay = SSD_OT_DELAY;
10076 } else if (db_info.data.log.event == SSD_LOG_NORMAL_TEMP) {
10077 dev->ot_delay = 0;
10078 }
10079 }
10080 #endif
10081
10082 /* offline */
10083 if (db_info.type == SSD_DEBUG_OFFLINE) {
10084 test_and_clear_bit(SSD_ONLINE, &dev->state);
10085 } else if (db_info.type == SSD_DEBUG_NONE) {
10086 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
10087 }
10088
10089 /* log */
10090 if (db_info.type == SSD_DEBUG_LOG && dev->event_call && dev->gd) {
10091 dev->event_call(dev->gd, db_info.data.log.event, 0);
10092 }
10093
10094 break;
10095 }
10096
10097 case SSD_CMD_DRV_PARAM_INFO: {
10098 struct ssd_drv_param_info drv_param;
10099
10100 memset(&drv_param, 0, sizeof(struct ssd_drv_param_info));
10101
10102 drv_param.mode = mode;
10103 drv_param.status_mask = status_mask;
10104 drv_param.int_mode = int_mode;
10105 drv_param.threaded_irq = threaded_irq;
10106 drv_param.log_level = log_level;
10107 drv_param.wmode = wmode;
10108 drv_param.ot_protect = ot_protect;
10109 drv_param.finject = finject;
10110
10111 if (copy_to_user(argp, &drv_param, sizeof(struct ssd_drv_param_info))) {
10112 hio_warn("%s: copy_to_user: failed\n", dev->name);
10113 ret = -EFAULT;
10114 break;
10115 }
10116 break;
10117 }
10118
10119 default:
10120 ret = -EINVAL;
10121 break;
10122 }
10123
10124 return ret;
10125 }
10126
10127
10128 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10129 static int ssd_block_ioctl(struct inode *inode, struct file *file,
10130 unsigned int cmd, unsigned long arg)
10131 {
10132 struct ssd_device *dev;
10133 void __user *argp = (void __user *)arg;
10134 int ret = 0;
10135
10136 if (!inode) {
10137 return -EINVAL;
10138 }
10139 dev = inode->i_bdev->bd_disk->private_data;
10140 if (!dev) {
10141 return -EINVAL;
10142 }
10143 #else
10144 static int ssd_block_ioctl(struct block_device *bdev, fmode_t mode,
10145 unsigned int cmd, unsigned long arg)
10146 {
10147 struct ssd_device *dev;
10148 void __user *argp = (void __user *)arg;
10149 int ret = 0;
10150
10151 if (!bdev) {
10152 return -EINVAL;
10153 }
10154
10155 dev = bdev->bd_disk->private_data;
10156 if (!dev) {
10157 return -EINVAL;
10158 }
10159 #endif
10160
10161 switch (cmd) {
10162 case HDIO_GETGEO: {
10163 struct hd_geometry geo;
10164 geo.cylinders = (dev->hw_info.size & ~0x3f) >> 6;
10165 geo.heads = 4;
10166 geo.sectors = 16;
10167 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10168 geo.start = get_start_sect(inode->i_bdev);
10169 #else
10170 geo.start = get_start_sect(bdev);
10171 #endif
10172 if (copy_to_user(argp, &geo, sizeof(geo))) {
10173 ret = -EFAULT;
10174 break;
10175 }
10176
10177 break;
10178 }
10179
10180 case BLKFLSBUF:
10181 ret = ssd_flush(dev);
10182 if (ret) {
10183 hio_warn("%s: ssd_flush: failed\n", dev->name);
10184 ret = -EFAULT;
10185 break;
10186 }
10187 break;
10188
10189 default:
10190 if (!dev->slave) {
10191 ret = ssd_ioctl_common(dev, cmd, arg);
10192 } else {
10193 ret = -EFAULT;
10194 }
10195 break;
10196 }
10197
10198 return ret;
10199 }
10200
10201
10202 static void ssd_free_dev(struct kref *kref)
10203 {
10204 struct ssd_device *dev;
10205
10206 if (!kref) {
10207 return;
10208 }
10209
10210 dev = container_of(kref, struct ssd_device, kref);
10211
10212 put_disk(dev->gd);
10213
10214 ssd_put_index(dev->slave, dev->idx);
10215
10216 kfree(dev);
10217 }
10218
10219 static void ssd_put(struct ssd_device *dev)
10220 {
10221 kref_put(&dev->kref, ssd_free_dev);
10222 }
10223
10224 static int ssd_get(struct ssd_device *dev)
10225 {
10226 kref_get(&dev->kref);
10227 return 0;
10228 }
10229
10230 /* block device */
10231 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10232 static int ssd_block_open(struct inode *inode, struct file *filp)
10233 {
10234 struct ssd_device *dev;
10235
10236 if (!inode) {
10237 return -EINVAL;
10238 }
10239
10240 dev = inode->i_bdev->bd_disk->private_data;
10241 if (!dev) {
10242 return -EINVAL;
10243 }
10244 #else
10245 static int ssd_block_open(struct block_device *bdev, fmode_t mode)
10246 {
10247 struct ssd_device *dev;
10248
10249 if (!bdev) {
10250 return -EINVAL;
10251 }
10252
10253 dev = bdev->bd_disk->private_data;
10254 if (!dev) {
10255 return -EINVAL;
10256 }
10257 #endif
10258
10259 /*if (!try_module_get(dev->owner))
10260 return -ENODEV;
10261 */
10262
10263 ssd_get(dev);
10264
10265 atomic_inc(&dev->refcnt);
10266
10267 return 0;
10268 }
10269
10270 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10271 static int ssd_block_release(struct inode *inode, struct file *filp)
10272 {
10273 struct ssd_device *dev;
10274
10275 if (!inode) {
10276 return -EINVAL;
10277 }
10278
10279 dev = inode->i_bdev->bd_disk->private_data;
10280 if (!dev) {
10281 return -EINVAL;
10282 }
10283 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10284 static int ssd_block_release(struct gendisk *disk, fmode_t mode)
10285 {
10286 struct ssd_device *dev;
10287
10288 if (!disk) {
10289 return -EINVAL;
10290 }
10291
10292 dev = disk->private_data;
10293 if (!dev) {
10294 return -EINVAL;
10295 }
10296 #else
10297 static void ssd_block_release(struct gendisk *disk, fmode_t mode)
10298 {
10299 struct ssd_device *dev;
10300
10301 if (!disk) {
10302 return;
10303 }
10304
10305 dev = disk->private_data;
10306 if (!dev) {
10307 return;
10308 }
10309 #endif
10310
10311 atomic_dec(&dev->refcnt);
10312
10313 ssd_put(dev);
10314
10315 //module_put(dev->owner);
10316 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10317 return 0;
10318 #endif
10319 }
10320
10321 static struct block_device_operations ssd_fops = {
10322 .owner = THIS_MODULE,
10323 .open = ssd_block_open,
10324 .release = ssd_block_release,
10325 .ioctl = ssd_block_ioctl,
10326 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
10327 .getgeo = ssd_block_getgeo,
10328 #endif
10329 };
10330
10331 static void ssd_init_trim(ssd_device_t *dev)
10332 {
10333 #if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
10334 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10335 return;
10336 }
10337 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, dev->rq);
10338
10339 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6))
10340 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,12,0))
10341 dev->rq->limits.discard_zeroes_data = 1;
10342 #endif
10343 dev->rq->limits.discard_alignment = 4096;
10344 dev->rq->limits.discard_granularity = 4096;
10345 #endif
10346 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_4) {
10347 dev->rq->limits.max_discard_sectors = dev->hw_info.sg_max_sec;
10348 } else {
10349 dev->rq->limits.max_discard_sectors = (dev->hw_info.sg_max_sec) * (dev->hw_info.cmd_max_sg);
10350 }
10351 #endif
10352 }
10353
10354 static void ssd_cleanup_queue(struct ssd_device *dev)
10355 {
10356 ssd_wait_io(dev);
10357
10358 blk_cleanup_queue(dev->rq);
10359 dev->rq = NULL;
10360 }
10361
10362 static int ssd_init_queue(struct ssd_device *dev)
10363 {
10364 dev->rq = blk_alloc_queue(GFP_KERNEL);
10365 if (dev->rq == NULL) {
10366 hio_warn("%s: alloc queue: failed\n ", dev->name);
10367 goto out_init_queue;
10368 }
10369
10370 /* must be first */
10371 blk_queue_make_request(dev->rq, ssd_make_request);
10372
10373 #if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) && !(defined RHEL_MAJOR && RHEL_MAJOR == 6))
10374 blk_queue_max_hw_segments(dev->rq, dev->hw_info.cmd_max_sg);
10375 blk_queue_max_phys_segments(dev->rq, dev->hw_info.cmd_max_sg);
10376 blk_queue_max_sectors(dev->rq, dev->hw_info.sg_max_sec);
10377 #else
10378 blk_queue_max_segments(dev->rq, dev->hw_info.cmd_max_sg);
10379 blk_queue_max_hw_sectors(dev->rq, dev->hw_info.sg_max_sec);
10380 #endif
10381
10382 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
10383 blk_queue_hardsect_size(dev->rq, 512);
10384 #else
10385 blk_queue_logical_block_size(dev->rq, 512);
10386 #endif
10387 /* not work for make_request based drivers(bio) */
10388 blk_queue_max_segment_size(dev->rq, dev->hw_info.sg_max_sec << 9);
10389
10390 blk_queue_bounce_limit(dev->rq, BLK_BOUNCE_HIGH);
10391
10392 dev->rq->queuedata = dev;
10393
10394 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
10395 blk_queue_issue_flush_fn(dev->rq, ssd_issue_flush_fn);
10396 #endif
10397
10398 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
10399 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, dev->rq);
10400 #endif
10401
10402 ssd_init_trim(dev);
10403
10404 return 0;
10405
10406 out_init_queue:
10407 return -ENOMEM;
10408 }
10409
10410 static void ssd_cleanup_blkdev(struct ssd_device *dev)
10411 {
10412 del_gendisk(dev->gd);
10413 }
10414
10415 static int ssd_init_blkdev(struct ssd_device *dev)
10416 {
10417 if (dev->gd) {
10418 put_disk(dev->gd);
10419 }
10420
10421 dev->gd = alloc_disk(ssd_minors);
10422 if (!dev->gd) {
10423 hio_warn("%s: alloc_disk fail\n", dev->name);
10424 goto out_alloc_gd;
10425 }
10426 dev->gd->major = dev->major;
10427 dev->gd->first_minor = dev->idx * ssd_minors;
10428 dev->gd->fops = &ssd_fops;
10429 dev->gd->queue = dev->rq;
10430 dev->gd->private_data = dev;
10431
10432 snprintf (dev->gd->disk_name, sizeof(dev->gd->disk_name), "%s", dev->name);
10433
10434 set_capacity(dev->gd, dev->hw_info.size >> 9);
10435
10436 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
10437 device_add_disk(&dev->pdev->dev, dev->gd);
10438 #else
10439 dev->gd->driverfs_dev = &dev->pdev->dev;
10440 add_disk(dev->gd);
10441 #endif
10442
10443 return 0;
10444
10445 out_alloc_gd:
10446 return -ENOMEM;
10447 }
10448
10449 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10450 static int ssd_ioctl(struct inode *inode, struct file *file,
10451 unsigned int cmd, unsigned long arg)
10452 #else
10453 static long ssd_ioctl(struct file *file,
10454 unsigned int cmd, unsigned long arg)
10455 #endif
10456 {
10457 struct ssd_device *dev;
10458
10459 if (!file) {
10460 return -EINVAL;
10461 }
10462
10463 dev = file->private_data;
10464 if (!dev) {
10465 return -EINVAL;
10466 }
10467
10468 return (long)ssd_ioctl_common(dev, cmd, arg);
10469 }
10470
10471 static int ssd_open(struct inode *inode, struct file *file)
10472 {
10473 struct ssd_device *dev = NULL;
10474 struct ssd_device *n = NULL;
10475 int idx;
10476 int ret = -ENODEV;
10477
10478 if (!inode || !file) {
10479 return -EINVAL;
10480 }
10481
10482 idx = iminor(inode);
10483
10484 list_for_each_entry_safe(dev, n, &ssd_list, list) {
10485 if (dev->idx == idx) {
10486 ret = 0;
10487 break;
10488 }
10489 }
10490
10491 if (ret) {
10492 return ret;
10493 }
10494
10495 file->private_data = dev;
10496
10497 ssd_get(dev);
10498
10499 return 0;
10500 }
10501
10502 static int ssd_release(struct inode *inode, struct file *file)
10503 {
10504 struct ssd_device *dev;
10505
10506 if (!file) {
10507 return -EINVAL;
10508 }
10509
10510 dev = file->private_data;
10511 if (!dev) {
10512 return -EINVAL;
10513 }
10514
10515 ssd_put(dev);
10516
10517 file->private_data = NULL;
10518
10519 return 0;
10520 }
10521
10522 static int ssd_reload_ssd_ptr(struct ssd_device *dev)
10523 {
10524 ssd_reset_resp_ptr(dev);
10525
10526 //update base reg address
10527 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3) {
10528
10529 ssd_reg_write(dev->ctrlp + SSD_MSG_BASE_REG, dev->msg_base_dma);
10530 }
10531
10532 //update response base reg address
10533 ssd_reg_write(dev->ctrlp + SSD_RESP_FIFO_REG, dev->resp_msg_base_dma);
10534 ssd_reg_write(dev->ctrlp + SSD_RESP_PTR_REG, dev->resp_ptr_base_dma);
10535
10536 return 0;
10537 }
10538
10539 static struct file_operations ssd_cfops = {
10540 .owner = THIS_MODULE,
10541 .open = ssd_open,
10542 .release = ssd_release,
10543 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10544 .ioctl = ssd_ioctl,
10545 #else
10546 .unlocked_ioctl = ssd_ioctl,
10547 #endif
10548 };
10549
10550 static void ssd_cleanup_chardev(struct ssd_device *dev)
10551 {
10552 if (dev->slave) {
10553 return;
10554 }
10555
10556 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10557 class_simple_device_remove(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10558 devfs_remove("c%s", dev->name);
10559 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10560 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10561 devfs_remove("c%s", dev->name);
10562 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10563 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10564 devfs_remove("c%s", dev->name);
10565 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10566 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10567 #else
10568 device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10569 #endif
10570 }
10571
10572 static int ssd_init_chardev(struct ssd_device *dev)
10573 {
10574 int ret = 0;
10575
10576 if (dev->slave) {
10577 return 0;
10578 }
10579
10580 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10581 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10582 if (ret) {
10583 goto out;
10584 }
10585 class_simple_device_add(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10586 out:
10587 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10588 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10589 if (ret) {
10590 goto out;
10591 }
10592 class_device_create(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10593 out:
10594 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10595 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10596 if (ret) {
10597 goto out;
10598 }
10599 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10600 out:
10601 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10602 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10603 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
10604 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), "c%s", dev->name);
10605 #elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10606 device_create_drvdata(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10607 #else
10608 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10609 #endif
10610
10611 return ret;
10612 }
10613
10614 static int ssd_check_hw(struct ssd_device *dev)
10615 {
10616 uint32_t test_data = 0x55AA5AA5;
10617 uint32_t read_data;
10618
10619 ssd_reg32_write(dev->ctrlp + SSD_BRIDGE_TEST_REG, test_data);
10620 read_data = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_TEST_REG);
10621 if (read_data != ~(test_data)) {
10622 //hio_warn("%s: check bridge error: %#x\n", dev->name, read_data);
10623 return -1;
10624 }
10625
10626 return 0;
10627 }
10628
10629 static int ssd_check_fw(struct ssd_device *dev)
10630 {
10631 uint32_t val = 0;
10632 int i;
10633
10634 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10635 return 0;
10636 }
10637
10638 for (i=0; i<SSD_CONTROLLER_WAIT; i++) {
10639 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10640 if ((val & 0x1) && ((val >> 8) & 0x1)) {
10641 break;
10642 }
10643
10644 msleep(SSD_INIT_WAIT);
10645 }
10646
10647 if (!(val & 0x1)) {
10648 /* controller fw status */
10649 hio_warn("%s: controller firmware load failed: %#x\n", dev->name, val);
10650 return -1;
10651 } else if (!((val >> 8) & 0x1)) {
10652 /* controller state */
10653 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10654 return -1;
10655 }
10656
10657 val = ssd_reg32_read(dev->ctrlp + SSD_RELOAD_FW_REG);
10658 if (val) {
10659 dev->reload_fw = 1;
10660 }
10661
10662 return 0;
10663 }
10664
10665 static int ssd_init_fw_info(struct ssd_device *dev)
10666 {
10667 uint32_t val;
10668 int ret = 0;
10669
10670 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_VER_REG);
10671 dev->hw_info.bridge_ver = val & 0xFFF;
10672 if (dev->hw_info.bridge_ver < SSD_FW_MIN) {
10673 hio_warn("%s: bridge firmware version %03X is not supported\n", dev->name, dev->hw_info.bridge_ver);
10674 return -EINVAL;
10675 }
10676 hio_info("%s: bridge firmware version: %03X\n", dev->name, dev->hw_info.bridge_ver);
10677
10678 ret = ssd_check_fw(dev);
10679 if (ret) {
10680 goto out;
10681 }
10682
10683 out:
10684 /* skip error if not in standard mode */
10685 if (mode != SSD_DRV_MODE_STANDARD) {
10686 ret = 0;
10687 }
10688 return ret;
10689 }
10690
10691 static int ssd_check_clock(struct ssd_device *dev)
10692 {
10693 uint32_t val;
10694 int ret = 0;
10695
10696 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10697 return 0;
10698 }
10699
10700 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10701
10702 /* clock status */
10703 if (!((val >> 4 ) & 0x1)) {
10704 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_LOST), &dev->hwmon)) {
10705 hio_warn("%s: 166MHz clock losed: %#x\n", dev->name, val);
10706 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10707 }
10708 ret = -1;
10709 }
10710
10711 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
10712 if (!((val >> 5 ) & 0x1)) {
10713 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_SKEW), &dev->hwmon)) {
10714 hio_warn("%s: 166MHz clock is skew: %#x\n", dev->name, val);
10715 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10716 }
10717 ret = -1;
10718 }
10719 if (!((val >> 6 ) & 0x1)) {
10720 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_LOST), &dev->hwmon)) {
10721 hio_warn("%s: 156.25MHz clock lost: %#x\n", dev->name, val);
10722 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10723 }
10724 ret = -1;
10725 }
10726 if (!((val >> 7 ) & 0x1)) {
10727 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_SKEW), &dev->hwmon)) {
10728 hio_warn("%s: 156.25MHz clock is skew: %#x\n", dev->name, val);
10729 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10730 }
10731 ret = -1;
10732 }
10733 }
10734
10735 return ret;
10736 }
10737
10738 static int ssd_check_volt(struct ssd_device *dev)
10739 {
10740 int i = 0;
10741 uint64_t val;
10742 uint32_t adc_val;
10743 int ret =0;
10744
10745 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10746 return 0;
10747 }
10748
10749 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10750 /* 1.0v */
10751 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon)) {
10752 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V0_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10753 adc_val = SSD_FPGA_VOLT_MAX(val);
10754 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10755 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10756 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10757 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10758 ret = -1;
10759 }
10760
10761 adc_val = SSD_FPGA_VOLT_MIN(val);
10762 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10763 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10764 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10765 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10766 ret = -2;
10767 }
10768 }
10769
10770 /* 1.8v */
10771 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon)) {
10772 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V8_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10773 adc_val = SSD_FPGA_VOLT_MAX(val);
10774 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10775 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10776 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10777 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10778 ret = -3;
10779 }
10780
10781 adc_val = SSD_FPGA_VOLT_MIN(val);
10782 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10783 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10784 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10785 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10786 ret = -4;
10787 }
10788 }
10789 }
10790
10791 return ret;
10792 }
10793
10794 static int ssd_check_reset_sync(struct ssd_device *dev)
10795 {
10796 uint32_t val;
10797
10798 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10799 return 0;
10800 }
10801
10802 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10803 if (!((val >> 8) & 0x1)) {
10804 /* controller state */
10805 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10806 return -1;
10807 }
10808
10809 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10810 return 0;
10811 }
10812
10813 if (((val >> 9 ) & 0x1)) {
10814 hio_warn("%s: controller reset asynchronously: %#x\n", dev->name, val);
10815 ssd_gen_swlog(dev, SSD_LOG_CTRL_RST_SYNC, val);
10816 return -1;
10817 }
10818
10819 return 0;
10820 }
10821
10822 static int ssd_check_hw_bh(struct ssd_device *dev)
10823 {
10824 int ret;
10825
10826 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10827 return 0;
10828 }
10829
10830 /* clock status */
10831 ret = ssd_check_clock(dev);
10832 if (ret) {
10833 goto out;
10834 }
10835
10836 out:
10837 /* skip error if not in standard mode */
10838 if (mode != SSD_DRV_MODE_STANDARD) {
10839 ret = 0;
10840 }
10841 return ret;
10842 }
10843
10844 static int ssd_check_controller(struct ssd_device *dev)
10845 {
10846 int ret;
10847
10848 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10849 return 0;
10850 }
10851
10852 /* sync reset */
10853 ret = ssd_check_reset_sync(dev);
10854 if (ret) {
10855 goto out;
10856 }
10857
10858 out:
10859 /* skip error if not in standard mode */
10860 if (mode != SSD_DRV_MODE_STANDARD) {
10861 ret = 0;
10862 }
10863 return ret;
10864 }
10865
10866 static int ssd_check_controller_bh(struct ssd_device *dev)
10867 {
10868 uint32_t test_data = 0x55AA5AA5;
10869 uint32_t val;
10870 int reg_base, reg_sz;
10871 int init_wait = 0;
10872 int i;
10873 int ret = 0;
10874
10875 if (mode != SSD_DRV_MODE_STANDARD) {
10876 return 0;
10877 }
10878
10879 /* controller */
10880 val = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
10881 if (val & 0x1) {
10882 hio_warn("%s: controller 0 not ready\n", dev->name);
10883 return -1;
10884 }
10885
10886 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10887 reg_base = SSD_CTRL_TEST_REG0 + i * SSD_CTRL_TEST_REG_SZ;
10888 ssd_reg32_write(dev->ctrlp + reg_base, test_data);
10889 val = ssd_reg32_read(dev->ctrlp + reg_base);
10890 if (val != ~(test_data)) {
10891 hio_warn("%s: check controller %d error: %#x\n", dev->name, i, val);
10892 return -1;
10893 }
10894 }
10895
10896 /* clock */
10897 ret = ssd_check_volt(dev);
10898 if (ret) {
10899 return ret;
10900 }
10901
10902 /* ddr */
10903 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
10904 reg_base = SSD_PV3_RAM_STATUS_REG0;
10905 reg_sz = SSD_PV3_RAM_STATUS_REG_SZ;
10906
10907 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10908 check_ram_status:
10909 val = ssd_reg32_read(dev->ctrlp + reg_base);
10910
10911 if (!((val >> 1) & 0x1)) {
10912 init_wait++;
10913 if (init_wait <= SSD_RAM_INIT_MAX_WAIT) {
10914 msleep(SSD_INIT_WAIT);
10915 goto check_ram_status;
10916 } else {
10917 hio_warn("%s: controller %d ram init failed: %#x\n", dev->name, i, val);
10918 ssd_gen_swlog(dev, SSD_LOG_DDR_INIT_ERR, i);
10919 return -1;
10920 }
10921 }
10922
10923 reg_base += reg_sz;
10924 }
10925 }
10926
10927 /* ch info */
10928 for (i=0; i<SSD_CH_INFO_MAX_WAIT; i++) {
10929 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
10930 if (!((val >> 31) & 0x1)) {
10931 break;
10932 }
10933
10934 msleep(SSD_INIT_WAIT);
10935 }
10936 if ((val >> 31) & 0x1) {
10937 hio_warn("%s: channel info init failed: %#x\n", dev->name, val);
10938 return -1;
10939 }
10940
10941 return 0;
10942 }
10943
10944 static int ssd_init_protocol_info(struct ssd_device *dev)
10945 {
10946 uint32_t val;
10947
10948 val = ssd_reg32_read(dev->ctrlp + SSD_PROTOCOL_VER_REG);
10949 if (val == (uint32_t)-1) {
10950 hio_warn("%s: protocol version error: %#x\n", dev->name, val);
10951 return -EINVAL;
10952 }
10953 dev->protocol_info.ver = val;
10954
10955 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10956 dev->protocol_info.init_state_reg = SSD_INIT_STATE_REG0;
10957 dev->protocol_info.init_state_reg_sz = SSD_INIT_STATE_REG_SZ;
10958
10959 dev->protocol_info.chip_info_reg = SSD_CHIP_INFO_REG0;
10960 dev->protocol_info.chip_info_reg_sz = SSD_CHIP_INFO_REG_SZ;
10961 } else {
10962 dev->protocol_info.init_state_reg = SSD_PV3_INIT_STATE_REG0;
10963 dev->protocol_info.init_state_reg_sz = SSD_PV3_INIT_STATE_REG_SZ;
10964
10965 dev->protocol_info.chip_info_reg = SSD_PV3_CHIP_INFO_REG0;
10966 dev->protocol_info.chip_info_reg_sz = SSD_PV3_CHIP_INFO_REG_SZ;
10967 }
10968
10969 return 0;
10970 }
10971
10972 static int ssd_init_hw_info(struct ssd_device *dev)
10973 {
10974 uint64_t val64;
10975 uint32_t val;
10976 uint32_t nr_ctrl;
10977 int ret = 0;
10978
10979 /* base info */
10980 val = ssd_reg32_read(dev->ctrlp + SSD_RESP_INFO_REG);
10981 dev->hw_info.resp_ptr_sz = 16 * (1U << (val & 0xFF));
10982 dev->hw_info.resp_msg_sz = 16 * (1U << ((val >> 8) & 0xFF));
10983
10984 if (0 == dev->hw_info.resp_ptr_sz || 0 == dev->hw_info.resp_msg_sz) {
10985 hio_warn("%s: response info error\n", dev->name);
10986 ret = -EINVAL;
10987 goto out;
10988 }
10989
10990 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
10991 dev->hw_info.cmd_fifo_sz = 1U << ((val >> 4) & 0xF);
10992 dev->hw_info.cmd_max_sg = 1U << ((val >> 8) & 0xF);
10993 dev->hw_info.sg_max_sec = 1U << ((val >> 12) & 0xF);
10994 dev->hw_info.cmd_fifo_sz_mask = dev->hw_info.cmd_fifo_sz - 1;
10995
10996 if (0 == dev->hw_info.cmd_fifo_sz || 0 == dev->hw_info.cmd_max_sg || 0 == dev->hw_info.sg_max_sec) {
10997 hio_warn("%s: cmd info error\n", dev->name);
10998 ret = -EINVAL;
10999 goto out;
11000 }
11001
11002 /* check hw */
11003 if (ssd_check_hw_bh(dev)) {
11004 hio_warn("%s: check hardware status failed\n", dev->name);
11005 ret = -EINVAL;
11006 goto out;
11007 }
11008
11009 if (ssd_check_controller(dev)) {
11010 hio_warn("%s: check controller state failed\n", dev->name);
11011 ret = -EINVAL;
11012 goto out;
11013 }
11014
11015 /* nr controller : read again*/
11016 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
11017 dev->hw_info.nr_ctrl = (val >> 16) & 0xF;
11018
11019 /* nr ctrl configured */
11020 nr_ctrl = (val >> 20) & 0xF;
11021 if (0 == dev->hw_info.nr_ctrl) {
11022 hio_warn("%s: nr controller error: %u\n", dev->name, dev->hw_info.nr_ctrl);
11023 ret = -EINVAL;
11024 goto out;
11025 } else if (0 != nr_ctrl && nr_ctrl != dev->hw_info.nr_ctrl) {
11026 hio_warn("%s: nr controller error: configured %u but found %u\n", dev->name, nr_ctrl, dev->hw_info.nr_ctrl);
11027 if (mode <= SSD_DRV_MODE_STANDARD) {
11028 ret = -EINVAL;
11029 goto out;
11030 }
11031 }
11032
11033 if (ssd_check_controller_bh(dev)) {
11034 hio_warn("%s: check controller failed\n", dev->name);
11035 ret = -EINVAL;
11036 goto out;
11037 }
11038
11039 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
11040 dev->hw_info.pcb_ver = (uint8_t) ((val >> 4) & 0xF) + 'A' -1;
11041 if ((val & 0xF) != 0xF) {
11042 dev->hw_info.upper_pcb_ver = (uint8_t) (val & 0xF) + 'A' -1;
11043 }
11044
11045 if (dev->hw_info.pcb_ver < 'A' || (0 != dev->hw_info.upper_pcb_ver && dev->hw_info.upper_pcb_ver < 'A')) {
11046 hio_warn("%s: PCB version error: %#x %#x\n", dev->name, dev->hw_info.pcb_ver, dev->hw_info.upper_pcb_ver);
11047 ret = -EINVAL;
11048 goto out;
11049 }
11050
11051 /* channel info */
11052 if (mode <= SSD_DRV_MODE_DEBUG) {
11053 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
11054 dev->hw_info.nr_data_ch = val & 0xFF;
11055 dev->hw_info.nr_ch = dev->hw_info.nr_data_ch + ((val >> 8) & 0xFF);
11056 dev->hw_info.nr_chip = (val >> 16) & 0xFF;
11057
11058 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11059 dev->hw_info.max_ch = 1;
11060 while (dev->hw_info.max_ch < dev->hw_info.nr_ch) dev->hw_info.max_ch <<= 1;
11061 } else {
11062 /* set max channel 32 */
11063 dev->hw_info.max_ch = 32;
11064 }
11065
11066 if (0 == dev->hw_info.nr_chip) {
11067 //for debug mode
11068 dev->hw_info.nr_chip = 1;
11069 }
11070
11071 //xx
11072 dev->hw_info.id_size = SSD_NAND_ID_SZ;
11073 dev->hw_info.max_ce = SSD_NAND_MAX_CE;
11074
11075 if (0 == dev->hw_info.nr_data_ch || 0 == dev->hw_info.nr_ch || 0 == dev->hw_info.nr_chip) {
11076 hio_warn("%s: channel info error: data_ch %u ch %u chip %u\n", dev->name, dev->hw_info.nr_data_ch, dev->hw_info.nr_ch, dev->hw_info.nr_chip);
11077 ret = -EINVAL;
11078 goto out;
11079 }
11080 }
11081
11082 /* ram info */
11083 if (mode <= SSD_DRV_MODE_DEBUG) {
11084 val = ssd_reg32_read(dev->ctrlp + SSD_RAM_INFO_REG);
11085 dev->hw_info.ram_size = 0x4000000ull * (1ULL << (val & 0xF));
11086 dev->hw_info.ram_align = 1U << ((val >> 12) & 0xF);
11087 if (dev->hw_info.ram_align < SSD_RAM_ALIGN) {
11088 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11089 dev->hw_info.ram_align = SSD_RAM_ALIGN;
11090 } else {
11091 hio_warn("%s: ram align error: %u\n", dev->name, dev->hw_info.ram_align);
11092 ret = -EINVAL;
11093 goto out;
11094 }
11095 }
11096 dev->hw_info.ram_max_len = 0x1000 * (1U << ((val >> 16) & 0xF));
11097
11098 if (0 == dev->hw_info.ram_size || 0 == dev->hw_info.ram_align || 0 == dev->hw_info.ram_max_len || dev->hw_info.ram_align > dev->hw_info.ram_max_len) {
11099 hio_warn("%s: ram info error\n", dev->name);
11100 ret = -EINVAL;
11101 goto out;
11102 }
11103
11104 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11105 dev->hw_info.log_sz = SSD_LOG_MAX_SZ;
11106 } else {
11107 val = ssd_reg32_read(dev->ctrlp + SSD_LOG_INFO_REG);
11108 dev->hw_info.log_sz = 0x1000 * (1U << (val & 0xFF));
11109 }
11110 if (0 == dev->hw_info.log_sz) {
11111 hio_warn("%s: log size error\n", dev->name);
11112 ret = -EINVAL;
11113 goto out;
11114 }
11115
11116 val = ssd_reg32_read(dev->ctrlp + SSD_BBT_BASE_REG);
11117 dev->hw_info.bbt_base = 0x40000ull * (val & 0xFFFF);
11118 dev->hw_info.bbt_size = 0x40000 * (((val >> 16) & 0xFFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
11119 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11120 if (dev->hw_info.bbt_base > dev->hw_info.ram_size || 0 == dev->hw_info.bbt_size) {
11121 hio_warn("%s: bbt info error\n", dev->name);
11122 ret = -EINVAL;
11123 goto out;
11124 }
11125 }
11126
11127 val = ssd_reg32_read(dev->ctrlp + SSD_ECT_BASE_REG);
11128 dev->hw_info.md_base = 0x40000ull * (val & 0xFFFF);
11129 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
11130 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
11131 } else {
11132 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.nr_chip);
11133 }
11134 dev->hw_info.md_entry_sz = 8 * (1U << ((val >> 28) & 0xF));
11135 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3) {
11136 if (dev->hw_info.md_base > dev->hw_info.ram_size || 0 == dev->hw_info.md_size ||
11137 0 == dev->hw_info.md_entry_sz || dev->hw_info.md_entry_sz > dev->hw_info.md_size) {
11138 hio_warn("%s: md info error\n", dev->name);
11139 ret = -EINVAL;
11140 goto out;
11141 }
11142 }
11143
11144 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11145 dev->hw_info.nand_wbuff_base = dev->hw_info.ram_size + 1;
11146 } else {
11147 val = ssd_reg32_read(dev->ctrlp + SSD_NAND_BUFF_BASE);
11148 dev->hw_info.nand_wbuff_base = 0x8000ull * val;
11149 }
11150 }
11151
11152 /* flash info */
11153 if (mode <= SSD_DRV_MODE_DEBUG) {
11154 if (dev->hw_info.nr_ctrl > 1) {
11155 val = ssd_reg32_read(dev->ctrlp + SSD_CTRL_VER_REG);
11156 dev->hw_info.ctrl_ver = val & 0xFFF;
11157 hio_info("%s: controller firmware version: %03X\n", dev->name, dev->hw_info.ctrl_ver);
11158 }
11159
11160 val64 = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
11161 dev->hw_info.nand_vendor_id = ((val64 >> 56) & 0xFF);
11162 dev->hw_info.nand_dev_id = ((val64 >> 48) & 0xFF);
11163
11164 dev->hw_info.block_count = (((val64 >> 32) & 0xFFFF) + 1);
11165 dev->hw_info.page_count = ((val64>>16) & 0xFFFF);
11166 dev->hw_info.page_size = (val64 & 0xFFFF);
11167
11168 val = ssd_reg32_read(dev->ctrlp + SSD_BB_INFO_REG);
11169 dev->hw_info.bbf_pages = val & 0xFF;
11170 dev->hw_info.bbf_seek = (val >> 8) & 0x1;
11171
11172 if (0 == dev->hw_info.block_count || 0 == dev->hw_info.page_count || 0 == dev->hw_info.page_size || dev->hw_info.block_count > INT_MAX) {
11173 hio_warn("%s: flash info error\n", dev->name);
11174 ret = -EINVAL;
11175 goto out;
11176 }
11177
11178 //xx
11179 dev->hw_info.oob_size = SSD_NAND_OOB_SZ; //(dev->hw_info.page_size) >> 5;
11180
11181 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
11182 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11183 dev->hw_info.valid_pages = val & 0x3FF;
11184 dev->hw_info.max_valid_pages = (val>>20) & 0x3FF;
11185 } else {
11186 dev->hw_info.valid_pages = val & 0x7FFF;
11187 dev->hw_info.max_valid_pages = (val>>15) & 0x7FFF;
11188 }
11189 if (0 == dev->hw_info.valid_pages || 0 == dev->hw_info.max_valid_pages ||
11190 dev->hw_info.valid_pages > dev->hw_info.max_valid_pages || dev->hw_info.max_valid_pages > dev->hw_info.page_count) {
11191 hio_warn("%s: valid page info error: valid_pages %d, max_valid_pages %d\n", dev->name, dev->hw_info.valid_pages, dev->hw_info.max_valid_pages);
11192 ret = -EINVAL;
11193 goto out;
11194 }
11195
11196 val = ssd_reg32_read(dev->ctrlp + SSD_RESERVED_BLKS_REG);
11197 dev->hw_info.reserved_blks = val & 0xFFFF;
11198 dev->hw_info.md_reserved_blks = (val >> 16) & 0xFF;
11199 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
11200 dev->hw_info.md_reserved_blks = SSD_BBT_RESERVED;
11201 }
11202 if (dev->hw_info.reserved_blks > dev->hw_info.block_count || dev->hw_info.md_reserved_blks > dev->hw_info.block_count) {
11203 hio_warn("%s: reserved blocks info error: reserved_blks %d, md_reserved_blks %d\n", dev->name, dev->hw_info.reserved_blks, dev->hw_info.md_reserved_blks);
11204 ret = -EINVAL;
11205 goto out;
11206 }
11207 }
11208
11209 /* size */
11210 if (mode < SSD_DRV_MODE_DEBUG) {
11211 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
11212 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
11213 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
11214 }
11215
11216 /* extend hardware info */
11217 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
11218 dev->hw_info_ext.board_type = (val >> 24) & 0xF;
11219
11220 dev->hw_info_ext.form_factor = SSD_FORM_FACTOR_FHHL;
11221 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_1) {
11222 dev->hw_info_ext.form_factor = (val >> 31) & 0x1;
11223 }
11224 /*
11225 dev->hw_info_ext.cap_type = (val >> 28) & 0x3;
11226 if (SSD_BM_CAP_VINA != dev->hw_info_ext.cap_type && SSD_BM_CAP_JH != dev->hw_info_ext.cap_type) {
11227 dev->hw_info_ext.cap_type = SSD_BM_CAP_VINA;
11228 }*/
11229
11230 /* power loss protect */
11231 val = ssd_reg32_read(dev->ctrlp + SSD_PLP_INFO_REG);
11232 dev->hw_info_ext.plp_type = (val & 0x3);
11233 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
11234 /* 3 or 4 cap */
11235 dev->hw_info_ext.cap_type = ((val >> 2)& 0x1);
11236 }
11237
11238 /* work mode */
11239 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
11240 dev->hw_info_ext.work_mode = (val >> 25) & 0x1;
11241
11242 out:
11243 /* skip error if not in standard mode */
11244 if (mode != SSD_DRV_MODE_STANDARD) {
11245 ret = 0;
11246 }
11247 return ret;
11248 }
11249
11250 static void ssd_cleanup_response(struct ssd_device *dev)
11251 {
11252 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11253 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11254
11255 pci_free_consistent(dev->pdev, resp_ptr_sz, dev->resp_ptr_base, dev->resp_ptr_base_dma);
11256 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11257 }
11258
11259 static int ssd_init_response(struct ssd_device *dev)
11260 {
11261 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11262 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11263
11264 dev->resp_msg_base = pci_alloc_consistent(dev->pdev, resp_msg_sz, &(dev->resp_msg_base_dma));
11265 if (!dev->resp_msg_base) {
11266 hio_warn("%s: unable to allocate resp msg DMA buffer\n", dev->name);
11267 goto out_alloc_resp_msg;
11268 }
11269 memset(dev->resp_msg_base, 0xFF, resp_msg_sz);
11270
11271 dev->resp_ptr_base = pci_alloc_consistent(dev->pdev, resp_ptr_sz, &(dev->resp_ptr_base_dma));
11272 if (!dev->resp_ptr_base){
11273 hio_warn("%s: unable to allocate resp ptr DMA buffer\n", dev->name);
11274 goto out_alloc_resp_ptr;
11275 }
11276 memset(dev->resp_ptr_base, 0, resp_ptr_sz);
11277 dev->resp_idx = *(uint32_t *)(dev->resp_ptr_base) = dev->hw_info.cmd_fifo_sz * 2 - 1;
11278
11279 ssd_reg_write(dev->ctrlp + SSD_RESP_FIFO_REG, dev->resp_msg_base_dma);
11280 ssd_reg_write(dev->ctrlp + SSD_RESP_PTR_REG, dev->resp_ptr_base_dma);
11281
11282 return 0;
11283
11284 out_alloc_resp_ptr:
11285 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11286 out_alloc_resp_msg:
11287 return -ENOMEM;
11288 }
11289
11290 static int ssd_cleanup_cmd(struct ssd_device *dev)
11291 {
11292 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11293 int i;
11294
11295 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11296 kfree(dev->cmd[i].sgl);
11297 }
11298 kfree(dev->cmd);
11299 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11300 return 0;
11301 }
11302
11303 static int ssd_init_cmd(struct ssd_device *dev)
11304 {
11305 int sgl_sz = sizeof(struct scatterlist) * dev->hw_info.cmd_max_sg;
11306 int cmd_sz = sizeof(struct ssd_cmd) * dev->hw_info.cmd_fifo_sz;
11307 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11308 int i;
11309
11310 spin_lock_init(&dev->cmd_lock);
11311
11312 dev->msg_base = pci_alloc_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), &dev->msg_base_dma);
11313 if (!dev->msg_base) {
11314 hio_warn("%s: can not alloc cmd msg\n", dev->name);
11315 goto out_alloc_msg;
11316 }
11317
11318 dev->cmd = kmalloc(cmd_sz, GFP_KERNEL);
11319 if (!dev->cmd) {
11320 hio_warn("%s: can not alloc cmd\n", dev->name);
11321 goto out_alloc_cmd;
11322 }
11323 memset(dev->cmd, 0, cmd_sz);
11324
11325 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11326 dev->cmd[i].sgl = kmalloc(sgl_sz, GFP_KERNEL);
11327 if (!dev->cmd[i].sgl) {
11328 hio_warn("%s: can not alloc cmd sgl %d\n", dev->name, i);
11329 goto out_alloc_sgl;
11330 }
11331
11332 dev->cmd[i].msg = dev->msg_base + (msg_sz * i);
11333 dev->cmd[i].msg_dma = dev->msg_base_dma + ((dma_addr_t)msg_sz * i);
11334
11335 dev->cmd[i].dev = dev;
11336 dev->cmd[i].tag = i;
11337 dev->cmd[i].flag = 0;
11338
11339 INIT_LIST_HEAD(&dev->cmd[i].list);
11340 }
11341
11342 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11343 dev->scmd = ssd_dispatch_cmd;
11344 } else {
11345 ssd_reg_write(dev->ctrlp + SSD_MSG_BASE_REG, dev->msg_base_dma);
11346 if (finject) {
11347 dev->scmd = ssd_send_cmd_db;
11348 } else {
11349 dev->scmd = ssd_send_cmd;
11350 }
11351 }
11352
11353 return 0;
11354
11355 out_alloc_sgl:
11356 for (i--; i>=0; i--) {
11357 kfree(dev->cmd[i].sgl);
11358 }
11359 kfree(dev->cmd);
11360 out_alloc_cmd:
11361 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11362 out_alloc_msg:
11363 return -ENOMEM;
11364 }
11365
11366 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
11367 static irqreturn_t ssd_interrupt_check(int irq, void *dev_id)
11368 {
11369 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11370
11371 if (*(uint32_t *)queue->resp_ptr == queue->resp_idx) {
11372 return IRQ_NONE;
11373 }
11374
11375 return IRQ_WAKE_THREAD;
11376 }
11377
11378 static irqreturn_t ssd_interrupt_threaded(int irq, void *dev_id)
11379 {
11380 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11381 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11382 struct ssd_cmd *cmd;
11383 union ssd_response_msq __msg;
11384 union ssd_response_msq *msg = &__msg;
11385 uint64_t *u64_msg;
11386 uint32_t resp_idx = queue->resp_idx;
11387 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11388 uint32_t end_resp_idx;
11389
11390 if (unlikely(resp_idx == new_resp_idx)) {
11391 return IRQ_NONE;
11392 }
11393
11394 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11395
11396 do {
11397 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11398
11399 /* the resp msg */
11400 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11401 msg->u64_msg = *u64_msg;
11402
11403 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11404 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11405 continue;
11406 }
11407 /* clear the resp msg */
11408 *u64_msg = (uint64_t)(-1);
11409
11410 cmd = &queue->cmd[msg->resp_msg.tag];
11411 /*if (unlikely(!cmd->bio)) {
11412 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11413 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11414 continue;
11415 }*/
11416
11417 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11418 cmd->errors = -EIO;
11419 } else {
11420 cmd->errors = 0;
11421 }
11422 cmd->nr_log = msg->log_resp_msg.nr_log;
11423
11424 ssd_done(cmd);
11425
11426 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11427 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11428 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11429 queue_work(dev->workq, &dev->log_work);
11430 }
11431 }
11432
11433 if (unlikely(msg->resp_msg.status)) {
11434 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11435 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11436 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11437
11438 /* alarm led */
11439 ssd_set_alarm(dev);
11440 queue->io_stat.nr_rwerr++;
11441 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11442 } else {
11443 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11444 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11445
11446 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11447 }
11448 queue->io_stat.nr_ioerr++;
11449 }
11450
11451 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11452 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11453 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11454
11455 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11456 }
11457 }while (resp_idx != end_resp_idx);
11458
11459 queue->resp_idx = new_resp_idx;
11460
11461 return IRQ_HANDLED;
11462 }
11463 #endif
11464
11465 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11466 static irqreturn_t ssd_interrupt(int irq, void *dev_id, struct pt_regs *regs)
11467 #else
11468 static irqreturn_t ssd_interrupt(int irq, void *dev_id)
11469 #endif
11470 {
11471 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11472 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11473 struct ssd_cmd *cmd;
11474 union ssd_response_msq __msg;
11475 union ssd_response_msq *msg = &__msg;
11476 uint64_t *u64_msg;
11477 uint32_t resp_idx = queue->resp_idx;
11478 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11479 uint32_t end_resp_idx;
11480
11481 if (unlikely(resp_idx == new_resp_idx)) {
11482 return IRQ_NONE;
11483 }
11484
11485 #if (defined SSD_ESCAPE_IRQ)
11486 if (SSD_INT_MSIX != dev->int_mode) {
11487 dev->irq_cpu = smp_processor_id();
11488 }
11489 #endif
11490
11491 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11492
11493 do {
11494 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11495
11496 /* the resp msg */
11497 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11498 msg->u64_msg = *u64_msg;
11499
11500 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11501 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11502 continue;
11503 }
11504 /* clear the resp msg */
11505 *u64_msg = (uint64_t)(-1);
11506
11507 cmd = &queue->cmd[msg->resp_msg.tag];
11508 /*if (unlikely(!cmd->bio)) {
11509 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11510 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11511 continue;
11512 }*/
11513
11514 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11515 cmd->errors = -EIO;
11516 } else {
11517 cmd->errors = 0;
11518 }
11519 cmd->nr_log = msg->log_resp_msg.nr_log;
11520
11521 ssd_done_bh(cmd);
11522
11523 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11524 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11525 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11526 queue_work(dev->workq, &dev->log_work);
11527 }
11528 }
11529
11530 if (unlikely(msg->resp_msg.status)) {
11531 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11532 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11533 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11534
11535 /* alarm led */
11536 ssd_set_alarm(dev);
11537 queue->io_stat.nr_rwerr++;
11538 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11539 } else {
11540 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11541 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11542
11543 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11544 }
11545 queue->io_stat.nr_ioerr++;
11546 }
11547
11548 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11549 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11550 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11551
11552 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11553 }
11554 }while (resp_idx != end_resp_idx);
11555
11556 queue->resp_idx = new_resp_idx;
11557
11558 return IRQ_HANDLED;
11559 }
11560
11561 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11562 static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id, struct pt_regs *regs)
11563 #else
11564 static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id)
11565 #endif
11566 {
11567 irqreturn_t ret;
11568 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11569 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11570
11571 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11572 ret = ssd_interrupt(irq, dev_id, regs);
11573 #else
11574 ret = ssd_interrupt(irq, dev_id);
11575 #endif
11576
11577 /* clear intr */
11578 if (IRQ_HANDLED == ret) {
11579 ssd_reg32_write(dev->ctrlp + SSD_CLEAR_INTR_REG, 1);
11580 }
11581
11582 return ret;
11583 }
11584
11585 static void ssd_reset_resp_ptr(struct ssd_device *dev)
11586 {
11587 int i;
11588
11589 for (i=0; i<dev->nr_queue; i++) {
11590 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11591 }
11592 }
11593
11594 static void ssd_free_irq(struct ssd_device *dev)
11595 {
11596 int i;
11597
11598 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11599 if (SSD_INT_MSIX == dev->int_mode) {
11600 for (i=0; i<dev->nr_queue; i++) {
11601 irq_set_affinity_hint(dev->entry[i].vector, NULL);
11602 }
11603 }
11604 #endif
11605
11606 for (i=0; i<dev->nr_queue; i++) {
11607 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11608 free_irq(dev->entry[i].vector, &dev->queue[i]);
11609 #else
11610 free_irq(pci_irq_vector(dev->pdev, i), &dev->queue[i]);
11611 #endif
11612 }
11613
11614 if (SSD_INT_MSIX == dev->int_mode) {
11615 pci_disable_msix(dev->pdev);
11616 } else if (SSD_INT_MSI == dev->int_mode) {
11617 pci_disable_msi(dev->pdev);
11618 }
11619
11620 }
11621
11622 static int ssd_init_irq(struct ssd_device *dev)
11623 {
11624 #if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE) && (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11625 const struct cpumask *cpu_mask = NULL;
11626 static int cpu_affinity = 0;
11627 #endif
11628 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11629 const struct cpumask *mask = NULL;
11630 static int cpu = 0;
11631 int j;
11632 #endif
11633 int i;
11634 unsigned long flags = 0;
11635 int ret = 0;
11636
11637 ssd_reg32_write(dev->ctrlp + SSD_INTR_INTERVAL_REG, 0x800);
11638
11639 #ifdef SSD_ESCAPE_IRQ
11640 dev->irq_cpu = -1;
11641 #endif
11642
11643 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11644 if (int_mode >= SSD_INT_MSIX && pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
11645 dev->nr_queue = SSD_MSIX_VEC;
11646
11647 for (i=0; i<dev->nr_queue; i++) {
11648 dev->entry[i].entry = i;
11649 }
11650 for (;;) {
11651 ret = pci_enable_msix(dev->pdev, dev->entry, dev->nr_queue);
11652 if (ret == 0) {
11653 break;
11654 } else if (ret > 0) {
11655 dev->nr_queue = ret;
11656 } else {
11657 hio_warn("%s: can not enable msix\n", dev->name);
11658 /* alarm led */
11659 ssd_set_alarm(dev);
11660 goto out;
11661 }
11662 }
11663
11664 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11665 mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11666 if ((0 == cpu) || (!cpumask_intersects(mask, cpumask_of(cpu)))) {
11667 cpu = cpumask_first(mask);
11668 }
11669 for (i=0; i<dev->nr_queue; i++) {
11670 irq_set_affinity_hint(dev->entry[i].vector, cpumask_of(cpu));
11671 cpu = cpumask_next(cpu, mask);
11672 if (cpu >= nr_cpu_ids) {
11673 cpu = cpumask_first(mask);
11674 }
11675 }
11676 #endif
11677
11678 dev->int_mode = SSD_INT_MSIX;
11679 } else if (int_mode >= SSD_INT_MSI && pci_find_capability(dev->pdev, PCI_CAP_ID_MSI)) {
11680 ret = pci_enable_msi(dev->pdev);
11681 if (ret) {
11682 hio_warn("%s: can not enable msi\n", dev->name);
11683 /* alarm led */
11684 ssd_set_alarm(dev);
11685 goto out;
11686 }
11687
11688 dev->nr_queue = 1;
11689 dev->entry[0].vector = dev->pdev->irq;
11690
11691 dev->int_mode = SSD_INT_MSI;
11692 } else {
11693 dev->nr_queue = 1;
11694 dev->entry[0].vector = dev->pdev->irq;
11695
11696 dev->int_mode = SSD_INT_LEGACY;
11697 }
11698 #else
11699 if (int_mode >= SSD_INT_MSIX && pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
11700 dev->nr_queue = SSD_MSIX_VEC;
11701
11702 dev->nr_queue = pci_alloc_irq_vectors(dev->pdev, 1, dev->nr_queue, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
11703 if (dev->nr_queue <= 0) {
11704 ret = -EIO;
11705 hio_warn("%s: can not enable msix\n", dev->name);
11706 ssd_set_alarm(dev);
11707 goto out;
11708 }
11709
11710 dev->int_mode = SSD_INT_MSIX;
11711 } else if (int_mode >= SSD_INT_MSI && pci_find_capability(dev->pdev, PCI_CAP_ID_MSI)) {
11712
11713 ret = pci_alloc_irq_vectors(dev->pdev, 1, 1, PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
11714 if (ret <= 0) {
11715 ret = -EIO;
11716 hio_warn("%s: can not enable msi\n", dev->name);
11717 /* alarm led */
11718 ssd_set_alarm(dev);
11719 goto out;
11720 }
11721 dev->nr_queue = 1;
11722
11723 dev->int_mode = SSD_INT_MSI;
11724 } else {
11725 ret = pci_alloc_irq_vectors(dev->pdev, 1, 1, PCI_IRQ_LEGACY);
11726
11727 if (ret <= 0) {
11728 ret = -EIO;
11729 hio_warn("%s: can not enable msi\n", dev->name);
11730 /* alarm led */
11731 ssd_set_alarm(dev);
11732 goto out;
11733 }
11734 dev->nr_queue = 1;
11735
11736 dev->int_mode = SSD_INT_LEGACY;
11737 }
11738 #endif
11739
11740 for (i=0; i<dev->nr_queue; i++) {
11741 if (dev->nr_queue > 1) {
11742 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100-%d", dev->name, i);
11743 } else {
11744 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100", dev->name);
11745 }
11746
11747 dev->queue[i].dev = dev;
11748 dev->queue[i].idx = i;
11749
11750 dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11751 dev->queue[i].resp_idx_mask = dev->hw_info.cmd_fifo_sz - 1;
11752
11753 dev->queue[i].resp_msg_sz = dev->hw_info.resp_msg_sz;
11754 dev->queue[i].resp_msg = dev->resp_msg_base + dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * i;
11755 dev->queue[i].resp_ptr = dev->resp_ptr_base + dev->hw_info.resp_ptr_sz * i;
11756 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx;
11757
11758 dev->queue[i].cmd = dev->cmd;
11759 }
11760
11761 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
11762 flags = IRQF_SHARED;
11763 #else
11764 flags = SA_SHIRQ;
11765 #endif
11766
11767 for (i=0; i<dev->nr_queue; i++) {
11768 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
11769 if (dev->int_mode == SSD_INT_LEGACY) {
11770 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11771 } else {
11772 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11773 }
11774 #elif (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11775 if (threaded_irq) {
11776 ret = request_threaded_irq(dev->entry[i].vector, ssd_interrupt_check, ssd_interrupt_threaded, flags, dev->queue[i].name, &dev->queue[i]);
11777 } else if (dev->int_mode == SSD_INT_LEGACY) {
11778 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11779 } else {
11780 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11781 }
11782 #else
11783 if (threaded_irq) {
11784 ret = request_threaded_irq(pci_irq_vector(dev->pdev, i), ssd_interrupt_check, ssd_interrupt_threaded, flags, dev->queue[i].name, &dev->queue[i]);
11785 } else if (dev->int_mode == SSD_INT_LEGACY) {
11786 ret = request_irq(pci_irq_vector(dev->pdev, i), &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11787 } else {
11788 ret = request_irq(pci_irq_vector(dev->pdev, i), &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11789 }
11790 #endif
11791 if (ret) {
11792 hio_warn("%s: request irq failed\n", dev->name);
11793 /* alarm led */
11794 ssd_set_alarm(dev);
11795 goto out_request_irq;
11796 }
11797
11798 #if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE) && (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11799 cpu_mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11800 if (SSD_INT_MSIX == dev->int_mode) {
11801 if ((0 == cpu_affinity) || (!cpumask_intersects(mask, cpumask_of(cpu_affinity)))) {
11802 cpu_affinity = cpumask_first(cpu_mask);
11803 }
11804
11805 irq_set_affinity(dev->entry[i].vector, cpumask_of(cpu_affinity));
11806 cpu_affinity = cpumask_next(cpu_affinity, cpu_mask);
11807 if (cpu_affinity >= nr_cpu_ids) {
11808 cpu_affinity = cpumask_first(cpu_mask);
11809 }
11810 }
11811 #endif
11812 }
11813
11814 return ret;
11815
11816 out_request_irq:
11817 #if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11818 if (SSD_INT_MSIX == dev->int_mode) {
11819 for (j=0; j<dev->nr_queue; j++) {
11820 irq_set_affinity_hint(dev->entry[j].vector, NULL);
11821 }
11822 }
11823 #endif
11824
11825 for (i--; i>=0; i--) {
11826 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0))
11827 free_irq(dev->entry[i].vector, &dev->queue[i]);
11828 #else
11829 free_irq(pci_irq_vector(dev->pdev, i), &dev->queue[i]);
11830 #endif
11831 }
11832
11833 if (SSD_INT_MSIX == dev->int_mode) {
11834 pci_disable_msix(dev->pdev);
11835 } else if (SSD_INT_MSI == dev->int_mode) {
11836 pci_disable_msi(dev->pdev);
11837 }
11838
11839 out:
11840 return ret;
11841 }
11842
11843 static void ssd_initial_log(struct ssd_device *dev)
11844 {
11845 uint32_t val;
11846 uint32_t speed, width;
11847
11848 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11849 return;
11850 }
11851
11852 val = ssd_reg32_read(dev->ctrlp + SSD_POWER_ON_REG);
11853 if (val) {
11854 // Poweron detection switched to SSD_INTR_INTERVAL_REG in 'ssd_init_smart'
11855 //ssd_gen_swlog(dev, SSD_LOG_POWER_ON, dev->hw_info.bridge_ver);
11856 }
11857
11858 val = ssd_reg32_read(dev->ctrlp + SSD_PCIE_LINKSTATUS_REG);
11859 speed = val & 0xF;
11860 width = (val >> 4)& 0x3F;
11861 if (0x1 == speed) {
11862 hio_info("%s: PCIe: 2.5GT/s, x%u\n", dev->name, width);
11863 } else if (0x2 == speed) {
11864 hio_info("%s: PCIe: 5GT/s, x%u\n", dev->name, width);
11865 } else {
11866 hio_info("%s: PCIe: unknown GT/s, x%u\n", dev->name, width);
11867 }
11868 ssd_gen_swlog(dev, SSD_LOG_PCIE_LINK_STATUS, val);
11869
11870 return;
11871 }
11872
11873 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11874 static void ssd_hwmon_worker(void *data)
11875 {
11876 struct ssd_device *dev = (struct ssd_device *)data;
11877 #else
11878 static void ssd_hwmon_worker(struct work_struct *work)
11879 {
11880 struct ssd_device *dev = container_of(work, struct ssd_device, hwmon_work);
11881 #endif
11882
11883 if (ssd_check_hw(dev)) {
11884 //hio_err("%s: check hardware failed\n", dev->name);
11885 return;
11886 }
11887
11888 ssd_check_clock(dev);
11889 ssd_check_volt(dev);
11890
11891 ssd_mon_boardvolt(dev);
11892 }
11893
11894 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11895 static void ssd_tempmon_worker(void *data)
11896 {
11897 struct ssd_device *dev = (struct ssd_device *)data;
11898 #else
11899 static void ssd_tempmon_worker(struct work_struct *work)
11900 {
11901 struct ssd_device *dev = container_of(work, struct ssd_device, tempmon_work);
11902 #endif
11903
11904 if (ssd_check_hw(dev)) {
11905 //hio_err("%s: check hardware failed\n", dev->name);
11906 return;
11907 }
11908
11909 ssd_mon_temp(dev);
11910 }
11911
11912
11913 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11914 static void ssd_capmon_worker(void *data)
11915 {
11916 struct ssd_device *dev = (struct ssd_device *)data;
11917 #else
11918 static void ssd_capmon_worker(struct work_struct *work)
11919 {
11920 struct ssd_device *dev = container_of(work, struct ssd_device, capmon_work);
11921 #endif
11922 uint32_t cap = 0;
11923 uint32_t cap_threshold = SSD_PL_CAP_THRESHOLD;
11924 int ret = 0;
11925
11926 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11927 return;
11928 }
11929
11930 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
11931 return;
11932 }
11933
11934 /* fault before? */
11935 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11936 ret = ssd_check_pl_cap_fast(dev);
11937 if (ret) {
11938 return;
11939 }
11940 }
11941
11942 /* learn */
11943 ret = ssd_do_cap_learn(dev, &cap);
11944 if (ret) {
11945 hio_err("%s: cap learn failed\n", dev->name);
11946 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
11947 return;
11948 }
11949
11950 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, cap);
11951
11952 if (SSD_PL_CAP_CP == dev->hw_info_ext.cap_type) {
11953 cap_threshold = SSD_PL_CAP_CP_THRESHOLD;
11954 }
11955
11956 //use the fw event id?
11957 if (cap < cap_threshold) {
11958 if (!test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11959 ssd_gen_swlog(dev, SSD_LOG_BATTERY_FAULT, 0);
11960 }
11961 } else if (cap >= (cap_threshold + SSD_PL_CAP_THRESHOLD_HYST)) {
11962 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11963 ssd_gen_swlog(dev, SSD_LOG_BATTERY_OK, 0);
11964 }
11965 }
11966 }
11967
11968 static void ssd_routine_start(void *data)
11969 {
11970 struct ssd_device *dev;
11971
11972 if (!data) {
11973 return;
11974 }
11975 dev = data;
11976
11977 dev->routine_tick++;
11978
11979 if (test_bit(SSD_INIT_WORKQ, &dev->state) && !ssd_busy(dev)) {
11980 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11981 queue_work(dev->workq, &dev->log_work);
11982 }
11983
11984 if ((dev->routine_tick % SSD_HWMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11985 queue_work(dev->workq, &dev->hwmon_work);
11986 }
11987
11988 if ((dev->routine_tick % SSD_CAPMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11989 queue_work(dev->workq, &dev->capmon_work);
11990 }
11991
11992 if ((dev->routine_tick % SSD_CAPMON2_ROUTINE_TICK) == 0 && test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon) && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11993 /* CAP fault? check again */
11994 queue_work(dev->workq, &dev->capmon_work);
11995 }
11996
11997 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11998 queue_work(dev->workq, &dev->tempmon_work);
11999 }
12000
12001 /* schedule routine */
12002 mod_timer(&dev->routine_timer, jiffies + msecs_to_jiffies(SSD_ROUTINE_INTERVAL));
12003 }
12004
12005 static void ssd_cleanup_routine(struct ssd_device *dev)
12006 {
12007 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
12008 return;
12009
12010 (void)ssd_del_timer(&dev->routine_timer);
12011
12012 (void)ssd_del_timer(&dev->bm_timer);
12013 }
12014
12015 static int ssd_init_routine(struct ssd_device *dev)
12016 {
12017 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
12018 return 0;
12019
12020 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
12021 INIT_WORK(&dev->bm_work, ssd_bm_worker, dev);
12022 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker, dev);
12023 INIT_WORK(&dev->capmon_work, ssd_capmon_worker, dev);
12024 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker, dev);
12025 #else
12026 INIT_WORK(&dev->bm_work, ssd_bm_worker);
12027 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker);
12028 INIT_WORK(&dev->capmon_work, ssd_capmon_worker);
12029 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker);
12030 #endif
12031
12032 /* initial log */
12033 ssd_initial_log(dev);
12034
12035 /* schedule bm routine */
12036 ssd_add_timer(&dev->bm_timer, msecs_to_jiffies(SSD_BM_CAP_LEARNING_DELAY), ssd_bm_routine_start, dev);
12037
12038 /* schedule routine */
12039 ssd_add_timer(&dev->routine_timer, msecs_to_jiffies(SSD_ROUTINE_INTERVAL), ssd_routine_start, dev);
12040
12041 return 0;
12042 }
12043
12044 static void
12045 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
12046 __devexit
12047 #endif
12048 ssd_remove_one (struct pci_dev *pdev)
12049 {
12050 struct ssd_device *dev;
12051
12052 if (!pdev) {
12053 return;
12054 }
12055
12056 dev = pci_get_drvdata(pdev);
12057 if (!dev) {
12058 return;
12059 }
12060
12061 list_del_init(&dev->list);
12062
12063 ssd_unregister_sysfs(dev);
12064
12065 /* offline firstly */
12066 test_and_clear_bit(SSD_ONLINE, &dev->state);
12067
12068 /* clean work queue first */
12069 if (!dev->slave) {
12070 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
12071 ssd_cleanup_workq(dev);
12072 }
12073
12074 /* flush cache */
12075 (void)ssd_flush(dev);
12076 (void)ssd_save_md(dev);
12077
12078 /* save smart */
12079 if (!dev->slave) {
12080 ssd_save_smart(dev);
12081 }
12082
12083 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
12084 ssd_cleanup_blkdev(dev);
12085 }
12086
12087 if (!dev->slave) {
12088 ssd_cleanup_chardev(dev);
12089 }
12090
12091 /* clean routine */
12092 if (!dev->slave) {
12093 ssd_cleanup_routine(dev);
12094 }
12095
12096 ssd_cleanup_queue(dev);
12097
12098 ssd_cleanup_tag(dev);
12099 ssd_cleanup_thread(dev);
12100
12101 ssd_free_irq(dev);
12102
12103 ssd_cleanup_dcmd(dev);
12104 ssd_cleanup_cmd(dev);
12105 ssd_cleanup_response(dev);
12106
12107 if (!dev->slave) {
12108 ssd_cleanup_log(dev);
12109 }
12110
12111 if (dev->reload_fw) { //reload fw
12112 dev->has_non_0x98_reg_access = 1;
12113 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
12114 }
12115
12116 /* unmap physical adress */
12117 #ifdef LINUX_SUSE_OS
12118 iounmap(dev->ctrlp);
12119 #else
12120 pci_iounmap(pdev, dev->ctrlp);
12121 #endif
12122
12123 release_mem_region(dev->mmio_base, dev->mmio_len);
12124
12125 pci_disable_device(pdev);
12126
12127 pci_set_drvdata(pdev, NULL);
12128
12129 ssd_put(dev);
12130 }
12131
12132 static int
12133 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
12134 __devinit
12135 #endif
12136 ssd_init_one(struct pci_dev *pdev,
12137 const struct pci_device_id *ent)
12138 {
12139 struct ssd_device *dev;
12140 struct timeval tv;
12141 int ret = 0;
12142
12143 if (!pdev || !ent) {
12144 ret = -EINVAL;
12145 goto out;
12146 }
12147
12148 dev = kmalloc(sizeof(struct ssd_device), GFP_KERNEL);
12149 if (!dev) {
12150 ret = -ENOMEM;
12151 goto out_alloc_dev;
12152 }
12153 memset(dev, 0, sizeof(struct ssd_device));
12154
12155 dev->owner = THIS_MODULE;
12156
12157 if (SSD_SLAVE_PORT_DEVID == ent->device) {
12158 dev->slave = 1;
12159 }
12160
12161 dev->idx = ssd_get_index(dev->slave);
12162 if (dev->idx < 0) {
12163 ret = -ENOMEM;
12164 goto out_get_index;
12165 }
12166
12167 if (!dev->slave) {
12168 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_DEV_NAME);
12169 ssd_set_dev_name(&dev->name[strlen(SSD_DEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_DEV_NAME), dev->idx);
12170
12171 dev->major = ssd_major;
12172 dev->cmajor = ssd_cmajor;
12173 } else {
12174 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_SDEV_NAME);
12175 ssd_set_dev_name(&dev->name[strlen(SSD_SDEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_SDEV_NAME), dev->idx);
12176 dev->major = ssd_major_sl;
12177 dev->cmajor = 0;
12178 }
12179
12180 do_gettimeofday(&tv);
12181 dev->reset_time = tv.tv_sec;
12182
12183 atomic_set(&(dev->refcnt), 0);
12184 atomic_set(&(dev->tocnt), 0);
12185
12186 mutex_init(&dev->fw_mutex);
12187
12188 //xx
12189 mutex_init(&dev->gd_mutex);
12190 dev->has_non_0x98_reg_access = 0;
12191
12192 //init in_flight lock
12193 spin_lock_init(&dev->in_flight_lock);
12194
12195 dev->pdev = pdev;
12196 pci_set_drvdata(pdev, dev);
12197
12198 kref_init(&dev->kref);
12199
12200 ret = pci_enable_device(pdev);
12201 if (ret) {
12202 hio_warn("%s: can not enable device\n", dev->name);
12203 goto out_enable_device;
12204 }
12205
12206 pci_set_master(pdev);
12207
12208 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
12209 ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
12210 #else
12211 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
12212 #endif
12213 if (ret) {
12214 hio_warn("%s: set dma mask: failed\n", dev->name);
12215 goto out_set_dma_mask;
12216 }
12217
12218 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
12219 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
12220 #else
12221 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
12222 #endif
12223 if (ret) {
12224 hio_warn("%s: set consistent dma mask: failed\n", dev->name);
12225 goto out_set_dma_mask;
12226 }
12227
12228 dev->mmio_base = pci_resource_start(pdev, 0);
12229 dev->mmio_len = pci_resource_len(pdev, 0);
12230
12231 if (!request_mem_region(dev->mmio_base, dev->mmio_len, SSD_DEV_NAME)) {
12232 hio_warn("%s: can not reserve MMIO region 0\n", dev->name);
12233 ret = -EBUSY;
12234 goto out_request_mem_region;
12235 }
12236
12237 /* 2.6.9 kernel bug */
12238 dev->ctrlp = pci_iomap(pdev, 0, 0);
12239 if (!dev->ctrlp) {
12240 hio_warn("%s: can not remap IO region 0\n", dev->name);
12241 ret = -ENOMEM;
12242 goto out_pci_iomap;
12243 }
12244
12245 ret = ssd_check_hw(dev);
12246 if (ret) {
12247 hio_err("%s: check hardware failed\n", dev->name);
12248 goto out_check_hw;
12249 }
12250
12251 ret = ssd_init_protocol_info(dev);
12252 if (ret) {
12253 hio_err("%s: init protocol info failed\n", dev->name);
12254 goto out_init_protocol_info;
12255 }
12256
12257 /* alarm led ? */
12258 ssd_clear_alarm(dev);
12259
12260 ret = ssd_init_fw_info(dev);
12261 if (ret) {
12262 hio_err("%s: init firmware info failed\n", dev->name);
12263 /* alarm led */
12264 ssd_set_alarm(dev);
12265 goto out_init_fw_info;
12266 }
12267
12268 /* slave port ? */
12269 if (dev->slave) {
12270 goto init_next1;
12271 }
12272
12273 ret = ssd_init_rom_info(dev);
12274 if (ret) {
12275 hio_err("%s: init rom info failed\n", dev->name);
12276 /* alarm led */
12277 ssd_set_alarm(dev);
12278 goto out_init_rom_info;
12279 }
12280
12281 ret = ssd_init_label(dev);
12282 if (ret) {
12283 hio_err("%s: init label failed\n", dev->name);
12284 /* alarm led */
12285 ssd_set_alarm(dev);
12286 goto out_init_label;
12287 }
12288
12289 ret = ssd_init_workq(dev);
12290 if (ret) {
12291 hio_warn("%s: init workq failed\n", dev->name);
12292 goto out_init_workq;
12293 }
12294 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
12295
12296 ret = ssd_init_log(dev);
12297 if (ret) {
12298 hio_err("%s: init log failed\n", dev->name);
12299 /* alarm led */
12300 ssd_set_alarm(dev);
12301 goto out_init_log;
12302 }
12303
12304 ret = ssd_init_smart(dev);
12305 if (ret) {
12306 hio_err("%s: init info failed\n", dev->name);
12307 /* alarm led */
12308 ssd_set_alarm(dev);
12309 goto out_init_smart;
12310 }
12311
12312 init_next1:
12313 ret = ssd_init_hw_info(dev);
12314 if (ret) {
12315 hio_err("%s: init hardware info failed\n", dev->name);
12316 /* alarm led */
12317 ssd_set_alarm(dev);
12318 goto out_init_hw_info;
12319 }
12320
12321 /* slave port ? */
12322 if (dev->slave) {
12323 goto init_next2;
12324 }
12325
12326 ret = ssd_init_sensor(dev);
12327 if (ret) {
12328 hio_err("%s: init sensor failed\n", dev->name);
12329 /* alarm led */
12330 ssd_set_alarm(dev);
12331 goto out_init_sensor;
12332 }
12333
12334 ret = ssd_init_pl_cap(dev);
12335 if (ret) {
12336 hio_err("%s: int pl_cap failed\n", dev->name);
12337 /* alarm led */
12338 ssd_set_alarm(dev);
12339 goto out_init_pl_cap;
12340 }
12341
12342 init_next2:
12343 ret = ssd_check_init_state(dev);
12344 if (ret) {
12345 hio_err("%s: check init state failed\n", dev->name);
12346 /* alarm led */
12347 ssd_set_alarm(dev);
12348 goto out_check_init_state;
12349 }
12350
12351 ret = ssd_init_response(dev);
12352 if (ret) {
12353 hio_warn("%s: init resp_msg failed\n", dev->name);
12354 goto out_init_response;
12355 }
12356
12357 ret = ssd_init_cmd(dev);
12358 if (ret) {
12359 hio_warn("%s: init msg failed\n", dev->name);
12360 goto out_init_cmd;
12361 }
12362
12363 ret = ssd_init_dcmd(dev);
12364 if (ret) {
12365 hio_warn("%s: init cmd failed\n", dev->name);
12366 goto out_init_dcmd;
12367 }
12368
12369 ret = ssd_init_irq(dev);
12370 if (ret) {
12371 hio_warn("%s: init irq failed\n", dev->name);
12372 goto out_init_irq;
12373 }
12374
12375 ret = ssd_init_thread(dev);
12376 if (ret) {
12377 hio_warn("%s: init thread failed\n", dev->name);
12378 goto out_init_thread;
12379 }
12380
12381 ret = ssd_init_tag(dev);
12382 if(ret) {
12383 hio_warn("%s: init tags failed\n", dev->name);
12384 goto out_init_tags;
12385 }
12386
12387 /* */
12388 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
12389
12390 ret = ssd_init_queue(dev);
12391 if (ret) {
12392 hio_warn("%s: init queue failed\n", dev->name);
12393 goto out_init_queue;
12394 }
12395
12396 /* slave port ? */
12397 if (dev->slave) {
12398 goto init_next3;
12399 }
12400
12401 ret = ssd_init_ot_protect(dev);
12402 if (ret) {
12403 hio_err("%s: int ot_protect failed\n", dev->name);
12404 /* alarm led */
12405 ssd_set_alarm(dev);
12406 goto out_int_ot_protect;
12407 }
12408
12409 ret = ssd_init_wmode(dev);
12410 if (ret) {
12411 hio_warn("%s: init write mode\n", dev->name);
12412 goto out_init_wmode;
12413 }
12414
12415 /* init routine after hw is ready */
12416 ret = ssd_init_routine(dev);
12417 if (ret) {
12418 hio_warn("%s: init routine\n", dev->name);
12419 goto out_init_routine;
12420 }
12421
12422 ret = ssd_init_chardev(dev);
12423 if (ret) {
12424 hio_warn("%s: register char device failed\n", dev->name);
12425 goto out_init_chardev;
12426 }
12427
12428 init_next3:
12429 ret = ssd_init_blkdev(dev);
12430 if (ret) {
12431 hio_warn("%s: register block device failed\n", dev->name);
12432 goto out_init_blkdev;
12433 }
12434 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
12435
12436 ret = ssd_register_sysfs(dev);
12437 if (ret) {
12438 hio_warn("%s: register sysfs failed\n", dev->name);
12439 goto out_register_sysfs;
12440 }
12441
12442 dev->save_md = 1;
12443
12444 list_add_tail(&dev->list, &ssd_list);
12445
12446 return 0;
12447
12448 out_register_sysfs:
12449 test_and_clear_bit(SSD_INIT_BD, &dev->state);
12450 ssd_cleanup_blkdev(dev);
12451 out_init_blkdev:
12452 /* slave port ? */
12453 if (!dev->slave) {
12454 ssd_cleanup_chardev(dev);
12455 }
12456 out_init_chardev:
12457 /* slave port ? */
12458 if (!dev->slave) {
12459 ssd_cleanup_routine(dev);
12460 }
12461 out_init_routine:
12462 out_init_wmode:
12463 out_int_ot_protect:
12464 ssd_cleanup_queue(dev);
12465 out_init_queue:
12466 test_and_clear_bit(SSD_ONLINE, &dev->state);
12467 ssd_cleanup_tag(dev);
12468 out_init_tags:
12469 ssd_cleanup_thread(dev);
12470 out_init_thread:
12471 ssd_free_irq(dev);
12472 out_init_irq:
12473 ssd_cleanup_dcmd(dev);
12474 out_init_dcmd:
12475 ssd_cleanup_cmd(dev);
12476 out_init_cmd:
12477 ssd_cleanup_response(dev);
12478 out_init_response:
12479 out_check_init_state:
12480 out_init_pl_cap:
12481 out_init_sensor:
12482 out_init_hw_info:
12483 out_init_smart:
12484 /* slave port ? */
12485 if (!dev->slave) {
12486 ssd_cleanup_log(dev);
12487 }
12488 out_init_log:
12489 /* slave port ? */
12490 if (!dev->slave) {
12491 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
12492 ssd_cleanup_workq(dev);
12493 }
12494 out_init_workq:
12495 out_init_label:
12496 out_init_rom_info:
12497 out_init_fw_info:
12498 out_init_protocol_info:
12499 out_check_hw:
12500 #ifdef LINUX_SUSE_OS
12501 iounmap(dev->ctrlp);
12502 #else
12503 pci_iounmap(pdev, dev->ctrlp);
12504 #endif
12505 out_pci_iomap:
12506 release_mem_region(dev->mmio_base, dev->mmio_len);
12507 out_request_mem_region:
12508 out_set_dma_mask:
12509 pci_disable_device(pdev);
12510 out_enable_device:
12511 pci_set_drvdata(pdev, NULL);
12512 out_get_index:
12513 kfree(dev);
12514 out_alloc_dev:
12515 out:
12516 return ret;
12517 }
12518
12519 static void ssd_cleanup_tasklet(void)
12520 {
12521 int i;
12522 for_each_online_cpu(i) {
12523 tasklet_kill(&per_cpu(ssd_tasklet, i));
12524 }
12525 }
12526
12527 static int ssd_init_tasklet(void)
12528 {
12529 int i;
12530
12531 for_each_online_cpu(i) {
12532 INIT_LIST_HEAD(&per_cpu(ssd_doneq, i));
12533
12534 if (finject) {
12535 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done_db, 0);
12536 } else {
12537 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done, 0);
12538 }
12539 }
12540
12541 return 0;
12542 }
12543
12544 static struct pci_device_id ssd_pci_tbl[] = {
12545 { 0x10ee, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* g3 */
12546 { 0x19e5, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 */
12547 //{ 0x19e5, 0x0008, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 sp*/
12548 { 0x19e5, 0x0009, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 */
12549 { 0x19e5, 0x000a, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 dp slave*/
12550 { 0, }
12551 };
12552
12553 /*driver power management handler for pm_ops*/
12554 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
12555 static int ssd_hio_suspend(struct pci_dev *pdev, pm_message_t state)
12556 {
12557 #else
12558 static int ssd_hio_suspend(struct device *ddev)
12559 {
12560 struct pci_dev *pdev = to_pci_dev(ddev);
12561 #endif
12562 struct ssd_device *dev;
12563
12564
12565 if (!pdev) {
12566 return -EINVAL;
12567 }
12568
12569 dev = pci_get_drvdata(pdev);
12570 if (!dev) {
12571 return -EINVAL;
12572 }
12573
12574 hio_warn("%s: suspend disk start.\n", dev->name);
12575 ssd_unregister_sysfs(dev);
12576
12577 /* offline firstly */
12578 test_and_clear_bit(SSD_ONLINE, &dev->state);
12579
12580 /* clean work queue first */
12581 if (!dev->slave) {
12582 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
12583 ssd_cleanup_workq(dev);
12584 }
12585
12586 /* flush cache */
12587 (void)ssd_flush(dev);
12588 (void)ssd_save_md(dev);
12589
12590 /* save smart */
12591 if (!dev->slave) {
12592 ssd_save_smart(dev);
12593 }
12594
12595 /* clean routine */
12596 if (!dev->slave) {
12597 ssd_cleanup_routine(dev);
12598 }
12599
12600 ssd_cleanup_thread(dev);
12601
12602 ssd_free_irq(dev);
12603
12604 if (!dev->slave) {
12605 ssd_cleanup_log(dev);
12606 }
12607
12608 if (dev->reload_fw) { //reload fw
12609 dev->has_non_0x98_reg_access = 1;
12610 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
12611 }
12612
12613 /* unmap physical adress */
12614 if (dev->ctrlp) {
12615 #ifdef LINUX_SUSE_OS
12616 iounmap(dev->ctrlp);
12617 #else
12618 pci_iounmap(pdev, dev->ctrlp);
12619 #endif
12620 dev->ctrlp = NULL;
12621 }
12622
12623 if (dev->mmio_base) {
12624 release_mem_region(dev->mmio_base, dev->mmio_len);
12625 dev->mmio_base = 0;
12626 }
12627
12628 pci_disable_device(pdev);
12629
12630 hio_warn("%s: suspend disk finish.\n", dev->name);
12631
12632 return 0;
12633 }
12634
12635
12636 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
12637 static int ssd_hio_resume(struct pci_dev *pdev)
12638 {
12639 #else
12640 static int ssd_hio_resume(struct device *ddev)
12641 {
12642 struct pci_dev *pdev = to_pci_dev(ddev);
12643 #endif
12644 struct ssd_device *dev = NULL;
12645 int ret = 0;
12646
12647 if (!pdev ) {
12648 ret = -EINVAL;
12649 goto out;
12650 }
12651
12652 dev = pci_get_drvdata(pdev);
12653 if (!dev) {
12654 ret = -ENOMEM;
12655 goto out_alloc_dev;
12656 }
12657
12658 hio_warn("%s: resume disk start.\n", dev->name);
12659 ret = pci_enable_device(pdev);
12660 if (ret) {
12661 hio_warn("%s: can not enable device\n", dev->name);
12662 goto out_enable_device;
12663 }
12664
12665 pci_set_master(pdev);
12666
12667 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
12668 ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
12669 #else
12670 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
12671 #endif
12672 if (ret) {
12673 hio_warn("%s: set dma mask: failed\n", dev->name);
12674 goto out_set_dma_mask;
12675 }
12676
12677 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
12678 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
12679 #else
12680 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
12681 #endif
12682 if (ret) {
12683 hio_warn("%s: set consistent dma mask: failed\n", dev->name);
12684 goto out_set_dma_mask;
12685 }
12686
12687 dev->mmio_base = pci_resource_start(pdev, 0);
12688 dev->mmio_len = pci_resource_len(pdev, 0);
12689
12690 if (!request_mem_region(dev->mmio_base, dev->mmio_len, SSD_DEV_NAME)) {
12691 hio_warn("%s: can not reserve MMIO region 0\n", dev->name);
12692 ret = -EBUSY;
12693 goto out_request_mem_region;
12694 }
12695
12696 /* 2.6.9 kernel bug */
12697 dev->ctrlp = pci_iomap(pdev, 0, 0);
12698 if (!dev->ctrlp) {
12699 hio_warn("%s: can not remap IO region 0\n", dev->name);
12700 ret = -ENOMEM;
12701 goto out_pci_iomap;
12702 }
12703
12704 ret = ssd_check_hw(dev);
12705 if (ret) {
12706 hio_err("%s: check hardware failed\n", dev->name);
12707 goto out_check_hw;
12708 }
12709
12710 /* alarm led ? */
12711 ssd_clear_alarm(dev);
12712
12713 ret = ssd_init_fw_info(dev);
12714 if (ret) {
12715 hio_err("%s: init firmware info failed\n", dev->name);
12716 /* alarm led */
12717 ssd_set_alarm(dev);
12718 goto out_init_fw_info;
12719 }
12720
12721 /* slave port ? */
12722 if (dev->slave) {
12723 goto init_next1;
12724 }
12725
12726 ret = ssd_init_rom_info(dev);
12727 if (ret) {
12728 hio_err("%s: init rom info failed\n", dev->name);
12729 /* alarm led */
12730 ssd_set_alarm(dev);
12731 goto out_init_rom_info;
12732 }
12733
12734 ret = ssd_init_label(dev);
12735 if (ret) {
12736 hio_err("%s: init label failed\n", dev->name);
12737 /* alarm led */
12738 ssd_set_alarm(dev);
12739 goto out_init_label;
12740 }
12741
12742 ret = ssd_init_workq(dev);
12743 if (ret) {
12744 hio_warn("%s: init workq failed\n", dev->name);
12745 goto out_init_workq;
12746 }
12747 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
12748
12749 ret = ssd_init_log(dev);
12750 if (ret) {
12751 hio_err("%s: init log failed\n", dev->name);
12752 /* alarm led */
12753 ssd_set_alarm(dev);
12754 goto out_init_log;
12755 }
12756
12757 ret = ssd_init_smart(dev);
12758 if (ret) {
12759 hio_err("%s: init info failed\n", dev->name);
12760 /* alarm led */
12761 ssd_set_alarm(dev);
12762 goto out_init_smart;
12763 }
12764
12765 init_next1:
12766 ret = ssd_init_hw_info(dev);
12767 if (ret) {
12768 hio_err("%s: init hardware info failed\n", dev->name);
12769 /* alarm led */
12770 ssd_set_alarm(dev);
12771 goto out_init_hw_info;
12772 }
12773
12774 /* slave port ? */
12775 if (dev->slave) {
12776 goto init_next2;
12777 }
12778
12779 ret = ssd_init_sensor(dev);
12780 if (ret) {
12781 hio_err("%s: init sensor failed\n", dev->name);
12782 /* alarm led */
12783 ssd_set_alarm(dev);
12784 goto out_init_sensor;
12785 }
12786
12787 ret = ssd_init_pl_cap(dev);
12788 if (ret) {
12789 hio_err("%s: int pl_cap failed\n", dev->name);
12790 /* alarm led */
12791 ssd_set_alarm(dev);
12792 goto out_init_pl_cap;
12793 }
12794
12795 init_next2:
12796 ret = ssd_check_init_state(dev);
12797 if (ret) {
12798 hio_err("%s: check init state failed\n", dev->name);
12799 /* alarm led */
12800 ssd_set_alarm(dev);
12801 goto out_check_init_state;
12802 }
12803
12804 //flush all base pointer to ssd
12805 (void)ssd_reload_ssd_ptr(dev);
12806
12807 ret = ssd_init_irq(dev);
12808 if (ret) {
12809 hio_warn("%s: init irq failed\n", dev->name);
12810 goto out_init_irq;
12811 }
12812
12813 ret = ssd_init_thread(dev);
12814 if (ret) {
12815 hio_warn("%s: init thread failed\n", dev->name);
12816 goto out_init_thread;
12817 }
12818
12819 /* */
12820 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
12821
12822 /* slave port ? */
12823 if (dev->slave) {
12824 goto init_next3;
12825 }
12826
12827 ret = ssd_init_ot_protect(dev);
12828 if (ret) {
12829 hio_err("%s: int ot_protect failed\n", dev->name);
12830 /* alarm led */
12831 ssd_set_alarm(dev);
12832 goto out_int_ot_protect;
12833 }
12834
12835 ret = ssd_init_wmode(dev);
12836 if (ret) {
12837 hio_warn("%s: init write mode\n", dev->name);
12838 goto out_init_wmode;
12839 }
12840
12841 /* init routine after hw is ready */
12842 ret = ssd_init_routine(dev);
12843 if (ret) {
12844 hio_warn("%s: init routine\n", dev->name);
12845 goto out_init_routine;
12846 }
12847
12848 init_next3:
12849 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
12850
12851 dev->save_md = 1;
12852
12853 hio_warn("%s: resume disk finish.\n", dev->name);
12854
12855 return 0;
12856
12857 out_init_routine:
12858 out_init_wmode:
12859 out_int_ot_protect:
12860 ssd_cleanup_thread(dev);
12861 out_init_thread:
12862 ssd_free_irq(dev);
12863 out_init_irq:
12864 out_check_init_state:
12865 out_init_pl_cap:
12866 out_init_sensor:
12867 out_init_hw_info:
12868 out_init_smart:
12869 /* slave port ? */
12870 if (!dev->slave) {
12871 ssd_cleanup_log(dev);
12872 }
12873 out_init_log:
12874 /* slave port ? */
12875 if (!dev->slave) {
12876 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
12877 ssd_cleanup_workq(dev);
12878 }
12879 out_init_workq:
12880 out_init_label:
12881 out_init_rom_info:
12882 out_init_fw_info:
12883 out_check_hw:
12884 #ifdef LINUX_SUSE_OS
12885 iounmap(dev->ctrlp);
12886 #else
12887 pci_iounmap(pdev, dev->ctrlp);
12888 #endif
12889 out_pci_iomap:
12890 release_mem_region(dev->mmio_base, dev->mmio_len);
12891 out_request_mem_region:
12892 out_set_dma_mask:
12893 pci_disable_device(pdev);
12894 out_enable_device:
12895 out_alloc_dev:
12896 out:
12897
12898 hio_warn("%s: resume disk fail.\n", dev->name);
12899
12900 return ret;
12901 }
12902
12903 MODULE_DEVICE_TABLE(pci, ssd_pci_tbl);
12904
12905 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
12906 #else
12907 SIMPLE_DEV_PM_OPS(hio_pm_ops, ssd_hio_suspend, ssd_hio_resume);
12908 #endif
12909
12910 MODULE_DEVICE_TABLE(pci, ssd_pci_tbl);
12911 struct pci_driver ssd_driver = {
12912 .name = MODULE_NAME,
12913 .id_table = ssd_pci_tbl,
12914 .probe = ssd_init_one,
12915 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
12916 .remove = __devexit_p(ssd_remove_one),
12917 #else
12918 .remove = ssd_remove_one,
12919 #endif
12920
12921 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
12922 .suspend = ssd_hio_suspend,
12923 .resume = ssd_hio_resume,
12924 #else
12925 .driver = {
12926 .pm = &hio_pm_ops,
12927 },
12928 #endif
12929 };
12930
12931 /* notifier block to get a notify on system shutdown/halt/reboot */
12932 static int ssd_notify_reboot(struct notifier_block *nb, unsigned long event, void *buf)
12933 {
12934 struct ssd_device *dev = NULL;
12935 struct ssd_device *n = NULL;
12936
12937 list_for_each_entry_safe(dev, n, &ssd_list, list) {
12938 ssd_gen_swlog(dev, SSD_LOG_POWER_OFF, 0);
12939
12940 (void)ssd_flush(dev);
12941 (void)ssd_save_md(dev);
12942
12943 /* slave port ? */
12944 if (!dev->slave) {
12945 ssd_save_smart(dev);
12946
12947 ssd_stop_workq(dev);
12948
12949 if (dev->reload_fw) {
12950 dev->has_non_0x98_reg_access = 1;
12951 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
12952 }
12953 }
12954 }
12955
12956 return NOTIFY_OK;
12957 }
12958
12959 static struct notifier_block ssd_notifier = {
12960 ssd_notify_reboot, NULL, 0
12961 };
12962
12963 static int __init ssd_init_module(void)
12964 {
12965 int ret = 0;
12966
12967 hio_info("driver version: %s\n", DRIVER_VERSION);
12968
12969 ret = ssd_init_index();
12970 if (ret) {
12971 hio_warn("init index failed\n");
12972 goto out_init_index;
12973 }
12974
12975 ret = ssd_init_proc();
12976 if (ret) {
12977 hio_warn("init proc failed\n");
12978 goto out_init_proc;
12979 }
12980
12981 ret = ssd_init_sysfs();
12982 if (ret) {
12983 hio_warn("init sysfs failed\n");
12984 goto out_init_sysfs;
12985 }
12986
12987 ret = ssd_init_tasklet();
12988 if (ret) {
12989 hio_warn("init tasklet failed\n");
12990 goto out_init_tasklet;
12991 }
12992
12993 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12994 ssd_class = class_simple_create(THIS_MODULE, SSD_DEV_NAME);
12995 #else
12996 ssd_class = class_create(THIS_MODULE, SSD_DEV_NAME);
12997 #endif
12998 if (IS_ERR(ssd_class)) {
12999 ret = PTR_ERR(ssd_class);
13000 goto out_class_create;
13001 }
13002
13003 if (ssd_cmajor > 0) {
13004 ret = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
13005 } else {
13006 ret = ssd_cmajor = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
13007 }
13008 if (ret < 0) {
13009 hio_warn("unable to register chardev major number\n");
13010 goto out_register_chardev;
13011 }
13012
13013 if (ssd_major > 0) {
13014 ret = register_blkdev(ssd_major, SSD_DEV_NAME);
13015 } else {
13016 ret = ssd_major = register_blkdev(ssd_major, SSD_DEV_NAME);
13017 }
13018 if (ret < 0) {
13019 hio_warn("unable to register major number\n");
13020 goto out_register_blkdev;
13021 }
13022
13023 if (ssd_major_sl > 0) {
13024 ret = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
13025 } else {
13026 ret = ssd_major_sl = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
13027 }
13028 if (ret < 0) {
13029 hio_warn("unable to register slave major number\n");
13030 goto out_register_blkdev_sl;
13031 }
13032
13033 if (mode < SSD_DRV_MODE_STANDARD || mode > SSD_DRV_MODE_BASE) {
13034 mode = SSD_DRV_MODE_STANDARD;
13035 }
13036
13037 /* for debug */
13038 if (mode != SSD_DRV_MODE_STANDARD) {
13039 ssd_minors = 1;
13040 }
13041
13042 if (int_mode < SSD_INT_LEGACY || int_mode > SSD_INT_MSIX) {
13043 int_mode = SSD_INT_MODE_DEFAULT;
13044 }
13045
13046 if (threaded_irq) {
13047 int_mode = SSD_INT_MSI;
13048 }
13049
13050 if (log_level >= SSD_LOG_NR_LEVEL || log_level < SSD_LOG_LEVEL_INFO) {
13051 log_level = SSD_LOG_LEVEL_ERR;
13052 }
13053
13054 if (wmode < SSD_WMODE_BUFFER || wmode > SSD_WMODE_DEFAULT) {
13055 wmode = SSD_WMODE_DEFAULT;
13056 }
13057
13058 #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
13059 ret = pci_module_init(&ssd_driver);
13060 #else
13061 ret = pci_register_driver(&ssd_driver);
13062 #endif
13063 if (ret) {
13064 hio_warn("pci init failed\n");
13065 goto out_pci_init;
13066 }
13067
13068 ret = register_reboot_notifier(&ssd_notifier);
13069 if (ret) {
13070 hio_warn("register reboot notifier failed\n");
13071 goto out_register_reboot_notifier;
13072 }
13073
13074 return 0;
13075
13076 out_register_reboot_notifier:
13077 out_pci_init:
13078 pci_unregister_driver(&ssd_driver);
13079 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
13080 out_register_blkdev_sl:
13081 unregister_blkdev(ssd_major, SSD_DEV_NAME);
13082 out_register_blkdev:
13083 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
13084 out_register_chardev:
13085 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
13086 class_simple_destroy(ssd_class);
13087 #else
13088 class_destroy(ssd_class);
13089 #endif
13090 out_class_create:
13091 ssd_cleanup_tasklet();
13092 out_init_tasklet:
13093 ssd_cleanup_sysfs();
13094 out_init_sysfs:
13095 ssd_cleanup_proc();
13096 out_init_proc:
13097 ssd_cleanup_index();
13098 out_init_index:
13099 return ret;
13100
13101 }
13102
13103 static void __exit ssd_cleanup_module(void)
13104 {
13105
13106 hio_info("unload driver: %s\n", DRIVER_VERSION);
13107 /* exiting */
13108 ssd_exiting = 1;
13109
13110 unregister_reboot_notifier(&ssd_notifier);
13111
13112 pci_unregister_driver(&ssd_driver);
13113
13114 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
13115 unregister_blkdev(ssd_major, SSD_DEV_NAME);
13116 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
13117 #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
13118 class_simple_destroy(ssd_class);
13119 #else
13120 class_destroy(ssd_class);
13121 #endif
13122
13123 ssd_cleanup_tasklet();
13124 ssd_cleanup_sysfs();
13125 ssd_cleanup_proc();
13126 ssd_cleanup_index();
13127 }
13128
13129 int ssd_register_event_notifier(struct block_device *bdev, ssd_event_call event_call)
13130 {
13131 struct ssd_device *dev;
13132 struct timeval tv;
13133 struct ssd_log *le, *temp_le = NULL;
13134 uint64_t cur;
13135 int temp = 0;
13136 int log_nr;
13137
13138 if (!bdev || !event_call || !(bdev->bd_disk)) {
13139 return -EINVAL;
13140 }
13141
13142 dev = bdev->bd_disk->private_data;
13143 dev->event_call = event_call;
13144
13145 do_gettimeofday(&tv);
13146 cur = tv.tv_sec;
13147
13148 le = (struct ssd_log *)(dev->internal_log.log);
13149 log_nr = dev->internal_log.nr_log;
13150
13151 while (log_nr--) {
13152 if (le->time <= cur && le->time >= dev->uptime) {
13153 if ((le->le.event == SSD_LOG_SEU_FAULT1) && (le->time < dev->reset_time)) {
13154 le++;
13155 continue;
13156 }
13157 if (le->le.event == SSD_LOG_OVER_TEMP || le->le.event == SSD_LOG_NORMAL_TEMP || le->le.event == SSD_LOG_WARN_TEMP) {
13158 if (!temp_le || le->time >= temp_le->time) {
13159 temp_le = le;
13160 }
13161 le++;
13162 continue;
13163 }
13164 (void)dev->event_call(dev->gd, le->le.event, ssd_parse_log(dev, le, 0));
13165 }
13166 le++;
13167 }
13168
13169 ssd_get_temperature(bdev, &temp);
13170 if (temp_le && (temp >= SSD_OT_TEMP_HYST)) {
13171 (void)dev->event_call(dev->gd, temp_le->le.event, ssd_parse_log(dev, temp_le, 0));
13172 }
13173
13174 return 0;
13175 }
13176
13177 int ssd_unregister_event_notifier(struct block_device *bdev)
13178 {
13179 struct ssd_device *dev;
13180
13181 if (!bdev || !(bdev->bd_disk)) {
13182 return -EINVAL;
13183 }
13184
13185 dev = bdev->bd_disk->private_data;
13186 dev->event_call = NULL;
13187
13188 return 0;
13189 }
13190
13191 EXPORT_SYMBOL(ssd_get_label);
13192 EXPORT_SYMBOL(ssd_get_version);
13193 EXPORT_SYMBOL(ssd_set_otprotect);
13194 EXPORT_SYMBOL(ssd_bm_status);
13195 EXPORT_SYMBOL(ssd_submit_pbio);
13196 EXPORT_SYMBOL(ssd_get_pciaddr);
13197 EXPORT_SYMBOL(ssd_get_temperature);
13198 EXPORT_SYMBOL(ssd_register_event_notifier);
13199 EXPORT_SYMBOL(ssd_unregister_event_notifier);
13200 EXPORT_SYMBOL(ssd_reset);
13201 EXPORT_SYMBOL(ssd_set_wmode);
13202
13203
13204
13205 module_init(ssd_init_module);
13206 module_exit(ssd_cleanup_module);
13207 MODULE_VERSION(DRIVER_VERSION);
13208 MODULE_LICENSE("GPL");
13209 MODULE_AUTHOR("Huawei SSD DEV Team");
13210 MODULE_DESCRIPTION("Huawei SSD driver");