]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
drm/nouveau/mmu: build up information on available memory types
authorBen Skeggs <bskeggs@redhat.com>
Tue, 31 Oct 2017 17:56:19 +0000 (03:56 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 2 Nov 2017 03:32:31 +0000 (13:32 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvkm/subdev/mmu.h
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk104.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gk20a.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm200.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gm20b.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp100.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gp10b.c
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/priv.h

index 7fa60d79ec4c290ffd2d945c081b4e9b04417f86..11a169d3ed8c55b56eba1acf1d6d892e281a0557 100644 (file)
@@ -108,6 +108,26 @@ struct nvkm_mmu {
        u8  dma_bits;
        u8  lpg_shift;
 
+       int heap_nr;
+       struct {
+#define NVKM_MEM_VRAM                                                      0x01
+#define NVKM_MEM_HOST                                                      0x02
+#define NVKM_MEM_COMP                                                      0x04
+#define NVKM_MEM_DISP                                                      0x08
+               u8  type;
+               u64 size;
+       } heap[4];
+
+       int type_nr;
+       struct {
+#define NVKM_MEM_KIND                                                      0x10
+#define NVKM_MEM_MAPPABLE                                                  0x20
+#define NVKM_MEM_COHERENT                                                  0x40
+#define NVKM_MEM_UNCACHED                                                  0x80
+               u8 type;
+               u8 heap;
+       } type[16];
+
        struct nvkm_vmm *vmm;
 
        struct {
index 9bf688df24f0188c5c491f63ec94a241ecad80c2..be600049f2211ec257f4bd9f95a63f73ff8f3995 100644 (file)
@@ -24,6 +24,7 @@
 #include "priv.h"
 #include "vmm.h"
 
+#include <subdev/bar.h>
 #include <subdev/fb.h>
 
 #include <nvif/if500d.h>
@@ -443,11 +444,130 @@ nvkm_vm_ref(struct nvkm_vm *ref, struct nvkm_vm **ptr, struct nvkm_memory *inst)
        return 0;
 }
 
+static void
+nvkm_mmu_type(struct nvkm_mmu *mmu, int heap, u8 type)
+{
+       if (heap >= 0 && !WARN_ON(mmu->type_nr == ARRAY_SIZE(mmu->type))) {
+               mmu->type[mmu->type_nr].type = type | mmu->heap[heap].type;
+               mmu->type[mmu->type_nr].heap = heap;
+               mmu->type_nr++;
+       }
+}
+
+static int
+nvkm_mmu_heap(struct nvkm_mmu *mmu, u8 type, u64 size)
+{
+       if (size) {
+               if (!WARN_ON(mmu->heap_nr == ARRAY_SIZE(mmu->heap))) {
+                       mmu->heap[mmu->heap_nr].type = type;
+                       mmu->heap[mmu->heap_nr].size = size;
+                       return mmu->heap_nr++;
+               }
+       }
+       return -EINVAL;
+}
+
+static void
+nvkm_mmu_host(struct nvkm_mmu *mmu)
+{
+       struct nvkm_device *device = mmu->subdev.device;
+       u8 type = NVKM_MEM_KIND * !!mmu->func->kind_sys;
+       int heap;
+
+       /* Non-mappable system memory. */
+       heap = nvkm_mmu_heap(mmu, NVKM_MEM_HOST, ~0ULL);
+       nvkm_mmu_type(mmu, heap, type);
+
+       /* Non-coherent, cached, system memory.
+        *
+        * Block-linear mappings of system memory must be done through
+        * BAR1, and cannot be supported on systems where we're unable
+        * to map BAR1 with write-combining.
+        */
+       type |= NVKM_MEM_MAPPABLE;
+       if (!device->bar || device->bar->iomap_uncached)
+               nvkm_mmu_type(mmu, heap, type & ~NVKM_MEM_KIND);
+       else
+               nvkm_mmu_type(mmu, heap, type);
+
+       /* Coherent, cached, system memory.
+        *
+        * Unsupported on systems that aren't able to support snooped
+        * mappings, and also for block-linear mappings which must be
+        * done through BAR1.
+        */
+       type |= NVKM_MEM_COHERENT;
+       if (device->func->cpu_coherent)
+               nvkm_mmu_type(mmu, heap, type & ~NVKM_MEM_KIND);
+
+       /* Uncached system memory. */
+       nvkm_mmu_type(mmu, heap, type |= NVKM_MEM_UNCACHED);
+}
+
+static void
+nvkm_mmu_vram(struct nvkm_mmu *mmu)
+{
+       struct nvkm_device *device = mmu->subdev.device;
+       struct nvkm_mm *mm = &device->fb->ram->vram;
+       const u32 sizeN = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NORMAL);
+       const u32 sizeU = nvkm_mm_heap_size(mm, NVKM_RAM_MM_NOMAP);
+       const u32 sizeM = nvkm_mm_heap_size(mm, NVKM_RAM_MM_MIXED);
+       u8 type = NVKM_MEM_KIND * !!mmu->func->kind;
+       u8 heap = NVKM_MEM_VRAM;
+       int heapM, heapN, heapU;
+
+       /* Mixed-memory doesn't support compression or display. */
+       heapM = nvkm_mmu_heap(mmu, heap, sizeM << NVKM_RAM_MM_SHIFT);
+
+       heap |= NVKM_MEM_COMP;
+       heap |= NVKM_MEM_DISP;
+       heapN = nvkm_mmu_heap(mmu, heap, sizeN << NVKM_RAM_MM_SHIFT);
+       heapU = nvkm_mmu_heap(mmu, heap, sizeU << NVKM_RAM_MM_SHIFT);
+
+       /* Add non-mappable VRAM types first so that they're preferred
+        * over anything else.  Mixed-memory will be slower than other
+        * heaps, it's prioritised last.
+        */
+       nvkm_mmu_type(mmu, heapU, type);
+       nvkm_mmu_type(mmu, heapN, type);
+       nvkm_mmu_type(mmu, heapM, type);
+
+       /* Add host memory types next, under the assumption that users
+        * wanting mappable memory want to use them as staging buffers
+        * or the like.
+        */
+       nvkm_mmu_host(mmu);
+
+       /* Mappable VRAM types go last, as they're basically the worst
+        * possible type to ask for unless there's no other choice.
+        */
+       if (device->bar) {
+               /* Write-combined BAR1 access. */
+               type |= NVKM_MEM_MAPPABLE;
+               if (!device->bar->iomap_uncached) {
+                       nvkm_mmu_type(mmu, heapN, type);
+                       nvkm_mmu_type(mmu, heapM, type);
+               }
+
+               /* Uncached BAR1 access. */
+               type |= NVKM_MEM_COHERENT;
+               type |= NVKM_MEM_UNCACHED;
+               nvkm_mmu_type(mmu, heapN, type);
+               nvkm_mmu_type(mmu, heapM, type);
+       }
+}
+
 static int
 nvkm_mmu_oneinit(struct nvkm_subdev *subdev)
 {
        struct nvkm_mmu *mmu = nvkm_mmu(subdev);
 
+       /* Determine available memory types. */
+       if (mmu->subdev.device->fb && mmu->subdev.device->fb->ram)
+               nvkm_mmu_vram(mmu);
+       else
+               nvkm_mmu_host(mmu);
+
        if (mmu->func->vmm.global) {
                int ret = nvkm_vmm_new(subdev->device, 0, 0, NULL, 0, NULL,
                                       "gart", &mmu->vmm);
index c90c9980478bed74d5978a841115628475343952..0f4c9533c967d2664e2def4921a2da427ab3db8d 100644 (file)
@@ -30,6 +30,7 @@ g84_mmu = {
        .lpg_shift = 16,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV50}, nv50_vmm_new, false, 0x0200 },
        .kind = nv50_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index ca5ca27188cda6c5883630bbf35cd596875a10c1..81e9145f96a1d0666431c29eef3c86289058ad81 100644 (file)
@@ -78,6 +78,7 @@ gf100_mmu = {
        .lpg_shift = 17,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GF100}, gf100_vmm_new },
        .kind = gf100_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index db7353aa25dfdafc1e13f97a886068d3ca92450e..95f07acaed2f8301a0337b1dd6e6d8e1cba3faae 100644 (file)
@@ -30,6 +30,7 @@ gk104_mmu = {
        .lpg_shift = 17,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GF100}, gk104_vmm_new },
        .kind = gf100_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index 2dfe8b1ba109c4e830f99e9a85d6ce85356c2be8..18d4a321bd64a414a0dc0bd194f8061d12d76e0d 100644 (file)
@@ -30,6 +30,7 @@ gk20a_mmu = {
        .lpg_shift = 17,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GF100}, gk20a_vmm_new },
        .kind = gf100_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index a9628baf53722715ca496a62b171c6df8b8b20c3..f961f782ac9b1c41ba5a5d505e783078b0229b27 100644 (file)
@@ -74,6 +74,7 @@ gm200_mmu = {
        .lpg_shift = 17,
        .vmm = {{ -1,  0, NVIF_CLASS_VMM_GM200}, gm200_vmm_new },
        .kind = gm200_mmu_kind,
+       .kind_sys = true,
 };
 
 static const struct nvkm_mmu_func
@@ -83,6 +84,7 @@ gm200_mmu_fixed = {
        .lpg_shift = 17,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GM200}, gm200_vmm_new_fixed },
        .kind = gm200_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index 5d14c138af025b43e7d35e6f15fb058cd3cff45d..585fe80f87affc2211a05488c7cf1083426cb07d 100644 (file)
@@ -32,6 +32,7 @@ gm20b_mmu = {
        .lpg_shift = 17,
        .vmm = {{ -1,  0, NVIF_CLASS_VMM_GM200}, gm20b_vmm_new },
        .kind = gm200_mmu_kind,
+       .kind_sys = true,
 };
 
 static const struct nvkm_mmu_func
@@ -41,6 +42,7 @@ gm20b_mmu_fixed = {
        .lpg_shift = 17,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GM200}, gm20b_vmm_new_fixed },
        .kind = gm200_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index 0cc9c89c0e733e5761e95584c357b72427a6da87..4ebb45a275ea8f0b00c87ca7c50b3ddeb07070a5 100644 (file)
@@ -32,6 +32,7 @@ gp100_mmu = {
        .lpg_shift = 16,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GP100}, gp100_vmm_new },
        .kind = gm200_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index 5c721769776082e327d0f7486e86c7f273989813..e864cfe57ae67a981c6e1fba3aefcd9ec4252a34 100644 (file)
@@ -32,6 +32,7 @@ gp10b_mmu = {
        .lpg_shift = 16,
        .vmm = {{ -1, -1, NVIF_CLASS_VMM_GP100}, gp10b_vmm_new },
        .kind = gm200_mmu_kind,
+       .kind_sys = true,
 };
 
 int
index bc4571a206902260e79d6d2c3c25d19ea8c07d0d..d8d63ae7e0f751f915acb002bcce306b29095676 100644 (file)
@@ -25,6 +25,7 @@ struct nvkm_mmu_func {
        } vmm;
 
        const u8 *(*kind)(struct nvkm_mmu *, int *count);
+       bool kind_sys;
 };
 
 extern const struct nvkm_mmu_func nv04_mmu;