]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/commitdiff
net/mlx5e: Rx, Fix checksum calculation for new hardware
authorSaeed Mahameed <saeedm@mellanox.com>
Tue, 10 Dec 2019 23:24:00 +0000 (00:24 +0100)
committerMarcelo Henrique Cerri <marcelo.cerri@canonical.com>
Fri, 17 Jan 2020 17:23:08 +0000 (14:23 -0300)
BugLink: https://bugs.launchpad.net/bugs/1854842
CQE checksum full mode in new HW, provides a full checksum of rx frame.
Covering bytes starting from eth protocol up to last byte in the received
frame (frame_size - ETH_HLEN), as expected by the stack.

Fixing up skb->csum by the driver is not required in such case. This fix
is to avoid wrong checksum calculation in drivers which already support
the new hardware with the new checksum mode.

Fixes: 85327a9c4150 ("net/mlx5: Update the list of the PCI supported devices")
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
(backported from commit db849faa9bef993a1379dc510623f750a72fa7ce)
[mruffell: minor context adjustments, offset recalculations]
Signed-off-by: Matthew Ruffell <matthew.ruffell@canonical.com>
Acked-by: Connor Kuehl <connor.kuehl@canonical.com>
Acked-by: Marcelo Henrique Cerri <marcelo.cerri@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
drivers/net/ethernet/mellanox/mlx5/core/en.h
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c
include/linux/mlx5/mlx5_ifc.h

index a12903a00da335652040b8dc51eefbdbbd488aad..c9bd5c0cb90e689f55a51c40247d03b772ae3e52 100644 (file)
@@ -296,6 +296,7 @@ enum {
        MLX5E_RQ_STATE_ENABLED,
        MLX5E_RQ_STATE_AM,
        MLX5E_RQ_STATE_NO_CSUM_COMPLETE,
+       MLX5E_RQ_STATE_CSUM_FULL, /* cqe_csum_full hw bit is set */
 };
 
 #define MLX5E_TEST_BIT(state, nr) (state & BIT(nr))
index b3c48515c91da0f12ab35083e7ae9f8b101021de..98374a14ed57f9017ef41f441291f1b5921e0da6 100644 (file)
@@ -925,6 +925,9 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
        if (params->rx_am_enabled)
                c->rq.state |= BIT(MLX5E_RQ_STATE_AM);
 
+       if (MLX5_CAP_ETH(c->mdev, cqe_checksum_full))
+               __set_bit(MLX5E_RQ_STATE_CSUM_FULL, &c->rq.state);
+
        /* We disable csum_complete when XDP is enabled since
         * XDP programs might manipulate packets which will render
         * skb->checksum incorrect.
index 52f7dd0c02dd78909a816a00e9b2d840c01f60aa..0dc924e98f98987f06b676bf70813022cb048525 100644 (file)
@@ -770,8 +770,14 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,
                if (unlikely(get_ip_proto(skb, network_depth, proto) == IPPROTO_SCTP))
                        goto csum_unnecessary;
 
+               rq->stats.csum_complete++;
                skb->ip_summed = CHECKSUM_COMPLETE;
                skb->csum = csum_unfold((__force __sum16)cqe->check_sum);
+
+               if (test_bit(MLX5E_RQ_STATE_CSUM_FULL, &rq->state))
+                       return; /* CQE csum covers all received bytes */
+
+               /* csum might need some fixups ...*/
                if (network_depth > ETH_HLEN)
                        /* CQE csum is calculated from the IP header and does
                         * not cover VLAN headers (if present). This will add
@@ -781,7 +787,6 @@ static inline void mlx5e_handle_csum(struct net_device *netdev,
                                                 network_depth - ETH_HLEN,
                                                 skb->csum);
                mlx5e_skb_padding_csum(skb, network_depth, proto, &rq->stats);
-               rq->stats.csum_complete++;
                return;
        }
 
index 502f347813ae466f4f51f3ec421d45f121680054..fdef4d0193cd1682c9cc6b4d09f6697ef01a56e9 100644 (file)
@@ -614,7 +614,8 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits {
        u8         swp[0x1];
        u8         swp_csum[0x1];
        u8         swp_lso[0x1];
-       u8         reserved_at_23[0x1b];
+       u8         cqe_checksum_full[0x1];
+       u8         reserved_at_24[0x1a];
        u8         max_geneve_opt_len[0x1];
        u8         tunnel_stateless_geneve_rx[0x1];