net: hns3: update coalesce param per second

BugLink: https://bugs.launchpad.net/bugs/1810457
coalesce param updates every 100 napi times, it may update a little
late if ping test after a high rate flow, may over napi poll is called
100 times as ping test sends packets every second.

This patch updates coalesce param every second, instead with every
100 napi times. It can not update the param 100% in time, but the
lag time is very short.

Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from commit 7445565cd064679421e3cf4d440589ee723f6c08)
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
index 73ebcce38ab1207a2dcdda965c3789241f452a28..c3270b4300a1b01c4a7ab2887a92a16e1b1dab9c 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c
@@ -240,7 +240,6 @@ static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector *tqp_vector,
        tqp_vector->tx_group.coal.int_gl = HNS3_INT_GL_50K;
        tqp_vector->rx_group.coal.int_gl = HNS3_INT_GL_50K;
 
-       tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
        tqp_vector->rx_group.coal.flow_level = HNS3_FLOW_LOW;
        tqp_vector->tx_group.coal.flow_level = HNS3_FLOW_LOW;
 }
@@ -2835,10 +2834,10 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
        struct hns3_enet_ring_group *tx_group = &tqp_vector->tx_group;
        bool rx_update, tx_update;
 
-       if (tqp_vector->int_adapt_down > 0) {
-               tqp_vector->int_adapt_down--;
+       /* update param every 1000ms */
+       if (time_before(jiffies,
+                       tqp_vector->last_jiffies + msecs_to_jiffies(1000)))
                return;
-       }
 
        if (rx_group->coal.gl_adapt_enable) {
                rx_update = hns3_get_new_int_gl(rx_group);
@@ -2855,7 +2854,6 @@ static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector *tqp_vector)
        }
 
        tqp_vector->last_jiffies = jiffies;
-       tqp_vector->int_adapt_down = HNS3_INT_ADAPT_DOWN_START;
 }
 
 static int hns3_nic_common_poll(struct napi_struct *napi, int budget)

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
index 6eff12a172c73808b1a351f8c517b918626df1c5..243eb6424deee23d19e0f2da8f62302247b19238 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h
@@ -476,8 +476,6 @@ enum hns3_link_mode_bits {
 #define HNS3_INT_RL_MAX                        0x00EC
 #define HNS3_INT_RL_ENABLE_MASK                0x40
 
-#define HNS3_INT_ADAPT_DOWN_START      100
-
 struct hns3_enet_coalesce {
        u16 int_gl;
        u8 gl_adapt_enable;
@@ -512,8 +510,6 @@ struct hns3_enet_tqp_vector {
 
        char name[HNAE3_INT_NAME_LEN];
 
-       /* when 0 should adjust interrupt coalesce parameter */
-       u8 int_adapt_down;
        unsigned long last_jiffies;
 } ____cacheline_internodealigned_in_smp;