x86/cpufeatures: Carve out CQM features retrieval

... into a separate function for better readability. Split out from a
patch from Fenghua Yu <fenghua.yu@intel.com> to keep the mechanical,
sole code movement separate for easy review.

No functional changes.

Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: x86@kernel.org
CVE-2019-1125

(cherry picked from commit 45fc56e629caa451467e7664fbd4c797c434a6c4)
Signed-off-by: Tyler Hicks <tyhicks@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 408680e36e3195f374f38ff69d2cb2f7fc7ae829..544a0359004af0b6a31cf7716d2624551ab416eb 100644 (file)
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -805,6 +805,38 @@ static void init_speculation_control(struct cpuinfo_x86 *c)
        }
 }
 
+static void init_cqm(struct cpuinfo_x86 *c)
+{
+       u32 eax, ebx, ecx, edx;
+
+       /* Additional Intel-defined flags: level 0x0000000F */
+       if (c->cpuid_level >= 0x0000000F) {
+
+               /* QoS sub-leaf, EAX=0Fh, ECX=0 */
+               cpuid_count(0x0000000F, 0, &eax, &ebx, &ecx, &edx);
+               c->x86_capability[CPUID_F_0_EDX] = edx;
+
+               if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
+                       /* will be overridden if occupancy monitoring exists */
+                       c->x86_cache_max_rmid = ebx;
+
+                       /* QoS sub-leaf, EAX=0Fh, ECX=1 */
+                       cpuid_count(0x0000000F, 1, &eax, &ebx, &ecx, &edx);
+                       c->x86_capability[CPUID_F_1_EDX] = edx;
+
+                       if ((cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) ||
+                             ((cpu_has(c, X86_FEATURE_CQM_MBM_TOTAL)) ||
+                              (cpu_has(c, X86_FEATURE_CQM_MBM_LOCAL)))) {
+                               c->x86_cache_max_rmid = ecx;
+                               c->x86_cache_occ_scale = ebx;
+                       }
+               } else {
+                       c->x86_cache_max_rmid = -1;
+                       c->x86_cache_occ_scale = -1;
+               }
+       }
+}
+
 void get_cpu_cap(struct cpuinfo_x86 *c)
 {
        u32 eax, ebx, ecx, edx;
@@ -836,33 +868,6 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
                c->x86_capability[CPUID_D_1_EAX] = eax;
        }
 
-       /* Additional Intel-defined flags: level 0x0000000F */
-       if (c->cpuid_level >= 0x0000000F) {
-
-               /* QoS sub-leaf, EAX=0Fh, ECX=0 */
-               cpuid_count(0x0000000F, 0, &eax, &ebx, &ecx, &edx);
-               c->x86_capability[CPUID_F_0_EDX] = edx;
-
-               if (cpu_has(c, X86_FEATURE_CQM_LLC)) {
-                       /* will be overridden if occupancy monitoring exists */
-                       c->x86_cache_max_rmid = ebx;
-
-                       /* QoS sub-leaf, EAX=0Fh, ECX=1 */
-                       cpuid_count(0x0000000F, 1, &eax, &ebx, &ecx, &edx);
-                       c->x86_capability[CPUID_F_1_EDX] = edx;
-
-                       if ((cpu_has(c, X86_FEATURE_CQM_OCCUP_LLC)) ||
-                             ((cpu_has(c, X86_FEATURE_CQM_MBM_TOTAL)) ||
-                              (cpu_has(c, X86_FEATURE_CQM_MBM_LOCAL)))) {
-                               c->x86_cache_max_rmid = ecx;
-                               c->x86_cache_occ_scale = ebx;
-                       }
-               } else {
-                       c->x86_cache_max_rmid = -1;
-                       c->x86_cache_occ_scale = -1;
-               }
-       }
-
        /* AMD-defined flags: level 0x80000001 */
        eax = cpuid_eax(0x80000000);
        c->extended_cpuid_level = eax;
@@ -900,6 +905,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 
        init_scattered_cpuid_features(c);
        init_speculation_control(c);
+       init_cqm(c);
 
        /*
         * Clear/Set all flags overridden by options, after probe.