arm64: dts: uniphier: add SPI node for LD20, LD11 and PXs3

Add nodes of SPI controller for UniPhier SoCs.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5640daccac551f9b8eac3df8224df442bd231fd7..f72f2a317725ab23503a1a23ffd015b78c5a3fc5 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -116,6 +116,28 @@
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 6932cefb689a884291fb6b59991e0a18dcf4df43..57a231a92e6db933dfd435ebaa281c40acb26800 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -224,6 +224,50 @@
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi2: spi@54006200 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006200 0x100>;
+                       interrupts = <0 229 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi2>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi3: spi@54006300 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006300 0x100>;
+                       interrupts = <0 230 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi3>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";

diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index fd2bcd46642bba2e00a02ba7c6b138f230dc960e..8b1a6529211a38c82c9d7af6ef99e22a8cb3bd12 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -144,6 +144,28 @@
                #size-cells = <1>;
                ranges = <0 0 0 0xffffffff>;
 
+               spi0: spi@54006000 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006000 0x100>;
+                       interrupts = <0 39 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi0>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
+               spi1: spi@54006100 {
+                       compatible = "socionext,uniphier-scssi";
+                       status = "disabled";
+                       reg = <0x54006100 0x100>;
+                       interrupts = <0 216 4>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_spi1>;
+                       clocks = <&peri_clk 11>;
+                       resets = <&peri_rst 11>;
+               };
+
                serial0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
                        status = "disabled";