1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
25 #include "kvm_cache_regs.h"
26 #include "kvm_emulate.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <linux/sched/stat.h>
58 #include <linux/sched/isolation.h>
59 #include <linux/mem_encrypt.h>
60 #include <linux/entry-kvm.h>
62 #include <trace/events/kvm.h>
64 #include <asm/debugreg.h>
68 #include <linux/kernel_stat.h>
69 #include <asm/fpu/internal.h> /* Ugh! */
70 #include <asm/pvclock.h>
71 #include <asm/div64.h>
72 #include <asm/irq_remapping.h>
73 #include <asm/mshyperv.h>
74 #include <asm/hypervisor.h>
75 #include <asm/tlbflush.h>
76 #include <asm/intel_pt.h>
77 #include <asm/emulate_prefix.h>
79 #include <clocksource/hyperv_timer.h>
81 #define CREATE_TRACE_POINTS
84 #define MAX_IO_MSRS 256
85 #define KVM_MAX_MCE_BANKS 32
86 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
87 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
89 #define emul_to_vcpu(ctxt) \
90 ((struct kvm_vcpu *)(ctxt)->vcpu)
93 * - enable syscall per default because its emulated by KVM
94 * - enable LME and LMA per default on 64 bit KVM
98 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
100 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
103 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
105 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
106 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
108 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
109 static void process_nmi(struct kvm_vcpu
*vcpu
);
110 static void process_smi(struct kvm_vcpu
*vcpu
);
111 static void enter_smm(struct kvm_vcpu
*vcpu
);
112 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
113 static void store_regs(struct kvm_vcpu
*vcpu
);
114 static int sync_regs(struct kvm_vcpu
*vcpu
);
116 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
117 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
119 #define KVM_X86_OP(func) \
120 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
121 *(((struct kvm_x86_ops *)0)->func));
122 #define KVM_X86_OP_NULL KVM_X86_OP
123 #include <asm/kvm-x86-ops.h>
124 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
125 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
126 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current
);
128 static bool __read_mostly ignore_msrs
= 0;
129 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
131 bool __read_mostly report_ignored_msrs
= true;
132 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
133 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
135 unsigned int min_timer_period_us
= 200;
136 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
138 static bool __read_mostly kvmclock_periodic_sync
= true;
139 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
141 bool __read_mostly kvm_has_tsc_control
;
142 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
143 u32 __read_mostly kvm_max_guest_tsc_khz
;
144 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
145 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
146 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
147 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
148 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
149 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
150 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
151 bool __read_mostly kvm_has_bus_lock_exit
;
152 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit
);
154 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
155 static u32 __read_mostly tsc_tolerance_ppm
= 250;
156 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
159 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
160 * adaptive tuning starting from default advancement of 1000ns. '0' disables
161 * advancement entirely. Any other value is used as-is and disables adaptive
162 * tuning, i.e. allows privileged userspace to set an exact advancement time.
164 static int __read_mostly lapic_timer_advance_ns
= -1;
165 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
167 static bool __read_mostly vector_hashing
= true;
168 module_param(vector_hashing
, bool, S_IRUGO
);
170 bool __read_mostly enable_vmware_backdoor
= false;
171 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
172 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
174 static bool __read_mostly force_emulation_prefix
= false;
175 module_param(force_emulation_prefix
, bool, S_IRUGO
);
177 int __read_mostly pi_inject_timer
= -1;
178 module_param(pi_inject_timer
, bint
, S_IRUGO
| S_IWUSR
);
181 * Restoring the host value for MSRs that are only consumed when running in
182 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
183 * returns to userspace, i.e. the kernel can run with the guest's value.
185 #define KVM_MAX_NR_USER_RETURN_MSRS 16
187 struct kvm_user_return_msrs
{
188 struct user_return_notifier urn
;
190 struct kvm_user_return_msr_values
{
193 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
196 u32 __read_mostly kvm_nr_uret_msrs
;
197 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
198 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
199 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
201 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
202 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
203 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
204 | XFEATURE_MASK_PKRU)
206 u64 __read_mostly host_efer
;
207 EXPORT_SYMBOL_GPL(host_efer
);
209 bool __read_mostly allow_smaller_maxphyaddr
= 0;
210 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
212 u64 __read_mostly host_xss
;
213 EXPORT_SYMBOL_GPL(host_xss
);
214 u64 __read_mostly supported_xss
;
215 EXPORT_SYMBOL_GPL(supported_xss
);
217 struct kvm_stats_debugfs_item debugfs_entries
[] = {
218 VCPU_STAT("pf_fixed", pf_fixed
),
219 VCPU_STAT("pf_guest", pf_guest
),
220 VCPU_STAT("tlb_flush", tlb_flush
),
221 VCPU_STAT("invlpg", invlpg
),
222 VCPU_STAT("exits", exits
),
223 VCPU_STAT("io_exits", io_exits
),
224 VCPU_STAT("mmio_exits", mmio_exits
),
225 VCPU_STAT("signal_exits", signal_exits
),
226 VCPU_STAT("irq_window", irq_window_exits
),
227 VCPU_STAT("nmi_window", nmi_window_exits
),
228 VCPU_STAT("halt_exits", halt_exits
),
229 VCPU_STAT("halt_successful_poll", halt_successful_poll
),
230 VCPU_STAT("halt_attempted_poll", halt_attempted_poll
),
231 VCPU_STAT("halt_poll_invalid", halt_poll_invalid
),
232 VCPU_STAT("halt_wakeup", halt_wakeup
),
233 VCPU_STAT("hypercalls", hypercalls
),
234 VCPU_STAT("request_irq", request_irq_exits
),
235 VCPU_STAT("irq_exits", irq_exits
),
236 VCPU_STAT("host_state_reload", host_state_reload
),
237 VCPU_STAT("fpu_reload", fpu_reload
),
238 VCPU_STAT("insn_emulation", insn_emulation
),
239 VCPU_STAT("insn_emulation_fail", insn_emulation_fail
),
240 VCPU_STAT("irq_injections", irq_injections
),
241 VCPU_STAT("nmi_injections", nmi_injections
),
242 VCPU_STAT("req_event", req_event
),
243 VCPU_STAT("l1d_flush", l1d_flush
),
244 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns
),
245 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns
),
246 VCPU_STAT("nested_run", nested_run
),
247 VCPU_STAT("directed_yield_attempted", directed_yield_attempted
),
248 VCPU_STAT("directed_yield_successful", directed_yield_successful
),
249 VM_STAT("mmu_shadow_zapped", mmu_shadow_zapped
),
250 VM_STAT("mmu_pte_write", mmu_pte_write
),
251 VM_STAT("mmu_pde_zapped", mmu_pde_zapped
),
252 VM_STAT("mmu_flooded", mmu_flooded
),
253 VM_STAT("mmu_recycled", mmu_recycled
),
254 VM_STAT("mmu_cache_miss", mmu_cache_miss
),
255 VM_STAT("mmu_unsync", mmu_unsync
),
256 VM_STAT("remote_tlb_flush", remote_tlb_flush
),
257 VM_STAT("largepages", lpages
, .mode
= 0444),
258 VM_STAT("nx_largepages_splitted", nx_lpage_splits
, .mode
= 0444),
259 VM_STAT("max_mmu_page_hash_collisions", max_mmu_page_hash_collisions
),
263 u64 __read_mostly host_xcr0
;
264 u64 __read_mostly supported_xcr0
;
265 EXPORT_SYMBOL_GPL(supported_xcr0
);
267 static struct kmem_cache
*x86_fpu_cache
;
269 static struct kmem_cache
*x86_emulator_cache
;
272 * When called, it means the previous get/set msr reached an invalid msr.
273 * Return true if we want to ignore/silent this failed msr access.
275 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
277 const char *op
= write
? "wrmsr" : "rdmsr";
280 if (report_ignored_msrs
)
281 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
286 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
292 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
294 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
295 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
297 return kmem_cache_create_usercopy("x86_emulator", size
,
298 __alignof__(struct x86_emulate_ctxt
),
299 SLAB_ACCOUNT
, useroffset
,
300 size
- useroffset
, NULL
);
303 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
305 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
308 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
309 vcpu
->arch
.apf
.gfns
[i
] = ~0;
312 static void kvm_on_user_return(struct user_return_notifier
*urn
)
315 struct kvm_user_return_msrs
*msrs
316 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
317 struct kvm_user_return_msr_values
*values
;
321 * Disabling irqs at this point since the following code could be
322 * interrupted and executed through kvm_arch_hardware_disable()
324 local_irq_save(flags
);
325 if (msrs
->registered
) {
326 msrs
->registered
= false;
327 user_return_notifier_unregister(urn
);
329 local_irq_restore(flags
);
330 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
331 values
= &msrs
->values
[slot
];
332 if (values
->host
!= values
->curr
) {
333 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
334 values
->curr
= values
->host
;
339 static int kvm_probe_user_return_msr(u32 msr
)
345 ret
= rdmsrl_safe(msr
, &val
);
348 ret
= wrmsrl_safe(msr
, val
);
354 int kvm_add_user_return_msr(u32 msr
)
356 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
358 if (kvm_probe_user_return_msr(msr
))
361 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
362 return kvm_nr_uret_msrs
++;
364 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
366 int kvm_find_user_return_msr(u32 msr
)
370 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
371 if (kvm_uret_msrs_list
[i
] == msr
)
376 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
378 static void kvm_user_return_msr_cpu_online(void)
380 unsigned int cpu
= smp_processor_id();
381 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
385 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
386 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
387 msrs
->values
[i
].host
= value
;
388 msrs
->values
[i
].curr
= value
;
392 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
394 unsigned int cpu
= smp_processor_id();
395 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
398 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
399 if (value
== msrs
->values
[slot
].curr
)
401 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
405 msrs
->values
[slot
].curr
= value
;
406 if (!msrs
->registered
) {
407 msrs
->urn
.on_user_return
= kvm_on_user_return
;
408 user_return_notifier_register(&msrs
->urn
);
409 msrs
->registered
= true;
413 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
415 static void drop_user_return_notifiers(void)
417 unsigned int cpu
= smp_processor_id();
418 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
420 if (msrs
->registered
)
421 kvm_on_user_return(&msrs
->urn
);
424 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
426 return vcpu
->arch
.apic_base
;
428 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
430 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
432 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
434 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
436 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
438 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
439 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
440 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
441 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
443 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
445 if (!msr_info
->host_initiated
) {
446 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
448 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
452 kvm_lapic_set_base(vcpu
, msr_info
->data
);
453 kvm_recalculate_apic_map(vcpu
->kvm
);
456 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
458 asmlinkage __visible noinstr
void kvm_spurious_fault(void)
460 /* Fault while not rebooting. We want the trace. */
461 BUG_ON(!kvm_rebooting
);
463 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
465 #define EXCPT_BENIGN 0
466 #define EXCPT_CONTRIBUTORY 1
469 static int exception_class(int vector
)
479 return EXCPT_CONTRIBUTORY
;
486 #define EXCPT_FAULT 0
488 #define EXCPT_ABORT 2
489 #define EXCPT_INTERRUPT 3
491 static int exception_type(int vector
)
495 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
496 return EXCPT_INTERRUPT
;
500 /* #DB is trap, as instruction watchpoints are handled elsewhere */
501 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
504 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
507 /* Reserved exceptions will result in fault */
511 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
513 unsigned nr
= vcpu
->arch
.exception
.nr
;
514 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
515 unsigned long payload
= vcpu
->arch
.exception
.payload
;
523 * "Certain debug exceptions may clear bit 0-3. The
524 * remaining contents of the DR6 register are never
525 * cleared by the processor".
527 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
529 * In order to reflect the #DB exception payload in guest
530 * dr6, three components need to be considered: active low
531 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
533 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
534 * In the target guest dr6:
535 * FIXED_1 bits should always be set.
536 * Active low bits should be cleared if 1-setting in payload.
537 * Active high bits should be set if 1-setting in payload.
539 * Note, the payload is compatible with the pending debug
540 * exceptions/exit qualification under VMX, that active_low bits
541 * are active high in payload.
542 * So they need to be flipped for DR6.
544 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
545 vcpu
->arch
.dr6
|= payload
;
546 vcpu
->arch
.dr6
^= payload
& DR6_ACTIVE_LOW
;
549 * The #DB payload is defined as compatible with the 'pending
550 * debug exceptions' field under VMX, not DR6. While bit 12 is
551 * defined in the 'pending debug exceptions' field (enabled
552 * breakpoint), it is reserved and must be zero in DR6.
554 vcpu
->arch
.dr6
&= ~BIT(12);
557 vcpu
->arch
.cr2
= payload
;
561 vcpu
->arch
.exception
.has_payload
= false;
562 vcpu
->arch
.exception
.payload
= 0;
564 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
566 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
567 unsigned nr
, bool has_error
, u32 error_code
,
568 bool has_payload
, unsigned long payload
, bool reinject
)
573 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
575 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
579 * On vmentry, vcpu->arch.exception.pending is only
580 * true if an event injection was blocked by
581 * nested_run_pending. In that case, however,
582 * vcpu_enter_guest requests an immediate exit,
583 * and the guest shouldn't proceed far enough to
586 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
587 vcpu
->arch
.exception
.injected
= true;
588 if (WARN_ON_ONCE(has_payload
)) {
590 * A reinjected event has already
591 * delivered its payload.
597 vcpu
->arch
.exception
.pending
= true;
598 vcpu
->arch
.exception
.injected
= false;
600 vcpu
->arch
.exception
.has_error_code
= has_error
;
601 vcpu
->arch
.exception
.nr
= nr
;
602 vcpu
->arch
.exception
.error_code
= error_code
;
603 vcpu
->arch
.exception
.has_payload
= has_payload
;
604 vcpu
->arch
.exception
.payload
= payload
;
605 if (!is_guest_mode(vcpu
))
606 kvm_deliver_exception_payload(vcpu
);
610 /* to check exception */
611 prev_nr
= vcpu
->arch
.exception
.nr
;
612 if (prev_nr
== DF_VECTOR
) {
613 /* triple fault -> shutdown */
614 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
617 class1
= exception_class(prev_nr
);
618 class2
= exception_class(nr
);
619 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
620 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
622 * Generate double fault per SDM Table 5-5. Set
623 * exception.pending = true so that the double fault
624 * can trigger a nested vmexit.
626 vcpu
->arch
.exception
.pending
= true;
627 vcpu
->arch
.exception
.injected
= false;
628 vcpu
->arch
.exception
.has_error_code
= true;
629 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
630 vcpu
->arch
.exception
.error_code
= 0;
631 vcpu
->arch
.exception
.has_payload
= false;
632 vcpu
->arch
.exception
.payload
= 0;
634 /* replace previous exception with a new one in a hope
635 that instruction re-execution will regenerate lost
640 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
642 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
644 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
646 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
648 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
650 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
652 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
653 unsigned long payload
)
655 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
657 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
659 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
660 u32 error_code
, unsigned long payload
)
662 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
663 true, payload
, false);
666 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
669 kvm_inject_gp(vcpu
, 0);
671 return kvm_skip_emulated_instruction(vcpu
);
675 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
677 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
679 ++vcpu
->stat
.pf_guest
;
680 vcpu
->arch
.exception
.nested_apf
=
681 is_guest_mode(vcpu
) && fault
->async_page_fault
;
682 if (vcpu
->arch
.exception
.nested_apf
) {
683 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
684 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
686 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
690 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
692 bool kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
693 struct x86_exception
*fault
)
695 struct kvm_mmu
*fault_mmu
;
696 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
698 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
702 * Invalidate the TLB entry for the faulting address, if it exists,
703 * else the access will fault indefinitely (and to emulate hardware).
705 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
706 !(fault
->error_code
& PFERR_RSVD_MASK
))
707 kvm_mmu_invalidate_gva(vcpu
, fault_mmu
, fault
->address
,
708 fault_mmu
->root_hpa
);
710 fault_mmu
->inject_page_fault(vcpu
, fault
);
711 return fault
->nested_page_fault
;
713 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
715 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
717 atomic_inc(&vcpu
->arch
.nmi_queued
);
718 kvm_make_request(KVM_REQ_NMI
, vcpu
);
720 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
722 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
724 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
726 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
728 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
730 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
732 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
735 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
736 * a #GP and return false.
738 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
740 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
742 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
745 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
747 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
749 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
752 kvm_queue_exception(vcpu
, UD_VECTOR
);
755 EXPORT_SYMBOL_GPL(kvm_require_dr
);
758 * This function will be used to read from the physical memory of the currently
759 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
760 * can read from guest physical or from the guest's guest physical memory.
762 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
763 gfn_t ngfn
, void *data
, int offset
, int len
,
766 struct x86_exception exception
;
770 ngpa
= gfn_to_gpa(ngfn
);
771 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
772 if (real_gfn
== UNMAPPED_GVA
)
775 real_gfn
= gpa_to_gfn(real_gfn
);
777 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
779 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
781 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
782 void *data
, int offset
, int len
, u32 access
)
784 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
785 data
, offset
, len
, access
);
788 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
790 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
794 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
796 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
798 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
799 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
802 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
804 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
805 offset
* sizeof(u64
), sizeof(pdpte
),
806 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
811 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
812 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
813 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
820 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
821 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
827 EXPORT_SYMBOL_GPL(load_pdptrs
);
829 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
831 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
836 if (!is_pae_paging(vcpu
))
839 if (!kvm_register_is_available(vcpu
, VCPU_EXREG_PDPTR
))
842 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
843 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
844 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
845 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
849 return memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
851 EXPORT_SYMBOL_GPL(pdptrs_changed
);
853 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
855 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
857 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
858 kvm_clear_async_pf_completion_queue(vcpu
);
859 kvm_async_pf_hash_reset(vcpu
);
862 if ((cr0
^ old_cr0
) & update_bits
)
863 kvm_mmu_reset_context(vcpu
);
865 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
866 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
867 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
868 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
870 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
872 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
874 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
875 unsigned long pdptr_bits
= X86_CR0_CD
| X86_CR0_NW
| X86_CR0_PG
;
880 if (cr0
& 0xffffffff00000000UL
)
884 cr0
&= ~CR0_RESERVED_BITS
;
886 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
889 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
893 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
894 (cr0
& X86_CR0_PG
)) {
899 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
904 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
905 is_pae(vcpu
) && ((cr0
^ old_cr0
) & pdptr_bits
) &&
906 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
)))
909 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
912 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
914 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
918 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
920 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
922 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
924 EXPORT_SYMBOL_GPL(kvm_lmsw
);
926 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
928 if (vcpu
->arch
.guest_state_protected
)
931 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
933 if (vcpu
->arch
.xcr0
!= host_xcr0
)
934 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
936 if (vcpu
->arch
.xsaves_enabled
&&
937 vcpu
->arch
.ia32_xss
!= host_xss
)
938 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
941 if (static_cpu_has(X86_FEATURE_PKU
) &&
942 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
943 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
)) &&
944 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
945 __write_pkru(vcpu
->arch
.pkru
);
947 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
949 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
951 if (vcpu
->arch
.guest_state_protected
)
954 if (static_cpu_has(X86_FEATURE_PKU
) &&
955 (kvm_read_cr4_bits(vcpu
, X86_CR4_PKE
) ||
956 (vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
))) {
957 vcpu
->arch
.pkru
= rdpkru();
958 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
959 __write_pkru(vcpu
->arch
.host_pkru
);
962 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
)) {
964 if (vcpu
->arch
.xcr0
!= host_xcr0
)
965 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
967 if (vcpu
->arch
.xsaves_enabled
&&
968 vcpu
->arch
.ia32_xss
!= host_xss
)
969 wrmsrl(MSR_IA32_XSS
, host_xss
);
973 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
975 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
978 u64 old_xcr0
= vcpu
->arch
.xcr0
;
981 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
982 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
984 if (!(xcr0
& XFEATURE_MASK_FP
))
986 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
990 * Do not allow the guest to set bits that we do not support
991 * saving. However, xcr0 bit 0 is always set, even if the
992 * emulated CPU does not support XSAVE (see fx_init).
994 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
995 if (xcr0
& ~valid_bits
)
998 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
999 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1002 if (xcr0
& XFEATURE_MASK_AVX512
) {
1003 if (!(xcr0
& XFEATURE_MASK_YMM
))
1005 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1008 vcpu
->arch
.xcr0
= xcr0
;
1010 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1011 kvm_update_cpuid_runtime(vcpu
);
1015 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1017 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1018 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1019 kvm_inject_gp(vcpu
, 0);
1023 return kvm_skip_emulated_instruction(vcpu
);
1025 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1027 bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1029 if (cr4
& cr4_reserved_bits
)
1032 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1035 return static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1037 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4
);
1039 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1041 unsigned long mmu_role_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1042 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
1044 if (((cr4
^ old_cr4
) & mmu_role_bits
) ||
1045 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1046 kvm_mmu_reset_context(vcpu
);
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1050 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1052 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1053 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
1056 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1059 if (is_long_mode(vcpu
)) {
1060 if (!(cr4
& X86_CR4_PAE
))
1062 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1064 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1065 && ((cr4
^ old_cr4
) & pdptr_bits
)
1066 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
1067 kvm_read_cr3(vcpu
)))
1070 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1071 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
1074 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1079 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1081 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1087 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1089 bool skip_tlb_flush
= false;
1090 #ifdef CONFIG_X86_64
1091 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
1094 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1095 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1099 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
1100 if (!skip_tlb_flush
) {
1101 kvm_mmu_sync_roots(vcpu
);
1102 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1108 * Do not condition the GPA check on long mode, this helper is used to
1109 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1110 * the current vCPU mode is accurate.
1112 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1115 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
1118 kvm_mmu_new_pgd(vcpu
, cr3
, skip_tlb_flush
, skip_tlb_flush
);
1119 vcpu
->arch
.cr3
= cr3
;
1120 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
1124 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1126 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1128 if (cr8
& CR8_RESERVED_BITS
)
1130 if (lapic_in_kernel(vcpu
))
1131 kvm_lapic_set_tpr(vcpu
, cr8
);
1133 vcpu
->arch
.cr8
= cr8
;
1136 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1138 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1140 if (lapic_in_kernel(vcpu
))
1141 return kvm_lapic_get_cr8(vcpu
);
1143 return vcpu
->arch
.cr8
;
1145 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1147 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1151 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1152 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1153 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1154 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
1158 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1162 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1163 dr7
= vcpu
->arch
.guest_debug_dr7
;
1165 dr7
= vcpu
->arch
.dr7
;
1166 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1167 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1168 if (dr7
& DR7_BP_EN_MASK
)
1169 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1171 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1173 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1175 u64 fixed
= DR6_FIXED_1
;
1177 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1180 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1181 fixed
|= DR6_BUS_LOCK
;
1185 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1187 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1191 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1192 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1193 vcpu
->arch
.eff_db
[dr
] = val
;
1197 if (!kvm_dr6_valid(val
))
1199 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1203 if (!kvm_dr7_valid(val
))
1205 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1206 kvm_update_dr7(vcpu
);
1212 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1214 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1216 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1220 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1224 *val
= vcpu
->arch
.dr6
;
1228 *val
= vcpu
->arch
.dr7
;
1232 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1234 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1236 u32 ecx
= kvm_rcx_read(vcpu
);
1239 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1240 kvm_inject_gp(vcpu
, 0);
1244 kvm_rax_write(vcpu
, (u32
)data
);
1245 kvm_rdx_write(vcpu
, data
>> 32);
1246 return kvm_skip_emulated_instruction(vcpu
);
1248 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1251 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1252 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1254 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1255 * extract the supported MSRs from the related const lists.
1256 * msrs_to_save is selected from the msrs_to_save_all to reflect the
1257 * capabilities of the host cpu. This capabilities test skips MSRs that are
1258 * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1259 * may depend on host virtualization features rather than host cpu features.
1262 static const u32 msrs_to_save_all
[] = {
1263 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1265 #ifdef CONFIG_X86_64
1266 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1268 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1269 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1271 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1272 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1273 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1274 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1275 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1276 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1277 MSR_IA32_UMWAIT_CONTROL
,
1279 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1280 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2, MSR_ARCH_PERFMON_FIXED_CTR0
+ 3,
1281 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1282 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1283 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1284 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1285 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1286 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1287 MSR_ARCH_PERFMON_PERFCTR0
+ 8, MSR_ARCH_PERFMON_PERFCTR0
+ 9,
1288 MSR_ARCH_PERFMON_PERFCTR0
+ 10, MSR_ARCH_PERFMON_PERFCTR0
+ 11,
1289 MSR_ARCH_PERFMON_PERFCTR0
+ 12, MSR_ARCH_PERFMON_PERFCTR0
+ 13,
1290 MSR_ARCH_PERFMON_PERFCTR0
+ 14, MSR_ARCH_PERFMON_PERFCTR0
+ 15,
1291 MSR_ARCH_PERFMON_PERFCTR0
+ 16, MSR_ARCH_PERFMON_PERFCTR0
+ 17,
1292 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1293 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1294 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1295 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1296 MSR_ARCH_PERFMON_EVENTSEL0
+ 8, MSR_ARCH_PERFMON_EVENTSEL0
+ 9,
1297 MSR_ARCH_PERFMON_EVENTSEL0
+ 10, MSR_ARCH_PERFMON_EVENTSEL0
+ 11,
1298 MSR_ARCH_PERFMON_EVENTSEL0
+ 12, MSR_ARCH_PERFMON_EVENTSEL0
+ 13,
1299 MSR_ARCH_PERFMON_EVENTSEL0
+ 14, MSR_ARCH_PERFMON_EVENTSEL0
+ 15,
1300 MSR_ARCH_PERFMON_EVENTSEL0
+ 16, MSR_ARCH_PERFMON_EVENTSEL0
+ 17,
1302 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1303 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1304 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1305 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1306 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1307 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1310 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_all
)];
1311 static unsigned num_msrs_to_save
;
1313 static const u32 emulated_msrs_all
[] = {
1314 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1315 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1316 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1317 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1318 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1319 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1320 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1322 HV_X64_MSR_VP_INDEX
,
1323 HV_X64_MSR_VP_RUNTIME
,
1324 HV_X64_MSR_SCONTROL
,
1325 HV_X64_MSR_STIMER0_CONFIG
,
1326 HV_X64_MSR_VP_ASSIST_PAGE
,
1327 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1328 HV_X64_MSR_TSC_EMULATION_STATUS
,
1329 HV_X64_MSR_SYNDBG_OPTIONS
,
1330 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1331 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1332 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1334 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1335 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1337 MSR_IA32_TSC_ADJUST
,
1338 MSR_IA32_TSC_DEADLINE
,
1339 MSR_IA32_ARCH_CAPABILITIES
,
1340 MSR_IA32_PERF_CAPABILITIES
,
1341 MSR_IA32_MISC_ENABLE
,
1342 MSR_IA32_MCG_STATUS
,
1344 MSR_IA32_MCG_EXT_CTL
,
1348 MSR_MISC_FEATURES_ENABLES
,
1349 MSR_AMD64_VIRT_SPEC_CTRL
,
1354 * The following list leaves out MSRs whose values are determined
1355 * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1356 * We always support the "true" VMX control MSRs, even if the host
1357 * processor does not, so I am putting these registers here rather
1358 * than in msrs_to_save_all.
1361 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1362 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1363 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1364 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1366 MSR_IA32_VMX_CR0_FIXED0
,
1367 MSR_IA32_VMX_CR4_FIXED0
,
1368 MSR_IA32_VMX_VMCS_ENUM
,
1369 MSR_IA32_VMX_PROCBASED_CTLS2
,
1370 MSR_IA32_VMX_EPT_VPID_CAP
,
1371 MSR_IA32_VMX_VMFUNC
,
1374 MSR_KVM_POLL_CONTROL
,
1377 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1378 static unsigned num_emulated_msrs
;
1381 * List of msr numbers which are used to expose MSR-based features that
1382 * can be used by a hypervisor to validate requested CPU features.
1384 static const u32 msr_based_features_all
[] = {
1386 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1387 MSR_IA32_VMX_PINBASED_CTLS
,
1388 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1389 MSR_IA32_VMX_PROCBASED_CTLS
,
1390 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1391 MSR_IA32_VMX_EXIT_CTLS
,
1392 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1393 MSR_IA32_VMX_ENTRY_CTLS
,
1395 MSR_IA32_VMX_CR0_FIXED0
,
1396 MSR_IA32_VMX_CR0_FIXED1
,
1397 MSR_IA32_VMX_CR4_FIXED0
,
1398 MSR_IA32_VMX_CR4_FIXED1
,
1399 MSR_IA32_VMX_VMCS_ENUM
,
1400 MSR_IA32_VMX_PROCBASED_CTLS2
,
1401 MSR_IA32_VMX_EPT_VPID_CAP
,
1402 MSR_IA32_VMX_VMFUNC
,
1406 MSR_IA32_ARCH_CAPABILITIES
,
1407 MSR_IA32_PERF_CAPABILITIES
,
1410 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all
)];
1411 static unsigned int num_msr_based_features
;
1413 static u64
kvm_get_arch_capabilities(void)
1417 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
1418 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, data
);
1421 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1422 * the nested hypervisor runs with NX huge pages. If it is not,
1423 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1424 * L1 guests, so it need not worry about its own (L2) guests.
1426 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1429 * If we're doing cache flushes (either "always" or "cond")
1430 * we will do one whenever the guest does a vmlaunch/vmresume.
1431 * If an outer hypervisor is doing the cache flush for us
1432 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1433 * capability to the guest too, and if EPT is disabled we're not
1434 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1435 * require a nested hypervisor to do a flush of its own.
1437 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1438 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1440 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1441 data
|= ARCH_CAP_RDCL_NO
;
1442 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1443 data
|= ARCH_CAP_SSB_NO
;
1444 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1445 data
|= ARCH_CAP_MDS_NO
;
1447 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1449 * If RTM=0 because the kernel has disabled TSX, the host might
1450 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1451 * and therefore knows that there cannot be TAA) but keep
1452 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1453 * and we want to allow migrating those guests to tsx=off hosts.
1455 data
&= ~ARCH_CAP_TAA_NO
;
1456 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1457 data
|= ARCH_CAP_TAA_NO
;
1460 * Nothing to do here; we emulate TSX_CTRL if present on the
1461 * host so the guest can choose between disabling TSX or
1462 * using VERW to clear CPU buffers.
1469 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1471 switch (msr
->index
) {
1472 case MSR_IA32_ARCH_CAPABILITIES
:
1473 msr
->data
= kvm_get_arch_capabilities();
1475 case MSR_IA32_UCODE_REV
:
1476 rdmsrl_safe(msr
->index
, &msr
->data
);
1479 return static_call(kvm_x86_get_msr_feature
)(msr
);
1484 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1486 struct kvm_msr_entry msr
;
1490 r
= kvm_get_msr_feature(&msr
);
1492 if (r
== KVM_MSR_RET_INVALID
) {
1493 /* Unconditionally clear the output for simplicity */
1495 if (kvm_msr_ignored_check(index
, 0, false))
1507 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1509 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1512 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1515 if (efer
& (EFER_LME
| EFER_LMA
) &&
1516 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1519 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1525 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1527 if (efer
& efer_reserved_bits
)
1530 return __kvm_valid_efer(vcpu
, efer
);
1532 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1534 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1536 u64 old_efer
= vcpu
->arch
.efer
;
1537 u64 efer
= msr_info
->data
;
1540 if (efer
& efer_reserved_bits
)
1543 if (!msr_info
->host_initiated
) {
1544 if (!__kvm_valid_efer(vcpu
, efer
))
1547 if (is_paging(vcpu
) &&
1548 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1553 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1555 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1561 /* Update reserved bits */
1562 if ((efer
^ old_efer
) & EFER_NX
)
1563 kvm_mmu_reset_context(vcpu
);
1568 void kvm_enable_efer_bits(u64 mask
)
1570 efer_reserved_bits
&= ~mask
;
1572 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1574 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1576 struct kvm_x86_msr_filter
*msr_filter
;
1577 struct msr_bitmap_range
*ranges
;
1578 struct kvm
*kvm
= vcpu
->kvm
;
1583 /* x2APIC MSRs do not support filtering. */
1584 if (index
>= 0x800 && index
<= 0x8ff)
1587 idx
= srcu_read_lock(&kvm
->srcu
);
1589 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1595 allowed
= msr_filter
->default_allow
;
1596 ranges
= msr_filter
->ranges
;
1598 for (i
= 0; i
< msr_filter
->count
; i
++) {
1599 u32 start
= ranges
[i
].base
;
1600 u32 end
= start
+ ranges
[i
].nmsrs
;
1601 u32 flags
= ranges
[i
].flags
;
1602 unsigned long *bitmap
= ranges
[i
].bitmap
;
1604 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1605 allowed
= !!test_bit(index
- start
, bitmap
);
1611 srcu_read_unlock(&kvm
->srcu
, idx
);
1615 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1618 * Write @data into the MSR specified by @index. Select MSR specific fault
1619 * checks are bypassed if @host_initiated is %true.
1620 * Returns 0 on success, non-0 otherwise.
1621 * Assumes vcpu_load() was already called.
1623 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1624 bool host_initiated
)
1626 struct msr_data msr
;
1628 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1629 return KVM_MSR_RET_FILTERED
;
1634 case MSR_KERNEL_GS_BASE
:
1637 if (is_noncanonical_address(data
, vcpu
))
1640 case MSR_IA32_SYSENTER_EIP
:
1641 case MSR_IA32_SYSENTER_ESP
:
1643 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1644 * non-canonical address is written on Intel but not on
1645 * AMD (which ignores the top 32-bits, because it does
1646 * not implement 64-bit SYSENTER).
1648 * 64-bit code should hence be able to write a non-canonical
1649 * value on AMD. Making the address canonical ensures that
1650 * vmentry does not fail on Intel after writing a non-canonical
1651 * value, and that something deterministic happens if the guest
1652 * invokes 64-bit SYSENTER.
1654 data
= get_canonical(data
, vcpu_virt_addr_bits(vcpu
));
1657 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1660 if (!host_initiated
&&
1661 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1662 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1666 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1667 * incomplete and conflicting architectural behavior. Current
1668 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1669 * reserved and always read as zeros. Enforce Intel's reserved
1670 * bits check if and only if the guest CPU is Intel, and clear
1671 * the bits in all other cases. This ensures cross-vendor
1672 * migration will provide consistent behavior for the guest.
1674 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1683 msr
.host_initiated
= host_initiated
;
1685 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1688 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1689 u32 index
, u64 data
, bool host_initiated
)
1691 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1693 if (ret
== KVM_MSR_RET_INVALID
)
1694 if (kvm_msr_ignored_check(index
, data
, true))
1701 * Read the MSR specified by @index into @data. Select MSR specific fault
1702 * checks are bypassed if @host_initiated is %true.
1703 * Returns 0 on success, non-0 otherwise.
1704 * Assumes vcpu_load() was already called.
1706 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1707 bool host_initiated
)
1709 struct msr_data msr
;
1712 if (!host_initiated
&& !kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1713 return KVM_MSR_RET_FILTERED
;
1717 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1720 if (!host_initiated
&&
1721 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1722 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1728 msr
.host_initiated
= host_initiated
;
1730 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1736 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1737 u32 index
, u64
*data
, bool host_initiated
)
1739 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1741 if (ret
== KVM_MSR_RET_INVALID
) {
1742 /* Unconditionally clear *data for simplicity */
1744 if (kvm_msr_ignored_check(index
, 0, false))
1751 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1753 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1755 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1757 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1759 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1761 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1763 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
1765 int err
= vcpu
->run
->msr
.error
;
1767 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1768 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1771 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, err
);
1774 static int complete_emulated_wrmsr(struct kvm_vcpu
*vcpu
)
1776 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
1779 static u64
kvm_msr_reason(int r
)
1782 case KVM_MSR_RET_INVALID
:
1783 return KVM_MSR_EXIT_REASON_UNKNOWN
;
1784 case KVM_MSR_RET_FILTERED
:
1785 return KVM_MSR_EXIT_REASON_FILTER
;
1787 return KVM_MSR_EXIT_REASON_INVAL
;
1791 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
1792 u32 exit_reason
, u64 data
,
1793 int (*completion
)(struct kvm_vcpu
*vcpu
),
1796 u64 msr_reason
= kvm_msr_reason(r
);
1798 /* Check if the user wanted to know about this MSR fault */
1799 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
1802 vcpu
->run
->exit_reason
= exit_reason
;
1803 vcpu
->run
->msr
.error
= 0;
1804 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
1805 vcpu
->run
->msr
.reason
= msr_reason
;
1806 vcpu
->run
->msr
.index
= index
;
1807 vcpu
->run
->msr
.data
= data
;
1808 vcpu
->arch
.complete_userspace_io
= completion
;
1813 static int kvm_get_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, int r
)
1815 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_RDMSR
, 0,
1816 complete_emulated_rdmsr
, r
);
1819 static int kvm_set_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
, int r
)
1821 return kvm_msr_user_space(vcpu
, index
, KVM_EXIT_X86_WRMSR
, data
,
1822 complete_emulated_wrmsr
, r
);
1825 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
1827 u32 ecx
= kvm_rcx_read(vcpu
);
1831 r
= kvm_get_msr(vcpu
, ecx
, &data
);
1833 /* MSR read failed? See if we should ask user space */
1834 if (r
&& kvm_get_msr_user_space(vcpu
, ecx
, r
)) {
1835 /* Bounce to user space */
1840 trace_kvm_msr_read(ecx
, data
);
1842 kvm_rax_write(vcpu
, data
& -1u);
1843 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
1845 trace_kvm_msr_read_ex(ecx
);
1848 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1850 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
1852 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
1854 u32 ecx
= kvm_rcx_read(vcpu
);
1855 u64 data
= kvm_read_edx_eax(vcpu
);
1858 r
= kvm_set_msr(vcpu
, ecx
, data
);
1860 /* MSR write failed? See if we should ask user space */
1861 if (r
&& kvm_set_msr_user_space(vcpu
, ecx
, data
, r
))
1862 /* Bounce to user space */
1865 /* Signal all other negative errors to userspace */
1870 trace_kvm_msr_write(ecx
, data
);
1872 trace_kvm_msr_write_ex(ecx
, data
);
1874 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
1876 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
1878 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
1880 return kvm_skip_emulated_instruction(vcpu
);
1882 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop
);
1884 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
1886 /* Treat an INVD instruction as a NOP and just skip it. */
1887 return kvm_emulate_as_nop(vcpu
);
1889 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
1891 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
1893 pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1894 return kvm_emulate_as_nop(vcpu
);
1896 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
1898 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
1900 kvm_queue_exception(vcpu
, UD_VECTOR
);
1903 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
1905 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
1907 pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1908 return kvm_emulate_as_nop(vcpu
);
1910 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
1912 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
1914 xfer_to_guest_mode_prepare();
1915 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
1916 xfer_to_guest_mode_work_pending();
1920 * The fast path for frequent and performance sensitive wrmsr emulation,
1921 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1922 * the latency of virtual IPI by avoiding the expensive bits of transitioning
1923 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1924 * other cases which must be called after interrupts are enabled on the host.
1926 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
1928 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
1931 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
1932 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
1933 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
1934 ((u32
)(data
>> 32) != X2APIC_BROADCAST
)) {
1937 kvm_apic_send_ipi(vcpu
->arch
.apic
, (u32
)data
, (u32
)(data
>> 32));
1938 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR2
, (u32
)(data
>> 32));
1939 kvm_lapic_set_reg(vcpu
->arch
.apic
, APIC_ICR
, (u32
)data
);
1940 trace_kvm_apic_write(APIC_ICR
, (u32
)data
);
1947 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
1949 if (!kvm_can_use_hv_timer(vcpu
))
1952 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
1956 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
1958 u32 msr
= kvm_rcx_read(vcpu
);
1960 fastpath_t ret
= EXIT_FASTPATH_NONE
;
1963 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
1964 data
= kvm_read_edx_eax(vcpu
);
1965 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
1966 kvm_skip_emulated_instruction(vcpu
);
1967 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
1970 case MSR_IA32_TSC_DEADLINE
:
1971 data
= kvm_read_edx_eax(vcpu
);
1972 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
1973 kvm_skip_emulated_instruction(vcpu
);
1974 ret
= EXIT_FASTPATH_REENTER_GUEST
;
1981 if (ret
!= EXIT_FASTPATH_NONE
)
1982 trace_kvm_msr_write(msr
, data
);
1986 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
1989 * Adapt set_msr() to msr_io()'s calling convention
1991 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1993 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
1996 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1998 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2001 #ifdef CONFIG_X86_64
2002 struct pvclock_clock
{
2012 struct pvclock_gtod_data
{
2015 struct pvclock_clock clock
; /* extract of a clocksource struct */
2016 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2022 static struct pvclock_gtod_data pvclock_gtod_data
;
2024 static void update_pvclock_gtod(struct timekeeper
*tk
)
2026 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2028 write_seqcount_begin(&vdata
->seq
);
2030 /* copy pvclock gtod data */
2031 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2032 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2033 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2034 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2035 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2036 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2037 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2039 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2040 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2041 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2042 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2043 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2044 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2045 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2047 vdata
->wall_time_sec
= tk
->xtime_sec
;
2049 vdata
->offs_boot
= tk
->offs_boot
;
2051 write_seqcount_end(&vdata
->seq
);
2054 static s64
get_kvmclock_base_ns(void)
2056 /* Count up from boot time, but with the frequency of the raw clock. */
2057 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2060 static s64
get_kvmclock_base_ns(void)
2062 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2063 return ktime_get_boottime_ns();
2067 void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2071 struct pvclock_wall_clock wc
;
2078 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2083 ++version
; /* first time write, random junk */
2087 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2091 * The guest calculates current wall clock time by adding
2092 * system time (updated by kvm_guest_time_update below) to the
2093 * wall clock specified here. We do the reverse here.
2095 wall_nsec
= ktime_get_real_ns() - get_kvmclock_ns(kvm
);
2097 wc
.nsec
= do_div(wall_nsec
, 1000000000);
2098 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2099 wc
.version
= version
;
2101 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2104 wc_sec_hi
= wall_nsec
>> 32;
2105 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2106 &wc_sec_hi
, sizeof(wc_sec_hi
));
2110 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2113 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2114 bool old_msr
, bool host_initiated
)
2116 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2118 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2119 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2120 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2122 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2125 vcpu
->arch
.time
= system_time
;
2126 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2128 /* we verify if the enable bit is set... */
2129 vcpu
->arch
.pv_time_enabled
= false;
2130 if (!(system_time
& 1))
2133 if (!kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2134 &vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2135 sizeof(struct pvclock_vcpu_time_info
)))
2136 vcpu
->arch
.pv_time_enabled
= true;
2141 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2143 do_shl32_div32(dividend
, divisor
);
2147 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2148 s8
*pshift
, u32
*pmultiplier
)
2156 scaled64
= scaled_hz
;
2157 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2162 tps32
= (uint32_t)tps64
;
2163 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2164 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2172 *pmultiplier
= div_frac(scaled64
, tps32
);
2175 #ifdef CONFIG_X86_64
2176 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2179 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2180 static unsigned long max_tsc_khz
;
2182 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2184 u64 v
= (u64
)khz
* (1000000 + ppm
);
2189 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2193 /* Guest TSC same frequency as host TSC? */
2195 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2199 /* TSC scaling supported? */
2200 if (!kvm_has_tsc_control
) {
2201 if (user_tsc_khz
> tsc_khz
) {
2202 vcpu
->arch
.tsc_catchup
= 1;
2203 vcpu
->arch
.tsc_always_catchup
= 1;
2206 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2211 /* TSC scaling required - calculate ratio */
2212 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
2213 user_tsc_khz
, tsc_khz
);
2215 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
2216 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2221 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
2225 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2227 u32 thresh_lo
, thresh_hi
;
2228 int use_scaling
= 0;
2230 /* tsc_khz can be zero if TSC calibration fails */
2231 if (user_tsc_khz
== 0) {
2232 /* set tsc_scaling_ratio to a safe value */
2233 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
2237 /* Compute a scale to convert nanoseconds in TSC cycles */
2238 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2239 &vcpu
->arch
.virtual_tsc_shift
,
2240 &vcpu
->arch
.virtual_tsc_mult
);
2241 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2244 * Compute the variation in TSC rate which is acceptable
2245 * within the range of tolerance and decide if the
2246 * rate being applied is within that bounds of the hardware
2247 * rate. If so, no scaling or compensation need be done.
2249 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2250 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2251 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2252 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
2255 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2258 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2260 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2261 vcpu
->arch
.virtual_tsc_mult
,
2262 vcpu
->arch
.virtual_tsc_shift
);
2263 tsc
+= vcpu
->arch
.this_tsc_write
;
2267 static inline int gtod_is_based_on_tsc(int mode
)
2269 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2272 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
2274 #ifdef CONFIG_X86_64
2276 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2277 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2279 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2280 atomic_read(&vcpu
->kvm
->online_vcpus
));
2283 * Once the masterclock is enabled, always perform request in
2284 * order to update it.
2286 * In order to enable masterclock, the host clocksource must be TSC
2287 * and the vcpus need to have matched TSCs. When that happens,
2288 * perform request to enable masterclock.
2290 if (ka
->use_master_clock
||
2291 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
2292 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2294 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2295 atomic_read(&vcpu
->kvm
->online_vcpus
),
2296 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2301 * Multiply tsc by a fixed point number represented by ratio.
2303 * The most significant 64-N bits (mult) of ratio represent the
2304 * integral part of the fixed point number; the remaining N bits
2305 * (frac) represent the fractional part, ie. ratio represents a fixed
2306 * point number (mult + frac * 2^(-N)).
2308 * N equals to kvm_tsc_scaling_ratio_frac_bits.
2310 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2312 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
2315 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
2318 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
2320 if (ratio
!= kvm_default_tsc_scaling_ratio
)
2321 _tsc
= __scale_tsc(ratio
, tsc
);
2325 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
2327 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2331 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
2333 return target_tsc
- tsc
;
2336 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2338 return vcpu
->arch
.l1_tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
2340 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2342 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
2344 vcpu
->arch
.l1_tsc_offset
= offset
;
2345 vcpu
->arch
.tsc_offset
= static_call(kvm_x86_write_l1_tsc_offset
)(vcpu
, offset
);
2348 static inline bool kvm_check_tsc_unstable(void)
2350 #ifdef CONFIG_X86_64
2352 * TSC is marked unstable when we're running on Hyper-V,
2353 * 'TSC page' clocksource is good.
2355 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2358 return check_tsc_unstable();
2361 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 data
)
2363 struct kvm
*kvm
= vcpu
->kvm
;
2364 u64 offset
, ns
, elapsed
;
2365 unsigned long flags
;
2367 bool already_matched
;
2368 bool synchronizing
= false;
2370 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2371 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2372 ns
= get_kvmclock_base_ns();
2373 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2375 if (vcpu
->arch
.virtual_tsc_khz
) {
2378 * detection of vcpu initialization -- need to sync
2379 * with other vCPUs. This particularly helps to keep
2380 * kvm_clock stable after CPU hotplug
2382 synchronizing
= true;
2384 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2385 nsec_to_cycles(vcpu
, elapsed
);
2386 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2388 * Special case: TSC write with a small delta (1 second)
2389 * of virtual cycle time against real time is
2390 * interpreted as an attempt to synchronize the CPU.
2392 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2393 data
+ tsc_hz
> tsc_exp
;
2398 * For a reliable TSC, we can match TSC offsets, and for an unstable
2399 * TSC, we add elapsed time in this computation. We could let the
2400 * compensation code attempt to catch up if we fall behind, but
2401 * it's better to try to match offsets from the beginning.
2403 if (synchronizing
&&
2404 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2405 if (!kvm_check_tsc_unstable()) {
2406 offset
= kvm
->arch
.cur_tsc_offset
;
2408 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2410 offset
= kvm_compute_tsc_offset(vcpu
, data
);
2413 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
2416 * We split periods of matched TSC writes into generations.
2417 * For each generation, we track the original measured
2418 * nanosecond time, offset, and write, so if TSCs are in
2419 * sync, we can match exact offset, and if not, we can match
2420 * exact software computation in compute_guest_tsc()
2422 * These values are tracked in kvm->arch.cur_xxx variables.
2424 kvm
->arch
.cur_tsc_generation
++;
2425 kvm
->arch
.cur_tsc_nsec
= ns
;
2426 kvm
->arch
.cur_tsc_write
= data
;
2427 kvm
->arch
.cur_tsc_offset
= offset
;
2432 * We also track th most recent recorded KHZ, write and time to
2433 * allow the matching interval to be extended at each write.
2435 kvm
->arch
.last_tsc_nsec
= ns
;
2436 kvm
->arch
.last_tsc_write
= data
;
2437 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2439 vcpu
->arch
.last_guest_tsc
= data
;
2441 /* Keep track of which generation this VCPU has synchronized to */
2442 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2443 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2444 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2446 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2447 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2449 raw_spin_lock_irqsave(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2451 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2452 } else if (!already_matched
) {
2453 kvm
->arch
.nr_vcpus_matched_tsc
++;
2456 kvm_track_tsc_matching(vcpu
);
2457 raw_spin_unlock_irqrestore(&kvm
->arch
.pvclock_gtod_sync_lock
, flags
);
2460 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2463 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2464 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2467 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2469 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
2470 WARN_ON(adjustment
< 0);
2471 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
2472 adjust_tsc_offset_guest(vcpu
, adjustment
);
2475 #ifdef CONFIG_X86_64
2477 static u64
read_tsc(void)
2479 u64 ret
= (u64
)rdtsc_ordered();
2480 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2482 if (likely(ret
>= last
))
2486 * GCC likes to generate cmov here, but this branch is extremely
2487 * predictable (it's just a function of time and the likely is
2488 * very likely) and there's a data dependence, so force GCC
2489 * to generate a branch instead. I don't barrier() because
2490 * we don't actually need a barrier, and if this function
2491 * ever gets inlined it will generate worse code.
2497 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2503 switch (clock
->vclock_mode
) {
2504 case VDSO_CLOCKMODE_HVCLOCK
:
2505 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
2507 if (tsc_pg_val
!= U64_MAX
) {
2508 /* TSC page valid */
2509 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2510 v
= (tsc_pg_val
- clock
->cycle_last
) &
2513 /* TSC page invalid */
2514 *mode
= VDSO_CLOCKMODE_NONE
;
2517 case VDSO_CLOCKMODE_TSC
:
2518 *mode
= VDSO_CLOCKMODE_TSC
;
2519 *tsc_timestamp
= read_tsc();
2520 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2524 *mode
= VDSO_CLOCKMODE_NONE
;
2527 if (*mode
== VDSO_CLOCKMODE_NONE
)
2528 *tsc_timestamp
= v
= 0;
2530 return v
* clock
->mult
;
2533 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2535 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2541 seq
= read_seqcount_begin(>od
->seq
);
2542 ns
= gtod
->raw_clock
.base_cycles
;
2543 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2544 ns
>>= gtod
->raw_clock
.shift
;
2545 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2546 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2552 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2554 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2560 seq
= read_seqcount_begin(>od
->seq
);
2561 ts
->tv_sec
= gtod
->wall_time_sec
;
2562 ns
= gtod
->clock
.base_cycles
;
2563 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2564 ns
>>= gtod
->clock
.shift
;
2565 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2567 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2573 /* returns true if host is using TSC based clocksource */
2574 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2576 /* checked again under seqlock below */
2577 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2580 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2584 /* returns true if host is using TSC based clocksource */
2585 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2588 /* checked again under seqlock below */
2589 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2592 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2598 * Assuming a stable TSC across physical CPUS, and a stable TSC
2599 * across virtual CPUs, the following condition is possible.
2600 * Each numbered line represents an event visible to both
2601 * CPUs at the next numbered event.
2603 * "timespecX" represents host monotonic time. "tscX" represents
2606 * VCPU0 on CPU0 | VCPU1 on CPU1
2608 * 1. read timespec0,tsc0
2609 * 2. | timespec1 = timespec0 + N
2611 * 3. transition to guest | transition to guest
2612 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2613 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2614 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2616 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2619 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2621 * - 0 < N - M => M < N
2623 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2624 * always the case (the difference between two distinct xtime instances
2625 * might be smaller then the difference between corresponding TSC reads,
2626 * when updating guest vcpus pvclock areas).
2628 * To avoid that problem, do not allow visibility of distinct
2629 * system_timestamp/tsc_timestamp values simultaneously: use a master
2630 * copy of host monotonic time values. Update that master copy
2633 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2637 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2639 #ifdef CONFIG_X86_64
2640 struct kvm_arch
*ka
= &kvm
->arch
;
2642 bool host_tsc_clocksource
, vcpus_matched
;
2644 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2645 atomic_read(&kvm
->online_vcpus
));
2648 * If the host uses TSC clock, then passthrough TSC as stable
2651 host_tsc_clocksource
= kvm_get_time_and_clockread(
2652 &ka
->master_kernel_ns
,
2653 &ka
->master_cycle_now
);
2655 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2656 && !ka
->backwards_tsc_observed
2657 && !ka
->boot_vcpu_runs_old_kvmclock
;
2659 if (ka
->use_master_clock
)
2660 atomic_set(&kvm_guest_has_master_clock
, 1);
2662 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2663 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2668 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2670 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2673 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2675 #ifdef CONFIG_X86_64
2677 struct kvm_vcpu
*vcpu
;
2678 struct kvm_arch
*ka
= &kvm
->arch
;
2679 unsigned long flags
;
2681 kvm_hv_invalidate_tsc_page(kvm
);
2683 kvm_make_mclock_inprogress_request(kvm
);
2685 /* no guest entries from this point */
2686 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2687 pvclock_update_vm_gtod_copy(kvm
);
2688 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2690 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2691 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2693 /* guest entries allowed */
2694 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2695 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2699 u64
get_kvmclock_ns(struct kvm
*kvm
)
2701 struct kvm_arch
*ka
= &kvm
->arch
;
2702 struct pvclock_vcpu_time_info hv_clock
;
2703 unsigned long flags
;
2706 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2707 if (!ka
->use_master_clock
) {
2708 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2709 return get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2712 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2713 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2714 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2716 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2719 if (__this_cpu_read(cpu_tsc_khz
)) {
2720 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2721 &hv_clock
.tsc_shift
,
2722 &hv_clock
.tsc_to_system_mul
);
2723 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2725 ret
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
2732 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
,
2733 struct gfn_to_hva_cache
*cache
,
2734 unsigned int offset
)
2736 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2737 struct pvclock_vcpu_time_info guest_hv_clock
;
2739 if (unlikely(kvm_read_guest_offset_cached(v
->kvm
, cache
,
2740 &guest_hv_clock
, offset
, sizeof(guest_hv_clock
))))
2743 /* This VCPU is paused, but it's legal for a guest to read another
2744 * VCPU's kvmclock, so we really have to follow the specification where
2745 * it says that version is odd if data is being modified, and even after
2748 * Version field updates must be kept separate. This is because
2749 * kvm_write_guest_cached might use a "rep movs" instruction, and
2750 * writes within a string instruction are weakly ordered. So there
2751 * are three writes overall.
2753 * As a small optimization, only write the version field in the first
2754 * and third write. The vcpu->pv_time cache is still valid, because the
2755 * version field is the first in the struct.
2757 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2759 if (guest_hv_clock
.version
& 1)
2760 ++guest_hv_clock
.version
; /* first time write, random junk */
2762 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2763 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2764 &vcpu
->hv_clock
, offset
,
2765 sizeof(vcpu
->hv_clock
.version
));
2769 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2770 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2772 if (vcpu
->pvclock_set_guest_stopped_request
) {
2773 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2774 vcpu
->pvclock_set_guest_stopped_request
= false;
2777 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2779 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2780 &vcpu
->hv_clock
, offset
,
2781 sizeof(vcpu
->hv_clock
));
2785 vcpu
->hv_clock
.version
++;
2786 kvm_write_guest_offset_cached(v
->kvm
, cache
,
2787 &vcpu
->hv_clock
, offset
,
2788 sizeof(vcpu
->hv_clock
.version
));
2791 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2793 unsigned long flags
, tgt_tsc_khz
;
2794 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2795 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2797 u64 tsc_timestamp
, host_tsc
;
2799 bool use_master_clock
;
2805 * If the host uses TSC clock, then passthrough TSC as stable
2808 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
2809 use_master_clock
= ka
->use_master_clock
;
2810 if (use_master_clock
) {
2811 host_tsc
= ka
->master_cycle_now
;
2812 kernel_ns
= ka
->master_kernel_ns
;
2814 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
2816 /* Keep irq disabled to prevent changes to the clock */
2817 local_irq_save(flags
);
2818 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2819 if (unlikely(tgt_tsc_khz
== 0)) {
2820 local_irq_restore(flags
);
2821 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2824 if (!use_master_clock
) {
2826 kernel_ns
= get_kvmclock_base_ns();
2829 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2832 * We may have to catch up the TSC to match elapsed wall clock
2833 * time for two reasons, even if kvmclock is used.
2834 * 1) CPU could have been running below the maximum TSC rate
2835 * 2) Broken TSC compensation resets the base at each VCPU
2836 * entry to avoid unknown leaps of TSC even when running
2837 * again on the same CPU. This may cause apparent elapsed
2838 * time to disappear, and the guest to stand still or run
2841 if (vcpu
->tsc_catchup
) {
2842 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2843 if (tsc
> tsc_timestamp
) {
2844 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2845 tsc_timestamp
= tsc
;
2849 local_irq_restore(flags
);
2851 /* With all the info we got, fill in the values */
2853 if (kvm_has_tsc_control
)
2854 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2856 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2857 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2858 &vcpu
->hv_clock
.tsc_shift
,
2859 &vcpu
->hv_clock
.tsc_to_system_mul
);
2860 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2863 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2864 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2865 vcpu
->last_guest_tsc
= tsc_timestamp
;
2867 /* If the host uses TSC clocksource, then it is stable */
2869 if (use_master_clock
)
2870 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2872 vcpu
->hv_clock
.flags
= pvclock_flags
;
2874 if (vcpu
->pv_time_enabled
)
2875 kvm_setup_pvclock_page(v
, &vcpu
->pv_time
, 0);
2876 if (vcpu
->xen
.vcpu_info_set
)
2877 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_info_cache
,
2878 offsetof(struct compat_vcpu_info
, time
));
2879 if (vcpu
->xen
.vcpu_time_info_set
)
2880 kvm_setup_pvclock_page(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
2881 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2882 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2887 * kvmclock updates which are isolated to a given vcpu, such as
2888 * vcpu->cpu migration, should not allow system_timestamp from
2889 * the rest of the vcpus to remain static. Otherwise ntp frequency
2890 * correction applies to one vcpu's system_timestamp but not
2893 * So in those cases, request a kvmclock update for all vcpus.
2894 * We need to rate-limit these requests though, as they can
2895 * considerably slow guests that have a large number of vcpus.
2896 * The time for a remote vcpu to update its kvmclock is bound
2897 * by the delay we use to rate-limit the updates.
2900 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2902 static void kvmclock_update_fn(struct work_struct
*work
)
2905 struct delayed_work
*dwork
= to_delayed_work(work
);
2906 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2907 kvmclock_update_work
);
2908 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2909 struct kvm_vcpu
*vcpu
;
2911 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2912 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2913 kvm_vcpu_kick(vcpu
);
2917 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2919 struct kvm
*kvm
= v
->kvm
;
2921 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2922 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2923 KVMCLOCK_UPDATE_DELAY
);
2926 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2928 static void kvmclock_sync_fn(struct work_struct
*work
)
2930 struct delayed_work
*dwork
= to_delayed_work(work
);
2931 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2932 kvmclock_sync_work
);
2933 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2935 if (!kvmclock_periodic_sync
)
2938 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2939 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2940 KVMCLOCK_SYNC_PERIOD
);
2944 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2946 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
2948 /* McStatusWrEn enabled? */
2949 if (guest_cpuid_is_amd_or_hygon(vcpu
))
2950 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
2955 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2957 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2958 unsigned bank_num
= mcg_cap
& 0xff;
2959 u32 msr
= msr_info
->index
;
2960 u64 data
= msr_info
->data
;
2963 case MSR_IA32_MCG_STATUS
:
2964 vcpu
->arch
.mcg_status
= data
;
2966 case MSR_IA32_MCG_CTL
:
2967 if (!(mcg_cap
& MCG_CTL_P
) &&
2968 (data
|| !msr_info
->host_initiated
))
2970 if (data
!= 0 && data
!= ~(u64
)0)
2972 vcpu
->arch
.mcg_ctl
= data
;
2975 if (msr
>= MSR_IA32_MC0_CTL
&&
2976 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2977 u32 offset
= array_index_nospec(
2978 msr
- MSR_IA32_MC0_CTL
,
2979 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
2981 /* only 0 or all 1s can be written to IA32_MCi_CTL
2982 * some Linux kernels though clear bit 10 in bank 4 to
2983 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2984 * this to avoid an uncatched #GP in the guest
2986 if ((offset
& 0x3) == 0 &&
2987 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2991 if (!msr_info
->host_initiated
&&
2992 (offset
& 0x3) == 1 && data
!= 0) {
2993 if (!can_set_mci_status(vcpu
))
2997 vcpu
->arch
.mce_banks
[offset
] = data
;
3005 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3007 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3009 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3012 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3014 gpa_t gpa
= data
& ~0x3f;
3016 /* Bits 4:5 are reserved, Should be zero */
3020 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3021 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3024 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3025 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3028 if (!lapic_in_kernel(vcpu
))
3029 return data
? 1 : 0;
3031 vcpu
->arch
.apf
.msr_en_val
= data
;
3033 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3034 kvm_clear_async_pf_completion_queue(vcpu
);
3035 kvm_async_pf_hash_reset(vcpu
);
3039 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3043 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3044 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3046 kvm_async_pf_wakeup_all(vcpu
);
3051 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3053 /* Bits 8-63 are reserved */
3057 if (!lapic_in_kernel(vcpu
))
3060 vcpu
->arch
.apf
.msr_int_val
= data
;
3062 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3067 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3069 vcpu
->arch
.pv_time_enabled
= false;
3070 vcpu
->arch
.time
= 0;
3073 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3075 ++vcpu
->stat
.tlb_flush
;
3076 static_call(kvm_x86_tlb_flush_all
)(vcpu
);
3079 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3081 ++vcpu
->stat
.tlb_flush
;
3085 * A TLB flush on behalf of the guest is equivalent to
3086 * INVPCID(all), toggling CR4.PGE, etc., which requires
3087 * a forced sync of the shadow page tables. Unload the
3088 * entire MMU here and the subsequent load will sync the
3089 * shadow page tables, and also flush the TLB.
3091 kvm_mmu_unload(vcpu
);
3095 static_call(kvm_x86_tlb_flush_guest
)(vcpu
);
3099 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3101 ++vcpu
->stat
.tlb_flush
;
3102 static_call(kvm_x86_tlb_flush_current
)(vcpu
);
3106 * Service "local" TLB flush requests, which are specific to the current MMU
3107 * context. In addition to the generic event handling in vcpu_enter_guest(),
3108 * TLB flushes that are targeted at an MMU context also need to be serviced
3109 * prior before nested VM-Enter/VM-Exit.
3111 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3113 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3114 kvm_vcpu_flush_tlb_current(vcpu
);
3116 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3117 kvm_vcpu_flush_tlb_guest(vcpu
);
3119 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3121 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3123 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3124 struct kvm_steal_time __user
*st
;
3125 struct kvm_memslots
*slots
;
3129 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3130 kvm_xen_runstate_set_running(vcpu
);
3134 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3137 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3140 slots
= kvm_memslots(vcpu
->kvm
);
3142 if (unlikely(slots
->generation
!= ghc
->generation
||
3143 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3144 gfn_t gfn
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3146 /* We rely on the fact that it fits in a single page. */
3147 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3149 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gfn
, sizeof(*st
)) ||
3150 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3154 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3156 * Doing a TLB flush here, on the guest's behalf, can avoid
3159 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3160 u8 st_preempted
= 0;
3163 if (!user_access_begin(st
, sizeof(*st
)))
3166 asm volatile("1: xchgb %0, %2\n"
3169 _ASM_EXTABLE_UA(1b
, 2b
)
3170 : "+q" (st_preempted
),
3172 "+m" (st
->preempted
));
3178 vcpu
->arch
.st
.preempted
= 0;
3180 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3181 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3182 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3183 kvm_vcpu_flush_tlb_guest(vcpu
);
3185 if (!user_access_begin(st
, sizeof(*st
)))
3188 if (!user_access_begin(st
, sizeof(*st
)))
3191 unsafe_put_user(0, &st
->preempted
, out
);
3192 vcpu
->arch
.st
.preempted
= 0;
3195 unsafe_get_user(version
, &st
->version
, out
);
3197 version
+= 1; /* first time write, random junk */
3200 unsafe_put_user(version
, &st
->version
, out
);
3204 unsafe_get_user(steal
, &st
->steal
, out
);
3205 steal
+= current
->sched_info
.run_delay
-
3206 vcpu
->arch
.st
.last_steal
;
3207 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3208 unsafe_put_user(steal
, &st
->steal
, out
);
3211 unsafe_put_user(version
, &st
->version
, out
);
3216 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3219 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3222 u32 msr
= msr_info
->index
;
3223 u64 data
= msr_info
->data
;
3225 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3226 return kvm_xen_write_hypercall_page(vcpu
, data
);
3229 case MSR_AMD64_NB_CFG
:
3230 case MSR_IA32_UCODE_WRITE
:
3231 case MSR_VM_HSAVE_PA
:
3232 case MSR_AMD64_PATCH_LOADER
:
3233 case MSR_AMD64_BU_CFG2
:
3234 case MSR_AMD64_DC_CFG
:
3235 case MSR_F15H_EX_CFG
:
3238 case MSR_IA32_UCODE_REV
:
3239 if (msr_info
->host_initiated
)
3240 vcpu
->arch
.microcode_version
= data
;
3242 case MSR_IA32_ARCH_CAPABILITIES
:
3243 if (!msr_info
->host_initiated
)
3245 vcpu
->arch
.arch_capabilities
= data
;
3247 case MSR_IA32_PERF_CAPABILITIES
: {
3248 struct kvm_msr_entry msr_ent
= {.index
= msr
, .data
= 0};
3250 if (!msr_info
->host_initiated
)
3252 if (guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
) && kvm_get_msr_feature(&msr_ent
))
3254 if (data
& ~msr_ent
.data
)
3257 vcpu
->arch
.perf_capabilities
= data
;
3262 return set_efer(vcpu
, msr_info
);
3264 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3265 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3266 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3268 /* Handle McStatusWrEn */
3269 if (data
== BIT_ULL(18)) {
3270 vcpu
->arch
.msr_hwcr
= data
;
3271 } else if (data
!= 0) {
3272 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
3277 case MSR_FAM10H_MMIO_CONF_BASE
:
3279 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
3284 case 0x200 ... 0x2ff:
3285 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3286 case MSR_IA32_APICBASE
:
3287 return kvm_set_apic_base(vcpu
, msr_info
);
3288 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3289 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3290 case MSR_IA32_TSC_DEADLINE
:
3291 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3293 case MSR_IA32_TSC_ADJUST
:
3294 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3295 if (!msr_info
->host_initiated
) {
3296 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3297 adjust_tsc_offset_guest(vcpu
, adj
);
3298 /* Before back to guest, tsc_timestamp must be adjusted
3299 * as well, otherwise guest's percpu pvclock time could jump.
3301 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3303 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3306 case MSR_IA32_MISC_ENABLE
:
3307 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3308 ((vcpu
->arch
.ia32_misc_enable_msr
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3309 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3311 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3312 kvm_update_cpuid_runtime(vcpu
);
3314 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3317 case MSR_IA32_SMBASE
:
3318 if (!msr_info
->host_initiated
)
3320 vcpu
->arch
.smbase
= data
;
3322 case MSR_IA32_POWER_CTL
:
3323 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3326 if (msr_info
->host_initiated
) {
3327 kvm_synchronize_tsc(vcpu
, data
);
3329 u64 adj
= kvm_compute_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3330 adjust_tsc_offset_guest(vcpu
, adj
);
3331 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3335 if (!msr_info
->host_initiated
&&
3336 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3339 * KVM supports exposing PT to the guest, but does not support
3340 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3341 * XSAVES/XRSTORS to save/restore PT MSRs.
3343 if (data
& ~supported_xss
)
3345 vcpu
->arch
.ia32_xss
= data
;
3348 if (!msr_info
->host_initiated
)
3350 vcpu
->arch
.smi_count
= data
;
3352 case MSR_KVM_WALL_CLOCK_NEW
:
3353 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3356 vcpu
->kvm
->arch
.wall_clock
= data
;
3357 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3359 case MSR_KVM_WALL_CLOCK
:
3360 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3363 vcpu
->kvm
->arch
.wall_clock
= data
;
3364 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3366 case MSR_KVM_SYSTEM_TIME_NEW
:
3367 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3370 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3372 case MSR_KVM_SYSTEM_TIME
:
3373 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3376 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3378 case MSR_KVM_ASYNC_PF_EN
:
3379 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3382 if (kvm_pv_enable_async_pf(vcpu
, data
))
3385 case MSR_KVM_ASYNC_PF_INT
:
3386 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3389 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3392 case MSR_KVM_ASYNC_PF_ACK
:
3393 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3396 vcpu
->arch
.apf
.pageready_pending
= false;
3397 kvm_check_async_pf_completion(vcpu
);
3400 case MSR_KVM_STEAL_TIME
:
3401 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3404 if (unlikely(!sched_info_on()))
3407 if (data
& KVM_STEAL_RESERVED_MASK
)
3410 vcpu
->arch
.st
.msr_val
= data
;
3412 if (!(data
& KVM_MSR_ENABLED
))
3415 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3418 case MSR_KVM_PV_EOI_EN
:
3419 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3422 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
3426 case MSR_KVM_POLL_CONTROL
:
3427 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3430 /* only enable bit supported */
3431 if (data
& (-1ULL << 1))
3434 vcpu
->arch
.msr_kvm_poll_control
= data
;
3437 case MSR_IA32_MCG_CTL
:
3438 case MSR_IA32_MCG_STATUS
:
3439 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3440 return set_msr_mce(vcpu
, msr_info
);
3442 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3443 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3446 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3447 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3448 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3449 return kvm_pmu_set_msr(vcpu
, msr_info
);
3451 if (pr
|| data
!= 0)
3452 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
3453 "0x%x data 0x%llx\n", msr
, data
);
3455 case MSR_K7_CLK_CTL
:
3457 * Ignore all writes to this no longer documented MSR.
3458 * Writes are only relevant for old K7 processors,
3459 * all pre-dating SVM, but a recommended workaround from
3460 * AMD for these chips. It is possible to specify the
3461 * affected processor models on the command line, hence
3462 * the need to ignore the workaround.
3465 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3466 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3467 case HV_X64_MSR_SYNDBG_OPTIONS
:
3468 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3469 case HV_X64_MSR_CRASH_CTL
:
3470 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3471 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3472 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3473 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3474 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
3475 msr_info
->host_initiated
);
3476 case MSR_IA32_BBL_CR_CTL3
:
3477 /* Drop writes to this legacy MSR -- see rdmsr
3478 * counterpart for further detail.
3480 if (report_ignored_msrs
)
3481 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
3484 case MSR_AMD64_OSVW_ID_LENGTH
:
3485 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3487 vcpu
->arch
.osvw
.length
= data
;
3489 case MSR_AMD64_OSVW_STATUS
:
3490 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3492 vcpu
->arch
.osvw
.status
= data
;
3494 case MSR_PLATFORM_INFO
:
3495 if (!msr_info
->host_initiated
||
3496 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
3497 cpuid_fault_enabled(vcpu
)))
3499 vcpu
->arch
.msr_platform_info
= data
;
3501 case MSR_MISC_FEATURES_ENABLES
:
3502 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
3503 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
3504 !supports_cpuid_fault(vcpu
)))
3506 vcpu
->arch
.msr_misc_features_enables
= data
;
3509 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
3510 return kvm_pmu_set_msr(vcpu
, msr_info
);
3511 return KVM_MSR_RET_INVALID
;
3515 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
3517 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
3520 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3521 unsigned bank_num
= mcg_cap
& 0xff;
3524 case MSR_IA32_P5_MC_ADDR
:
3525 case MSR_IA32_P5_MC_TYPE
:
3528 case MSR_IA32_MCG_CAP
:
3529 data
= vcpu
->arch
.mcg_cap
;
3531 case MSR_IA32_MCG_CTL
:
3532 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
3534 data
= vcpu
->arch
.mcg_ctl
;
3536 case MSR_IA32_MCG_STATUS
:
3537 data
= vcpu
->arch
.mcg_status
;
3540 if (msr
>= MSR_IA32_MC0_CTL
&&
3541 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
3542 u32 offset
= array_index_nospec(
3543 msr
- MSR_IA32_MC0_CTL
,
3544 MSR_IA32_MCx_CTL(bank_num
) - MSR_IA32_MC0_CTL
);
3546 data
= vcpu
->arch
.mce_banks
[offset
];
3555 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3557 switch (msr_info
->index
) {
3558 case MSR_IA32_PLATFORM_ID
:
3559 case MSR_IA32_EBL_CR_POWERON
:
3560 case MSR_IA32_LASTBRANCHFROMIP
:
3561 case MSR_IA32_LASTBRANCHTOIP
:
3562 case MSR_IA32_LASTINTFROMIP
:
3563 case MSR_IA32_LASTINTTOIP
:
3564 case MSR_AMD64_SYSCFG
:
3565 case MSR_K8_TSEG_ADDR
:
3566 case MSR_K8_TSEG_MASK
:
3567 case MSR_VM_HSAVE_PA
:
3568 case MSR_K8_INT_PENDING_MSG
:
3569 case MSR_AMD64_NB_CFG
:
3570 case MSR_FAM10H_MMIO_CONF_BASE
:
3571 case MSR_AMD64_BU_CFG2
:
3572 case MSR_IA32_PERF_CTL
:
3573 case MSR_AMD64_DC_CFG
:
3574 case MSR_F15H_EX_CFG
:
3576 * Intel Sandy Bridge CPUs must support the RAPL (running average power
3577 * limit) MSRs. Just return 0, as we do not want to expose the host
3578 * data here. Do not conditionalize this on CPUID, as KVM does not do
3579 * so for existing CPU-specific MSRs.
3581 case MSR_RAPL_POWER_UNIT
:
3582 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
3583 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
3584 case MSR_PKG_ENERGY_STATUS
: /* Total package */
3585 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
3588 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
3589 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3590 return kvm_pmu_get_msr(vcpu
, msr_info
);
3591 if (!msr_info
->host_initiated
)
3595 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
3596 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
3597 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
3598 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
3599 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3600 return kvm_pmu_get_msr(vcpu
, msr_info
);
3603 case MSR_IA32_UCODE_REV
:
3604 msr_info
->data
= vcpu
->arch
.microcode_version
;
3606 case MSR_IA32_ARCH_CAPABILITIES
:
3607 if (!msr_info
->host_initiated
&&
3608 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
3610 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
3612 case MSR_IA32_PERF_CAPABILITIES
:
3613 if (!msr_info
->host_initiated
&&
3614 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
3616 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
3618 case MSR_IA32_POWER_CTL
:
3619 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
3621 case MSR_IA32_TSC
: {
3623 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3624 * even when not intercepted. AMD manual doesn't explicitly
3625 * state this but appears to behave the same.
3627 * On userspace reads and writes, however, we unconditionally
3628 * return L1's TSC value to ensure backwards-compatible
3629 * behavior for migration.
3631 u64 tsc_offset
= msr_info
->host_initiated
? vcpu
->arch
.l1_tsc_offset
:
3632 vcpu
->arch
.tsc_offset
;
3634 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + tsc_offset
;
3638 case 0x200 ... 0x2ff:
3639 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
3640 case 0xcd: /* fsb frequency */
3644 * MSR_EBC_FREQUENCY_ID
3645 * Conservative value valid for even the basic CPU models.
3646 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3647 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3648 * and 266MHz for model 3, or 4. Set Core Clock
3649 * Frequency to System Bus Frequency Ratio to 1 (bits
3650 * 31:24) even though these are only valid for CPU
3651 * models > 2, however guests may end up dividing or
3652 * multiplying by zero otherwise.
3654 case MSR_EBC_FREQUENCY_ID
:
3655 msr_info
->data
= 1 << 24;
3657 case MSR_IA32_APICBASE
:
3658 msr_info
->data
= kvm_get_apic_base(vcpu
);
3660 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3661 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
3662 case MSR_IA32_TSC_DEADLINE
:
3663 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
3665 case MSR_IA32_TSC_ADJUST
:
3666 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
3668 case MSR_IA32_MISC_ENABLE
:
3669 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
3671 case MSR_IA32_SMBASE
:
3672 if (!msr_info
->host_initiated
)
3674 msr_info
->data
= vcpu
->arch
.smbase
;
3677 msr_info
->data
= vcpu
->arch
.smi_count
;
3679 case MSR_IA32_PERF_STATUS
:
3680 /* TSC increment by tick */
3681 msr_info
->data
= 1000ULL;
3682 /* CPU multiplier */
3683 msr_info
->data
|= (((uint64_t)4ULL) << 40);
3686 msr_info
->data
= vcpu
->arch
.efer
;
3688 case MSR_KVM_WALL_CLOCK
:
3689 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3692 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3694 case MSR_KVM_WALL_CLOCK_NEW
:
3695 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3698 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
3700 case MSR_KVM_SYSTEM_TIME
:
3701 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3704 msr_info
->data
= vcpu
->arch
.time
;
3706 case MSR_KVM_SYSTEM_TIME_NEW
:
3707 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3710 msr_info
->data
= vcpu
->arch
.time
;
3712 case MSR_KVM_ASYNC_PF_EN
:
3713 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3716 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
3718 case MSR_KVM_ASYNC_PF_INT
:
3719 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3722 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
3724 case MSR_KVM_ASYNC_PF_ACK
:
3725 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3730 case MSR_KVM_STEAL_TIME
:
3731 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3734 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
3736 case MSR_KVM_PV_EOI_EN
:
3737 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3740 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
3742 case MSR_KVM_POLL_CONTROL
:
3743 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3746 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
3748 case MSR_IA32_P5_MC_ADDR
:
3749 case MSR_IA32_P5_MC_TYPE
:
3750 case MSR_IA32_MCG_CAP
:
3751 case MSR_IA32_MCG_CTL
:
3752 case MSR_IA32_MCG_STATUS
:
3753 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3754 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
3755 msr_info
->host_initiated
);
3757 if (!msr_info
->host_initiated
&&
3758 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3760 msr_info
->data
= vcpu
->arch
.ia32_xss
;
3762 case MSR_K7_CLK_CTL
:
3764 * Provide expected ramp-up count for K7. All other
3765 * are set to zero, indicating minimum divisors for
3768 * This prevents guest kernels on AMD host with CPU
3769 * type 6, model 8 and higher from exploding due to
3770 * the rdmsr failing.
3772 msr_info
->data
= 0x20000000;
3774 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
3775 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
3776 case HV_X64_MSR_SYNDBG_OPTIONS
:
3777 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
3778 case HV_X64_MSR_CRASH_CTL
:
3779 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
3780 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
3781 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
3782 case HV_X64_MSR_TSC_EMULATION_STATUS
:
3783 return kvm_hv_get_msr_common(vcpu
,
3784 msr_info
->index
, &msr_info
->data
,
3785 msr_info
->host_initiated
);
3786 case MSR_IA32_BBL_CR_CTL3
:
3787 /* This legacy MSR exists but isn't fully documented in current
3788 * silicon. It is however accessed by winxp in very narrow
3789 * scenarios where it sets bit #19, itself documented as
3790 * a "reserved" bit. Best effort attempt to source coherent
3791 * read data here should the balance of the register be
3792 * interpreted by the guest:
3794 * L2 cache control register 3: 64GB range, 256KB size,
3795 * enabled, latency 0x1, configured
3797 msr_info
->data
= 0xbe702111;
3799 case MSR_AMD64_OSVW_ID_LENGTH
:
3800 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3802 msr_info
->data
= vcpu
->arch
.osvw
.length
;
3804 case MSR_AMD64_OSVW_STATUS
:
3805 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
3807 msr_info
->data
= vcpu
->arch
.osvw
.status
;
3809 case MSR_PLATFORM_INFO
:
3810 if (!msr_info
->host_initiated
&&
3811 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
3813 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
3815 case MSR_MISC_FEATURES_ENABLES
:
3816 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
3819 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
3822 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
3823 return kvm_pmu_get_msr(vcpu
, msr_info
);
3824 return KVM_MSR_RET_INVALID
;
3828 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
3831 * Read or write a bunch of msrs. All parameters are kernel addresses.
3833 * @return number of msrs set successfully.
3835 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
3836 struct kvm_msr_entry
*entries
,
3837 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3838 unsigned index
, u64
*data
))
3842 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
3843 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
3850 * Read or write a bunch of msrs. Parameters are user addresses.
3852 * @return number of msrs set successfully.
3854 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
3855 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
3856 unsigned index
, u64
*data
),
3859 struct kvm_msrs msrs
;
3860 struct kvm_msr_entry
*entries
;
3865 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3869 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3872 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3873 entries
= memdup_user(user_msrs
->entries
, size
);
3874 if (IS_ERR(entries
)) {
3875 r
= PTR_ERR(entries
);
3879 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3884 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
3895 static inline bool kvm_can_mwait_in_guest(void)
3897 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
3898 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
3899 boot_cpu_has(X86_FEATURE_ARAT
);
3902 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
3903 struct kvm_cpuid2 __user
*cpuid_arg
)
3905 struct kvm_cpuid2 cpuid
;
3909 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3912 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3917 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3923 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
3928 case KVM_CAP_IRQCHIP
:
3930 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
3931 case KVM_CAP_SET_TSS_ADDR
:
3932 case KVM_CAP_EXT_CPUID
:
3933 case KVM_CAP_EXT_EMUL_CPUID
:
3934 case KVM_CAP_CLOCKSOURCE
:
3936 case KVM_CAP_NOP_IO_DELAY
:
3937 case KVM_CAP_MP_STATE
:
3938 case KVM_CAP_SYNC_MMU
:
3939 case KVM_CAP_USER_NMI
:
3940 case KVM_CAP_REINJECT_CONTROL
:
3941 case KVM_CAP_IRQ_INJECT_STATUS
:
3942 case KVM_CAP_IOEVENTFD
:
3943 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
3945 case KVM_CAP_PIT_STATE2
:
3946 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
3947 case KVM_CAP_VCPU_EVENTS
:
3948 case KVM_CAP_HYPERV
:
3949 case KVM_CAP_HYPERV_VAPIC
:
3950 case KVM_CAP_HYPERV_SPIN
:
3951 case KVM_CAP_HYPERV_SYNIC
:
3952 case KVM_CAP_HYPERV_SYNIC2
:
3953 case KVM_CAP_HYPERV_VP_INDEX
:
3954 case KVM_CAP_HYPERV_EVENTFD
:
3955 case KVM_CAP_HYPERV_TLBFLUSH
:
3956 case KVM_CAP_HYPERV_SEND_IPI
:
3957 case KVM_CAP_HYPERV_CPUID
:
3958 case KVM_CAP_SYS_HYPERV_CPUID
:
3959 case KVM_CAP_PCI_SEGMENT
:
3960 case KVM_CAP_DEBUGREGS
:
3961 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
3963 case KVM_CAP_ASYNC_PF
:
3964 case KVM_CAP_ASYNC_PF_INT
:
3965 case KVM_CAP_GET_TSC_KHZ
:
3966 case KVM_CAP_KVMCLOCK_CTRL
:
3967 case KVM_CAP_READONLY_MEM
:
3968 case KVM_CAP_HYPERV_TIME
:
3969 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
3970 case KVM_CAP_TSC_DEADLINE_TIMER
:
3971 case KVM_CAP_DISABLE_QUIRKS
:
3972 case KVM_CAP_SET_BOOT_CPU_ID
:
3973 case KVM_CAP_SPLIT_IRQCHIP
:
3974 case KVM_CAP_IMMEDIATE_EXIT
:
3975 case KVM_CAP_PMU_EVENT_FILTER
:
3976 case KVM_CAP_GET_MSR_FEATURES
:
3977 case KVM_CAP_MSR_PLATFORM_INFO
:
3978 case KVM_CAP_EXCEPTION_PAYLOAD
:
3979 case KVM_CAP_SET_GUEST_DEBUG
:
3980 case KVM_CAP_LAST_CPU
:
3981 case KVM_CAP_X86_USER_SPACE_MSR
:
3982 case KVM_CAP_X86_MSR_FILTER
:
3983 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
3984 #ifdef CONFIG_X86_SGX_KVM
3985 case KVM_CAP_SGX_ATTRIBUTE
:
3987 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
3990 case KVM_CAP_SET_GUEST_DEBUG2
:
3991 return KVM_GUESTDBG_VALID_MASK
;
3992 #ifdef CONFIG_KVM_XEN
3993 case KVM_CAP_XEN_HVM
:
3994 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
3995 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
3996 KVM_XEN_HVM_CONFIG_SHARED_INFO
;
3997 if (sched_info_on())
3998 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
;
4001 case KVM_CAP_SYNC_REGS
:
4002 r
= KVM_SYNC_X86_VALID_FIELDS
;
4004 case KVM_CAP_ADJUST_CLOCK
:
4005 r
= KVM_CLOCK_TSC_STABLE
;
4007 case KVM_CAP_X86_DISABLE_EXITS
:
4008 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
|
4009 KVM_X86_DISABLE_EXITS_CSTATE
;
4010 if(kvm_can_mwait_in_guest())
4011 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4013 case KVM_CAP_X86_SMM
:
4014 /* SMBASE is usually relocated above 1M on modern chipsets,
4015 * and SMM handlers might indeed rely on 4G segment limits,
4016 * so do not report SMM to be available if real mode is
4017 * emulated via vm86 mode. Still, do not go to great lengths
4018 * to avoid userspace's usage of the feature, because it is a
4019 * fringe case that is not enabled except via specific settings
4020 * of the module parameters.
4022 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4025 r
= !static_call(kvm_x86_cpu_has_accelerated_tpr
)();
4027 case KVM_CAP_NR_VCPUS
:
4028 r
= KVM_SOFT_MAX_VCPUS
;
4030 case KVM_CAP_MAX_VCPUS
:
4033 case KVM_CAP_MAX_VCPU_ID
:
4034 r
= KVM_MAX_VCPU_ID
;
4036 case KVM_CAP_PV_MMU
: /* obsolete */
4040 r
= KVM_MAX_MCE_BANKS
;
4043 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4045 case KVM_CAP_TSC_CONTROL
:
4046 r
= kvm_has_tsc_control
;
4048 case KVM_CAP_X2APIC_API
:
4049 r
= KVM_X2APIC_API_VALID_FLAGS
;
4051 case KVM_CAP_NESTED_STATE
:
4052 r
= kvm_x86_ops
.nested_ops
->get_state
?
4053 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4055 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4056 r
= kvm_x86_ops
.enable_direct_tlbflush
!= NULL
;
4058 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4059 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4061 case KVM_CAP_SMALLER_MAXPHYADDR
:
4062 r
= (int) allow_smaller_maxphyaddr
;
4064 case KVM_CAP_STEAL_TIME
:
4065 r
= sched_info_on();
4067 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4068 if (kvm_has_bus_lock_exit
)
4069 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4070 KVM_BUS_LOCK_DETECTION_EXIT
;
4081 long kvm_arch_dev_ioctl(struct file
*filp
,
4082 unsigned int ioctl
, unsigned long arg
)
4084 void __user
*argp
= (void __user
*)arg
;
4088 case KVM_GET_MSR_INDEX_LIST
: {
4089 struct kvm_msr_list __user
*user_msr_list
= argp
;
4090 struct kvm_msr_list msr_list
;
4094 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4097 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4098 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4101 if (n
< msr_list
.nmsrs
)
4104 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4105 num_msrs_to_save
* sizeof(u32
)))
4107 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4109 num_emulated_msrs
* sizeof(u32
)))
4114 case KVM_GET_SUPPORTED_CPUID
:
4115 case KVM_GET_EMULATED_CPUID
: {
4116 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4117 struct kvm_cpuid2 cpuid
;
4120 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4123 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4129 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4134 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4136 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
4137 sizeof(kvm_mce_cap_supported
)))
4141 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4142 struct kvm_msr_list __user
*user_msr_list
= argp
;
4143 struct kvm_msr_list msr_list
;
4147 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4150 msr_list
.nmsrs
= num_msr_based_features
;
4151 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4154 if (n
< msr_list
.nmsrs
)
4157 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4158 num_msr_based_features
* sizeof(u32
)))
4164 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4166 case KVM_GET_SUPPORTED_HV_CPUID
:
4167 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4177 static void wbinvd_ipi(void *garbage
)
4182 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4184 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4187 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4189 /* Address WBINVD may be executed by guest */
4190 if (need_emulate_wbinvd(vcpu
)) {
4191 if (static_call(kvm_x86_has_wbinvd_exit
)())
4192 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4193 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4194 smp_call_function_single(vcpu
->cpu
,
4195 wbinvd_ipi
, NULL
, 1);
4198 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4200 /* Save host pkru register if supported */
4201 vcpu
->arch
.host_pkru
= read_pkru();
4203 /* Apply any externally detected TSC adjustments (due to suspend) */
4204 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4205 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4206 vcpu
->arch
.tsc_offset_adjustment
= 0;
4207 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4210 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4211 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4212 rdtsc() - vcpu
->arch
.last_host_tsc
;
4214 mark_tsc_unstable("KVM discovered backwards TSC");
4216 if (kvm_check_tsc_unstable()) {
4217 u64 offset
= kvm_compute_tsc_offset(vcpu
,
4218 vcpu
->arch
.last_guest_tsc
);
4219 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4220 vcpu
->arch
.tsc_catchup
= 1;
4223 if (kvm_lapic_hv_timer_in_use(vcpu
))
4224 kvm_lapic_restart_hv_timer(vcpu
);
4227 * On a host with synchronized TSC, there is no need to update
4228 * kvmclock on vcpu->cpu migration
4230 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4231 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4232 if (vcpu
->cpu
!= cpu
)
4233 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4237 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4240 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4242 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4243 struct kvm_steal_time __user
*st
;
4244 struct kvm_memslots
*slots
;
4245 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
4247 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
4250 if (vcpu
->arch
.st
.preempted
)
4253 /* This happens on process exit */
4254 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
4257 slots
= kvm_memslots(vcpu
->kvm
);
4259 if (unlikely(slots
->generation
!= ghc
->generation
||
4260 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
4263 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
4264 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
4266 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
4267 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
4269 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
4272 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
4276 if (vcpu
->preempted
&& !vcpu
->arch
.guest_state_protected
)
4277 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
4280 * Take the srcu lock as memslots will be accessed to check the gfn
4281 * cache generation against the memslots generation.
4283 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4284 if (kvm_xen_msr_enabled(vcpu
->kvm
))
4285 kvm_xen_runstate_set_preempted(vcpu
);
4287 kvm_steal_time_set_preempted(vcpu
);
4288 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4290 static_call(kvm_x86_vcpu_put
)(vcpu
);
4291 vcpu
->arch
.last_host_tsc
= rdtsc();
4293 * If userspace has set any breakpoints or watchpoints, dr6 is restored
4294 * on every vmexit, but if not, we might have a stale dr6 from the
4295 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
4300 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
4301 struct kvm_lapic_state
*s
)
4303 if (vcpu
->arch
.apicv_active
)
4304 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
4306 return kvm_apic_get_state(vcpu
, s
);
4309 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
4310 struct kvm_lapic_state
*s
)
4314 r
= kvm_apic_set_state(vcpu
, s
);
4317 update_cr8_intercept(vcpu
);
4322 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
4325 * We can accept userspace's request for interrupt injection
4326 * as long as we have a place to store the interrupt number.
4327 * The actual injection will happen when the CPU is able to
4328 * deliver the interrupt.
4330 if (kvm_cpu_has_extint(vcpu
))
4333 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
4334 return (!lapic_in_kernel(vcpu
) ||
4335 kvm_apic_accept_pic_intr(vcpu
));
4338 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
4341 * Do not cause an interrupt window exit if an exception
4342 * is pending or an event needs reinjection; userspace
4343 * might want to inject the interrupt manually using KVM_SET_REGS
4344 * or KVM_SET_SREGS. For that to work, we must be at an
4345 * instruction boundary and with no events half-injected.
4347 return (kvm_arch_interrupt_allowed(vcpu
) &&
4348 kvm_cpu_accept_dm_intr(vcpu
) &&
4349 !kvm_event_needs_reinjection(vcpu
) &&
4350 !vcpu
->arch
.exception
.pending
);
4353 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
4354 struct kvm_interrupt
*irq
)
4356 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
4359 if (!irqchip_in_kernel(vcpu
->kvm
)) {
4360 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
4361 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4366 * With in-kernel LAPIC, we only use this to inject EXTINT, so
4367 * fail for in-kernel 8259.
4369 if (pic_in_kernel(vcpu
->kvm
))
4372 if (vcpu
->arch
.pending_external_vector
!= -1)
4375 vcpu
->arch
.pending_external_vector
= irq
->irq
;
4376 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4380 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
4382 kvm_inject_nmi(vcpu
);
4387 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
4389 kvm_make_request(KVM_REQ_SMI
, vcpu
);
4394 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
4395 struct kvm_tpr_access_ctl
*tac
)
4399 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
4403 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
4407 unsigned bank_num
= mcg_cap
& 0xff, bank
;
4410 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
4412 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
4415 vcpu
->arch
.mcg_cap
= mcg_cap
;
4416 /* Init IA32_MCG_CTL to all 1s */
4417 if (mcg_cap
& MCG_CTL_P
)
4418 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
4419 /* Init IA32_MCi_CTL to all 1s */
4420 for (bank
= 0; bank
< bank_num
; bank
++)
4421 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
4423 static_call(kvm_x86_setup_mce
)(vcpu
);
4428 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
4429 struct kvm_x86_mce
*mce
)
4431 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4432 unsigned bank_num
= mcg_cap
& 0xff;
4433 u64
*banks
= vcpu
->arch
.mce_banks
;
4435 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
4438 * if IA32_MCG_CTL is not all 1s, the uncorrected error
4439 * reporting is disabled
4441 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
4442 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
4444 banks
+= 4 * mce
->bank
;
4446 * if IA32_MCi_CTL is not all 1s, the uncorrected error
4447 * reporting is disabled for the bank
4449 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
4451 if (mce
->status
& MCI_STATUS_UC
) {
4452 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
4453 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
4454 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
4457 if (banks
[1] & MCI_STATUS_VAL
)
4458 mce
->status
|= MCI_STATUS_OVER
;
4459 banks
[2] = mce
->addr
;
4460 banks
[3] = mce
->misc
;
4461 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
4462 banks
[1] = mce
->status
;
4463 kvm_queue_exception(vcpu
, MC_VECTOR
);
4464 } else if (!(banks
[1] & MCI_STATUS_VAL
)
4465 || !(banks
[1] & MCI_STATUS_UC
)) {
4466 if (banks
[1] & MCI_STATUS_VAL
)
4467 mce
->status
|= MCI_STATUS_OVER
;
4468 banks
[2] = mce
->addr
;
4469 banks
[3] = mce
->misc
;
4470 banks
[1] = mce
->status
;
4472 banks
[1] |= MCI_STATUS_OVER
;
4476 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
4477 struct kvm_vcpu_events
*events
)
4481 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
4485 * In guest mode, payload delivery should be deferred,
4486 * so that the L1 hypervisor can intercept #PF before
4487 * CR2 is modified (or intercept #DB before DR6 is
4488 * modified under nVMX). Unless the per-VM capability,
4489 * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4490 * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4491 * opportunistically defer the exception payload, deliver it if the
4492 * capability hasn't been requested before processing a
4493 * KVM_GET_VCPU_EVENTS.
4495 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
4496 vcpu
->arch
.exception
.pending
&& vcpu
->arch
.exception
.has_payload
)
4497 kvm_deliver_exception_payload(vcpu
);
4500 * The API doesn't provide the instruction length for software
4501 * exceptions, so don't report them. As long as the guest RIP
4502 * isn't advanced, we should expect to encounter the exception
4505 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
4506 events
->exception
.injected
= 0;
4507 events
->exception
.pending
= 0;
4509 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
4510 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
4512 * For ABI compatibility, deliberately conflate
4513 * pending and injected exceptions when
4514 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4516 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4517 events
->exception
.injected
|=
4518 vcpu
->arch
.exception
.pending
;
4520 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
4521 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
4522 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
4523 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
4524 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
4526 events
->interrupt
.injected
=
4527 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
4528 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
4529 events
->interrupt
.soft
= 0;
4530 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
4532 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
4533 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
4534 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
4535 events
->nmi
.pad
= 0;
4537 events
->sipi_vector
= 0; /* never valid when reporting to user space */
4539 events
->smi
.smm
= is_smm(vcpu
);
4540 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
4541 events
->smi
.smm_inside_nmi
=
4542 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
4543 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
4545 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
4546 | KVM_VCPUEVENT_VALID_SHADOW
4547 | KVM_VCPUEVENT_VALID_SMM
);
4548 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
4549 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
4551 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
4554 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
);
4556 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
4557 struct kvm_vcpu_events
*events
)
4559 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4560 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4561 | KVM_VCPUEVENT_VALID_SHADOW
4562 | KVM_VCPUEVENT_VALID_SMM
4563 | KVM_VCPUEVENT_VALID_PAYLOAD
))
4566 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
4567 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
4569 if (events
->exception
.pending
)
4570 events
->exception
.injected
= 0;
4572 events
->exception_has_payload
= 0;
4574 events
->exception
.pending
= 0;
4575 events
->exception_has_payload
= 0;
4578 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
4579 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
4582 /* INITs are latched while in SMM */
4583 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
4584 (events
->smi
.smm
|| events
->smi
.pending
) &&
4585 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
4589 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
4590 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
4591 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
4592 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
4593 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
4594 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
4595 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
4597 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
4598 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
4599 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
4600 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
4601 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
4602 events
->interrupt
.shadow
);
4604 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
4605 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
4606 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
4607 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
4609 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
4610 lapic_in_kernel(vcpu
))
4611 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
4613 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
4614 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
4615 if (events
->smi
.smm
)
4616 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
4618 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
4619 kvm_smm_changed(vcpu
);
4622 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
4624 if (events
->smi
.smm
) {
4625 if (events
->smi
.smm_inside_nmi
)
4626 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
4628 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
4631 if (lapic_in_kernel(vcpu
)) {
4632 if (events
->smi
.latched_init
)
4633 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4635 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
4639 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
4644 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
4645 struct kvm_debugregs
*dbgregs
)
4649 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
4650 kvm_get_dr(vcpu
, 6, &val
);
4652 dbgregs
->dr7
= vcpu
->arch
.dr7
;
4654 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
4657 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
4658 struct kvm_debugregs
*dbgregs
)
4663 if (!kvm_dr6_valid(dbgregs
->dr6
))
4665 if (!kvm_dr7_valid(dbgregs
->dr7
))
4668 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
4669 kvm_update_dr0123(vcpu
);
4670 vcpu
->arch
.dr6
= dbgregs
->dr6
;
4671 vcpu
->arch
.dr7
= dbgregs
->dr7
;
4672 kvm_update_dr7(vcpu
);
4677 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4679 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
4681 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4682 u64 xstate_bv
= xsave
->header
.xfeatures
;
4686 * Copy legacy XSAVE area, to avoid complications with CPUID
4687 * leaves 0 and 1 in the loop below.
4689 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
4692 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
4693 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
4696 * Copy each region from the possibly compacted offset to the
4697 * non-compacted offset.
4699 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4701 u64 xfeature_mask
= valid
& -valid
;
4702 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4703 void *src
= get_xsave_addr(xsave
, xfeature_nr
);
4706 u32 size
, offset
, ecx
, edx
;
4707 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4708 &size
, &offset
, &ecx
, &edx
);
4709 if (xfeature_nr
== XFEATURE_PKRU
)
4710 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
4711 sizeof(vcpu
->arch
.pkru
));
4713 memcpy(dest
+ offset
, src
, size
);
4717 valid
-= xfeature_mask
;
4721 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
4723 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
4724 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
4728 * Copy legacy XSAVE area, to avoid complications with CPUID
4729 * leaves 0 and 1 in the loop below.
4731 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
4733 /* Set XSTATE_BV and possibly XCOMP_BV. */
4734 xsave
->header
.xfeatures
= xstate_bv
;
4735 if (boot_cpu_has(X86_FEATURE_XSAVES
))
4736 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
4739 * Copy each region from the non-compacted offset to the
4740 * possibly compacted offset.
4742 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
4744 u64 xfeature_mask
= valid
& -valid
;
4745 int xfeature_nr
= fls64(xfeature_mask
) - 1;
4746 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
4749 u32 size
, offset
, ecx
, edx
;
4750 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
4751 &size
, &offset
, &ecx
, &edx
);
4752 if (xfeature_nr
== XFEATURE_PKRU
)
4753 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
4754 sizeof(vcpu
->arch
.pkru
));
4756 memcpy(dest
, src
+ offset
, size
);
4759 valid
-= xfeature_mask
;
4763 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
4764 struct kvm_xsave
*guest_xsave
)
4766 if (!vcpu
->arch
.guest_fpu
)
4769 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4770 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
4771 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
4773 memcpy(guest_xsave
->region
,
4774 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
4775 sizeof(struct fxregs_state
));
4776 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
4777 XFEATURE_MASK_FPSSE
;
4781 #define XSAVE_MXCSR_OFFSET 24
4783 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
4784 struct kvm_xsave
*guest_xsave
)
4789 if (!vcpu
->arch
.guest_fpu
)
4792 xstate_bv
= *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
4793 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
4795 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
4797 * Here we allow setting states that are not present in
4798 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
4799 * with old userspace.
4801 if (xstate_bv
& ~supported_xcr0
|| mxcsr
& ~mxcsr_feature_mask
)
4803 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
4805 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
4806 mxcsr
& ~mxcsr_feature_mask
)
4808 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
4809 guest_xsave
->region
, sizeof(struct fxregs_state
));
4814 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
4815 struct kvm_xcrs
*guest_xcrs
)
4817 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
4818 guest_xcrs
->nr_xcrs
= 0;
4822 guest_xcrs
->nr_xcrs
= 1;
4823 guest_xcrs
->flags
= 0;
4824 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
4825 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
4828 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
4829 struct kvm_xcrs
*guest_xcrs
)
4833 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
4836 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
4839 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
4840 /* Only support XCR0 currently */
4841 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
4842 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
4843 guest_xcrs
->xcrs
[i
].value
);
4852 * kvm_set_guest_paused() indicates to the guest kernel that it has been
4853 * stopped by the hypervisor. This function will be called from the host only.
4854 * EINVAL is returned when the host attempts to set the flag for a guest that
4855 * does not support pv clocks.
4857 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
4859 if (!vcpu
->arch
.pv_time_enabled
)
4861 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
4862 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4866 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
4867 struct kvm_enable_cap
*cap
)
4870 uint16_t vmcs_version
;
4871 void __user
*user_ptr
;
4877 case KVM_CAP_HYPERV_SYNIC2
:
4882 case KVM_CAP_HYPERV_SYNIC
:
4883 if (!irqchip_in_kernel(vcpu
->kvm
))
4885 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
4886 KVM_CAP_HYPERV_SYNIC2
);
4887 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4888 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
4890 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
4892 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
4893 if (copy_to_user(user_ptr
, &vmcs_version
,
4894 sizeof(vmcs_version
)))
4898 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4899 if (!kvm_x86_ops
.enable_direct_tlbflush
)
4902 return static_call(kvm_x86_enable_direct_tlbflush
)(vcpu
);
4904 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4905 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
4906 if (vcpu
->arch
.pv_cpuid
.enforce
)
4907 kvm_update_pv_runtime(vcpu
);
4915 long kvm_arch_vcpu_ioctl(struct file
*filp
,
4916 unsigned int ioctl
, unsigned long arg
)
4918 struct kvm_vcpu
*vcpu
= filp
->private_data
;
4919 void __user
*argp
= (void __user
*)arg
;
4922 struct kvm_lapic_state
*lapic
;
4923 struct kvm_xsave
*xsave
;
4924 struct kvm_xcrs
*xcrs
;
4932 case KVM_GET_LAPIC
: {
4934 if (!lapic_in_kernel(vcpu
))
4936 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
4937 GFP_KERNEL_ACCOUNT
);
4942 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
4946 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
4951 case KVM_SET_LAPIC
: {
4953 if (!lapic_in_kernel(vcpu
))
4955 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
4956 if (IS_ERR(u
.lapic
)) {
4957 r
= PTR_ERR(u
.lapic
);
4961 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
4964 case KVM_INTERRUPT
: {
4965 struct kvm_interrupt irq
;
4968 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
4970 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
4974 r
= kvm_vcpu_ioctl_nmi(vcpu
);
4978 r
= kvm_vcpu_ioctl_smi(vcpu
);
4981 case KVM_SET_CPUID
: {
4982 struct kvm_cpuid __user
*cpuid_arg
= argp
;
4983 struct kvm_cpuid cpuid
;
4986 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4988 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4991 case KVM_SET_CPUID2
: {
4992 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4993 struct kvm_cpuid2 cpuid
;
4996 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4998 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
4999 cpuid_arg
->entries
);
5002 case KVM_GET_CPUID2
: {
5003 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5004 struct kvm_cpuid2 cpuid
;
5007 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5009 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5010 cpuid_arg
->entries
);
5014 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5019 case KVM_GET_MSRS
: {
5020 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5021 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5022 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5025 case KVM_SET_MSRS
: {
5026 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5027 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5028 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5031 case KVM_TPR_ACCESS_REPORTING
: {
5032 struct kvm_tpr_access_ctl tac
;
5035 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5037 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5041 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5046 case KVM_SET_VAPIC_ADDR
: {
5047 struct kvm_vapic_addr va
;
5051 if (!lapic_in_kernel(vcpu
))
5054 if (copy_from_user(&va
, argp
, sizeof(va
)))
5056 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5057 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5058 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5061 case KVM_X86_SETUP_MCE
: {
5065 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5067 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5070 case KVM_X86_SET_MCE
: {
5071 struct kvm_x86_mce mce
;
5074 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5076 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5079 case KVM_GET_VCPU_EVENTS
: {
5080 struct kvm_vcpu_events events
;
5082 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5085 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5090 case KVM_SET_VCPU_EVENTS
: {
5091 struct kvm_vcpu_events events
;
5094 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5097 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5100 case KVM_GET_DEBUGREGS
: {
5101 struct kvm_debugregs dbgregs
;
5103 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5106 if (copy_to_user(argp
, &dbgregs
,
5107 sizeof(struct kvm_debugregs
)))
5112 case KVM_SET_DEBUGREGS
: {
5113 struct kvm_debugregs dbgregs
;
5116 if (copy_from_user(&dbgregs
, argp
,
5117 sizeof(struct kvm_debugregs
)))
5120 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5123 case KVM_GET_XSAVE
: {
5124 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
5129 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
5132 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
5137 case KVM_SET_XSAVE
: {
5138 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
5139 if (IS_ERR(u
.xsave
)) {
5140 r
= PTR_ERR(u
.xsave
);
5144 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
5147 case KVM_GET_XCRS
: {
5148 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
5153 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
5156 if (copy_to_user(argp
, u
.xcrs
,
5157 sizeof(struct kvm_xcrs
)))
5162 case KVM_SET_XCRS
: {
5163 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
5164 if (IS_ERR(u
.xcrs
)) {
5165 r
= PTR_ERR(u
.xcrs
);
5169 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
5172 case KVM_SET_TSC_KHZ
: {
5176 user_tsc_khz
= (u32
)arg
;
5178 if (kvm_has_tsc_control
&&
5179 user_tsc_khz
>= kvm_max_guest_tsc_khz
)
5182 if (user_tsc_khz
== 0)
5183 user_tsc_khz
= tsc_khz
;
5185 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
5190 case KVM_GET_TSC_KHZ
: {
5191 r
= vcpu
->arch
.virtual_tsc_khz
;
5194 case KVM_KVMCLOCK_CTRL
: {
5195 r
= kvm_set_guest_paused(vcpu
);
5198 case KVM_ENABLE_CAP
: {
5199 struct kvm_enable_cap cap
;
5202 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
5204 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
5207 case KVM_GET_NESTED_STATE
: {
5208 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5212 if (!kvm_x86_ops
.nested_ops
->get_state
)
5215 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
5217 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
5220 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
5225 if (r
> user_data_size
) {
5226 if (put_user(r
, &user_kvm_nested_state
->size
))
5236 case KVM_SET_NESTED_STATE
: {
5237 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
5238 struct kvm_nested_state kvm_state
;
5242 if (!kvm_x86_ops
.nested_ops
->set_state
)
5246 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
5250 if (kvm_state
.size
< sizeof(kvm_state
))
5253 if (kvm_state
.flags
&
5254 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
5255 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
5256 | KVM_STATE_NESTED_GIF_SET
))
5259 /* nested_run_pending implies guest_mode. */
5260 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
5261 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
5264 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5265 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
5266 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5269 case KVM_GET_SUPPORTED_HV_CPUID
:
5270 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
5272 #ifdef CONFIG_KVM_XEN
5273 case KVM_XEN_VCPU_GET_ATTR
: {
5274 struct kvm_xen_vcpu_attr xva
;
5277 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5279 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
5280 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
5284 case KVM_XEN_VCPU_SET_ATTR
: {
5285 struct kvm_xen_vcpu_attr xva
;
5288 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
5290 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
5304 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
5306 return VM_FAULT_SIGBUS
;
5309 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
5313 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
5315 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
5319 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
5322 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
5325 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
5326 unsigned long kvm_nr_mmu_pages
)
5328 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
5331 mutex_lock(&kvm
->slots_lock
);
5333 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
5334 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
5336 mutex_unlock(&kvm
->slots_lock
);
5340 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
5342 return kvm
->arch
.n_max_mmu_pages
;
5345 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5347 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5351 switch (chip
->chip_id
) {
5352 case KVM_IRQCHIP_PIC_MASTER
:
5353 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
5354 sizeof(struct kvm_pic_state
));
5356 case KVM_IRQCHIP_PIC_SLAVE
:
5357 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
5358 sizeof(struct kvm_pic_state
));
5360 case KVM_IRQCHIP_IOAPIC
:
5361 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
5370 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
5372 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
5376 switch (chip
->chip_id
) {
5377 case KVM_IRQCHIP_PIC_MASTER
:
5378 spin_lock(&pic
->lock
);
5379 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
5380 sizeof(struct kvm_pic_state
));
5381 spin_unlock(&pic
->lock
);
5383 case KVM_IRQCHIP_PIC_SLAVE
:
5384 spin_lock(&pic
->lock
);
5385 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
5386 sizeof(struct kvm_pic_state
));
5387 spin_unlock(&pic
->lock
);
5389 case KVM_IRQCHIP_IOAPIC
:
5390 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
5396 kvm_pic_update_irq(pic
);
5400 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5402 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
5404 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
5406 mutex_lock(&kps
->lock
);
5407 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
5408 mutex_unlock(&kps
->lock
);
5412 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
5415 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5417 mutex_lock(&pit
->pit_state
.lock
);
5418 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
5419 for (i
= 0; i
< 3; i
++)
5420 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
5421 mutex_unlock(&pit
->pit_state
.lock
);
5425 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5427 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
5428 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
5429 sizeof(ps
->channels
));
5430 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
5431 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
5432 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
5436 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
5440 u32 prev_legacy
, cur_legacy
;
5441 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5443 mutex_lock(&pit
->pit_state
.lock
);
5444 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5445 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
5446 if (!prev_legacy
&& cur_legacy
)
5448 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
5449 sizeof(pit
->pit_state
.channels
));
5450 pit
->pit_state
.flags
= ps
->flags
;
5451 for (i
= 0; i
< 3; i
++)
5452 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
5454 mutex_unlock(&pit
->pit_state
.lock
);
5458 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
5459 struct kvm_reinject_control
*control
)
5461 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
5463 /* pit->pit_state.lock was overloaded to prevent userspace from getting
5464 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5465 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
5467 mutex_lock(&pit
->pit_state
.lock
);
5468 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
5469 mutex_unlock(&pit
->pit_state
.lock
);
5474 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
5478 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
5479 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
5480 * on all VM-Exits, thus we only need to kick running vCPUs to force a
5483 struct kvm_vcpu
*vcpu
;
5486 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5487 kvm_vcpu_kick(vcpu
);
5490 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
5493 if (!irqchip_in_kernel(kvm
))
5496 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
5497 irq_event
->irq
, irq_event
->level
,
5502 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
5503 struct kvm_enable_cap
*cap
)
5511 case KVM_CAP_DISABLE_QUIRKS
:
5512 kvm
->arch
.disabled_quirks
= cap
->args
[0];
5515 case KVM_CAP_SPLIT_IRQCHIP
: {
5516 mutex_lock(&kvm
->lock
);
5518 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
5519 goto split_irqchip_unlock
;
5521 if (irqchip_in_kernel(kvm
))
5522 goto split_irqchip_unlock
;
5523 if (kvm
->created_vcpus
)
5524 goto split_irqchip_unlock
;
5525 r
= kvm_setup_empty_irq_routing(kvm
);
5527 goto split_irqchip_unlock
;
5528 /* Pairs with irqchip_in_kernel. */
5530 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
5531 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
5533 split_irqchip_unlock
:
5534 mutex_unlock(&kvm
->lock
);
5537 case KVM_CAP_X2APIC_API
:
5539 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
5542 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
5543 kvm
->arch
.x2apic_format
= true;
5544 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
5545 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
5549 case KVM_CAP_X86_DISABLE_EXITS
:
5551 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
5554 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
5555 kvm_can_mwait_in_guest())
5556 kvm
->arch
.mwait_in_guest
= true;
5557 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
5558 kvm
->arch
.hlt_in_guest
= true;
5559 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
5560 kvm
->arch
.pause_in_guest
= true;
5561 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
5562 kvm
->arch
.cstate_in_guest
= true;
5565 case KVM_CAP_MSR_PLATFORM_INFO
:
5566 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
5569 case KVM_CAP_EXCEPTION_PAYLOAD
:
5570 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
5573 case KVM_CAP_X86_USER_SPACE_MSR
:
5574 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
5577 case KVM_CAP_X86_BUS_LOCK_EXIT
:
5579 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
5582 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
5583 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
5586 if (kvm_has_bus_lock_exit
&&
5587 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
5588 kvm
->arch
.bus_lock_detection_enabled
= true;
5591 #ifdef CONFIG_X86_SGX_KVM
5592 case KVM_CAP_SGX_ATTRIBUTE
: {
5593 unsigned long allowed_attributes
= 0;
5595 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
5599 /* KVM only supports the PROVISIONKEY privileged attribute. */
5600 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
5601 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
5602 kvm
->arch
.sgx_provisioning_allowed
= true;
5608 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
5610 if (kvm_x86_ops
.vm_copy_enc_context_from
)
5611 r
= kvm_x86_ops
.vm_copy_enc_context_from(kvm
, cap
->args
[0]);
5620 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
5622 struct kvm_x86_msr_filter
*msr_filter
;
5624 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
5628 msr_filter
->default_allow
= default_allow
;
5632 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
5639 for (i
= 0; i
< msr_filter
->count
; i
++)
5640 kfree(msr_filter
->ranges
[i
].bitmap
);
5645 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
5646 struct kvm_msr_filter_range
*user_range
)
5648 unsigned long *bitmap
= NULL
;
5651 if (!user_range
->nmsrs
)
5654 if (user_range
->flags
& ~(KVM_MSR_FILTER_READ
| KVM_MSR_FILTER_WRITE
))
5657 if (!user_range
->flags
)
5660 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
5661 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
5664 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
5666 return PTR_ERR(bitmap
);
5668 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
5669 .flags
= user_range
->flags
,
5670 .base
= user_range
->base
,
5671 .nmsrs
= user_range
->nmsrs
,
5675 msr_filter
->count
++;
5679 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
, void __user
*argp
)
5681 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
5682 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
5683 struct kvm_msr_filter filter
;
5689 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
5692 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++)
5693 empty
&= !filter
.ranges
[i
].nmsrs
;
5695 default_allow
= !(filter
.flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
5696 if (empty
&& !default_allow
)
5699 new_filter
= kvm_alloc_msr_filter(default_allow
);
5703 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
5704 r
= kvm_add_msr_filter(new_filter
, &filter
.ranges
[i
]);
5706 kvm_free_msr_filter(new_filter
);
5711 mutex_lock(&kvm
->lock
);
5713 /* The per-VM filter is protected by kvm->lock... */
5714 old_filter
= srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1);
5716 rcu_assign_pointer(kvm
->arch
.msr_filter
, new_filter
);
5717 synchronize_srcu(&kvm
->srcu
);
5719 kvm_free_msr_filter(old_filter
);
5721 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
5722 mutex_unlock(&kvm
->lock
);
5727 long kvm_arch_vm_ioctl(struct file
*filp
,
5728 unsigned int ioctl
, unsigned long arg
)
5730 struct kvm
*kvm
= filp
->private_data
;
5731 void __user
*argp
= (void __user
*)arg
;
5734 * This union makes it completely explicit to gcc-3.x
5735 * that these two variables' stack usage should be
5736 * combined, not added together.
5739 struct kvm_pit_state ps
;
5740 struct kvm_pit_state2 ps2
;
5741 struct kvm_pit_config pit_config
;
5745 case KVM_SET_TSS_ADDR
:
5746 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
5748 case KVM_SET_IDENTITY_MAP_ADDR
: {
5751 mutex_lock(&kvm
->lock
);
5753 if (kvm
->created_vcpus
)
5754 goto set_identity_unlock
;
5756 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
5757 goto set_identity_unlock
;
5758 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
5759 set_identity_unlock
:
5760 mutex_unlock(&kvm
->lock
);
5763 case KVM_SET_NR_MMU_PAGES
:
5764 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
5766 case KVM_GET_NR_MMU_PAGES
:
5767 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
5769 case KVM_CREATE_IRQCHIP
: {
5770 mutex_lock(&kvm
->lock
);
5773 if (irqchip_in_kernel(kvm
))
5774 goto create_irqchip_unlock
;
5777 if (kvm
->created_vcpus
)
5778 goto create_irqchip_unlock
;
5780 r
= kvm_pic_init(kvm
);
5782 goto create_irqchip_unlock
;
5784 r
= kvm_ioapic_init(kvm
);
5786 kvm_pic_destroy(kvm
);
5787 goto create_irqchip_unlock
;
5790 r
= kvm_setup_default_irq_routing(kvm
);
5792 kvm_ioapic_destroy(kvm
);
5793 kvm_pic_destroy(kvm
);
5794 goto create_irqchip_unlock
;
5796 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
5798 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
5799 create_irqchip_unlock
:
5800 mutex_unlock(&kvm
->lock
);
5803 case KVM_CREATE_PIT
:
5804 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
5806 case KVM_CREATE_PIT2
:
5808 if (copy_from_user(&u
.pit_config
, argp
,
5809 sizeof(struct kvm_pit_config
)))
5812 mutex_lock(&kvm
->lock
);
5815 goto create_pit_unlock
;
5817 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
5821 mutex_unlock(&kvm
->lock
);
5823 case KVM_GET_IRQCHIP
: {
5824 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5825 struct kvm_irqchip
*chip
;
5827 chip
= memdup_user(argp
, sizeof(*chip
));
5834 if (!irqchip_kernel(kvm
))
5835 goto get_irqchip_out
;
5836 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
5838 goto get_irqchip_out
;
5840 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
5841 goto get_irqchip_out
;
5847 case KVM_SET_IRQCHIP
: {
5848 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
5849 struct kvm_irqchip
*chip
;
5851 chip
= memdup_user(argp
, sizeof(*chip
));
5858 if (!irqchip_kernel(kvm
))
5859 goto set_irqchip_out
;
5860 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
5867 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
5870 if (!kvm
->arch
.vpit
)
5872 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
5876 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
5883 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
5885 mutex_lock(&kvm
->lock
);
5887 if (!kvm
->arch
.vpit
)
5889 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
5891 mutex_unlock(&kvm
->lock
);
5894 case KVM_GET_PIT2
: {
5896 if (!kvm
->arch
.vpit
)
5898 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
5902 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
5907 case KVM_SET_PIT2
: {
5909 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
5911 mutex_lock(&kvm
->lock
);
5913 if (!kvm
->arch
.vpit
)
5915 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
5917 mutex_unlock(&kvm
->lock
);
5920 case KVM_REINJECT_CONTROL
: {
5921 struct kvm_reinject_control control
;
5923 if (copy_from_user(&control
, argp
, sizeof(control
)))
5926 if (!kvm
->arch
.vpit
)
5928 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
5931 case KVM_SET_BOOT_CPU_ID
:
5933 mutex_lock(&kvm
->lock
);
5934 if (kvm
->created_vcpus
)
5937 kvm
->arch
.bsp_vcpu_id
= arg
;
5938 mutex_unlock(&kvm
->lock
);
5940 #ifdef CONFIG_KVM_XEN
5941 case KVM_XEN_HVM_CONFIG
: {
5942 struct kvm_xen_hvm_config xhc
;
5944 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
5946 r
= kvm_xen_hvm_config(kvm
, &xhc
);
5949 case KVM_XEN_HVM_GET_ATTR
: {
5950 struct kvm_xen_hvm_attr xha
;
5953 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
5955 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
5956 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
5960 case KVM_XEN_HVM_SET_ATTR
: {
5961 struct kvm_xen_hvm_attr xha
;
5964 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
5966 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
5970 case KVM_SET_CLOCK
: {
5971 struct kvm_arch
*ka
= &kvm
->arch
;
5972 struct kvm_clock_data user_ns
;
5976 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
5985 * TODO: userspace has to take care of races with VCPU_RUN, so
5986 * kvm_gen_update_masterclock() can be cut down to locked
5987 * pvclock_update_vm_gtod_copy().
5989 kvm_gen_update_masterclock(kvm
);
5992 * This pairs with kvm_guest_time_update(): when masterclock is
5993 * in use, we use master_kernel_ns + kvmclock_offset to set
5994 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
5995 * is slightly ahead) here we risk going negative on unsigned
5996 * 'system_time' when 'user_ns.clock' is very small.
5998 raw_spin_lock_irq(&ka
->pvclock_gtod_sync_lock
);
5999 if (kvm
->arch
.use_master_clock
)
6000 now_ns
= ka
->master_kernel_ns
;
6002 now_ns
= get_kvmclock_base_ns();
6003 ka
->kvmclock_offset
= user_ns
.clock
- now_ns
;
6004 raw_spin_unlock_irq(&ka
->pvclock_gtod_sync_lock
);
6006 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
6009 case KVM_GET_CLOCK
: {
6010 struct kvm_clock_data user_ns
;
6013 now_ns
= get_kvmclock_ns(kvm
);
6014 user_ns
.clock
= now_ns
;
6015 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
6016 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
6019 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
6024 case KVM_MEMORY_ENCRYPT_OP
: {
6026 if (kvm_x86_ops
.mem_enc_op
)
6027 r
= static_call(kvm_x86_mem_enc_op
)(kvm
, argp
);
6030 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
6031 struct kvm_enc_region region
;
6034 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6038 if (kvm_x86_ops
.mem_enc_reg_region
)
6039 r
= static_call(kvm_x86_mem_enc_reg_region
)(kvm
, ®ion
);
6042 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
6043 struct kvm_enc_region region
;
6046 if (copy_from_user(®ion
, argp
, sizeof(region
)))
6050 if (kvm_x86_ops
.mem_enc_unreg_region
)
6051 r
= static_call(kvm_x86_mem_enc_unreg_region
)(kvm
, ®ion
);
6054 case KVM_HYPERV_EVENTFD
: {
6055 struct kvm_hyperv_eventfd hvevfd
;
6058 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
6060 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
6063 case KVM_SET_PMU_EVENT_FILTER
:
6064 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
6066 case KVM_X86_SET_MSR_FILTER
:
6067 r
= kvm_vm_ioctl_set_msr_filter(kvm
, argp
);
6076 static void kvm_init_msr_list(void)
6078 struct x86_pmu_capability x86_pmu
;
6082 BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED
!= 4,
6083 "Please update the fixed PMCs in msrs_to_saved_all[]");
6085 perf_get_x86_pmu_capability(&x86_pmu
);
6087 num_msrs_to_save
= 0;
6088 num_emulated_msrs
= 0;
6089 num_msr_based_features
= 0;
6091 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_all
); i
++) {
6092 if (rdmsr_safe(msrs_to_save_all
[i
], &dummy
[0], &dummy
[1]) < 0)
6096 * Even MSRs that are valid in the host may not be exposed
6097 * to the guests in some cases.
6099 switch (msrs_to_save_all
[i
]) {
6100 case MSR_IA32_BNDCFGS
:
6101 if (!kvm_mpx_supported())
6105 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
6106 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
6109 case MSR_IA32_UMWAIT_CONTROL
:
6110 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
6113 case MSR_IA32_RTIT_CTL
:
6114 case MSR_IA32_RTIT_STATUS
:
6115 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
6118 case MSR_IA32_RTIT_CR3_MATCH
:
6119 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6120 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
6123 case MSR_IA32_RTIT_OUTPUT_BASE
:
6124 case MSR_IA32_RTIT_OUTPUT_MASK
:
6125 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6126 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
6127 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
6130 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
6131 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
6132 msrs_to_save_all
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
6133 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
6136 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR0
+ 17:
6137 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_PERFCTR0
>=
6138 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6141 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL0
+ 17:
6142 if (msrs_to_save_all
[i
] - MSR_ARCH_PERFMON_EVENTSEL0
>=
6143 min(INTEL_PMC_MAX_GENERIC
, x86_pmu
.num_counters_gp
))
6150 msrs_to_save
[num_msrs_to_save
++] = msrs_to_save_all
[i
];
6153 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
6154 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
6157 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
6160 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all
); i
++) {
6161 struct kvm_msr_entry msr
;
6163 msr
.index
= msr_based_features_all
[i
];
6164 if (kvm_get_msr_feature(&msr
))
6167 msr_based_features
[num_msr_based_features
++] = msr_based_features_all
[i
];
6171 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
6179 if (!(lapic_in_kernel(vcpu
) &&
6180 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
6181 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6192 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
6199 if (!(lapic_in_kernel(vcpu
) &&
6200 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
6202 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
6204 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
6214 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
6215 struct kvm_segment
*var
, int seg
)
6217 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
6220 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
6221 struct kvm_segment
*var
, int seg
)
6223 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
6226 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
6227 struct x86_exception
*exception
)
6231 BUG_ON(!mmu_is_nested(vcpu
));
6233 /* NPT walks are always user-walks */
6234 access
|= PFERR_USER_MASK
;
6235 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
6240 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
6241 struct x86_exception
*exception
)
6243 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6244 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6246 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
6248 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
6249 struct x86_exception
*exception
)
6251 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6252 access
|= PFERR_FETCH_MASK
;
6253 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6256 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
6257 struct x86_exception
*exception
)
6259 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6260 access
|= PFERR_WRITE_MASK
;
6261 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6263 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
6265 /* uses this to access any guest's mapped memory without checking CPL */
6266 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
6267 struct x86_exception
*exception
)
6269 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
6272 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6273 struct kvm_vcpu
*vcpu
, u32 access
,
6274 struct x86_exception
*exception
)
6277 int r
= X86EMUL_CONTINUE
;
6280 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
6282 unsigned offset
= addr
& (PAGE_SIZE
-1);
6283 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6286 if (gpa
== UNMAPPED_GVA
)
6287 return X86EMUL_PROPAGATE_FAULT
;
6288 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
6291 r
= X86EMUL_IO_NEEDED
;
6303 /* used for instruction fetching */
6304 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
6305 gva_t addr
, void *val
, unsigned int bytes
,
6306 struct x86_exception
*exception
)
6308 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6309 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6313 /* Inline kvm_read_guest_virt_helper for speed. */
6314 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
6316 if (unlikely(gpa
== UNMAPPED_GVA
))
6317 return X86EMUL_PROPAGATE_FAULT
;
6319 offset
= addr
& (PAGE_SIZE
-1);
6320 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
6321 bytes
= (unsigned)PAGE_SIZE
- offset
;
6322 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
6324 if (unlikely(ret
< 0))
6325 return X86EMUL_IO_NEEDED
;
6327 return X86EMUL_CONTINUE
;
6330 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
6331 gva_t addr
, void *val
, unsigned int bytes
,
6332 struct x86_exception
*exception
)
6334 u32 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
6337 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6338 * is returned, but our callers are not ready for that and they blindly
6339 * call kvm_inject_page_fault. Ensure that they at least do not leak
6340 * uninitialized kernel stack memory into cr2 and error code.
6342 memset(exception
, 0, sizeof(*exception
));
6343 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
6346 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
6348 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
6349 gva_t addr
, void *val
, unsigned int bytes
,
6350 struct x86_exception
*exception
, bool system
)
6352 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6355 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6356 access
|= PFERR_USER_MASK
;
6358 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
6361 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
6362 unsigned long addr
, void *val
, unsigned int bytes
)
6364 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6365 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
6367 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
6370 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
6371 struct kvm_vcpu
*vcpu
, u32 access
,
6372 struct x86_exception
*exception
)
6375 int r
= X86EMUL_CONTINUE
;
6378 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
6381 unsigned offset
= addr
& (PAGE_SIZE
-1);
6382 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
6385 if (gpa
== UNMAPPED_GVA
)
6386 return X86EMUL_PROPAGATE_FAULT
;
6387 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
6389 r
= X86EMUL_IO_NEEDED
;
6401 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
6402 unsigned int bytes
, struct x86_exception
*exception
,
6405 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6406 u32 access
= PFERR_WRITE_MASK
;
6408 if (!system
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
6409 access
|= PFERR_USER_MASK
;
6411 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6415 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
6416 unsigned int bytes
, struct x86_exception
*exception
)
6418 /* kvm_write_guest_virt_system can pull in tons of pages. */
6419 vcpu
->arch
.l1tf_flush_l1d
= true;
6421 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
6422 PFERR_WRITE_MASK
, exception
);
6424 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
6426 int handle_ud(struct kvm_vcpu
*vcpu
)
6428 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
6429 int emul_type
= EMULTYPE_TRAP_UD
;
6430 char sig
[5]; /* ud2; .ascii "kvm" */
6431 struct x86_exception e
;
6433 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, NULL
, 0)))
6436 if (force_emulation_prefix
&&
6437 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
6438 sig
, sizeof(sig
), &e
) == 0 &&
6439 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
6440 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
6441 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
6444 return kvm_emulate_instruction(vcpu
, emul_type
);
6446 EXPORT_SYMBOL_GPL(handle_ud
);
6448 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6449 gpa_t gpa
, bool write
)
6451 /* For APIC access vmexit */
6452 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6455 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
6456 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
6463 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
6464 gpa_t
*gpa
, struct x86_exception
*exception
,
6467 u32 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
6468 | (write
? PFERR_WRITE_MASK
: 0);
6471 * currently PKRU is only applied to ept enabled guest so
6472 * there is no pkey in EPT page table for L1 guest or EPT
6473 * shadow page table for L2 guest.
6475 if (vcpu_match_mmio_gva(vcpu
, gva
)
6476 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
6477 vcpu
->arch
.mmio_access
, 0, access
)) {
6478 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
6479 (gva
& (PAGE_SIZE
- 1));
6480 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
6484 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
6486 if (*gpa
== UNMAPPED_GVA
)
6489 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
6492 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6493 const void *val
, int bytes
)
6497 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
6500 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
6504 struct read_write_emulator_ops
{
6505 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
6507 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6508 void *val
, int bytes
);
6509 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6510 int bytes
, void *val
);
6511 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6512 void *val
, int bytes
);
6516 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
6518 if (vcpu
->mmio_read_completed
) {
6519 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
6520 vcpu
->mmio_fragments
[0].gpa
, val
);
6521 vcpu
->mmio_read_completed
= 0;
6528 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6529 void *val
, int bytes
)
6531 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
6534 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6535 void *val
, int bytes
)
6537 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
6540 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
6542 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
6543 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
6546 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6547 void *val
, int bytes
)
6549 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
6550 return X86EMUL_IO_NEEDED
;
6553 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
6554 void *val
, int bytes
)
6556 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
6558 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
6559 return X86EMUL_CONTINUE
;
6562 static const struct read_write_emulator_ops read_emultor
= {
6563 .read_write_prepare
= read_prepare
,
6564 .read_write_emulate
= read_emulate
,
6565 .read_write_mmio
= vcpu_mmio_read
,
6566 .read_write_exit_mmio
= read_exit_mmio
,
6569 static const struct read_write_emulator_ops write_emultor
= {
6570 .read_write_emulate
= write_emulate
,
6571 .read_write_mmio
= write_mmio
,
6572 .read_write_exit_mmio
= write_exit_mmio
,
6576 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
6578 struct x86_exception
*exception
,
6579 struct kvm_vcpu
*vcpu
,
6580 const struct read_write_emulator_ops
*ops
)
6584 bool write
= ops
->write
;
6585 struct kvm_mmio_fragment
*frag
;
6586 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
6589 * If the exit was due to a NPF we may already have a GPA.
6590 * If the GPA is present, use it to avoid the GVA to GPA table walk.
6591 * Note, this cannot be used on string operations since string
6592 * operation using rep will only have the initial GPA from the NPF
6595 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
6596 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
6597 gpa
= ctxt
->gpa_val
;
6598 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
6600 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
6602 return X86EMUL_PROPAGATE_FAULT
;
6605 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
6606 return X86EMUL_CONTINUE
;
6609 * Is this MMIO handled locally?
6611 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
6612 if (handled
== bytes
)
6613 return X86EMUL_CONTINUE
;
6619 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
6620 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
6624 return X86EMUL_CONTINUE
;
6627 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
6629 void *val
, unsigned int bytes
,
6630 struct x86_exception
*exception
,
6631 const struct read_write_emulator_ops
*ops
)
6633 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6637 if (ops
->read_write_prepare
&&
6638 ops
->read_write_prepare(vcpu
, val
, bytes
))
6639 return X86EMUL_CONTINUE
;
6641 vcpu
->mmio_nr_fragments
= 0;
6643 /* Crossing a page boundary? */
6644 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
6647 now
= -addr
& ~PAGE_MASK
;
6648 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
6651 if (rc
!= X86EMUL_CONTINUE
)
6654 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
6660 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
6662 if (rc
!= X86EMUL_CONTINUE
)
6665 if (!vcpu
->mmio_nr_fragments
)
6668 gpa
= vcpu
->mmio_fragments
[0].gpa
;
6670 vcpu
->mmio_needed
= 1;
6671 vcpu
->mmio_cur_fragment
= 0;
6673 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
6674 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
6675 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
6676 vcpu
->run
->mmio
.phys_addr
= gpa
;
6678 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
6681 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
6685 struct x86_exception
*exception
)
6687 return emulator_read_write(ctxt
, addr
, val
, bytes
,
6688 exception
, &read_emultor
);
6691 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
6695 struct x86_exception
*exception
)
6697 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
6698 exception
, &write_emultor
);
6701 #define CMPXCHG_TYPE(t, ptr, old, new) \
6702 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
6704 #ifdef CONFIG_X86_64
6705 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
6707 # define CMPXCHG64(ptr, old, new) \
6708 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
6711 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
6716 struct x86_exception
*exception
)
6718 struct kvm_host_map map
;
6719 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6725 /* guests cmpxchg8b have to be emulated atomically */
6726 if (bytes
> 8 || (bytes
& (bytes
- 1)))
6729 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
6731 if (gpa
== UNMAPPED_GVA
||
6732 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
6736 * Emulate the atomic as a straight write to avoid #AC if SLD is
6737 * enabled in the host and the access splits a cache line.
6739 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
6740 page_line_mask
= ~(cache_line_size() - 1);
6742 page_line_mask
= PAGE_MASK
;
6744 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
6747 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
6750 kaddr
= map
.hva
+ offset_in_page(gpa
);
6754 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
6757 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
6760 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
6763 exchanged
= CMPXCHG64(kaddr
, old
, new);
6769 kvm_vcpu_unmap(vcpu
, &map
, true);
6772 return X86EMUL_CMPXCHG_FAILED
;
6774 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
6776 return X86EMUL_CONTINUE
;
6779 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
6781 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
6784 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
6788 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
6789 if (vcpu
->arch
.pio
.in
)
6790 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
6791 vcpu
->arch
.pio
.size
, pd
);
6793 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
6794 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
6798 pd
+= vcpu
->arch
.pio
.size
;
6803 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
6804 unsigned short port
,
6805 unsigned int count
, bool in
)
6807 vcpu
->arch
.pio
.port
= port
;
6808 vcpu
->arch
.pio
.in
= in
;
6809 vcpu
->arch
.pio
.count
= count
;
6810 vcpu
->arch
.pio
.size
= size
;
6812 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
))
6815 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
6816 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
6817 vcpu
->run
->io
.size
= size
;
6818 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
6819 vcpu
->run
->io
.count
= count
;
6820 vcpu
->run
->io
.port
= port
;
6825 static int __emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6826 unsigned short port
, unsigned int count
)
6828 WARN_ON(vcpu
->arch
.pio
.count
);
6829 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
6830 return emulator_pio_in_out(vcpu
, size
, port
, count
, true);
6833 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
6835 int size
= vcpu
->arch
.pio
.size
;
6836 unsigned count
= vcpu
->arch
.pio
.count
;
6837 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
6838 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
6839 vcpu
->arch
.pio
.count
= 0;
6842 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6843 unsigned short port
, void *val
, unsigned int count
)
6845 if (vcpu
->arch
.pio
.count
) {
6846 /* Complete previous iteration. */
6848 int r
= __emulator_pio_in(vcpu
, size
, port
, count
);
6852 /* Results already available, fall through. */
6855 WARN_ON(count
!= vcpu
->arch
.pio
.count
);
6856 complete_emulator_pio_in(vcpu
, val
);
6860 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
6861 int size
, unsigned short port
, void *val
,
6864 return emulator_pio_in(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6868 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6869 unsigned short port
, const void *val
,
6874 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
6875 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
6876 ret
= emulator_pio_in_out(vcpu
, size
, port
, count
, false);
6878 vcpu
->arch
.pio
.count
= 0;
6883 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
6884 int size
, unsigned short port
,
6885 const void *val
, unsigned int count
)
6887 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
6890 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
6892 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
6895 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
6897 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
6900 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
6902 if (!need_emulate_wbinvd(vcpu
))
6903 return X86EMUL_CONTINUE
;
6905 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
6906 int cpu
= get_cpu();
6908 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
6909 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
6910 wbinvd_ipi
, NULL
, 1);
6912 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
6915 return X86EMUL_CONTINUE
;
6918 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
6920 kvm_emulate_wbinvd_noskip(vcpu
);
6921 return kvm_skip_emulated_instruction(vcpu
);
6923 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
6927 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
6929 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
6932 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6933 unsigned long *dest
)
6935 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
6938 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
6939 unsigned long value
)
6942 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
6945 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
6947 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
6950 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
6952 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6953 unsigned long value
;
6957 value
= kvm_read_cr0(vcpu
);
6960 value
= vcpu
->arch
.cr2
;
6963 value
= kvm_read_cr3(vcpu
);
6966 value
= kvm_read_cr4(vcpu
);
6969 value
= kvm_get_cr8(vcpu
);
6972 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
6979 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
6981 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6986 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
6989 vcpu
->arch
.cr2
= val
;
6992 res
= kvm_set_cr3(vcpu
, val
);
6995 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
6998 res
= kvm_set_cr8(vcpu
, val
);
7001 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
7008 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
7010 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
7013 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7015 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
7018 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7020 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
7023 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7025 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
7028 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
7030 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
7033 static unsigned long emulator_get_cached_segment_base(
7034 struct x86_emulate_ctxt
*ctxt
, int seg
)
7036 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
7039 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
7040 struct desc_struct
*desc
, u32
*base3
,
7043 struct kvm_segment var
;
7045 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
7046 *selector
= var
.selector
;
7049 memset(desc
, 0, sizeof(*desc
));
7057 set_desc_limit(desc
, var
.limit
);
7058 set_desc_base(desc
, (unsigned long)var
.base
);
7059 #ifdef CONFIG_X86_64
7061 *base3
= var
.base
>> 32;
7063 desc
->type
= var
.type
;
7065 desc
->dpl
= var
.dpl
;
7066 desc
->p
= var
.present
;
7067 desc
->avl
= var
.avl
;
7075 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
7076 struct desc_struct
*desc
, u32 base3
,
7079 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7080 struct kvm_segment var
;
7082 var
.selector
= selector
;
7083 var
.base
= get_desc_base(desc
);
7084 #ifdef CONFIG_X86_64
7085 var
.base
|= ((u64
)base3
) << 32;
7087 var
.limit
= get_desc_limit(desc
);
7089 var
.limit
= (var
.limit
<< 12) | 0xfff;
7090 var
.type
= desc
->type
;
7091 var
.dpl
= desc
->dpl
;
7096 var
.avl
= desc
->avl
;
7097 var
.present
= desc
->p
;
7098 var
.unusable
= !var
.present
;
7101 kvm_set_segment(vcpu
, &var
, seg
);
7105 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
7106 u32 msr_index
, u64
*pdata
)
7108 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7111 r
= kvm_get_msr(vcpu
, msr_index
, pdata
);
7113 if (r
&& kvm_get_msr_user_space(vcpu
, msr_index
, r
)) {
7114 /* Bounce to user space */
7115 return X86EMUL_IO_NEEDED
;
7121 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
7122 u32 msr_index
, u64 data
)
7124 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7127 r
= kvm_set_msr(vcpu
, msr_index
, data
);
7129 if (r
&& kvm_set_msr_user_space(vcpu
, msr_index
, data
, r
)) {
7130 /* Bounce to user space */
7131 return X86EMUL_IO_NEEDED
;
7137 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
7139 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7141 return vcpu
->arch
.smbase
;
7144 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
7146 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7148 vcpu
->arch
.smbase
= smbase
;
7151 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
7154 return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
);
7157 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
7158 u32 pmc
, u64
*pdata
)
7160 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
7163 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
7165 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
7168 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
7169 struct x86_instruction_info
*info
,
7170 enum x86_intercept_stage stage
)
7172 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
7176 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
7177 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
7180 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
7183 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt
*ctxt
)
7185 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_LM
);
7188 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
7190 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
7193 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
7195 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
7198 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
7200 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
7203 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
7205 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
7208 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
7210 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
7213 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
7215 return emul_to_vcpu(ctxt
)->arch
.hflags
;
7218 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
7220 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7222 vcpu
->arch
.hflags
= emul_flags
;
7223 kvm_mmu_reset_context(vcpu
);
7226 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
,
7227 const char *smstate
)
7229 return static_call(kvm_x86_pre_leave_smm
)(emul_to_vcpu(ctxt
), smstate
);
7232 static void emulator_post_leave_smm(struct x86_emulate_ctxt
*ctxt
)
7234 kvm_smm_changed(emul_to_vcpu(ctxt
));
7237 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
7239 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
7242 static const struct x86_emulate_ops emulate_ops
= {
7243 .read_gpr
= emulator_read_gpr
,
7244 .write_gpr
= emulator_write_gpr
,
7245 .read_std
= emulator_read_std
,
7246 .write_std
= emulator_write_std
,
7247 .read_phys
= kvm_read_guest_phys_system
,
7248 .fetch
= kvm_fetch_guest_virt
,
7249 .read_emulated
= emulator_read_emulated
,
7250 .write_emulated
= emulator_write_emulated
,
7251 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
7252 .invlpg
= emulator_invlpg
,
7253 .pio_in_emulated
= emulator_pio_in_emulated
,
7254 .pio_out_emulated
= emulator_pio_out_emulated
,
7255 .get_segment
= emulator_get_segment
,
7256 .set_segment
= emulator_set_segment
,
7257 .get_cached_segment_base
= emulator_get_cached_segment_base
,
7258 .get_gdt
= emulator_get_gdt
,
7259 .get_idt
= emulator_get_idt
,
7260 .set_gdt
= emulator_set_gdt
,
7261 .set_idt
= emulator_set_idt
,
7262 .get_cr
= emulator_get_cr
,
7263 .set_cr
= emulator_set_cr
,
7264 .cpl
= emulator_get_cpl
,
7265 .get_dr
= emulator_get_dr
,
7266 .set_dr
= emulator_set_dr
,
7267 .get_smbase
= emulator_get_smbase
,
7268 .set_smbase
= emulator_set_smbase
,
7269 .set_msr
= emulator_set_msr
,
7270 .get_msr
= emulator_get_msr
,
7271 .check_pmc
= emulator_check_pmc
,
7272 .read_pmc
= emulator_read_pmc
,
7273 .halt
= emulator_halt
,
7274 .wbinvd
= emulator_wbinvd
,
7275 .fix_hypercall
= emulator_fix_hypercall
,
7276 .intercept
= emulator_intercept
,
7277 .get_cpuid
= emulator_get_cpuid
,
7278 .guest_has_long_mode
= emulator_guest_has_long_mode
,
7279 .guest_has_movbe
= emulator_guest_has_movbe
,
7280 .guest_has_fxsr
= emulator_guest_has_fxsr
,
7281 .set_nmi_mask
= emulator_set_nmi_mask
,
7282 .get_hflags
= emulator_get_hflags
,
7283 .set_hflags
= emulator_set_hflags
,
7284 .pre_leave_smm
= emulator_pre_leave_smm
,
7285 .post_leave_smm
= emulator_post_leave_smm
,
7286 .set_xcr
= emulator_set_xcr
,
7289 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
7291 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
7293 * an sti; sti; sequence only disable interrupts for the first
7294 * instruction. So, if the last instruction, be it emulated or
7295 * not, left the system with the INT_STI flag enabled, it
7296 * means that the last instruction is an sti. We should not
7297 * leave the flag on in this case. The same goes for mov ss
7299 if (int_shadow
& mask
)
7301 if (unlikely(int_shadow
|| mask
)) {
7302 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
7304 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7308 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
7310 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7311 if (ctxt
->exception
.vector
== PF_VECTOR
)
7312 return kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
7314 if (ctxt
->exception
.error_code_valid
)
7315 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
7316 ctxt
->exception
.error_code
);
7318 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
7322 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7324 struct x86_emulate_ctxt
*ctxt
;
7326 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
7328 pr_err("kvm: failed to allocate vcpu's emulator\n");
7333 ctxt
->ops
= &emulate_ops
;
7334 vcpu
->arch
.emulate_ctxt
= ctxt
;
7339 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
7341 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7344 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
7346 ctxt
->gpa_available
= false;
7347 ctxt
->eflags
= kvm_get_rflags(vcpu
);
7348 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
7350 ctxt
->eip
= kvm_rip_read(vcpu
);
7351 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
7352 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
7353 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
7354 cs_db
? X86EMUL_MODE_PROT32
:
7355 X86EMUL_MODE_PROT16
;
7356 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
7357 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
7358 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
7360 ctxt
->interruptibility
= 0;
7361 ctxt
->have_exception
= false;
7362 ctxt
->exception
.vector
= -1;
7363 ctxt
->perm_ok
= false;
7365 init_decode_cache(ctxt
);
7366 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7369 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
7371 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7374 init_emulate_ctxt(vcpu
);
7378 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
7379 ret
= emulate_int_real(ctxt
, irq
);
7381 if (ret
!= X86EMUL_CONTINUE
) {
7382 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
7384 ctxt
->eip
= ctxt
->_eip
;
7385 kvm_rip_write(vcpu
, ctxt
->eip
);
7386 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7389 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
7391 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
7393 ++vcpu
->stat
.insn_emulation_fail
;
7394 trace_kvm_emulate_insn_failed(vcpu
);
7396 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
7397 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7401 if (emulation_type
& EMULTYPE_SKIP
) {
7402 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7403 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7404 vcpu
->run
->internal
.ndata
= 0;
7408 kvm_queue_exception(vcpu
, UD_VECTOR
);
7410 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
7411 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
7412 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
7413 vcpu
->run
->internal
.ndata
= 0;
7420 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7421 bool write_fault_to_shadow_pgtable
,
7424 gpa_t gpa
= cr2_or_gpa
;
7427 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7430 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7431 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7434 if (!vcpu
->arch
.mmu
->direct_map
) {
7436 * Write permission should be allowed since only
7437 * write access need to be emulated.
7439 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7442 * If the mapping is invalid in guest, let cpu retry
7443 * it to generate fault.
7445 if (gpa
== UNMAPPED_GVA
)
7450 * Do not retry the unhandleable instruction if it faults on the
7451 * readonly host memory, otherwise it will goto a infinite loop:
7452 * retry instruction -> write #PF -> emulation fail -> retry
7453 * instruction -> ...
7455 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
7458 * If the instruction failed on the error pfn, it can not be fixed,
7459 * report the error to userspace.
7461 if (is_error_noslot_pfn(pfn
))
7464 kvm_release_pfn_clean(pfn
);
7466 /* The instructions are well-emulated on direct mmu. */
7467 if (vcpu
->arch
.mmu
->direct_map
) {
7468 unsigned int indirect_shadow_pages
;
7470 write_lock(&vcpu
->kvm
->mmu_lock
);
7471 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
7472 write_unlock(&vcpu
->kvm
->mmu_lock
);
7474 if (indirect_shadow_pages
)
7475 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7481 * if emulation was due to access to shadowed page table
7482 * and it failed try to unshadow page and re-enter the
7483 * guest to let CPU execute the instruction.
7485 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7488 * If the access faults on its page table, it can not
7489 * be fixed by unprotecting shadow page and it should
7490 * be reported to userspace.
7492 return !write_fault_to_shadow_pgtable
;
7495 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
7496 gpa_t cr2_or_gpa
, int emulation_type
)
7498 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7499 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
7501 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
7502 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
7505 * If the emulation is caused by #PF and it is non-page_table
7506 * writing instruction, it means the VM-EXIT is caused by shadow
7507 * page protected, we can zap the shadow page and retry this
7508 * instruction directly.
7510 * Note: if the guest uses a non-page-table modifying instruction
7511 * on the PDE that points to the instruction, then we will unmap
7512 * the instruction and go to an infinite loop. So, we cache the
7513 * last retried eip and the last fault address, if we meet the eip
7514 * and the address again, we can break out of the potential infinite
7517 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
7519 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
7522 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
7523 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
7526 if (x86_page_table_writing_insn(ctxt
))
7529 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
7532 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
7533 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
7535 if (!vcpu
->arch
.mmu
->direct_map
)
7536 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
7538 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
7543 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
7544 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
7546 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
7548 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
7549 /* This is a good place to trace that we are exiting SMM. */
7550 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
7552 /* Process a latched INIT or SMI, if any. */
7553 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7556 kvm_mmu_reset_context(vcpu
);
7559 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
7568 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
7569 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
7574 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
7576 struct kvm_run
*kvm_run
= vcpu
->run
;
7578 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
7579 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
7580 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
7581 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7582 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7585 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
7589 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
7591 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7594 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
7599 * rflags is the old, "raw" value of the flags. The new value has
7600 * not been saved yet.
7602 * This is correct even for TF set by the guest, because "the
7603 * processor will not generate this exception after the instruction
7604 * that sets the TF flag".
7606 if (unlikely(rflags
& X86_EFLAGS_TF
))
7607 r
= kvm_vcpu_do_singlestep(vcpu
);
7610 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
7612 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
7614 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
7615 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
7616 struct kvm_run
*kvm_run
= vcpu
->run
;
7617 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7618 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7619 vcpu
->arch
.guest_debug_dr7
,
7623 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
7624 kvm_run
->debug
.arch
.pc
= eip
;
7625 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
7626 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
7632 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
7633 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
7634 unsigned long eip
= kvm_get_linear_rip(vcpu
);
7635 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
7640 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
7649 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
7651 switch (ctxt
->opcode_len
) {
7658 case 0xe6: /* OUT */
7662 case 0x6c: /* INS */
7664 case 0x6e: /* OUTS */
7671 case 0x33: /* RDPMC */
7681 * Decode to be emulated instruction. Return EMULATION_OK if success.
7683 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
7684 void *insn
, int insn_len
)
7686 int r
= EMULATION_OK
;
7687 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7689 init_emulate_ctxt(vcpu
);
7692 * We will reenter on the same instruction since we do not set
7693 * complete_userspace_io. This does not handle watchpoints yet,
7694 * those would be handled in the emulate_ops.
7696 if (!(emulation_type
& EMULTYPE_SKIP
) &&
7697 kvm_vcpu_check_breakpoint(vcpu
, &r
))
7700 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
7702 trace_kvm_emulate_insn_start(vcpu
);
7703 ++vcpu
->stat
.insn_emulation
;
7707 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
7709 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
7710 int emulation_type
, void *insn
, int insn_len
)
7713 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7714 bool writeback
= true;
7715 bool write_fault_to_spt
;
7717 if (unlikely(!static_call(kvm_x86_can_emulate_instruction
)(vcpu
, insn
, insn_len
)))
7720 vcpu
->arch
.l1tf_flush_l1d
= true;
7723 * Clear write_fault_to_shadow_pgtable here to ensure it is
7726 write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
7727 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
7729 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
7730 kvm_clear_exception_queue(vcpu
);
7732 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
7734 if (r
!= EMULATION_OK
) {
7735 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
7736 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
7737 kvm_queue_exception(vcpu
, UD_VECTOR
);
7740 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
7744 if (ctxt
->have_exception
) {
7746 * #UD should result in just EMULATION_FAILED, and trap-like
7747 * exception should not be encountered during decode.
7749 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
7750 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
7751 inject_emulated_exception(vcpu
);
7754 return handle_emulation_failure(vcpu
, emulation_type
);
7758 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
7759 !is_vmware_backdoor_opcode(ctxt
)) {
7760 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
7765 * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
7766 * for kvm_skip_emulated_instruction(). The caller is responsible for
7767 * updating interruptibility state and injecting single-step #DBs.
7769 if (emulation_type
& EMULTYPE_SKIP
) {
7770 kvm_rip_write(vcpu
, ctxt
->_eip
);
7771 if (ctxt
->eflags
& X86_EFLAGS_RF
)
7772 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
7776 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
7779 /* this is needed for vmware backdoor interface to work since it
7780 changes registers values during IO operation */
7781 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
7782 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
7783 emulator_invalidate_register_cache(ctxt
);
7787 if (emulation_type
& EMULTYPE_PF
) {
7788 /* Save the faulting GPA (cr2) in the address field */
7789 ctxt
->exception
.address
= cr2_or_gpa
;
7791 /* With shadow page tables, cr2 contains a GVA or nGPA. */
7792 if (vcpu
->arch
.mmu
->direct_map
) {
7793 ctxt
->gpa_available
= true;
7794 ctxt
->gpa_val
= cr2_or_gpa
;
7797 /* Sanitize the address out of an abundance of paranoia. */
7798 ctxt
->exception
.address
= 0;
7801 r
= x86_emulate_insn(ctxt
);
7803 if (r
== EMULATION_INTERCEPTED
)
7806 if (r
== EMULATION_FAILED
) {
7807 if (reexecute_instruction(vcpu
, cr2_or_gpa
, write_fault_to_spt
,
7811 return handle_emulation_failure(vcpu
, emulation_type
);
7814 if (ctxt
->have_exception
) {
7816 if (inject_emulated_exception(vcpu
))
7818 } else if (vcpu
->arch
.pio
.count
) {
7819 if (!vcpu
->arch
.pio
.in
) {
7820 /* FIXME: return into emulator if single-stepping. */
7821 vcpu
->arch
.pio
.count
= 0;
7824 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
7827 } else if (vcpu
->mmio_needed
) {
7828 ++vcpu
->stat
.mmio_exits
;
7830 if (!vcpu
->mmio_is_write
)
7833 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7834 } else if (r
== EMULATION_RESTART
)
7840 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
7841 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
7842 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7843 if (!ctxt
->have_exception
||
7844 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
7845 kvm_rip_write(vcpu
, ctxt
->eip
);
7846 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
7847 r
= kvm_vcpu_do_singlestep(vcpu
);
7848 if (kvm_x86_ops
.update_emulated_instruction
)
7849 static_call(kvm_x86_update_emulated_instruction
)(vcpu
);
7850 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
7854 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
7855 * do nothing, and it will be requested again as soon as
7856 * the shadow expires. But we still need to check here,
7857 * because POPF has no interrupt shadow.
7859 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
7860 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7862 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
7867 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
7869 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
7871 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
7873 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
7874 void *insn
, int insn_len
)
7876 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
7878 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
7880 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
7882 vcpu
->arch
.pio
.count
= 0;
7886 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
7888 vcpu
->arch
.pio
.count
= 0;
7890 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
7893 return kvm_skip_emulated_instruction(vcpu
);
7896 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
7897 unsigned short port
)
7899 unsigned long val
= kvm_rax_read(vcpu
);
7900 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
7906 * Workaround userspace that relies on old KVM behavior of %rip being
7907 * incremented prior to exiting to userspace to handle "OUT 0x7e".
7910 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
7911 vcpu
->arch
.complete_userspace_io
=
7912 complete_fast_pio_out_port_0x7e
;
7913 kvm_skip_emulated_instruction(vcpu
);
7915 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7916 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
7921 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
7925 /* We should only ever be called with arch.pio.count equal to 1 */
7926 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
7928 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
7929 vcpu
->arch
.pio
.count
= 0;
7933 /* For size less than 4 we merge, else we zero extend */
7934 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
7937 * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
7938 * the copy and tracing
7940 emulator_pio_in(vcpu
, vcpu
->arch
.pio
.size
, vcpu
->arch
.pio
.port
, &val
, 1);
7941 kvm_rax_write(vcpu
, val
);
7943 return kvm_skip_emulated_instruction(vcpu
);
7946 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
7947 unsigned short port
)
7952 /* For size less than 4 we merge, else we zero extend */
7953 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
7955 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
7957 kvm_rax_write(vcpu
, val
);
7961 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
7962 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
7967 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
7972 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
7974 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
7975 return ret
&& kvm_skip_emulated_instruction(vcpu
);
7977 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
7979 static int kvmclock_cpu_down_prep(unsigned int cpu
)
7981 __this_cpu_write(cpu_tsc_khz
, 0);
7985 static void tsc_khz_changed(void *data
)
7987 struct cpufreq_freqs
*freq
= data
;
7988 unsigned long khz
= 0;
7992 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7993 khz
= cpufreq_quick_get(raw_smp_processor_id());
7996 __this_cpu_write(cpu_tsc_khz
, khz
);
7999 #ifdef CONFIG_X86_64
8000 static void kvm_hyperv_tsc_notifier(void)
8003 struct kvm_vcpu
*vcpu
;
8005 unsigned long flags
;
8007 mutex_lock(&kvm_lock
);
8008 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8009 kvm_make_mclock_inprogress_request(kvm
);
8011 hyperv_stop_tsc_emulation();
8013 /* TSC frequency always matches when on Hyper-V */
8014 for_each_present_cpu(cpu
)
8015 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
8016 kvm_max_guest_tsc_khz
= tsc_khz
;
8018 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8019 struct kvm_arch
*ka
= &kvm
->arch
;
8021 raw_spin_lock_irqsave(&ka
->pvclock_gtod_sync_lock
, flags
);
8022 pvclock_update_vm_gtod_copy(kvm
);
8023 raw_spin_unlock_irqrestore(&ka
->pvclock_gtod_sync_lock
, flags
);
8025 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8026 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8028 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
8029 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
8031 mutex_unlock(&kvm_lock
);
8035 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
8038 struct kvm_vcpu
*vcpu
;
8039 int i
, send_ipi
= 0;
8042 * We allow guests to temporarily run on slowing clocks,
8043 * provided we notify them after, or to run on accelerating
8044 * clocks, provided we notify them before. Thus time never
8047 * However, we have a problem. We can't atomically update
8048 * the frequency of a given CPU from this function; it is
8049 * merely a notifier, which can be called from any CPU.
8050 * Changing the TSC frequency at arbitrary points in time
8051 * requires a recomputation of local variables related to
8052 * the TSC for each VCPU. We must flag these local variables
8053 * to be updated and be sure the update takes place with the
8054 * new frequency before any guests proceed.
8056 * Unfortunately, the combination of hotplug CPU and frequency
8057 * change creates an intractable locking scenario; the order
8058 * of when these callouts happen is undefined with respect to
8059 * CPU hotplug, and they can race with each other. As such,
8060 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8061 * undefined; you can actually have a CPU frequency change take
8062 * place in between the computation of X and the setting of the
8063 * variable. To protect against this problem, all updates of
8064 * the per_cpu tsc_khz variable are done in an interrupt
8065 * protected IPI, and all callers wishing to update the value
8066 * must wait for a synchronous IPI to complete (which is trivial
8067 * if the caller is on the CPU already). This establishes the
8068 * necessary total order on variable updates.
8070 * Note that because a guest time update may take place
8071 * anytime after the setting of the VCPU's request bit, the
8072 * correct TSC value must be set before the request. However,
8073 * to ensure the update actually makes it to any guest which
8074 * starts running in hardware virtualization between the set
8075 * and the acquisition of the spinlock, we must also ping the
8076 * CPU after setting the request bit.
8080 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8082 mutex_lock(&kvm_lock
);
8083 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8084 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8085 if (vcpu
->cpu
!= cpu
)
8087 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8088 if (vcpu
->cpu
!= raw_smp_processor_id())
8092 mutex_unlock(&kvm_lock
);
8094 if (freq
->old
< freq
->new && send_ipi
) {
8096 * We upscale the frequency. Must make the guest
8097 * doesn't see old kvmclock values while running with
8098 * the new frequency, otherwise we risk the guest sees
8099 * time go backwards.
8101 * In case we update the frequency for another cpu
8102 * (which might be in guest context) send an interrupt
8103 * to kick the cpu out of guest context. Next time
8104 * guest context is entered kvmclock will be updated,
8105 * so the guest will not see stale values.
8107 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
8111 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
8114 struct cpufreq_freqs
*freq
= data
;
8117 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
8119 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
8122 for_each_cpu(cpu
, freq
->policy
->cpus
)
8123 __kvmclock_cpufreq_notifier(freq
, cpu
);
8128 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
8129 .notifier_call
= kvmclock_cpufreq_notifier
8132 static int kvmclock_cpu_online(unsigned int cpu
)
8134 tsc_khz_changed(NULL
);
8138 static void kvm_timer_init(void)
8140 max_tsc_khz
= tsc_khz
;
8142 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
8143 #ifdef CONFIG_CPU_FREQ
8144 struct cpufreq_policy
*policy
;
8148 policy
= cpufreq_cpu_get(cpu
);
8150 if (policy
->cpuinfo
.max_freq
)
8151 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
8152 cpufreq_cpu_put(policy
);
8156 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
8157 CPUFREQ_TRANSITION_NOTIFIER
);
8160 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
8161 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
8164 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
8165 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
8167 int kvm_is_in_guest(void)
8169 return __this_cpu_read(current_vcpu
) != NULL
;
8172 static int kvm_is_user_mode(void)
8176 if (__this_cpu_read(current_vcpu
))
8177 user_mode
= static_call(kvm_x86_get_cpl
)(__this_cpu_read(current_vcpu
));
8179 return user_mode
!= 0;
8182 static unsigned long kvm_get_guest_ip(void)
8184 unsigned long ip
= 0;
8186 if (__this_cpu_read(current_vcpu
))
8187 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
8192 static void kvm_handle_intel_pt_intr(void)
8194 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
8196 kvm_make_request(KVM_REQ_PMI
, vcpu
);
8197 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
8198 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
8201 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
8202 .is_in_guest
= kvm_is_in_guest
,
8203 .is_user_mode
= kvm_is_user_mode
,
8204 .get_guest_ip
= kvm_get_guest_ip
,
8205 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
8208 #ifdef CONFIG_X86_64
8209 static void pvclock_gtod_update_fn(struct work_struct
*work
)
8213 struct kvm_vcpu
*vcpu
;
8216 mutex_lock(&kvm_lock
);
8217 list_for_each_entry(kvm
, &vm_list
, vm_list
)
8218 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8219 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
8220 atomic_set(&kvm_guest_has_master_clock
, 0);
8221 mutex_unlock(&kvm_lock
);
8224 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
8227 * Indirection to move queue_work() out of the tk_core.seq write held
8228 * region to prevent possible deadlocks against time accessors which
8229 * are invoked with work related locks held.
8231 static void pvclock_irq_work_fn(struct irq_work
*w
)
8233 queue_work(system_long_wq
, &pvclock_gtod_work
);
8236 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
8239 * Notification about pvclock gtod data update.
8241 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
8244 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
8245 struct timekeeper
*tk
= priv
;
8247 update_pvclock_gtod(tk
);
8250 * Disable master clock if host does not trust, or does not use,
8251 * TSC based clocksource. Delegate queue_work() to irq_work as
8252 * this is invoked with tk_core.seq write held.
8254 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
8255 atomic_read(&kvm_guest_has_master_clock
) != 0)
8256 irq_work_queue(&pvclock_irq_work
);
8260 static struct notifier_block pvclock_gtod_notifier
= {
8261 .notifier_call
= pvclock_gtod_notify
,
8265 int kvm_arch_init(void *opaque
)
8267 struct kvm_x86_init_ops
*ops
= opaque
;
8270 if (kvm_x86_ops
.hardware_enable
) {
8271 printk(KERN_ERR
"kvm: already loaded the other module\n");
8276 if (!ops
->cpu_has_kvm_support()) {
8277 pr_err_ratelimited("kvm: no hardware support\n");
8281 if (ops
->disabled_by_bios()) {
8282 pr_warn_ratelimited("kvm: disabled by bios\n");
8288 * KVM explicitly assumes that the guest has an FPU and
8289 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8290 * vCPU's FPU state as a fxregs_state struct.
8292 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
8293 printk(KERN_ERR
"kvm: inadequate fpu\n");
8299 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
8300 __alignof__(struct fpu
), SLAB_ACCOUNT
,
8302 if (!x86_fpu_cache
) {
8303 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
8307 x86_emulator_cache
= kvm_alloc_emulator_cache();
8308 if (!x86_emulator_cache
) {
8309 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8310 goto out_free_x86_fpu_cache
;
8313 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
8314 if (!user_return_msrs
) {
8315 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_user_return_msrs\n");
8316 goto out_free_x86_emulator_cache
;
8318 kvm_nr_uret_msrs
= 0;
8320 r
= kvm_mmu_module_init();
8322 goto out_free_percpu
;
8326 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
8328 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
8329 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
8330 supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
8333 if (pi_inject_timer
== -1)
8334 pi_inject_timer
= housekeeping_enabled(HK_FLAG_TIMER
);
8335 #ifdef CONFIG_X86_64
8336 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
8338 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8339 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
8345 free_percpu(user_return_msrs
);
8346 out_free_x86_emulator_cache
:
8347 kmem_cache_destroy(x86_emulator_cache
);
8348 out_free_x86_fpu_cache
:
8349 kmem_cache_destroy(x86_fpu_cache
);
8354 void kvm_arch_exit(void)
8356 #ifdef CONFIG_X86_64
8357 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
8358 clear_hv_tscchange_cb();
8361 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
8363 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
8364 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
8365 CPUFREQ_TRANSITION_NOTIFIER
);
8366 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
8367 #ifdef CONFIG_X86_64
8368 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
8369 irq_work_sync(&pvclock_irq_work
);
8370 cancel_work_sync(&pvclock_gtod_work
);
8372 kvm_x86_ops
.hardware_enable
= NULL
;
8373 kvm_mmu_module_exit();
8374 free_percpu(user_return_msrs
);
8375 kmem_cache_destroy(x86_emulator_cache
);
8376 kmem_cache_destroy(x86_fpu_cache
);
8377 #ifdef CONFIG_KVM_XEN
8378 static_key_deferred_flush(&kvm_xen_enabled
);
8379 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
8383 static int __kvm_vcpu_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
8385 ++vcpu
->stat
.halt_exits
;
8386 if (lapic_in_kernel(vcpu
)) {
8387 vcpu
->arch
.mp_state
= state
;
8390 vcpu
->run
->exit_reason
= reason
;
8395 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
8397 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
8399 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
8401 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
8403 int ret
= kvm_skip_emulated_instruction(vcpu
);
8405 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8406 * KVM_EXIT_DEBUG here.
8408 return kvm_vcpu_halt(vcpu
) && ret
;
8410 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
8412 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
8414 int ret
= kvm_skip_emulated_instruction(vcpu
);
8416 return __kvm_vcpu_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
, KVM_EXIT_AP_RESET_HOLD
) && ret
;
8418 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
8420 #ifdef CONFIG_X86_64
8421 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
8422 unsigned long clock_type
)
8424 struct kvm_clock_pairing clock_pairing
;
8425 struct timespec64 ts
;
8429 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
8430 return -KVM_EOPNOTSUPP
;
8432 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
8433 return -KVM_EOPNOTSUPP
;
8435 clock_pairing
.sec
= ts
.tv_sec
;
8436 clock_pairing
.nsec
= ts
.tv_nsec
;
8437 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
8438 clock_pairing
.flags
= 0;
8439 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
8442 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
8443 sizeof(struct kvm_clock_pairing
)))
8451 * kvm_pv_kick_cpu_op: Kick a vcpu.
8453 * @apicid - apicid of vcpu to be kicked.
8455 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
8457 struct kvm_lapic_irq lapic_irq
;
8459 lapic_irq
.shorthand
= APIC_DEST_NOSHORT
;
8460 lapic_irq
.dest_mode
= APIC_DEST_PHYSICAL
;
8461 lapic_irq
.level
= 0;
8462 lapic_irq
.dest_id
= apicid
;
8463 lapic_irq
.msi_redir_hint
= false;
8465 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
8466 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
8469 bool kvm_apicv_activated(struct kvm
*kvm
)
8471 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
8473 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
8475 void kvm_apicv_init(struct kvm
*kvm
, bool enable
)
8478 clear_bit(APICV_INHIBIT_REASON_DISABLE
,
8479 &kvm
->arch
.apicv_inhibit_reasons
);
8481 set_bit(APICV_INHIBIT_REASON_DISABLE
,
8482 &kvm
->arch
.apicv_inhibit_reasons
);
8484 EXPORT_SYMBOL_GPL(kvm_apicv_init
);
8486 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
8488 struct kvm_vcpu
*target
= NULL
;
8489 struct kvm_apic_map
*map
;
8491 vcpu
->stat
.directed_yield_attempted
++;
8493 if (single_task_running())
8497 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
8499 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
8500 target
= map
->phys_map
[dest_id
]->vcpu
;
8504 if (!target
|| !READ_ONCE(target
->ready
))
8507 /* Ignore requests to yield to self */
8511 if (kvm_vcpu_yield_to(target
) <= 0)
8514 vcpu
->stat
.directed_yield_successful
++;
8520 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
8522 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
8525 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
8526 return kvm_xen_hypercall(vcpu
);
8528 if (kvm_hv_hypercall_enabled(vcpu
))
8529 return kvm_hv_hypercall(vcpu
);
8531 nr
= kvm_rax_read(vcpu
);
8532 a0
= kvm_rbx_read(vcpu
);
8533 a1
= kvm_rcx_read(vcpu
);
8534 a2
= kvm_rdx_read(vcpu
);
8535 a3
= kvm_rsi_read(vcpu
);
8537 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
8539 op_64_bit
= is_64_bit_hypercall(vcpu
);
8548 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
8556 case KVM_HC_VAPIC_POLL_IRQ
:
8559 case KVM_HC_KICK_CPU
:
8560 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
8563 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
8564 kvm_sched_yield(vcpu
, a1
);
8567 #ifdef CONFIG_X86_64
8568 case KVM_HC_CLOCK_PAIRING
:
8569 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
8572 case KVM_HC_SEND_IPI
:
8573 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
8576 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
8578 case KVM_HC_SCHED_YIELD
:
8579 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
8582 kvm_sched_yield(vcpu
, a0
);
8592 kvm_rax_write(vcpu
, ret
);
8594 ++vcpu
->stat
.hypercalls
;
8595 return kvm_skip_emulated_instruction(vcpu
);
8597 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
8599 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
8601 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8602 char instruction
[3];
8603 unsigned long rip
= kvm_rip_read(vcpu
);
8605 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
8607 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
8611 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
8613 return vcpu
->run
->request_interrupt_window
&&
8614 likely(!pic_in_kernel(vcpu
->kvm
));
8617 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
8619 struct kvm_run
*kvm_run
= vcpu
->run
;
8622 * if_flag is obsolete and useless, so do not bother
8623 * setting it for SEV-ES guests. Userspace can just
8624 * use kvm_run->ready_for_interrupt_injection.
8626 kvm_run
->if_flag
= !vcpu
->arch
.guest_state_protected
8627 && (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
8629 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
8630 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
8633 * The call to kvm_ready_for_interrupt_injection() may end up in
8634 * kvm_xen_has_interrupt() which may require the srcu lock to be
8635 * held, to protect against changes in the vcpu_info address.
8637 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8638 kvm_run
->ready_for_interrupt_injection
=
8639 pic_in_kernel(vcpu
->kvm
) ||
8640 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
8641 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8644 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
8647 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
8651 if (!kvm_x86_ops
.update_cr8_intercept
)
8654 if (!lapic_in_kernel(vcpu
))
8657 if (vcpu
->arch
.apicv_active
)
8660 if (!vcpu
->arch
.apic
->vapic_addr
)
8661 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
8668 tpr
= kvm_lapic_get_cr8(vcpu
);
8670 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
8674 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
8676 if (WARN_ON_ONCE(!is_guest_mode(vcpu
)))
8679 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
8680 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
8684 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
8687 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
8689 if (vcpu
->arch
.exception
.error_code
&& !is_protmode(vcpu
))
8690 vcpu
->arch
.exception
.error_code
= false;
8691 static_call(kvm_x86_queue_exception
)(vcpu
);
8694 static void inject_pending_event(struct kvm_vcpu
*vcpu
, bool *req_immediate_exit
)
8697 bool can_inject
= true;
8699 /* try to reinject previous events if any */
8701 if (vcpu
->arch
.exception
.injected
) {
8702 kvm_inject_exception(vcpu
);
8706 * Do not inject an NMI or interrupt if there is a pending
8707 * exception. Exceptions and interrupts are recognized at
8708 * instruction boundaries, i.e. the start of an instruction.
8709 * Trap-like exceptions, e.g. #DB, have higher priority than
8710 * NMIs and interrupts, i.e. traps are recognized before an
8711 * NMI/interrupt that's pending on the same instruction.
8712 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
8713 * priority, but are only generated (pended) during instruction
8714 * execution, i.e. a pending fault-like exception means the
8715 * fault occurred on the *previous* instruction and must be
8716 * serviced prior to recognizing any new events in order to
8717 * fully complete the previous instruction.
8719 else if (!vcpu
->arch
.exception
.pending
) {
8720 if (vcpu
->arch
.nmi_injected
) {
8721 static_call(kvm_x86_set_nmi
)(vcpu
);
8723 } else if (vcpu
->arch
.interrupt
.injected
) {
8724 static_call(kvm_x86_set_irq
)(vcpu
);
8729 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
8730 vcpu
->arch
.exception
.pending
);
8733 * Call check_nested_events() even if we reinjected a previous event
8734 * in order for caller to determine if it should require immediate-exit
8735 * from L2 to L1 due to pending L1 events which require exit
8738 if (is_guest_mode(vcpu
)) {
8739 r
= kvm_check_nested_events(vcpu
);
8744 /* try to inject new event if pending */
8745 if (vcpu
->arch
.exception
.pending
) {
8746 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
8747 vcpu
->arch
.exception
.has_error_code
,
8748 vcpu
->arch
.exception
.error_code
);
8750 vcpu
->arch
.exception
.pending
= false;
8751 vcpu
->arch
.exception
.injected
= true;
8753 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
8754 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
8757 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
8758 kvm_deliver_exception_payload(vcpu
);
8759 if (vcpu
->arch
.dr7
& DR7_GD
) {
8760 vcpu
->arch
.dr7
&= ~DR7_GD
;
8761 kvm_update_dr7(vcpu
);
8765 kvm_inject_exception(vcpu
);
8770 * Finally, inject interrupt events. If an event cannot be injected
8771 * due to architectural conditions (e.g. IF=0) a window-open exit
8772 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
8773 * and can architecturally be injected, but we cannot do it right now:
8774 * an interrupt could have arrived just now and we have to inject it
8775 * as a vmexit, or there could already an event in the queue, which is
8776 * indicated by can_inject. In that case we request an immediate exit
8777 * in order to make progress and get back here for another iteration.
8778 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
8780 if (vcpu
->arch
.smi_pending
) {
8781 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
8785 vcpu
->arch
.smi_pending
= false;
8786 ++vcpu
->arch
.smi_count
;
8790 static_call(kvm_x86_enable_smi_window
)(vcpu
);
8793 if (vcpu
->arch
.nmi_pending
) {
8794 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
8798 --vcpu
->arch
.nmi_pending
;
8799 vcpu
->arch
.nmi_injected
= true;
8800 static_call(kvm_x86_set_nmi
)(vcpu
);
8802 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
8804 if (vcpu
->arch
.nmi_pending
)
8805 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
8808 if (kvm_cpu_has_injectable_intr(vcpu
)) {
8809 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
8813 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
), false);
8814 static_call(kvm_x86_set_irq
)(vcpu
);
8815 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
8817 if (kvm_cpu_has_injectable_intr(vcpu
))
8818 static_call(kvm_x86_enable_irq_window
)(vcpu
);
8821 if (is_guest_mode(vcpu
) &&
8822 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
8823 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
8824 *req_immediate_exit
= true;
8826 WARN_ON(vcpu
->arch
.exception
.pending
);
8830 *req_immediate_exit
= true;
8834 static void process_nmi(struct kvm_vcpu
*vcpu
)
8839 * x86 is limited to one NMI running, and one NMI pending after it.
8840 * If an NMI is already in progress, limit further NMIs to just one.
8841 * Otherwise, allow two (and we'll inject the first one immediately).
8843 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
8846 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
8847 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
8848 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8851 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
8854 flags
|= seg
->g
<< 23;
8855 flags
|= seg
->db
<< 22;
8856 flags
|= seg
->l
<< 21;
8857 flags
|= seg
->avl
<< 20;
8858 flags
|= seg
->present
<< 15;
8859 flags
|= seg
->dpl
<< 13;
8860 flags
|= seg
->s
<< 12;
8861 flags
|= seg
->type
<< 8;
8865 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8867 struct kvm_segment seg
;
8870 kvm_get_segment(vcpu
, &seg
, n
);
8871 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
8874 offset
= 0x7f84 + n
* 12;
8876 offset
= 0x7f2c + (n
- 3) * 12;
8878 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
8879 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8880 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
8883 #ifdef CONFIG_X86_64
8884 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
8886 struct kvm_segment seg
;
8890 kvm_get_segment(vcpu
, &seg
, n
);
8891 offset
= 0x7e00 + n
* 16;
8893 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
8894 put_smstate(u16
, buf
, offset
, seg
.selector
);
8895 put_smstate(u16
, buf
, offset
+ 2, flags
);
8896 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
8897 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
8901 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
8904 struct kvm_segment seg
;
8908 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
8909 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
8910 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
8911 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
8913 for (i
= 0; i
< 8; i
++)
8914 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read_raw(vcpu
, i
));
8916 kvm_get_dr(vcpu
, 6, &val
);
8917 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
8918 kvm_get_dr(vcpu
, 7, &val
);
8919 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
8921 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8922 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
8923 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
8924 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
8925 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
8927 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8928 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
8929 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
8930 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
8931 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
8933 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
8934 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
8935 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
8937 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
8938 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
8939 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
8941 for (i
= 0; i
< 6; i
++)
8942 enter_smm_save_seg_32(vcpu
, buf
, i
);
8944 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
8947 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
8948 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
8951 #ifdef CONFIG_X86_64
8952 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
8955 struct kvm_segment seg
;
8959 for (i
= 0; i
< 16; i
++)
8960 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read_raw(vcpu
, i
));
8962 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
8963 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
8965 kvm_get_dr(vcpu
, 6, &val
);
8966 put_smstate(u64
, buf
, 0x7f68, val
);
8967 kvm_get_dr(vcpu
, 7, &val
);
8968 put_smstate(u64
, buf
, 0x7f60, val
);
8970 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
8971 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
8972 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
8974 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
8977 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
8979 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
8981 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
8982 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
8983 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
8984 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
8985 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
8987 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
8988 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
8989 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
8991 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
8992 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
8993 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
8994 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
8995 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
8997 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
8998 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
8999 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
9001 for (i
= 0; i
< 6; i
++)
9002 enter_smm_save_seg_64(vcpu
, buf
, i
);
9006 static void enter_smm(struct kvm_vcpu
*vcpu
)
9008 struct kvm_segment cs
, ds
;
9013 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
9014 memset(buf
, 0, 512);
9015 #ifdef CONFIG_X86_64
9016 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9017 enter_smm_save_state_64(vcpu
, buf
);
9020 enter_smm_save_state_32(vcpu
, buf
);
9023 * Give pre_enter_smm() a chance to make ISA-specific changes to the
9024 * vCPU state (e.g. leave guest mode) after we've saved the state into
9025 * the SMM state-save area.
9027 static_call(kvm_x86_pre_enter_smm
)(vcpu
, buf
);
9029 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
9030 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
9032 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
))
9033 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
9035 static_call(kvm_x86_set_nmi_mask
)(vcpu
, true);
9037 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
9038 kvm_rip_write(vcpu
, 0x8000);
9040 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
9041 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
9042 vcpu
->arch
.cr0
= cr0
;
9044 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
9046 /* Undocumented: IDT limit is set to zero on entry to SMM. */
9047 dt
.address
= dt
.size
= 0;
9048 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
9050 kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
9052 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
9053 cs
.base
= vcpu
->arch
.smbase
;
9058 cs
.limit
= ds
.limit
= 0xffffffff;
9059 cs
.type
= ds
.type
= 0x3;
9060 cs
.dpl
= ds
.dpl
= 0;
9065 cs
.avl
= ds
.avl
= 0;
9066 cs
.present
= ds
.present
= 1;
9067 cs
.unusable
= ds
.unusable
= 0;
9068 cs
.padding
= ds
.padding
= 0;
9070 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9071 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
9072 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
9073 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
9074 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
9075 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
9077 #ifdef CONFIG_X86_64
9078 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
9079 static_call(kvm_x86_set_efer
)(vcpu
, 0);
9082 kvm_update_cpuid_runtime(vcpu
);
9083 kvm_mmu_reset_context(vcpu
);
9086 static void process_smi(struct kvm_vcpu
*vcpu
)
9088 vcpu
->arch
.smi_pending
= true;
9089 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9092 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
9093 unsigned long *vcpu_bitmap
)
9097 zalloc_cpumask_var(&cpus
, GFP_ATOMIC
);
9099 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
,
9100 NULL
, vcpu_bitmap
, cpus
);
9102 free_cpumask_var(cpus
);
9105 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
9107 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
9110 void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
9112 if (!lapic_in_kernel(vcpu
))
9115 vcpu
->arch
.apicv_active
= kvm_apicv_activated(vcpu
->kvm
);
9116 kvm_apic_update_apicv(vcpu
);
9117 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
9119 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv
);
9122 * NOTE: Do not hold any lock prior to calling this.
9124 * In particular, kvm_request_apicv_update() expects kvm->srcu not to be
9125 * locked, because it calls __x86_set_memory_region() which does
9126 * synchronize_srcu(&kvm->srcu).
9128 void kvm_request_apicv_update(struct kvm
*kvm
, bool activate
, ulong bit
)
9130 struct kvm_vcpu
*except
;
9131 unsigned long old
, new, expected
;
9133 if (!kvm_x86_ops
.check_apicv_inhibit_reasons
||
9134 !static_call(kvm_x86_check_apicv_inhibit_reasons
)(bit
))
9137 old
= READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
);
9139 expected
= new = old
;
9141 __clear_bit(bit
, &new);
9143 __set_bit(bit
, &new);
9146 old
= cmpxchg(&kvm
->arch
.apicv_inhibit_reasons
, expected
, new);
9147 } while (old
!= expected
);
9152 trace_kvm_apicv_update_request(activate
, bit
);
9153 if (kvm_x86_ops
.pre_update_apicv_exec_ctrl
)
9154 static_call(kvm_x86_pre_update_apicv_exec_ctrl
)(kvm
, activate
);
9157 * Sending request to update APICV for all other vcpus,
9158 * while update the calling vcpu immediately instead of
9159 * waiting for another #VMEXIT to handle the request.
9161 except
= kvm_get_running_vcpu();
9162 kvm_make_all_cpus_request_except(kvm
, KVM_REQ_APICV_UPDATE
,
9165 kvm_vcpu_update_apicv(except
);
9167 EXPORT_SYMBOL_GPL(kvm_request_apicv_update
);
9169 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
9171 if (!kvm_apic_present(vcpu
))
9174 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
9176 if (irqchip_split(vcpu
->kvm
))
9177 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9179 if (vcpu
->arch
.apicv_active
)
9180 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9181 if (ioapic_in_kernel(vcpu
->kvm
))
9182 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
9185 if (is_guest_mode(vcpu
))
9186 vcpu
->arch
.load_eoi_exitmap_pending
= true;
9188 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
9191 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
9193 u64 eoi_exit_bitmap
[4];
9195 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
9198 if (to_hv_vcpu(vcpu
)) {
9199 bitmap_or((ulong
*)eoi_exit_bitmap
,
9200 vcpu
->arch
.ioapic_handled_vectors
,
9201 to_hv_synic(vcpu
)->vec_bitmap
, 256);
9202 static_call(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
9206 static_call(kvm_x86_load_eoi_exitmap
)(
9207 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
9210 void kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
9211 unsigned long start
, unsigned long end
)
9213 unsigned long apic_address
;
9216 * The physical address of apic access page is stored in the VMCS.
9217 * Update it when it becomes invalid.
9219 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
9220 if (start
<= apic_address
&& apic_address
< end
)
9221 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
9224 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
9226 if (!lapic_in_kernel(vcpu
))
9229 if (!kvm_x86_ops
.set_apic_access_page_addr
)
9232 static_call(kvm_x86_set_apic_access_page_addr
)(vcpu
);
9235 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
9237 smp_send_reschedule(vcpu
->cpu
);
9239 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
9242 * Returns 1 to let vcpu_run() continue the guest execution loop without
9243 * exiting to the userspace. Otherwise, the value will be returned to the
9246 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
9250 dm_request_for_irq_injection(vcpu
) &&
9251 kvm_cpu_accept_dm_intr(vcpu
);
9252 fastpath_t exit_fastpath
;
9254 bool req_immediate_exit
= false;
9256 /* Forbid vmenter if vcpu dirty ring is soft-full */
9257 if (unlikely(vcpu
->kvm
->dirty_ring_size
&&
9258 kvm_dirty_ring_soft_full(&vcpu
->dirty_ring
))) {
9259 vcpu
->run
->exit_reason
= KVM_EXIT_DIRTY_RING_FULL
;
9260 trace_kvm_dirty_ring_exit(vcpu
);
9265 if (kvm_request_pending(vcpu
)) {
9266 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
9267 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
9272 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
9273 kvm_mmu_unload(vcpu
);
9274 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
9275 __kvm_migrate_timers(vcpu
);
9276 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
9277 kvm_gen_update_masterclock(vcpu
->kvm
);
9278 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
9279 kvm_gen_kvmclock_update(vcpu
);
9280 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
9281 r
= kvm_guest_time_update(vcpu
);
9285 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
9286 kvm_mmu_sync_roots(vcpu
);
9287 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
9288 kvm_mmu_load_pgd(vcpu
);
9289 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
)) {
9290 kvm_vcpu_flush_tlb_all(vcpu
);
9292 /* Flushing all ASIDs flushes the current ASID... */
9293 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
9295 kvm_service_local_tlb_flush_requests(vcpu
);
9297 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
9298 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
9302 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
9303 if (is_guest_mode(vcpu
)) {
9304 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
9306 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
9307 vcpu
->mmio_needed
= 0;
9312 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
9313 /* Page is swapped out. Do synthetic halt */
9314 vcpu
->arch
.apf
.halted
= true;
9318 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
9319 record_steal_time(vcpu
);
9320 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
9322 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
9324 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
9325 kvm_pmu_handle_event(vcpu
);
9326 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
9327 kvm_pmu_deliver_pmi(vcpu
);
9328 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
9329 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
9330 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
9331 vcpu
->arch
.ioapic_handled_vectors
)) {
9332 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
9333 vcpu
->run
->eoi
.vector
=
9334 vcpu
->arch
.pending_ioapic_eoi
;
9339 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
9340 vcpu_scan_ioapic(vcpu
);
9341 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
9342 vcpu_load_eoi_exitmap(vcpu
);
9343 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
9344 kvm_vcpu_reload_apic_access_page(vcpu
);
9345 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
9346 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9347 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
9351 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
9352 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
9353 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
9357 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
9358 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
9360 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
9361 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
9367 * KVM_REQ_HV_STIMER has to be processed after
9368 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9369 * depend on the guest clock being up-to-date
9371 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
9372 kvm_hv_process_stimers(vcpu
);
9373 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
9374 kvm_vcpu_update_apicv(vcpu
);
9375 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
9376 kvm_check_async_pf_completion(vcpu
);
9377 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
9378 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
9380 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
9381 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
9384 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
9385 kvm_xen_has_interrupt(vcpu
)) {
9386 ++vcpu
->stat
.req_event
;
9387 kvm_apic_accept_events(vcpu
);
9388 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
9393 inject_pending_event(vcpu
, &req_immediate_exit
);
9395 static_call(kvm_x86_enable_irq_window
)(vcpu
);
9397 if (kvm_lapic_enabled(vcpu
)) {
9398 update_cr8_intercept(vcpu
);
9399 kvm_lapic_sync_to_vapic(vcpu
);
9403 r
= kvm_mmu_reload(vcpu
);
9405 goto cancel_injection
;
9410 static_call(kvm_x86_prepare_guest_switch
)(vcpu
);
9413 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
9414 * IPI are then delayed after guest entry, which ensures that they
9415 * result in virtual interrupt delivery.
9417 local_irq_disable();
9418 vcpu
->mode
= IN_GUEST_MODE
;
9420 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9423 * 1) We should set ->mode before checking ->requests. Please see
9424 * the comment in kvm_vcpu_exiting_guest_mode().
9426 * 2) For APICv, we should set ->mode before checking PID.ON. This
9427 * pairs with the memory barrier implicit in pi_test_and_set_on
9428 * (see vmx_deliver_posted_interrupt).
9430 * 3) This also orders the write to mode from any reads to the page
9431 * tables done while the VCPU is running. Please see the comment
9432 * in kvm_flush_remote_tlbs.
9434 smp_mb__after_srcu_read_unlock();
9437 * This handles the case where a posted interrupt was
9438 * notified with kvm_vcpu_kick.
9440 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
9441 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9443 if (kvm_vcpu_exit_request(vcpu
)) {
9444 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9448 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9450 goto cancel_injection
;
9453 if (req_immediate_exit
) {
9454 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9455 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
9458 fpregs_assert_state_consistent();
9459 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9460 switch_fpu_return();
9462 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
9464 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
9465 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
9466 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
9467 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
9468 set_debugreg(vcpu
->arch
.dr6
, 6);
9469 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
9470 } else if (unlikely(hw_breakpoint_active())) {
9475 exit_fastpath
= static_call(kvm_x86_run
)(vcpu
);
9476 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
9479 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
9480 static_call(kvm_x86_sync_pir_to_irr
)(vcpu
);
9482 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
9483 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
9489 * Do this here before restoring debug registers on the host. And
9490 * since we do this before handling the vmexit, a DR access vmexit
9491 * can (a) read the correct value of the debug registers, (b) set
9492 * KVM_DEBUGREG_WONT_EXIT again.
9494 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
9495 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
9496 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
9497 kvm_update_dr0123(vcpu
);
9498 kvm_update_dr7(vcpu
);
9499 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
9503 * If the guest has used debug registers, at least dr7
9504 * will be disabled while returning to the host.
9505 * If we don't have active breakpoints in the host, we don't
9506 * care about the messed up debug address registers. But if
9507 * we have some of them active, restore the old state.
9509 if (hw_breakpoint_active())
9510 hw_breakpoint_restore();
9512 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
9513 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
9515 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
9518 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
9521 * Consume any pending interrupts, including the possible source of
9522 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9523 * An instruction is required after local_irq_enable() to fully unblock
9524 * interrupts on processors that implement an interrupt shadow, the
9525 * stat.exits increment will do nicely.
9527 kvm_before_interrupt(vcpu
);
9530 local_irq_disable();
9531 kvm_after_interrupt(vcpu
);
9534 * Wait until after servicing IRQs to account guest time so that any
9535 * ticks that occurred while running the guest are properly accounted
9536 * to the guest. Waiting until IRQs are enabled degrades the accuracy
9537 * of accounting via context tracking, but the loss of accuracy is
9538 * acceptable for all known use cases.
9540 vtime_account_guest_exit();
9542 if (lapic_in_kernel(vcpu
)) {
9543 s64 delta
= vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
;
9544 if (delta
!= S64_MIN
) {
9545 trace_kvm_wait_lapic_expire(vcpu
->vcpu_id
, delta
);
9546 vcpu
->arch
.apic
->lapic_timer
.advance_expire_delta
= S64_MIN
;
9553 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9556 * Profile KVM exit RIPs:
9558 if (unlikely(prof_on
== KVM_PROFILING
)) {
9559 unsigned long rip
= kvm_rip_read(vcpu
);
9560 profile_hit(KVM_PROFILING
, (void *)rip
);
9563 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
9564 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9566 if (vcpu
->arch
.apic_attention
)
9567 kvm_lapic_sync_from_vapic(vcpu
);
9569 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
9573 if (req_immediate_exit
)
9574 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9575 static_call(kvm_x86_cancel_injection
)(vcpu
);
9576 if (unlikely(vcpu
->arch
.apic_attention
))
9577 kvm_lapic_sync_from_vapic(vcpu
);
9582 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
9584 if (!kvm_arch_vcpu_runnable(vcpu
) &&
9585 (!kvm_x86_ops
.pre_block
|| static_call(kvm_x86_pre_block
)(vcpu
) == 0)) {
9586 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9587 kvm_vcpu_block(vcpu
);
9588 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9590 if (kvm_x86_ops
.post_block
)
9591 static_call(kvm_x86_post_block
)(vcpu
);
9593 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
9597 kvm_apic_accept_events(vcpu
);
9598 switch(vcpu
->arch
.mp_state
) {
9599 case KVM_MP_STATE_HALTED
:
9600 case KVM_MP_STATE_AP_RESET_HOLD
:
9601 vcpu
->arch
.pv
.pv_unhalted
= false;
9602 vcpu
->arch
.mp_state
=
9603 KVM_MP_STATE_RUNNABLE
;
9605 case KVM_MP_STATE_RUNNABLE
:
9606 vcpu
->arch
.apf
.halted
= false;
9608 case KVM_MP_STATE_INIT_RECEIVED
:
9616 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
9618 if (is_guest_mode(vcpu
))
9619 kvm_check_nested_events(vcpu
);
9621 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
9622 !vcpu
->arch
.apf
.halted
);
9625 static int vcpu_run(struct kvm_vcpu
*vcpu
)
9628 struct kvm
*kvm
= vcpu
->kvm
;
9630 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9631 vcpu
->arch
.l1tf_flush_l1d
= true;
9634 if (kvm_vcpu_running(vcpu
)) {
9635 r
= vcpu_enter_guest(vcpu
);
9637 r
= vcpu_block(kvm
, vcpu
);
9643 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
9644 if (kvm_cpu_has_pending_timer(vcpu
))
9645 kvm_inject_pending_timer_irqs(vcpu
);
9647 if (dm_request_for_irq_injection(vcpu
) &&
9648 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
9650 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
9651 ++vcpu
->stat
.request_irq_exits
;
9655 if (__xfer_to_guest_mode_work_pending()) {
9656 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9657 r
= xfer_to_guest_mode_handle_work(vcpu
);
9660 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
9664 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
9669 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
9673 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9674 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
9675 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
9679 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
9681 BUG_ON(!vcpu
->arch
.pio
.count
);
9683 return complete_emulated_io(vcpu
);
9687 * Implements the following, as a state machine:
9691 * for each mmio piece in the fragment
9699 * for each mmio piece in the fragment
9704 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
9706 struct kvm_run
*run
= vcpu
->run
;
9707 struct kvm_mmio_fragment
*frag
;
9710 BUG_ON(!vcpu
->mmio_needed
);
9712 /* Complete previous fragment */
9713 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
9714 len
= min(8u, frag
->len
);
9715 if (!vcpu
->mmio_is_write
)
9716 memcpy(frag
->data
, run
->mmio
.data
, len
);
9718 if (frag
->len
<= 8) {
9719 /* Switch to the next fragment. */
9721 vcpu
->mmio_cur_fragment
++;
9723 /* Go forward to the next mmio piece. */
9729 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
9730 vcpu
->mmio_needed
= 0;
9732 /* FIXME: return into emulator if single-stepping. */
9733 if (vcpu
->mmio_is_write
)
9735 vcpu
->mmio_read_completed
= 1;
9736 return complete_emulated_io(vcpu
);
9739 run
->exit_reason
= KVM_EXIT_MMIO
;
9740 run
->mmio
.phys_addr
= frag
->gpa
;
9741 if (vcpu
->mmio_is_write
)
9742 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
9743 run
->mmio
.len
= min(8u, frag
->len
);
9744 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
9745 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9749 static void kvm_save_current_fpu(struct fpu
*fpu
)
9752 * If the target FPU state is not resident in the CPU registers, just
9753 * memcpy() from current, else save CPU state directly to the target.
9755 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
9756 memcpy(&fpu
->state
, ¤t
->thread
.fpu
.state
,
9757 fpu_kernel_xstate_size
);
9759 copy_fpregs_to_fpstate(fpu
);
9762 /* Swap (qemu) user FPU context for the guest FPU context. */
9763 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
9767 kvm_save_current_fpu(vcpu
->arch
.user_fpu
);
9770 * Guests with protected state can't have it set by the hypervisor,
9771 * so skip trying to set it.
9773 if (vcpu
->arch
.guest_fpu
)
9774 /* PKRU is separately restored in kvm_x86_ops.run. */
9775 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
->state
,
9776 ~XFEATURE_MASK_PKRU
);
9778 fpregs_mark_activate();
9784 /* When vcpu_run ends, restore user space FPU context. */
9785 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
9790 * Guests with protected state can't have it read by the hypervisor,
9791 * so skip trying to save it.
9793 if (vcpu
->arch
.guest_fpu
)
9794 kvm_save_current_fpu(vcpu
->arch
.guest_fpu
);
9796 copy_kernel_to_fpregs(&vcpu
->arch
.user_fpu
->state
);
9798 fpregs_mark_activate();
9801 ++vcpu
->stat
.fpu_reload
;
9805 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
9807 struct kvm_run
*kvm_run
= vcpu
->run
;
9811 kvm_sigset_activate(vcpu
);
9813 kvm_load_guest_fpu(vcpu
);
9815 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
9816 if (kvm_run
->immediate_exit
) {
9820 kvm_vcpu_block(vcpu
);
9821 kvm_apic_accept_events(vcpu
);
9822 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
9824 if (signal_pending(current
)) {
9826 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
9827 ++vcpu
->stat
.signal_exits
;
9832 if (kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) {
9837 if (kvm_run
->kvm_dirty_regs
) {
9838 r
= sync_regs(vcpu
);
9843 /* re-sync apic's tpr */
9844 if (!lapic_in_kernel(vcpu
)) {
9845 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
9851 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
9852 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
9853 vcpu
->arch
.complete_userspace_io
= NULL
;
9858 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
9860 if (kvm_run
->immediate_exit
)
9866 kvm_put_guest_fpu(vcpu
);
9867 if (kvm_run
->kvm_valid_regs
)
9869 post_kvm_run_save(vcpu
);
9870 kvm_sigset_deactivate(vcpu
);
9876 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9878 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
9880 * We are here if userspace calls get_regs() in the middle of
9881 * instruction emulation. Registers state needs to be copied
9882 * back from emulation context to vcpu. Userspace shouldn't do
9883 * that usually, but some bad designed PV devices (vmware
9884 * backdoor interface) need this to work
9886 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
9887 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9889 regs
->rax
= kvm_rax_read(vcpu
);
9890 regs
->rbx
= kvm_rbx_read(vcpu
);
9891 regs
->rcx
= kvm_rcx_read(vcpu
);
9892 regs
->rdx
= kvm_rdx_read(vcpu
);
9893 regs
->rsi
= kvm_rsi_read(vcpu
);
9894 regs
->rdi
= kvm_rdi_read(vcpu
);
9895 regs
->rsp
= kvm_rsp_read(vcpu
);
9896 regs
->rbp
= kvm_rbp_read(vcpu
);
9897 #ifdef CONFIG_X86_64
9898 regs
->r8
= kvm_r8_read(vcpu
);
9899 regs
->r9
= kvm_r9_read(vcpu
);
9900 regs
->r10
= kvm_r10_read(vcpu
);
9901 regs
->r11
= kvm_r11_read(vcpu
);
9902 regs
->r12
= kvm_r12_read(vcpu
);
9903 regs
->r13
= kvm_r13_read(vcpu
);
9904 regs
->r14
= kvm_r14_read(vcpu
);
9905 regs
->r15
= kvm_r15_read(vcpu
);
9908 regs
->rip
= kvm_rip_read(vcpu
);
9909 regs
->rflags
= kvm_get_rflags(vcpu
);
9912 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9915 __get_regs(vcpu
, regs
);
9920 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9922 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
9923 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9925 kvm_rax_write(vcpu
, regs
->rax
);
9926 kvm_rbx_write(vcpu
, regs
->rbx
);
9927 kvm_rcx_write(vcpu
, regs
->rcx
);
9928 kvm_rdx_write(vcpu
, regs
->rdx
);
9929 kvm_rsi_write(vcpu
, regs
->rsi
);
9930 kvm_rdi_write(vcpu
, regs
->rdi
);
9931 kvm_rsp_write(vcpu
, regs
->rsp
);
9932 kvm_rbp_write(vcpu
, regs
->rbp
);
9933 #ifdef CONFIG_X86_64
9934 kvm_r8_write(vcpu
, regs
->r8
);
9935 kvm_r9_write(vcpu
, regs
->r9
);
9936 kvm_r10_write(vcpu
, regs
->r10
);
9937 kvm_r11_write(vcpu
, regs
->r11
);
9938 kvm_r12_write(vcpu
, regs
->r12
);
9939 kvm_r13_write(vcpu
, regs
->r13
);
9940 kvm_r14_write(vcpu
, regs
->r14
);
9941 kvm_r15_write(vcpu
, regs
->r15
);
9944 kvm_rip_write(vcpu
, regs
->rip
);
9945 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
9947 vcpu
->arch
.exception
.pending
= false;
9949 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9952 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
9955 __set_regs(vcpu
, regs
);
9960 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
9962 struct kvm_segment cs
;
9964 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
9968 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
9970 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
9974 if (vcpu
->arch
.guest_state_protected
)
9975 goto skip_protected_regs
;
9977 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
9978 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
9979 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
9980 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
9981 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
9982 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
9984 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
9985 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
9987 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
9988 sregs
->idt
.limit
= dt
.size
;
9989 sregs
->idt
.base
= dt
.address
;
9990 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
9991 sregs
->gdt
.limit
= dt
.size
;
9992 sregs
->gdt
.base
= dt
.address
;
9994 sregs
->cr2
= vcpu
->arch
.cr2
;
9995 sregs
->cr3
= kvm_read_cr3(vcpu
);
9997 skip_protected_regs
:
9998 sregs
->cr0
= kvm_read_cr0(vcpu
);
9999 sregs
->cr4
= kvm_read_cr4(vcpu
);
10000 sregs
->cr8
= kvm_get_cr8(vcpu
);
10001 sregs
->efer
= vcpu
->arch
.efer
;
10002 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
10004 memset(sregs
->interrupt_bitmap
, 0, sizeof(sregs
->interrupt_bitmap
));
10006 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
10007 set_bit(vcpu
->arch
.interrupt
.nr
,
10008 (unsigned long *)sregs
->interrupt_bitmap
);
10011 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
10012 struct kvm_sregs
*sregs
)
10015 __get_sregs(vcpu
, sregs
);
10020 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
10021 struct kvm_mp_state
*mp_state
)
10024 if (kvm_mpx_supported())
10025 kvm_load_guest_fpu(vcpu
);
10027 kvm_apic_accept_events(vcpu
);
10028 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
10029 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
10030 vcpu
->arch
.pv
.pv_unhalted
)
10031 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
10033 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
10035 if (kvm_mpx_supported())
10036 kvm_put_guest_fpu(vcpu
);
10041 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
10042 struct kvm_mp_state
*mp_state
)
10048 if (!lapic_in_kernel(vcpu
) &&
10049 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
10053 * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10054 * INIT state; latched init should be reported using
10055 * KVM_SET_VCPU_EVENTS, so reject it here.
10057 if ((kvm_vcpu_latch_init(vcpu
) || vcpu
->arch
.smi_pending
) &&
10058 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
10059 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
10062 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
10063 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
10064 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
10066 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
10067 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10075 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
10076 int reason
, bool has_error_code
, u32 error_code
)
10078 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
10081 init_emulate_ctxt(vcpu
);
10083 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
10084 has_error_code
, error_code
);
10086 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
10087 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
10088 vcpu
->run
->internal
.ndata
= 0;
10092 kvm_rip_write(vcpu
, ctxt
->eip
);
10093 kvm_set_rflags(vcpu
, ctxt
->eflags
);
10096 EXPORT_SYMBOL_GPL(kvm_task_switch
);
10098 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10100 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
10102 * When EFER.LME and CR0.PG are set, the processor is in
10103 * 64-bit mode (though maybe in a 32-bit code segment).
10104 * CR4.PAE and EFER.LMA must be set.
10106 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
10108 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
10112 * Not in 64-bit mode: EFER.LMA is clear and the code
10113 * segment cannot be 64-bit.
10115 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
10119 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
);
10122 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
10124 struct msr_data apic_base_msr
;
10125 int mmu_reset_needed
= 0;
10126 int pending_vec
, max_bits
, idx
;
10127 struct desc_ptr dt
;
10130 if (!kvm_is_valid_sregs(vcpu
, sregs
))
10133 apic_base_msr
.data
= sregs
->apic_base
;
10134 apic_base_msr
.host_initiated
= true;
10135 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
10138 if (vcpu
->arch
.guest_state_protected
)
10139 goto skip_protected_regs
;
10141 dt
.size
= sregs
->idt
.limit
;
10142 dt
.address
= sregs
->idt
.base
;
10143 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
10144 dt
.size
= sregs
->gdt
.limit
;
10145 dt
.address
= sregs
->gdt
.base
;
10146 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
10148 vcpu
->arch
.cr2
= sregs
->cr2
;
10149 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
10150 vcpu
->arch
.cr3
= sregs
->cr3
;
10151 kvm_register_mark_available(vcpu
, VCPU_EXREG_CR3
);
10153 kvm_set_cr8(vcpu
, sregs
->cr8
);
10155 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
10156 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
10158 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
10159 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
10160 vcpu
->arch
.cr0
= sregs
->cr0
;
10162 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
10163 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
10165 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10166 if (is_pae_paging(vcpu
)) {
10167 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
10168 mmu_reset_needed
= 1;
10170 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10172 if (mmu_reset_needed
)
10173 kvm_mmu_reset_context(vcpu
);
10175 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
10176 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
10177 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
10178 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
10179 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
10180 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
10182 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
10183 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
10185 update_cr8_intercept(vcpu
);
10187 /* Older userspace won't unhalt the vcpu on reset. */
10188 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
10189 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
10190 !is_protmode(vcpu
))
10191 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10193 skip_protected_regs
:
10194 max_bits
= KVM_NR_INTERRUPTS
;
10195 pending_vec
= find_first_bit(
10196 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
10197 if (pending_vec
< max_bits
) {
10198 kvm_queue_interrupt(vcpu
, pending_vec
, false);
10199 pr_debug("Set back pending irq %d\n", pending_vec
);
10202 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10209 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
10210 struct kvm_sregs
*sregs
)
10215 ret
= __set_sregs(vcpu
, sregs
);
10220 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
10221 struct kvm_guest_debug
*dbg
)
10223 unsigned long rflags
;
10226 if (vcpu
->arch
.guest_state_protected
)
10231 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
10233 if (vcpu
->arch
.exception
.pending
)
10235 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
10236 kvm_queue_exception(vcpu
, DB_VECTOR
);
10238 kvm_queue_exception(vcpu
, BP_VECTOR
);
10242 * Read rflags as long as potentially injected trace flags are still
10245 rflags
= kvm_get_rflags(vcpu
);
10247 vcpu
->guest_debug
= dbg
->control
;
10248 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
10249 vcpu
->guest_debug
= 0;
10251 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
10252 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
10253 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
10254 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
10256 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
10257 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
10259 kvm_update_dr7(vcpu
);
10261 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
10262 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
10265 * Trigger an rflags update that will inject or remove the trace
10268 kvm_set_rflags(vcpu
, rflags
);
10270 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
10280 * Translate a guest virtual address to a guest physical address.
10282 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
10283 struct kvm_translation
*tr
)
10285 unsigned long vaddr
= tr
->linear_address
;
10291 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10292 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
10293 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10294 tr
->physical_address
= gpa
;
10295 tr
->valid
= gpa
!= UNMAPPED_GVA
;
10303 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10305 struct fxregs_state
*fxsave
;
10307 if (!vcpu
->arch
.guest_fpu
)
10312 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10313 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
10314 fpu
->fcw
= fxsave
->cwd
;
10315 fpu
->fsw
= fxsave
->swd
;
10316 fpu
->ftwx
= fxsave
->twd
;
10317 fpu
->last_opcode
= fxsave
->fop
;
10318 fpu
->last_ip
= fxsave
->rip
;
10319 fpu
->last_dp
= fxsave
->rdp
;
10320 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
10326 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
10328 struct fxregs_state
*fxsave
;
10330 if (!vcpu
->arch
.guest_fpu
)
10335 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
10337 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
10338 fxsave
->cwd
= fpu
->fcw
;
10339 fxsave
->swd
= fpu
->fsw
;
10340 fxsave
->twd
= fpu
->ftwx
;
10341 fxsave
->fop
= fpu
->last_opcode
;
10342 fxsave
->rip
= fpu
->last_ip
;
10343 fxsave
->rdp
= fpu
->last_dp
;
10344 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
10350 static void store_regs(struct kvm_vcpu
*vcpu
)
10352 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
10354 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
10355 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10357 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
10358 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
10360 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
10361 kvm_vcpu_ioctl_x86_get_vcpu_events(
10362 vcpu
, &vcpu
->run
->s
.regs
.events
);
10365 static int sync_regs(struct kvm_vcpu
*vcpu
)
10367 if (vcpu
->run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)
10370 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
10371 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
10372 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
10374 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
10375 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
10377 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
10379 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
10380 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10381 vcpu
, &vcpu
->run
->s
.regs
.events
))
10383 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
10389 static void fx_init(struct kvm_vcpu
*vcpu
)
10391 if (!vcpu
->arch
.guest_fpu
)
10394 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
10395 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10396 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
10397 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
10400 * Ensure guest xcr0 is valid for loading
10402 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10404 vcpu
->arch
.cr0
|= X86_CR0_ET
;
10407 void kvm_free_guest_fpu(struct kvm_vcpu
*vcpu
)
10409 if (vcpu
->arch
.guest_fpu
) {
10410 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.guest_fpu
);
10411 vcpu
->arch
.guest_fpu
= NULL
;
10414 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu
);
10416 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
10418 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
10419 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10420 "guest TSC will not be reliable\n");
10425 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
10430 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
10431 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
10433 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
10435 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
10437 r
= kvm_mmu_create(vcpu
);
10441 if (irqchip_in_kernel(vcpu
->kvm
)) {
10442 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
10444 goto fail_mmu_destroy
;
10445 if (kvm_apicv_activated(vcpu
->kvm
))
10446 vcpu
->arch
.apicv_active
= true;
10448 static_branch_inc(&kvm_has_noapic_vcpu
);
10452 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
10454 goto fail_free_lapic
;
10455 vcpu
->arch
.pio_data
= page_address(page
);
10457 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
10458 GFP_KERNEL_ACCOUNT
);
10459 if (!vcpu
->arch
.mce_banks
)
10460 goto fail_free_pio_data
;
10461 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
10463 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
10464 GFP_KERNEL_ACCOUNT
))
10465 goto fail_free_mce_banks
;
10467 if (!alloc_emulate_ctxt(vcpu
))
10468 goto free_wbinvd_dirty_mask
;
10470 vcpu
->arch
.user_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10471 GFP_KERNEL_ACCOUNT
);
10472 if (!vcpu
->arch
.user_fpu
) {
10473 pr_err("kvm: failed to allocate userspace's fpu\n");
10474 goto free_emulate_ctxt
;
10477 vcpu
->arch
.guest_fpu
= kmem_cache_zalloc(x86_fpu_cache
,
10478 GFP_KERNEL_ACCOUNT
);
10479 if (!vcpu
->arch
.guest_fpu
) {
10480 pr_err("kvm: failed to allocate vcpu's fpu\n");
10481 goto free_user_fpu
;
10485 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
10486 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
10488 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
10490 kvm_async_pf_hash_reset(vcpu
);
10491 kvm_pmu_init(vcpu
);
10493 vcpu
->arch
.pending_external_vector
= -1;
10494 vcpu
->arch
.preempted_in_kernel
= false;
10496 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
10498 goto free_guest_fpu
;
10500 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
10501 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
10502 kvm_vcpu_mtrr_init(vcpu
);
10504 kvm_vcpu_reset(vcpu
, false);
10505 kvm_init_mmu(vcpu
, false);
10510 kvm_free_guest_fpu(vcpu
);
10512 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10514 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10515 free_wbinvd_dirty_mask
:
10516 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10517 fail_free_mce_banks
:
10518 kfree(vcpu
->arch
.mce_banks
);
10519 fail_free_pio_data
:
10520 free_page((unsigned long)vcpu
->arch
.pio_data
);
10522 kvm_free_lapic(vcpu
);
10524 kvm_mmu_destroy(vcpu
);
10528 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
10530 struct kvm
*kvm
= vcpu
->kvm
;
10532 if (mutex_lock_killable(&vcpu
->mutex
))
10535 kvm_synchronize_tsc(vcpu
, 0);
10538 /* poll control enabled by default */
10539 vcpu
->arch
.msr_kvm_poll_control
= 1;
10541 mutex_unlock(&vcpu
->mutex
);
10543 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
10544 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
10545 KVMCLOCK_SYNC_PERIOD
);
10548 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
10552 kvmclock_reset(vcpu
);
10554 static_call(kvm_x86_vcpu_free
)(vcpu
);
10556 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
10557 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
10558 kmem_cache_free(x86_fpu_cache
, vcpu
->arch
.user_fpu
);
10559 kvm_free_guest_fpu(vcpu
);
10561 kvm_hv_vcpu_uninit(vcpu
);
10562 kvm_pmu_destroy(vcpu
);
10563 kfree(vcpu
->arch
.mce_banks
);
10564 kvm_free_lapic(vcpu
);
10565 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
10566 kvm_mmu_destroy(vcpu
);
10567 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
10568 free_page((unsigned long)vcpu
->arch
.pio_data
);
10569 kvfree(vcpu
->arch
.cpuid_entries
);
10570 if (!lapic_in_kernel(vcpu
))
10571 static_branch_dec(&kvm_has_noapic_vcpu
);
10574 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
10576 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
10578 kvm_lapic_reset(vcpu
, init_event
);
10580 vcpu
->arch
.hflags
= 0;
10582 vcpu
->arch
.smi_pending
= 0;
10583 vcpu
->arch
.smi_count
= 0;
10584 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
10585 vcpu
->arch
.nmi_pending
= 0;
10586 vcpu
->arch
.nmi_injected
= false;
10587 kvm_clear_interrupt_queue(vcpu
);
10588 kvm_clear_exception_queue(vcpu
);
10590 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
10591 kvm_update_dr0123(vcpu
);
10592 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
10593 vcpu
->arch
.dr7
= DR7_FIXED_1
;
10594 kvm_update_dr7(vcpu
);
10596 vcpu
->arch
.cr2
= 0;
10598 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10599 vcpu
->arch
.apf
.msr_en_val
= 0;
10600 vcpu
->arch
.apf
.msr_int_val
= 0;
10601 vcpu
->arch
.st
.msr_val
= 0;
10603 kvmclock_reset(vcpu
);
10605 kvm_clear_async_pf_completion_queue(vcpu
);
10606 kvm_async_pf_hash_reset(vcpu
);
10607 vcpu
->arch
.apf
.halted
= false;
10609 if (vcpu
->arch
.guest_fpu
&& kvm_mpx_supported()) {
10610 void *mpx_state_buffer
;
10613 * To avoid have the INIT path from kvm_apic_has_events() that be
10614 * called with loaded FPU and does not let userspace fix the state.
10617 kvm_put_guest_fpu(vcpu
);
10618 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10620 if (mpx_state_buffer
)
10621 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
10622 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
10624 if (mpx_state_buffer
)
10625 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
10627 kvm_load_guest_fpu(vcpu
);
10631 kvm_pmu_reset(vcpu
);
10632 vcpu
->arch
.smbase
= 0x30000;
10634 vcpu
->arch
.msr_misc_features_enables
= 0;
10636 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
10639 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
10640 vcpu
->arch
.regs_avail
= ~0;
10641 vcpu
->arch
.regs_dirty
= ~0;
10643 vcpu
->arch
.ia32_xss
= 0;
10645 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
10647 vcpu
->arch
.cr3
= 0;
10648 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
10651 * Reset the MMU context if paging was enabled prior to INIT (which is
10652 * implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
10653 * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
10654 * checked because it is unconditionally cleared on INIT and all other
10655 * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
10656 * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
10658 if (old_cr0
& X86_CR0_PG
)
10659 kvm_mmu_reset_context(vcpu
);
10662 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
10664 struct kvm_segment cs
;
10666 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10667 cs
.selector
= vector
<< 8;
10668 cs
.base
= vector
<< 12;
10669 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
10670 kvm_rip_write(vcpu
, 0);
10672 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
10674 int kvm_arch_hardware_enable(void)
10677 struct kvm_vcpu
*vcpu
;
10682 bool stable
, backwards_tsc
= false;
10684 kvm_user_return_msr_cpu_online();
10685 ret
= static_call(kvm_x86_hardware_enable
)();
10689 local_tsc
= rdtsc();
10690 stable
= !kvm_check_tsc_unstable();
10691 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10692 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10693 if (!stable
&& vcpu
->cpu
== smp_processor_id())
10694 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
10695 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
10696 backwards_tsc
= true;
10697 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
10698 max_tsc
= vcpu
->arch
.last_host_tsc
;
10704 * Sometimes, even reliable TSCs go backwards. This happens on
10705 * platforms that reset TSC during suspend or hibernate actions, but
10706 * maintain synchronization. We must compensate. Fortunately, we can
10707 * detect that condition here, which happens early in CPU bringup,
10708 * before any KVM threads can be running. Unfortunately, we can't
10709 * bring the TSCs fully up to date with real time, as we aren't yet far
10710 * enough into CPU bringup that we know how much real time has actually
10711 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
10712 * variables that haven't been updated yet.
10714 * So we simply find the maximum observed TSC above, then record the
10715 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
10716 * the adjustment will be applied. Note that we accumulate
10717 * adjustments, in case multiple suspend cycles happen before some VCPU
10718 * gets a chance to run again. In the event that no KVM threads get a
10719 * chance to run, we will miss the entire elapsed period, as we'll have
10720 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
10721 * loose cycle time. This isn't too big a deal, since the loss will be
10722 * uniform across all VCPUs (not to mention the scenario is extremely
10723 * unlikely). It is possible that a second hibernate recovery happens
10724 * much faster than a first, causing the observed TSC here to be
10725 * smaller; this would require additional padding adjustment, which is
10726 * why we set last_host_tsc to the local tsc observed here.
10728 * N.B. - this code below runs only on platforms with reliable TSC,
10729 * as that is the only way backwards_tsc is set above. Also note
10730 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
10731 * have the same delta_cyc adjustment applied if backwards_tsc
10732 * is detected. Note further, this adjustment is only done once,
10733 * as we reset last_host_tsc on all VCPUs to stop this from being
10734 * called multiple times (one for each physical CPU bringup).
10736 * Platforms with unreliable TSCs don't have to deal with this, they
10737 * will be compensated by the logic in vcpu_load, which sets the TSC to
10738 * catchup mode. This will catchup all VCPUs to real time, but cannot
10739 * guarantee that they stay in perfect synchronization.
10741 if (backwards_tsc
) {
10742 u64 delta_cyc
= max_tsc
- local_tsc
;
10743 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
10744 kvm
->arch
.backwards_tsc_observed
= true;
10745 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10746 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
10747 vcpu
->arch
.last_host_tsc
= local_tsc
;
10748 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
10752 * We have to disable TSC offset matching.. if you were
10753 * booting a VM while issuing an S4 host suspend....
10754 * you may have some problem. Solving this issue is
10755 * left as an exercise to the reader.
10757 kvm
->arch
.last_tsc_nsec
= 0;
10758 kvm
->arch
.last_tsc_write
= 0;
10765 void kvm_arch_hardware_disable(void)
10767 static_call(kvm_x86_hardware_disable
)();
10768 drop_user_return_notifiers();
10771 int kvm_arch_hardware_setup(void *opaque
)
10773 struct kvm_x86_init_ops
*ops
= opaque
;
10776 rdmsrl_safe(MSR_EFER
, &host_efer
);
10778 if (boot_cpu_has(X86_FEATURE_XSAVES
))
10779 rdmsrl(MSR_IA32_XSS
, host_xss
);
10781 r
= ops
->hardware_setup();
10785 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
10786 kvm_ops_static_call_update();
10788 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
10791 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
10792 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
10793 #undef __kvm_cpu_cap_has
10795 if (kvm_has_tsc_control
) {
10797 * Make sure the user can only configure tsc_khz values that
10798 * fit into a signed integer.
10799 * A min value is not calculated because it will always
10800 * be 1 on all machines.
10802 u64 max
= min(0x7fffffffULL
,
10803 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
10804 kvm_max_guest_tsc_khz
= max
;
10806 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
10809 kvm_init_msr_list();
10813 void kvm_arch_hardware_unsetup(void)
10815 static_call(kvm_x86_hardware_unsetup
)();
10818 int kvm_arch_check_processor_compat(void *opaque
)
10820 struct cpuinfo_x86
*c
= &cpu_data(smp_processor_id());
10821 struct kvm_x86_init_ops
*ops
= opaque
;
10823 WARN_ON(!irqs_disabled());
10825 if (__cr4_reserved_bits(cpu_has
, c
) !=
10826 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
10829 return ops
->check_processor_compatibility();
10832 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
10834 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
10836 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
10838 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
10840 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
10843 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
10844 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
10846 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
10848 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
10850 vcpu
->arch
.l1tf_flush_l1d
= true;
10851 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
10852 pmu
->need_cleanup
= true;
10853 kvm_make_request(KVM_REQ_PMU
, vcpu
);
10855 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
10858 void kvm_arch_free_vm(struct kvm
*kvm
)
10860 kfree(to_kvm_hv(kvm
)->hv_pa_pg
);
10865 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
10872 ret
= kvm_page_track_init(kvm
);
10876 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
10877 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
10878 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
10879 INIT_LIST_HEAD(&kvm
->arch
.lpage_disallowed_mmu_pages
);
10880 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
10881 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
10883 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
10884 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
10885 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
10886 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
10887 &kvm
->arch
.irq_sources_bitmap
);
10889 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
10890 mutex_init(&kvm
->arch
.apic_map_lock
);
10891 raw_spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
10893 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
10894 pvclock_update_vm_gtod_copy(kvm
);
10896 kvm
->arch
.guest_can_read_msr_platform_info
= true;
10898 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
10899 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
10901 kvm_hv_init_vm(kvm
);
10902 kvm_mmu_init_vm(kvm
);
10904 return static_call(kvm_x86_vm_init
)(kvm
);
10907 int kvm_arch_post_init_vm(struct kvm
*kvm
)
10909 return kvm_mmu_post_init_vm(kvm
);
10912 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
10915 kvm_mmu_unload(vcpu
);
10919 static void kvm_free_vcpus(struct kvm
*kvm
)
10922 struct kvm_vcpu
*vcpu
;
10925 * Unpin any mmu pages first.
10927 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
10928 kvm_clear_async_pf_completion_queue(vcpu
);
10929 kvm_unload_vcpu_mmu(vcpu
);
10931 kvm_for_each_vcpu(i
, vcpu
, kvm
)
10932 kvm_vcpu_destroy(vcpu
);
10934 mutex_lock(&kvm
->lock
);
10935 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
10936 kvm
->vcpus
[i
] = NULL
;
10938 atomic_set(&kvm
->online_vcpus
, 0);
10939 mutex_unlock(&kvm
->lock
);
10942 void kvm_arch_sync_events(struct kvm
*kvm
)
10944 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
10945 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
10949 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
10952 * __x86_set_memory_region: Setup KVM internal memory slot
10954 * @kvm: the kvm pointer to the VM.
10955 * @id: the slot ID to setup.
10956 * @gpa: the GPA to install the slot (unused when @size == 0).
10957 * @size: the size of the slot. Set to zero to uninstall a slot.
10959 * This function helps to setup a KVM internal memory slot. Specify
10960 * @size > 0 to install a new slot, while @size == 0 to uninstall a
10961 * slot. The return code can be one of the following:
10963 * HVA: on success (uninstall will return a bogus HVA)
10966 * The caller should always use IS_ERR() to check the return value
10967 * before use. Note, the KVM internal memory slots are guaranteed to
10968 * remain valid and unchanged until the VM is destroyed, i.e., the
10969 * GPA->HVA translation will not change. However, the HVA is a user
10970 * address, i.e. its accessibility is not guaranteed, and must be
10971 * accessed via __copy_{to,from}_user().
10973 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
10977 unsigned long hva
, old_npages
;
10978 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
10979 struct kvm_memory_slot
*slot
;
10981 /* Called with kvm->slots_lock held. */
10982 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
10983 return ERR_PTR_USR(-EINVAL
);
10985 slot
= id_to_memslot(slots
, id
);
10987 if (slot
&& slot
->npages
)
10988 return ERR_PTR_USR(-EEXIST
);
10991 * MAP_SHARED to prevent internal slot pages from being moved
10994 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
10995 MAP_SHARED
| MAP_ANONYMOUS
, 0);
10996 if (IS_ERR((void *)hva
))
10997 return (void __user
*)hva
;
10999 if (!slot
|| !slot
->npages
)
11002 old_npages
= slot
->npages
;
11003 hva
= slot
->userspace_addr
;
11006 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
11007 struct kvm_userspace_memory_region m
;
11009 m
.slot
= id
| (i
<< 16);
11011 m
.guest_phys_addr
= gpa
;
11012 m
.userspace_addr
= hva
;
11013 m
.memory_size
= size
;
11014 r
= __kvm_set_memory_region(kvm
, &m
);
11016 return ERR_PTR_USR(r
);
11020 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
11022 return (void __user
*)hva
;
11024 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
11026 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
11028 kvm_mmu_pre_destroy_vm(kvm
);
11031 void kvm_arch_destroy_vm(struct kvm
*kvm
)
11033 if (current
->mm
== kvm
->mm
) {
11035 * Free memory regions allocated on behalf of userspace,
11036 * unless the the memory map has changed due to process exit
11039 mutex_lock(&kvm
->slots_lock
);
11040 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
11042 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
11044 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
11045 mutex_unlock(&kvm
->slots_lock
);
11047 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
11048 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
11049 kvm_pic_destroy(kvm
);
11050 kvm_ioapic_destroy(kvm
);
11051 kvm_free_vcpus(kvm
);
11052 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
11053 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
11054 kvm_mmu_uninit_vm(kvm
);
11055 kvm_page_track_cleanup(kvm
);
11056 kvm_xen_destroy_vm(kvm
);
11057 kvm_hv_destroy_vm(kvm
);
11060 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
11064 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11065 kvfree(slot
->arch
.rmap
[i
]);
11066 slot
->arch
.rmap
[i
] = NULL
;
11071 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11072 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11075 kvm_page_track_free_memslot(slot
);
11078 static int kvm_alloc_memslot_metadata(struct kvm_memory_slot
*slot
,
11079 unsigned long npages
)
11084 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
11085 * old arrays will be freed by __kvm_set_memory_region() if installing
11086 * the new memslot is successful.
11088 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
11090 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11091 struct kvm_lpage_info
*linfo
;
11092 unsigned long ugfn
;
11096 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
11097 slot
->base_gfn
, level
) + 1;
11099 slot
->arch
.rmap
[i
] =
11100 kvcalloc(lpages
, sizeof(*slot
->arch
.rmap
[i
]),
11101 GFP_KERNEL_ACCOUNT
);
11102 if (!slot
->arch
.rmap
[i
])
11107 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
11111 slot
->arch
.lpage_info
[i
- 1] = linfo
;
11113 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
11114 linfo
[0].disallow_lpage
= 1;
11115 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
11116 linfo
[lpages
- 1].disallow_lpage
= 1;
11117 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
11119 * If the gfn and userspace address are not aligned wrt each
11120 * other, disable large page support for this slot.
11122 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
11125 for (j
= 0; j
< lpages
; ++j
)
11126 linfo
[j
].disallow_lpage
= 1;
11130 if (kvm_page_track_create_memslot(slot
, npages
))
11136 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
11137 kvfree(slot
->arch
.rmap
[i
]);
11138 slot
->arch
.rmap
[i
] = NULL
;
11142 kvfree(slot
->arch
.lpage_info
[i
- 1]);
11143 slot
->arch
.lpage_info
[i
- 1] = NULL
;
11148 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
11150 struct kvm_vcpu
*vcpu
;
11154 * memslots->generation has been incremented.
11155 * mmio generation may have reached its maximum value.
11157 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
11159 /* Force re-initialization of steal_time cache */
11160 kvm_for_each_vcpu(i
, vcpu
, kvm
)
11161 kvm_vcpu_kick(vcpu
);
11164 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
11165 struct kvm_memory_slot
*memslot
,
11166 const struct kvm_userspace_memory_region
*mem
,
11167 enum kvm_mr_change change
)
11169 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
)
11170 return kvm_alloc_memslot_metadata(memslot
,
11171 mem
->memory_size
>> PAGE_SHIFT
);
11176 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
11178 struct kvm_arch
*ka
= &kvm
->arch
;
11180 if (!kvm_x86_ops
.cpu_dirty_log_size
)
11183 if ((enable
&& ++ka
->cpu_dirty_logging_count
== 1) ||
11184 (!enable
&& --ka
->cpu_dirty_logging_count
== 0))
11185 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
11187 WARN_ON_ONCE(ka
->cpu_dirty_logging_count
< 0);
11190 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
11191 struct kvm_memory_slot
*old
,
11192 struct kvm_memory_slot
*new,
11193 enum kvm_mr_change change
)
11195 bool log_dirty_pages
= new->flags
& KVM_MEM_LOG_DIRTY_PAGES
;
11198 * Update CPU dirty logging if dirty logging is being toggled. This
11199 * applies to all operations.
11201 if ((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
11202 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
11205 * Nothing more to do for RO slots (which can't be dirtied and can't be
11206 * made writable) or CREATE/MOVE/DELETE of a slot.
11208 * For a memslot with dirty logging disabled:
11209 * CREATE: No dirty mappings will already exist.
11210 * MOVE/DELETE: The old mappings will already have been cleaned up by
11211 * kvm_arch_flush_shadow_memslot()
11213 * For a memslot with dirty logging enabled:
11214 * CREATE: No shadow pages exist, thus nothing to write-protect
11215 * and no dirty bits to clear.
11216 * MOVE/DELETE: The old mappings will already have been cleaned up by
11217 * kvm_arch_flush_shadow_memslot().
11219 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new->flags
& KVM_MEM_READONLY
))
11223 * READONLY and non-flags changes were filtered out above, and the only
11224 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11225 * logging isn't being toggled on or off.
11227 if (WARN_ON_ONCE(!((old
->flags
^ new->flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
11230 if (!log_dirty_pages
) {
11232 * Dirty logging tracks sptes in 4k granularity, meaning that
11233 * large sptes have to be split. If live migration succeeds,
11234 * the guest in the source machine will be destroyed and large
11235 * sptes will be created in the destination. However, if the
11236 * guest continues to run in the source machine (for example if
11237 * live migration fails), small sptes will remain around and
11238 * cause bad performance.
11240 * Scan sptes if dirty logging has been stopped, dropping those
11241 * which can be collapsed into a single large-page spte. Later
11242 * page faults will create the large-page sptes.
11244 kvm_mmu_zap_collapsible_sptes(kvm
, new);
11246 /* By default, write-protect everything to log writes. */
11247 int level
= PG_LEVEL_4K
;
11249 if (kvm_x86_ops
.cpu_dirty_log_size
) {
11251 * Clear all dirty bits, unless pages are treated as
11252 * dirty from the get-go.
11254 if (!kvm_dirty_log_manual_protect_and_init_set(kvm
))
11255 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
11258 * Write-protect large pages on write so that dirty
11259 * logging happens at 4k granularity. No need to
11260 * write-protect small SPTEs since write accesses are
11261 * logged by the CPU via dirty bits.
11263 level
= PG_LEVEL_2M
;
11264 } else if (kvm_dirty_log_manual_protect_and_init_set(kvm
)) {
11266 * If we're with initial-all-set, we don't need
11267 * to write protect any small page because
11268 * they're reported as dirty already. However
11269 * we still need to write-protect huge pages
11270 * so that the page split can happen lazily on
11271 * the first write to the huge page.
11273 level
= PG_LEVEL_2M
;
11275 kvm_mmu_slot_remove_write_access(kvm
, new, level
);
11279 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
11280 const struct kvm_userspace_memory_region
*mem
,
11281 struct kvm_memory_slot
*old
,
11282 const struct kvm_memory_slot
*new,
11283 enum kvm_mr_change change
)
11285 if (!kvm
->arch
.n_requested_mmu_pages
)
11286 kvm_mmu_change_mmu_pages(kvm
,
11287 kvm_mmu_calculate_default_mmu_pages(kvm
));
11290 * FIXME: const-ify all uses of struct kvm_memory_slot.
11292 kvm_mmu_slot_apply_flags(kvm
, old
, (struct kvm_memory_slot
*) new, change
);
11294 /* Free the arrays associated with the old memslot. */
11295 if (change
== KVM_MR_MOVE
)
11296 kvm_arch_free_memslot(kvm
, old
);
11299 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
11301 kvm_mmu_zap_all(kvm
);
11304 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
11305 struct kvm_memory_slot
*slot
)
11307 kvm_page_track_flush_slot(kvm
, slot
);
11310 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
11312 return (is_guest_mode(vcpu
) &&
11313 kvm_x86_ops
.guest_apic_has_interrupt
&&
11314 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
11317 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
11319 if (!list_empty_careful(&vcpu
->async_pf
.done
))
11322 if (kvm_apic_has_events(vcpu
))
11325 if (vcpu
->arch
.pv
.pv_unhalted
)
11328 if (vcpu
->arch
.exception
.pending
)
11331 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11332 (vcpu
->arch
.nmi_pending
&&
11333 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
11336 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11337 (vcpu
->arch
.smi_pending
&&
11338 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
11341 if (kvm_arch_interrupt_allowed(vcpu
) &&
11342 (kvm_cpu_has_interrupt(vcpu
) ||
11343 kvm_guest_apic_has_interrupt(vcpu
)))
11346 if (kvm_hv_has_stimer_pending(vcpu
))
11349 if (is_guest_mode(vcpu
) &&
11350 kvm_x86_ops
.nested_ops
->hv_timer_pending
&&
11351 kvm_x86_ops
.nested_ops
->hv_timer_pending(vcpu
))
11357 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
11359 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
11362 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
11364 if (vcpu
->arch
.apicv_active
&& static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
11370 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
11372 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
11375 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
11376 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
11377 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
11380 return kvm_arch_dy_has_pending_interrupt(vcpu
);
11383 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
11385 if (vcpu
->arch
.guest_state_protected
)
11388 return vcpu
->arch
.preempted_in_kernel
;
11391 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
11393 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
11396 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
11398 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
11401 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
11403 /* Can't read the RIP when guest state is protected, just return 0 */
11404 if (vcpu
->arch
.guest_state_protected
)
11407 if (is_64_bit_mode(vcpu
))
11408 return kvm_rip_read(vcpu
);
11409 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
11410 kvm_rip_read(vcpu
));
11412 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
11414 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
11416 return kvm_get_linear_rip(vcpu
) == linear_rip
;
11418 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
11420 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
11422 unsigned long rflags
;
11424 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
11425 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11426 rflags
&= ~X86_EFLAGS_TF
;
11429 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
11431 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11433 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
11434 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
11435 rflags
|= X86_EFLAGS_TF
;
11436 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
11439 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
11441 __kvm_set_rflags(vcpu
, rflags
);
11442 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11444 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
11446 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
11450 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
11454 r
= kvm_mmu_reload(vcpu
);
11458 if (!vcpu
->arch
.mmu
->direct_map
&&
11459 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_guest_pgd(vcpu
))
11462 kvm_mmu_do_page_fault(vcpu
, work
->cr2_or_gpa
, 0, true);
11465 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
11467 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
11469 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
11472 static inline u32
kvm_async_pf_next_probe(u32 key
)
11474 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
11477 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11479 u32 key
= kvm_async_pf_hash_fn(gfn
);
11481 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
11482 key
= kvm_async_pf_next_probe(key
);
11484 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
11487 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11490 u32 key
= kvm_async_pf_hash_fn(gfn
);
11492 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
11493 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
11494 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
11495 key
= kvm_async_pf_next_probe(key
);
11500 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11502 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
11505 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
11509 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
11511 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
11515 vcpu
->arch
.apf
.gfns
[i
] = ~0;
11517 j
= kvm_async_pf_next_probe(j
);
11518 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
11520 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
11522 * k lies cyclically in ]i,j]
11524 * |....j i.k.| or |.k..j i...|
11526 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
11527 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
11532 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
11534 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
11536 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
11540 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
11542 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11544 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11545 &token
, offset
, sizeof(token
));
11548 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
11550 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
11553 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
11554 &val
, offset
, sizeof(val
)))
11560 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
11562 if (!vcpu
->arch
.apf
.delivery_as_pf_vmexit
&& is_guest_mode(vcpu
))
11565 if (!kvm_pv_async_pf_enabled(vcpu
) ||
11566 (vcpu
->arch
.apf
.send_user_only
&& static_call(kvm_x86_get_cpl
)(vcpu
) == 0))
11572 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
11574 if (unlikely(!lapic_in_kernel(vcpu
) ||
11575 kvm_event_needs_reinjection(vcpu
) ||
11576 vcpu
->arch
.exception
.pending
))
11579 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
11583 * If interrupts are off we cannot even use an artificial
11586 return kvm_arch_interrupt_allowed(vcpu
);
11589 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
11590 struct kvm_async_pf
*work
)
11592 struct x86_exception fault
;
11594 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
11595 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11597 if (kvm_can_deliver_async_pf(vcpu
) &&
11598 !apf_put_user_notpresent(vcpu
)) {
11599 fault
.vector
= PF_VECTOR
;
11600 fault
.error_code_valid
= true;
11601 fault
.error_code
= 0;
11602 fault
.nested_page_fault
= false;
11603 fault
.address
= work
->arch
.token
;
11604 fault
.async_page_fault
= true;
11605 kvm_inject_page_fault(vcpu
, &fault
);
11609 * It is not possible to deliver a paravirtualized asynchronous
11610 * page fault, but putting the guest in an artificial halt state
11611 * can be beneficial nevertheless: if an interrupt arrives, we
11612 * can deliver it timely and perhaps the guest will schedule
11613 * another process. When the instruction that triggered a page
11614 * fault is retried, hopefully the page will be ready in the host.
11616 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
11621 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
11622 struct kvm_async_pf
*work
)
11624 struct kvm_lapic_irq irq
= {
11625 .delivery_mode
= APIC_DM_FIXED
,
11626 .vector
= vcpu
->arch
.apf
.vec
11629 if (work
->wakeup_all
)
11630 work
->arch
.token
= ~0; /* broadcast wakeup */
11632 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
11633 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
11635 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
11636 kvm_pv_async_pf_enabled(vcpu
) &&
11637 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
11638 vcpu
->arch
.apf
.pageready_pending
= true;
11639 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
11642 vcpu
->arch
.apf
.halted
= false;
11643 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11646 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
11648 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
11649 if (!vcpu
->arch
.apf
.pageready_pending
)
11650 kvm_vcpu_kick(vcpu
);
11653 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
11655 if (!kvm_pv_async_pf_enabled(vcpu
))
11658 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
11661 void kvm_arch_start_assignment(struct kvm
*kvm
)
11663 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
11664 static_call_cond(kvm_x86_start_assignment
)(kvm
);
11666 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
11668 void kvm_arch_end_assignment(struct kvm
*kvm
)
11670 atomic_dec(&kvm
->arch
.assigned_device_count
);
11672 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
11674 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
11676 return atomic_read(&kvm
->arch
.assigned_device_count
);
11678 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
11680 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
11682 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
11684 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
11686 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
11688 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
11690 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
11692 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
11694 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
11696 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
11698 bool kvm_arch_has_irq_bypass(void)
11703 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
11704 struct irq_bypass_producer
*prod
)
11706 struct kvm_kernel_irqfd
*irqfd
=
11707 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11710 irqfd
->producer
= prod
;
11711 kvm_arch_start_assignment(irqfd
->kvm
);
11712 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
,
11713 prod
->irq
, irqfd
->gsi
, 1);
11716 kvm_arch_end_assignment(irqfd
->kvm
);
11721 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
11722 struct irq_bypass_producer
*prod
)
11725 struct kvm_kernel_irqfd
*irqfd
=
11726 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
11728 WARN_ON(irqfd
->producer
!= prod
);
11729 irqfd
->producer
= NULL
;
11732 * When producer of consumer is unregistered, we change back to
11733 * remapped mode, so we can re-use the current implementation
11734 * when the irq is masked/disabled or the consumer side (KVM
11735 * int this case doesn't want to receive the interrupts.
11737 ret
= static_call(kvm_x86_update_pi_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
11739 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
11740 " fails: %d\n", irqfd
->consumer
.token
, ret
);
11742 kvm_arch_end_assignment(irqfd
->kvm
);
11745 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
11746 uint32_t guest_irq
, bool set
)
11748 return static_call(kvm_x86_update_pi_irte
)(kvm
, host_irq
, guest_irq
, set
);
11751 bool kvm_vector_hashing_enabled(void)
11753 return vector_hashing
;
11756 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
11758 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
11760 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
11763 int kvm_spec_ctrl_test_value(u64 value
)
11766 * test that setting IA32_SPEC_CTRL to given value
11767 * is allowed by the host processor
11771 unsigned long flags
;
11774 local_irq_save(flags
);
11776 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
11778 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
11781 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
11783 local_irq_restore(flags
);
11787 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
11789 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
11791 struct x86_exception fault
;
11792 u32 access
= error_code
&
11793 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
11795 if (!(error_code
& PFERR_PRESENT_MASK
) ||
11796 vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, &fault
) != UNMAPPED_GVA
) {
11798 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
11799 * tables probably do not match the TLB. Just proceed
11800 * with the error code that the processor gave.
11802 fault
.vector
= PF_VECTOR
;
11803 fault
.error_code_valid
= true;
11804 fault
.error_code
= error_code
;
11805 fault
.nested_page_fault
= false;
11806 fault
.address
= gva
;
11808 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
11810 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
11813 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
11814 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
11815 * indicates whether exit to userspace is needed.
11817 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
11818 struct x86_exception
*e
)
11820 if (r
== X86EMUL_PROPAGATE_FAULT
) {
11821 kvm_inject_emulated_page_fault(vcpu
, e
);
11826 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
11827 * while handling a VMX instruction KVM could've handled the request
11828 * correctly by exiting to userspace and performing I/O but there
11829 * doesn't seem to be a real use-case behind such requests, just return
11830 * KVM_EXIT_INTERNAL_ERROR for now.
11832 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
11833 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
11834 vcpu
->run
->internal
.ndata
= 0;
11838 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
11840 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
11843 struct x86_exception e
;
11845 unsigned long roots_to_free
= 0;
11852 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
11853 if (r
!= X86EMUL_CONTINUE
)
11854 return kvm_handle_memory_failure(vcpu
, r
, &e
);
11856 if (operand
.pcid
>> 12 != 0) {
11857 kvm_inject_gp(vcpu
, 0);
11861 pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
11864 case INVPCID_TYPE_INDIV_ADDR
:
11865 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
11866 is_noncanonical_address(operand
.gla
, vcpu
)) {
11867 kvm_inject_gp(vcpu
, 0);
11870 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
11871 return kvm_skip_emulated_instruction(vcpu
);
11873 case INVPCID_TYPE_SINGLE_CTXT
:
11874 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
11875 kvm_inject_gp(vcpu
, 0);
11879 if (kvm_get_active_pcid(vcpu
) == operand
.pcid
) {
11880 kvm_mmu_sync_roots(vcpu
);
11881 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
11884 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
11885 if (kvm_get_pcid(vcpu
, vcpu
->arch
.mmu
->prev_roots
[i
].pgd
)
11887 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
11889 kvm_mmu_free_roots(vcpu
, vcpu
->arch
.mmu
, roots_to_free
);
11891 * If neither the current cr3 nor any of the prev_roots use the
11892 * given PCID, then nothing needs to be done here because a
11893 * resync will happen anyway before switching to any other CR3.
11896 return kvm_skip_emulated_instruction(vcpu
);
11898 case INVPCID_TYPE_ALL_NON_GLOBAL
:
11900 * Currently, KVM doesn't mark global entries in the shadow
11901 * page tables, so a non-global flush just degenerates to a
11902 * global flush. If needed, we could optimize this later by
11903 * keeping track of global entries in shadow page tables.
11907 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
11908 kvm_make_request(KVM_REQ_MMU_RELOAD
, vcpu
);
11909 return kvm_skip_emulated_instruction(vcpu
);
11912 BUG(); /* We have already checked above that type <= 3 */
11915 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
11917 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
11919 struct kvm_run
*run
= vcpu
->run
;
11920 struct kvm_mmio_fragment
*frag
;
11923 BUG_ON(!vcpu
->mmio_needed
);
11925 /* Complete previous fragment */
11926 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
11927 len
= min(8u, frag
->len
);
11928 if (!vcpu
->mmio_is_write
)
11929 memcpy(frag
->data
, run
->mmio
.data
, len
);
11931 if (frag
->len
<= 8) {
11932 /* Switch to the next fragment. */
11934 vcpu
->mmio_cur_fragment
++;
11936 /* Go forward to the next mmio piece. */
11942 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
11943 vcpu
->mmio_needed
= 0;
11945 // VMG change, at this point, we're always done
11946 // RIP has already been advanced
11950 // More MMIO is needed
11951 run
->mmio
.phys_addr
= frag
->gpa
;
11952 run
->mmio
.len
= min(8u, frag
->len
);
11953 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
11954 if (run
->mmio
.is_write
)
11955 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11956 run
->exit_reason
= KVM_EXIT_MMIO
;
11958 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
11963 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
11967 struct kvm_mmio_fragment
*frag
;
11972 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
11973 if (handled
== bytes
)
11980 /*TODO: Check if need to increment number of frags */
11981 frag
= vcpu
->mmio_fragments
;
11982 vcpu
->mmio_nr_fragments
= 1;
11987 vcpu
->mmio_needed
= 1;
11988 vcpu
->mmio_cur_fragment
= 0;
11990 vcpu
->run
->mmio
.phys_addr
= gpa
;
11991 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
11992 vcpu
->run
->mmio
.is_write
= 1;
11993 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11994 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
11996 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12000 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
12002 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
12006 struct kvm_mmio_fragment
*frag
;
12011 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
12012 if (handled
== bytes
)
12019 /*TODO: Check if need to increment number of frags */
12020 frag
= vcpu
->mmio_fragments
;
12021 vcpu
->mmio_nr_fragments
= 1;
12026 vcpu
->mmio_needed
= 1;
12027 vcpu
->mmio_cur_fragment
= 0;
12029 vcpu
->run
->mmio
.phys_addr
= gpa
;
12030 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
12031 vcpu
->run
->mmio
.is_write
= 0;
12032 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
12034 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
12038 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
12040 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12041 unsigned int port
);
12043 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
12045 int size
= vcpu
->arch
.pio
.size
;
12046 int port
= vcpu
->arch
.pio
.port
;
12048 vcpu
->arch
.pio
.count
= 0;
12049 if (vcpu
->arch
.sev_pio_count
)
12050 return kvm_sev_es_outs(vcpu
, size
, port
);
12054 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
12058 unsigned int count
=
12059 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12060 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
12062 /* memcpy done already by emulator_pio_out. */
12063 vcpu
->arch
.sev_pio_count
-= count
;
12064 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12068 /* Emulation done by the kernel. */
12069 if (!vcpu
->arch
.sev_pio_count
)
12073 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
12077 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12078 unsigned int port
);
12080 static void advance_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12082 unsigned count
= vcpu
->arch
.pio
.count
;
12083 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
12084 vcpu
->arch
.sev_pio_count
-= count
;
12085 vcpu
->arch
.sev_pio_data
+= count
* vcpu
->arch
.pio
.size
;
12088 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
12090 int size
= vcpu
->arch
.pio
.size
;
12091 int port
= vcpu
->arch
.pio
.port
;
12093 advance_sev_es_emulated_ins(vcpu
);
12094 if (vcpu
->arch
.sev_pio_count
)
12095 return kvm_sev_es_ins(vcpu
, size
, port
);
12099 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
12103 unsigned int count
=
12104 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
12105 if (!__emulator_pio_in(vcpu
, size
, port
, count
))
12108 /* Emulation done by the kernel. */
12109 advance_sev_es_emulated_ins(vcpu
);
12110 if (!vcpu
->arch
.sev_pio_count
)
12114 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
12118 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
12119 unsigned int port
, void *data
, unsigned int count
,
12122 vcpu
->arch
.sev_pio_data
= data
;
12123 vcpu
->arch
.sev_pio_count
= count
;
12124 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
12125 : kvm_sev_es_outs(vcpu
, size
, port
);
12127 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
12129 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
12130 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
12131 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
12132 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
12133 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
12134 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
12135 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
12136 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
12137 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
12138 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
12139 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
12140 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
12141 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
12142 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
12143 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
12144 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
12145 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
12146 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
12147 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
12148 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
12149 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
12150 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
12151 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request
);
12152 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
12153 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
12154 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
12155 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);