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1 Silicon Errata and Software Workarounds
2 =======================================
3
4Author: Will Deacon <will.deacon@arm.com>
5Date : 27 November 2015
6
7It is an unfortunate fact of life that hardware is often produced with
8so-called "errata", which can cause it to deviate from the architecture
9under specific circumstances. For hardware produced by ARM, these
10errata are broadly classified into the following categories:
11
12 Category A: A critical error without a viable workaround.
13 Category B: A significant or critical error with an acceptable
14 workaround.
15 Category C: A minor error that is not expected to occur under normal
16 operation.
17
18For more information, consult one of the "Software Developers Errata
19Notice" documents available on infocenter.arm.com (registration
20required).
21
22As far as Linux is concerned, Category B errata may require some special
23treatment in the operating system. For example, avoiding a particular
24sequence of code, or configuring the processor in a particular way. A
25less common situation may require similar actions in order to declassify
26a Category A erratum into a Category C erratum. These are collectively
27known as "software workarounds" and are only required in the minority of
28cases (e.g. those cases that both require a non-secure workaround *and*
29can be triggered by Linux).
30
31For software workarounds that may adversely impact systems unaffected by
32the erratum in question, a Kconfig entry is added under "Kernel
33Features" -> "ARM errata workarounds via the alternatives framework".
34These are enabled by default and patched in at runtime when an affected
35CPU is detected. For less-intrusive workarounds, a Kconfig option is not
36available and the code is structured (preferably with a comment) in such
37a way that the erratum will not be hit.
38
39This approach can make it slightly onerous to determine exactly which
40errata are worked around in an arbitrary kernel source tree, so this
41file acts as a registry of software workarounds in the Linux Kernel and
42will be updated when new workarounds are committed and backported to
43stable kernels.
44
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45| Implementor | Component | Erratum ID | Kconfig |
46+----------------+-----------------+-----------------+-----------------------------+
47| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
48| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
49| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
50| ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
51| ARM | Cortex-A53 | #845719 | ARM64_ERRATUM_845719 |
52| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
53| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
54| ARM | Cortex-A57 | #852523 | N/A |
55| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
56| ARM | Cortex-A72 | #853709 | N/A |
6df5ad7c 57| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
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58| ARM | MMU-500 | #841119,#826419 | N/A |
59| | | | |
60| Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 |
61| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
62| Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 |
63| Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 |
64| Cavium | ThunderX SMMUv2 | #27704 | N/A |
8b760f81 65| Cavium | ThunderX Core | #30115 | CAVIUM_ERRATUM_30115 |
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66| | | | |
67| Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 |
68| | | | |
69| Hisilicon | Hip0{5,6,7} | #161010101 | HISILICON_ERRATUM_161010101 |
70| | | | |
86396f09 71| Qualcomm Tech. | Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
10e260c4 72| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
cc89544a 73| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |