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Commit | Line | Data |
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c21e0bbf MO |
1 | /* |
2 | * CXL Flash Device Driver | |
3 | * | |
4 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation | |
5 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation | |
6 | * | |
7 | * Copyright (C) 2015 IBM Corporation | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * as published by the Free Software Foundation; either version | |
12 | * 2 of the License, or (at your option) any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/delay.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/pci.h> | |
19 | ||
20 | #include <asm/unaligned.h> | |
21 | ||
22 | #include <misc/cxl.h> | |
23 | ||
24 | #include <scsi/scsi_cmnd.h> | |
25 | #include <scsi/scsi_host.h> | |
65be2c79 | 26 | #include <uapi/scsi/cxlflash_ioctl.h> |
c21e0bbf MO |
27 | |
28 | #include "main.h" | |
29 | #include "sislite.h" | |
30 | #include "common.h" | |
31 | ||
32 | MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME); | |
33 | MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>"); | |
34 | MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>"); | |
35 | MODULE_LICENSE("GPL"); | |
36 | ||
c21e0bbf MO |
37 | /** |
38 | * process_cmd_err() - command error handler | |
39 | * @cmd: AFU command that experienced the error. | |
40 | * @scp: SCSI command associated with the AFU command in error. | |
41 | * | |
42 | * Translates error bits from AFU command to SCSI command results. | |
43 | */ | |
44 | static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp) | |
45 | { | |
88d33628 MO |
46 | struct afu *afu = cmd->parent; |
47 | struct cxlflash_cfg *cfg = afu->parent; | |
48 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf MO |
49 | struct sisl_ioarcb *ioarcb; |
50 | struct sisl_ioasa *ioasa; | |
8396012f | 51 | u32 resid; |
c21e0bbf MO |
52 | |
53 | if (unlikely(!cmd)) | |
54 | return; | |
55 | ||
56 | ioarcb = &(cmd->rcb); | |
57 | ioasa = &(cmd->sa); | |
58 | ||
59 | if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { | |
8396012f MO |
60 | resid = ioasa->resid; |
61 | scsi_set_resid(scp, resid); | |
88d33628 MO |
62 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n", |
63 | __func__, cmd, scp, resid); | |
c21e0bbf MO |
64 | } |
65 | ||
66 | if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { | |
88d33628 MO |
67 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n", |
68 | __func__, cmd, scp); | |
c21e0bbf MO |
69 | scp->result = (DID_ERROR << 16); |
70 | } | |
71 | ||
88d33628 MO |
72 | dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x " |
73 | "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__, | |
74 | ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc, | |
75 | ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra); | |
c21e0bbf MO |
76 | |
77 | if (ioasa->rc.scsi_rc) { | |
78 | /* We have a SCSI status */ | |
79 | if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) { | |
80 | memcpy(scp->sense_buffer, ioasa->sense_data, | |
81 | SISL_SENSE_DATA_LEN); | |
82 | scp->result = ioasa->rc.scsi_rc; | |
83 | } else | |
84 | scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16); | |
85 | } | |
86 | ||
87 | /* | |
88 | * We encountered an error. Set scp->result based on nature | |
89 | * of error. | |
90 | */ | |
91 | if (ioasa->rc.fc_rc) { | |
92 | /* We have an FC status */ | |
93 | switch (ioasa->rc.fc_rc) { | |
94 | case SISL_FC_RC_LINKDOWN: | |
95 | scp->result = (DID_REQUEUE << 16); | |
96 | break; | |
97 | case SISL_FC_RC_RESID: | |
98 | /* This indicates an FCP resid underrun */ | |
99 | if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) { | |
100 | /* If the SISL_RC_FLAGS_OVERRUN flag was set, | |
101 | * then we will handle this error else where. | |
102 | * If not then we must handle it here. | |
8396012f | 103 | * This is probably an AFU bug. |
c21e0bbf MO |
104 | */ |
105 | scp->result = (DID_ERROR << 16); | |
106 | } | |
107 | break; | |
108 | case SISL_FC_RC_RESIDERR: | |
109 | /* Resid mismatch between adapter and device */ | |
110 | case SISL_FC_RC_TGTABORT: | |
111 | case SISL_FC_RC_ABORTOK: | |
112 | case SISL_FC_RC_ABORTFAIL: | |
113 | case SISL_FC_RC_NOLOGI: | |
114 | case SISL_FC_RC_ABORTPEND: | |
115 | case SISL_FC_RC_WRABORTPEND: | |
116 | case SISL_FC_RC_NOEXP: | |
117 | case SISL_FC_RC_INUSE: | |
118 | scp->result = (DID_ERROR << 16); | |
119 | break; | |
120 | } | |
121 | } | |
122 | ||
123 | if (ioasa->rc.afu_rc) { | |
124 | /* We have an AFU error */ | |
125 | switch (ioasa->rc.afu_rc) { | |
126 | case SISL_AFU_RC_NO_CHANNELS: | |
8396012f | 127 | scp->result = (DID_NO_CONNECT << 16); |
c21e0bbf MO |
128 | break; |
129 | case SISL_AFU_RC_DATA_DMA_ERR: | |
130 | switch (ioasa->afu_extra) { | |
131 | case SISL_AFU_DMA_ERR_PAGE_IN: | |
132 | /* Retry */ | |
133 | scp->result = (DID_IMM_RETRY << 16); | |
134 | break; | |
135 | case SISL_AFU_DMA_ERR_INVALID_EA: | |
136 | default: | |
137 | scp->result = (DID_ERROR << 16); | |
138 | } | |
139 | break; | |
140 | case SISL_AFU_RC_OUT_OF_DATA_BUFS: | |
141 | /* Retry */ | |
142 | scp->result = (DID_ALLOC_FAILURE << 16); | |
143 | break; | |
144 | default: | |
145 | scp->result = (DID_ERROR << 16); | |
146 | } | |
147 | } | |
148 | } | |
149 | ||
150 | /** | |
151 | * cmd_complete() - command completion handler | |
152 | * @cmd: AFU command that has completed. | |
153 | * | |
154 | * Prepares and submits command that has either completed or timed out to | |
155 | * the SCSI stack. Checks AFU command back into command pool for non-internal | |
fe7f9698 | 156 | * (cmd->scp populated) commands. |
c21e0bbf MO |
157 | */ |
158 | static void cmd_complete(struct afu_cmd *cmd) | |
159 | { | |
160 | struct scsi_cmnd *scp; | |
c21e0bbf MO |
161 | ulong lock_flags; |
162 | struct afu *afu = cmd->parent; | |
163 | struct cxlflash_cfg *cfg = afu->parent; | |
88d33628 | 164 | struct device *dev = &cfg->dev->dev; |
d732d14f | 165 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
c21e0bbf MO |
166 | bool cmd_is_tmf; |
167 | ||
d732d14f UK |
168 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
169 | list_del(&cmd->list); | |
170 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); | |
171 | ||
fe7f9698 MO |
172 | if (cmd->scp) { |
173 | scp = cmd->scp; | |
8396012f | 174 | if (unlikely(cmd->sa.ioasc)) |
c21e0bbf MO |
175 | process_cmd_err(cmd, scp); |
176 | else | |
177 | scp->result = (DID_OK << 16); | |
178 | ||
c21e0bbf | 179 | cmd_is_tmf = cmd->cmd_tmf; |
c21e0bbf | 180 | |
88d33628 MO |
181 | dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n", |
182 | __func__, scp, scp->result, cmd->sa.ioasc); | |
c21e0bbf | 183 | |
c21e0bbf MO |
184 | scp->scsi_done(scp); |
185 | ||
186 | if (cmd_is_tmf) { | |
018d1dc9 | 187 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
188 | cfg->tmf_active = false; |
189 | wake_up_all_locked(&cfg->tmf_waitq); | |
018d1dc9 | 190 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
191 | } |
192 | } else | |
193 | complete(&cmd->cevent); | |
194 | } | |
195 | ||
2450a5e3 UK |
196 | /** |
197 | * flush_pending_cmds() - flush all pending commands on this hardware queue | |
198 | * @hwq: Hardware queue to flush. | |
199 | * | |
200 | * The hardware send queue lock associated with this hardware queue must be | |
201 | * held when calling this routine. | |
202 | */ | |
203 | static void flush_pending_cmds(struct hwq *hwq) | |
204 | { | |
205 | struct afu_cmd *cmd, *tmp; | |
206 | struct scsi_cmnd *scp; | |
207 | ||
208 | list_for_each_entry_safe(cmd, tmp, &hwq->pending_cmds, list) { | |
209 | /* Bypass command when on a doneq, cmd_complete() will handle */ | |
210 | if (!list_empty(&cmd->queue)) | |
211 | continue; | |
212 | ||
213 | list_del(&cmd->list); | |
214 | ||
215 | if (cmd->scp) { | |
216 | scp = cmd->scp; | |
217 | scp->result = (DID_IMM_RETRY << 16); | |
218 | scp->scsi_done(scp); | |
219 | } else { | |
220 | cmd->cmd_aborted = true; | |
221 | complete(&cmd->cevent); | |
222 | } | |
223 | } | |
224 | } | |
225 | ||
15305514 | 226 | /** |
ddc869e9 UK |
227 | * context_reset() - reset context via specified register |
228 | * @hwq: Hardware queue owning the context to be reset. | |
74579cfb | 229 | * @reset_reg: MMIO register to perform reset. |
ddc869e9 UK |
230 | * |
231 | * Return: 0 on success, -errno on failure | |
15305514 | 232 | */ |
ddc869e9 | 233 | static int context_reset(struct hwq *hwq, __be64 __iomem *reset_reg) |
15305514 | 234 | { |
ddc869e9 | 235 | struct cxlflash_cfg *cfg = hwq->afu->parent; |
3d2f617d | 236 | struct device *dev = &cfg->dev->dev; |
ddc869e9 UK |
237 | int rc = -ETIMEDOUT; |
238 | int nretry = 0; | |
239 | u64 val = 0x1; | |
15305514 | 240 | |
ddc869e9 | 241 | dev_dbg(dev, "%s: hwq=%p\n", __func__, hwq); |
15305514 | 242 | |
ddc869e9 | 243 | writeq_be(val, reset_reg); |
15305514 | 244 | do { |
ddc869e9 UK |
245 | val = readq_be(reset_reg); |
246 | if ((val & 0x1) == 0x0) { | |
247 | rc = 0; | |
15305514 | 248 | break; |
ddc869e9 UK |
249 | } |
250 | ||
15305514 | 251 | /* Double delay each time */ |
ea765431 | 252 | udelay(1 << nretry); |
15305514 | 253 | } while (nretry++ < MC_ROOM_RETRY_CNT); |
3d2f617d | 254 | |
ddc869e9 UK |
255 | dev_dbg(dev, "%s: returning rc=%d, val=%016llx nretry=%d\n", |
256 | __func__, rc, val, nretry); | |
257 | return rc; | |
15305514 MO |
258 | } |
259 | ||
74579cfb | 260 | /** |
ddc869e9 UK |
261 | * context_reset_ioarrin() - reset context via IOARRIN register |
262 | * @hwq: Hardware queue owning the context to be reset. | |
263 | * | |
264 | * Return: 0 on success, -errno on failure | |
74579cfb | 265 | */ |
ddc869e9 | 266 | static int context_reset_ioarrin(struct hwq *hwq) |
74579cfb | 267 | { |
ddc869e9 | 268 | return context_reset(hwq, &hwq->host_map->ioarrin); |
74579cfb MO |
269 | } |
270 | ||
bae0ac69 | 271 | /** |
ddc869e9 UK |
272 | * context_reset_sq() - reset context via SQ_CONTEXT_RESET register |
273 | * @hwq: Hardware queue owning the context to be reset. | |
274 | * | |
275 | * Return: 0 on success, -errno on failure | |
bae0ac69 | 276 | */ |
ddc869e9 | 277 | static int context_reset_sq(struct hwq *hwq) |
bae0ac69 | 278 | { |
ddc869e9 | 279 | return context_reset(hwq, &hwq->host_map->sq_ctx_reset); |
bae0ac69 MO |
280 | } |
281 | ||
15305514 | 282 | /** |
48b4be36 | 283 | * send_cmd_ioarrin() - sends an AFU command via IOARRIN register |
15305514 MO |
284 | * @afu: AFU associated with the host. |
285 | * @cmd: AFU command to send. | |
286 | * | |
287 | * Return: | |
1284fb0c | 288 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
15305514 | 289 | */ |
48b4be36 | 290 | static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) |
15305514 MO |
291 | { |
292 | struct cxlflash_cfg *cfg = afu->parent; | |
293 | struct device *dev = &cfg->dev->dev; | |
a583d00a | 294 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
15305514 | 295 | int rc = 0; |
11f7b184 UK |
296 | s64 room; |
297 | ulong lock_flags; | |
15305514 MO |
298 | |
299 | /* | |
11f7b184 UK |
300 | * To avoid the performance penalty of MMIO, spread the update of |
301 | * 'room' over multiple commands. | |
15305514 | 302 | */ |
edc034e8 | 303 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
a583d00a UK |
304 | if (--hwq->room < 0) { |
305 | room = readq_be(&hwq->host_map->cmd_room); | |
11f7b184 UK |
306 | if (room <= 0) { |
307 | dev_dbg_ratelimited(dev, "%s: no cmd_room to send " | |
308 | "0x%02X, room=0x%016llX\n", | |
309 | __func__, cmd->rcb.cdb[0], room); | |
a583d00a | 310 | hwq->room = 0; |
11f7b184 UK |
311 | rc = SCSI_MLQUEUE_HOST_BUSY; |
312 | goto out; | |
15305514 | 313 | } |
a583d00a | 314 | hwq->room = room - 1; |
15305514 MO |
315 | } |
316 | ||
d732d14f | 317 | list_add(&cmd->list, &hwq->pending_cmds); |
a583d00a | 318 | writeq_be((u64)&cmd->rcb, &hwq->host_map->ioarrin); |
15305514 | 319 | out: |
edc034e8 | 320 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
88d33628 MO |
321 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__, |
322 | cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc); | |
15305514 | 323 | return rc; |
15305514 MO |
324 | } |
325 | ||
bae0ac69 MO |
326 | /** |
327 | * send_cmd_sq() - sends an AFU command via SQ ring | |
328 | * @afu: AFU associated with the host. | |
329 | * @cmd: AFU command to send. | |
330 | * | |
331 | * Return: | |
332 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure | |
333 | */ | |
334 | static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) | |
335 | { | |
336 | struct cxlflash_cfg *cfg = afu->parent; | |
337 | struct device *dev = &cfg->dev->dev; | |
a583d00a | 338 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
bae0ac69 MO |
339 | int rc = 0; |
340 | int newval; | |
341 | ulong lock_flags; | |
342 | ||
a583d00a | 343 | newval = atomic_dec_if_positive(&hwq->hsq_credits); |
bae0ac69 MO |
344 | if (newval <= 0) { |
345 | rc = SCSI_MLQUEUE_HOST_BUSY; | |
346 | goto out; | |
347 | } | |
348 | ||
349 | cmd->rcb.ioasa = &cmd->sa; | |
350 | ||
a583d00a | 351 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
bae0ac69 | 352 | |
a583d00a UK |
353 | *hwq->hsq_curr = cmd->rcb; |
354 | if (hwq->hsq_curr < hwq->hsq_end) | |
355 | hwq->hsq_curr++; | |
bae0ac69 | 356 | else |
a583d00a | 357 | hwq->hsq_curr = hwq->hsq_start; |
d732d14f UK |
358 | |
359 | list_add(&cmd->list, &hwq->pending_cmds); | |
a583d00a | 360 | writeq_be((u64)hwq->hsq_curr, &hwq->host_map->sq_tail); |
bae0ac69 | 361 | |
a583d00a | 362 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
bae0ac69 | 363 | out: |
88d33628 MO |
364 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p " |
365 | "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len, | |
a583d00a UK |
366 | cmd->rcb.data_ea, cmd->rcb.ioasa, rc, hwq->hsq_curr, |
367 | readq_be(&hwq->host_map->sq_head), | |
368 | readq_be(&hwq->host_map->sq_tail)); | |
bae0ac69 MO |
369 | return rc; |
370 | } | |
371 | ||
15305514 MO |
372 | /** |
373 | * wait_resp() - polls for a response or timeout to a sent AFU command | |
374 | * @afu: AFU associated with the host. | |
375 | * @cmd: AFU command that was sent. | |
9ba848ac | 376 | * |
ddc869e9 | 377 | * Return: 0 on success, -errno on failure |
15305514 | 378 | */ |
9ba848ac | 379 | static int wait_resp(struct afu *afu, struct afu_cmd *cmd) |
15305514 | 380 | { |
88d33628 MO |
381 | struct cxlflash_cfg *cfg = afu->parent; |
382 | struct device *dev = &cfg->dev->dev; | |
9ba848ac | 383 | int rc = 0; |
15305514 MO |
384 | ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000); |
385 | ||
386 | timeout = wait_for_completion_timeout(&cmd->cevent, timeout); | |
ddc869e9 UK |
387 | if (!timeout) |
388 | rc = -ETIMEDOUT; | |
15305514 | 389 | |
2450a5e3 UK |
390 | if (cmd->cmd_aborted) |
391 | rc = -EAGAIN; | |
392 | ||
9ba848ac | 393 | if (unlikely(cmd->sa.ioasc != 0)) { |
88d33628 MO |
394 | dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n", |
395 | __func__, cmd->rcb.cdb[0], cmd->sa.ioasc); | |
ddc869e9 | 396 | rc = -EIO; |
9ba848ac MO |
397 | } |
398 | ||
399 | return rc; | |
15305514 MO |
400 | } |
401 | ||
8c052e9e MO |
402 | /** |
403 | * cmd_to_target_hwq() - selects a target hardware queue for a SCSI command | |
404 | * @host: SCSI host associated with device. | |
405 | * @scp: SCSI command to send. | |
406 | * @afu: SCSI command to send. | |
407 | * | |
408 | * Hashes a command based upon the hardware queue mode. | |
409 | * | |
410 | * Return: Trusted index of target hardware queue | |
411 | */ | |
412 | static u32 cmd_to_target_hwq(struct Scsi_Host *host, struct scsi_cmnd *scp, | |
413 | struct afu *afu) | |
414 | { | |
415 | u32 tag; | |
416 | u32 hwq = 0; | |
417 | ||
418 | if (afu->num_hwqs == 1) | |
419 | return 0; | |
420 | ||
421 | switch (afu->hwq_mode) { | |
422 | case HWQ_MODE_RR: | |
423 | hwq = afu->hwq_rr_count++ % afu->num_hwqs; | |
424 | break; | |
425 | case HWQ_MODE_TAG: | |
426 | tag = blk_mq_unique_tag(scp->request); | |
427 | hwq = blk_mq_unique_tag_to_hwq(tag); | |
428 | break; | |
429 | case HWQ_MODE_CPU: | |
430 | hwq = smp_processor_id() % afu->num_hwqs; | |
431 | break; | |
432 | default: | |
433 | WARN_ON_ONCE(1); | |
434 | } | |
435 | ||
436 | return hwq; | |
437 | } | |
438 | ||
c21e0bbf MO |
439 | /** |
440 | * send_tmf() - sends a Task Management Function (TMF) | |
441 | * @afu: AFU to checkout from. | |
442 | * @scp: SCSI command from stack. | |
443 | * @tmfcmd: TMF command to send. | |
444 | * | |
445 | * Return: | |
1284fb0c | 446 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
c21e0bbf MO |
447 | */ |
448 | static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd) | |
449 | { | |
8c052e9e MO |
450 | struct Scsi_Host *host = scp->device->host; |
451 | struct cxlflash_cfg *cfg = shost_priv(host); | |
d4ace351 | 452 | struct afu_cmd *cmd = sc_to_afucz(scp); |
4392ba49 | 453 | struct device *dev = &cfg->dev->dev; |
8c052e9e MO |
454 | int hwq_index = cmd_to_target_hwq(host, scp, afu); |
455 | struct hwq *hwq = get_hwq(afu, hwq_index); | |
c21e0bbf MO |
456 | ulong lock_flags; |
457 | int rc = 0; | |
018d1dc9 | 458 | ulong to; |
c21e0bbf | 459 | |
018d1dc9 MO |
460 | /* When Task Management Function is active do not send another */ |
461 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); | |
c21e0bbf | 462 | if (cfg->tmf_active) |
018d1dc9 MO |
463 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
464 | !cfg->tmf_active, | |
465 | cfg->tmf_slock); | |
c21e0bbf | 466 | cfg->tmf_active = true; |
018d1dc9 | 467 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 468 | |
fe7f9698 | 469 | cmd->scp = scp; |
d4ace351 MO |
470 | cmd->parent = afu; |
471 | cmd->cmd_tmf = true; | |
8c052e9e | 472 | cmd->hwq_index = hwq_index; |
d4ace351 | 473 | |
a583d00a | 474 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
5fbb96c8 | 475 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
e8e17ea6 | 476 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
c21e0bbf | 477 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
c21e0bbf | 478 | cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID | |
d4ace351 MO |
479 | SISL_REQ_FLAGS_SUP_UNDERRUN | |
480 | SISL_REQ_FLAGS_TMF_CMD); | |
c21e0bbf MO |
481 | memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd)); |
482 | ||
48b4be36 | 483 | rc = afu->send_cmd(afu, cmd); |
c21e0bbf | 484 | if (unlikely(rc)) { |
018d1dc9 | 485 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 486 | cfg->tmf_active = false; |
018d1dc9 | 487 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
488 | goto out; |
489 | } | |
490 | ||
018d1dc9 MO |
491 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
492 | to = msecs_to_jiffies(5000); | |
493 | to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq, | |
494 | !cfg->tmf_active, | |
495 | cfg->tmf_slock, | |
496 | to); | |
497 | if (!to) { | |
498 | cfg->tmf_active = false; | |
88d33628 | 499 | dev_err(dev, "%s: TMF timed out\n", __func__); |
018d1dc9 MO |
500 | rc = -1; |
501 | } | |
502 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); | |
c21e0bbf MO |
503 | out: |
504 | return rc; | |
505 | } | |
506 | ||
507 | /** | |
508 | * cxlflash_driver_info() - information handler for this host driver | |
509 | * @host: SCSI host associated with device. | |
510 | * | |
511 | * Return: A string describing the device. | |
512 | */ | |
513 | static const char *cxlflash_driver_info(struct Scsi_Host *host) | |
514 | { | |
515 | return CXLFLASH_ADAPTER_NAME; | |
516 | } | |
517 | ||
518 | /** | |
519 | * cxlflash_queuecommand() - sends a mid-layer request | |
520 | * @host: SCSI host associated with device. | |
521 | * @scp: SCSI command to send. | |
522 | * | |
1284fb0c | 523 | * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
c21e0bbf MO |
524 | */ |
525 | static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) | |
526 | { | |
88d33628 | 527 | struct cxlflash_cfg *cfg = shost_priv(host); |
c21e0bbf | 528 | struct afu *afu = cfg->afu; |
4392ba49 | 529 | struct device *dev = &cfg->dev->dev; |
5fbb96c8 | 530 | struct afu_cmd *cmd = sc_to_afucz(scp); |
9d89326c | 531 | struct scatterlist *sg = scsi_sglist(scp); |
8c052e9e MO |
532 | int hwq_index = cmd_to_target_hwq(host, scp, afu); |
533 | struct hwq *hwq = get_hwq(afu, hwq_index); | |
9d89326c | 534 | u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN; |
c21e0bbf | 535 | ulong lock_flags; |
c21e0bbf MO |
536 | int rc = 0; |
537 | ||
4392ba49 | 538 | dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
88d33628 | 539 | "cdb=(%08x-%08x-%08x-%08x)\n", |
4392ba49 MO |
540 | __func__, scp, host->host_no, scp->device->channel, |
541 | scp->device->id, scp->device->lun, | |
542 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
543 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
544 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
545 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
c21e0bbf | 546 | |
018d1dc9 MO |
547 | /* |
548 | * If a Task Management Function is active, wait for it to complete | |
c21e0bbf MO |
549 | * before continuing with regular commands. |
550 | */ | |
018d1dc9 | 551 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 552 | if (cfg->tmf_active) { |
018d1dc9 | 553 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
554 | rc = SCSI_MLQUEUE_HOST_BUSY; |
555 | goto out; | |
556 | } | |
018d1dc9 | 557 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 558 | |
5cdac81a | 559 | switch (cfg->state) { |
f92ba507 MO |
560 | case STATE_PROBING: |
561 | case STATE_PROBED: | |
439e85c1 | 562 | case STATE_RESET: |
88d33628 | 563 | dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__); |
5cdac81a MO |
564 | rc = SCSI_MLQUEUE_HOST_BUSY; |
565 | goto out; | |
566 | case STATE_FAILTERM: | |
88d33628 | 567 | dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__); |
5cdac81a MO |
568 | scp->result = (DID_NO_CONNECT << 16); |
569 | scp->scsi_done(scp); | |
570 | rc = 0; | |
571 | goto out; | |
572 | default: | |
573 | break; | |
574 | } | |
575 | ||
9d89326c | 576 | if (likely(sg)) { |
fdc3f382 MO |
577 | cmd->rcb.data_len = sg->length; |
578 | cmd->rcb.data_ea = (uintptr_t)sg_virt(sg); | |
9d89326c | 579 | } |
c21e0bbf | 580 | |
fe7f9698 | 581 | cmd->scp = scp; |
5fbb96c8 | 582 | cmd->parent = afu; |
8c052e9e | 583 | cmd->hwq_index = hwq_index; |
c21e0bbf | 584 | |
a583d00a | 585 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
9d89326c | 586 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
e8e17ea6 | 587 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
9d89326c | 588 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
c21e0bbf | 589 | |
9d89326c MO |
590 | if (scp->sc_data_direction == DMA_TO_DEVICE) |
591 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; | |
c21e0bbf | 592 | |
9d89326c | 593 | cmd->rcb.req_flags = req_flags; |
c21e0bbf MO |
594 | memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb)); |
595 | ||
48b4be36 | 596 | rc = afu->send_cmd(afu, cmd); |
c21e0bbf MO |
597 | out: |
598 | return rc; | |
599 | } | |
600 | ||
601 | /** | |
15305514 | 602 | * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe |
1284fb0c | 603 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 604 | */ |
15305514 | 605 | static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg) |
c21e0bbf | 606 | { |
15305514 | 607 | struct pci_dev *pdev = cfg->dev; |
c21e0bbf | 608 | |
15305514 MO |
609 | if (pci_channel_offline(pdev)) |
610 | wait_event_timeout(cfg->reset_waitq, | |
611 | !pci_channel_offline(pdev), | |
612 | CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT); | |
c21e0bbf MO |
613 | } |
614 | ||
615 | /** | |
15305514 | 616 | * free_mem() - free memory associated with the AFU |
1284fb0c | 617 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 618 | */ |
15305514 | 619 | static void free_mem(struct cxlflash_cfg *cfg) |
c21e0bbf | 620 | { |
15305514 | 621 | struct afu *afu = cfg->afu; |
c21e0bbf | 622 | |
15305514 | 623 | if (cfg->afu) { |
15305514 MO |
624 | free_pages((ulong)afu, get_order(sizeof(struct afu))); |
625 | cfg->afu = NULL; | |
5cdac81a | 626 | } |
c21e0bbf MO |
627 | } |
628 | ||
3b4f03cd UK |
629 | /** |
630 | * cxlflash_reset_sync() - synchronizing point for asynchronous resets | |
631 | * @cfg: Internal structure associated with the host. | |
632 | */ | |
633 | static void cxlflash_reset_sync(struct cxlflash_cfg *cfg) | |
634 | { | |
635 | if (cfg->async_reset_cookie == 0) | |
636 | return; | |
637 | ||
638 | /* Wait until all async calls prior to this cookie have completed */ | |
639 | async_synchronize_cookie(cfg->async_reset_cookie + 1); | |
640 | cfg->async_reset_cookie = 0; | |
641 | } | |
642 | ||
c21e0bbf | 643 | /** |
15305514 | 644 | * stop_afu() - stops the AFU command timers and unmaps the MMIO space |
1284fb0c | 645 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 646 | * |
15305514 | 647 | * Safe to call with AFU in a partially allocated/initialized state. |
ee91e332 | 648 | * |
d940f9ae | 649 | * Cancels scheduled worker threads, waits for any active internal AFU |
2588f222 | 650 | * commands to timeout, disables IRQ polling and then unmaps the MMIO space. |
c21e0bbf | 651 | */ |
15305514 | 652 | static void stop_afu(struct cxlflash_cfg *cfg) |
c21e0bbf | 653 | { |
15305514 | 654 | struct afu *afu = cfg->afu; |
a583d00a UK |
655 | struct hwq *hwq; |
656 | int i; | |
c21e0bbf | 657 | |
d940f9ae | 658 | cancel_work_sync(&cfg->work_q); |
3b4f03cd UK |
659 | if (!current_is_async()) |
660 | cxlflash_reset_sync(cfg); | |
d940f9ae | 661 | |
15305514 | 662 | if (likely(afu)) { |
de01283b MO |
663 | while (atomic_read(&afu->cmds_active)) |
664 | ssleep(1); | |
a583d00a UK |
665 | |
666 | if (afu_is_irqpoll_enabled(afu)) { | |
bb85ef68 | 667 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
668 | hwq = get_hwq(afu, i); |
669 | ||
670 | irq_poll_disable(&hwq->irqpoll); | |
671 | } | |
672 | } | |
673 | ||
c21e0bbf | 674 | if (likely(afu->afu_map)) { |
1786f4a0 | 675 | cxl_psa_unmap((void __iomem *)afu->afu_map); |
c21e0bbf MO |
676 | afu->afu_map = NULL; |
677 | } | |
678 | } | |
679 | } | |
680 | ||
681 | /** | |
9526f360 | 682 | * term_intr() - disables all AFU interrupts |
1284fb0c | 683 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 684 | * @level: Depth of allocation, where to begin waterfall tear down. |
a583d00a | 685 | * @index: Index of the hardware queue. |
c21e0bbf MO |
686 | * |
687 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
688 | */ | |
a583d00a UK |
689 | static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level, |
690 | u32 index) | |
c21e0bbf | 691 | { |
c21e0bbf | 692 | struct afu *afu = cfg->afu; |
4392ba49 | 693 | struct device *dev = &cfg->dev->dev; |
a583d00a | 694 | struct hwq *hwq; |
c21e0bbf | 695 | |
a583d00a UK |
696 | if (!afu) { |
697 | dev_err(dev, "%s: returning with NULL afu\n", __func__); | |
698 | return; | |
699 | } | |
700 | ||
701 | hwq = get_hwq(afu, index); | |
702 | ||
703 | if (!hwq->ctx) { | |
704 | dev_err(dev, "%s: returning with NULL MC\n", __func__); | |
c21e0bbf MO |
705 | return; |
706 | } | |
707 | ||
708 | switch (level) { | |
c21e0bbf | 709 | case UNMAP_THREE: |
a583d00a UK |
710 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
711 | if (index == PRIMARY_HWQ) | |
712 | cxl_unmap_afu_irq(hwq->ctx, 3, hwq); | |
c21e0bbf | 713 | case UNMAP_TWO: |
a583d00a | 714 | cxl_unmap_afu_irq(hwq->ctx, 2, hwq); |
c21e0bbf | 715 | case UNMAP_ONE: |
a583d00a | 716 | cxl_unmap_afu_irq(hwq->ctx, 1, hwq); |
c21e0bbf | 717 | case FREE_IRQ: |
a583d00a | 718 | cxl_free_afu_irqs(hwq->ctx); |
9526f360 MK |
719 | /* fall through */ |
720 | case UNDO_NOOP: | |
721 | /* No action required */ | |
722 | break; | |
723 | } | |
724 | } | |
725 | ||
726 | /** | |
727 | * term_mc() - terminates the master context | |
728 | * @cfg: Internal structure associated with the host. | |
a583d00a | 729 | * @index: Index of the hardware queue. |
9526f360 MK |
730 | * |
731 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
732 | */ | |
a583d00a | 733 | static void term_mc(struct cxlflash_cfg *cfg, u32 index) |
9526f360 | 734 | { |
9526f360 MK |
735 | struct afu *afu = cfg->afu; |
736 | struct device *dev = &cfg->dev->dev; | |
a583d00a | 737 | struct hwq *hwq; |
2450a5e3 | 738 | ulong lock_flags; |
9526f360 | 739 | |
a583d00a UK |
740 | if (!afu) { |
741 | dev_err(dev, "%s: returning with NULL afu\n", __func__); | |
9526f360 | 742 | return; |
c21e0bbf | 743 | } |
9526f360 | 744 | |
a583d00a UK |
745 | hwq = get_hwq(afu, index); |
746 | ||
747 | if (!hwq->ctx) { | |
748 | dev_err(dev, "%s: returning with NULL MC\n", __func__); | |
749 | return; | |
750 | } | |
751 | ||
752 | WARN_ON(cxl_stop_context(hwq->ctx)); | |
753 | if (index != PRIMARY_HWQ) | |
754 | WARN_ON(cxl_release_context(hwq->ctx)); | |
755 | hwq->ctx = NULL; | |
2450a5e3 UK |
756 | |
757 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); | |
758 | flush_pending_cmds(hwq); | |
759 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); | |
c21e0bbf MO |
760 | } |
761 | ||
762 | /** | |
763 | * term_afu() - terminates the AFU | |
1284fb0c | 764 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
765 | * |
766 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
767 | */ | |
768 | static void term_afu(struct cxlflash_cfg *cfg) | |
769 | { | |
88d33628 | 770 | struct device *dev = &cfg->dev->dev; |
a583d00a | 771 | int k; |
88d33628 | 772 | |
9526f360 MK |
773 | /* |
774 | * Tear down is carefully orchestrated to ensure | |
775 | * no interrupts can come in when the problem state | |
776 | * area is unmapped. | |
777 | * | |
a583d00a | 778 | * 1) Disable all AFU interrupts for each master |
9526f360 | 779 | * 2) Unmap the problem state area |
a583d00a | 780 | * 3) Stop each master context |
9526f360 | 781 | */ |
bb85ef68 | 782 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
a583d00a UK |
783 | term_intr(cfg, UNMAP_THREE, k); |
784 | ||
c21e0bbf MO |
785 | if (cfg->afu) |
786 | stop_afu(cfg); | |
787 | ||
bb85ef68 | 788 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
a583d00a | 789 | term_mc(cfg, k); |
6ded8b3c | 790 | |
88d33628 | 791 | dev_dbg(dev, "%s: returning\n", __func__); |
c21e0bbf MO |
792 | } |
793 | ||
704c4b0d UK |
794 | /** |
795 | * notify_shutdown() - notifies device of pending shutdown | |
796 | * @cfg: Internal structure associated with the host. | |
797 | * @wait: Whether to wait for shutdown processing to complete. | |
798 | * | |
799 | * This function will notify the AFU that the adapter is being shutdown | |
800 | * and will wait for shutdown processing to complete if wait is true. | |
801 | * This notification should flush pending I/Os to the device and halt | |
802 | * further I/Os until the next AFU reset is issued and device restarted. | |
803 | */ | |
804 | static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) | |
805 | { | |
806 | struct afu *afu = cfg->afu; | |
807 | struct device *dev = &cfg->dev->dev; | |
704c4b0d | 808 | struct dev_dependent_vals *ddv; |
c885d3fe | 809 | __be64 __iomem *fc_port_regs; |
704c4b0d UK |
810 | u64 reg, status; |
811 | int i, retry_cnt = 0; | |
812 | ||
813 | ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data; | |
814 | if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN)) | |
815 | return; | |
816 | ||
1bd2b282 | 817 | if (!afu || !afu->afu_map) { |
88d33628 | 818 | dev_dbg(dev, "%s: Problem state area not mapped\n", __func__); |
1bd2b282 UK |
819 | return; |
820 | } | |
821 | ||
704c4b0d | 822 | /* Notify AFU */ |
66d4bce4 | 823 | for (i = 0; i < cfg->num_fc_ports; i++) { |
c885d3fe MO |
824 | fc_port_regs = get_fc_port_regs(cfg, i); |
825 | ||
826 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); | |
704c4b0d | 827 | reg |= SISL_FC_SHUTDOWN_NORMAL; |
c885d3fe | 828 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
704c4b0d UK |
829 | } |
830 | ||
831 | if (!wait) | |
832 | return; | |
833 | ||
834 | /* Wait up to 1.5 seconds for shutdown processing to complete */ | |
66d4bce4 | 835 | for (i = 0; i < cfg->num_fc_ports; i++) { |
c885d3fe | 836 | fc_port_regs = get_fc_port_regs(cfg, i); |
704c4b0d | 837 | retry_cnt = 0; |
c885d3fe | 838 | |
704c4b0d | 839 | while (true) { |
c885d3fe | 840 | status = readq_be(&fc_port_regs[FC_STATUS / 8]); |
704c4b0d UK |
841 | if (status & SISL_STATUS_SHUTDOWN_COMPLETE) |
842 | break; | |
843 | if (++retry_cnt >= MC_RETRY_CNT) { | |
844 | dev_dbg(dev, "%s: port %d shutdown processing " | |
845 | "not yet completed\n", __func__, i); | |
846 | break; | |
847 | } | |
848 | msleep(100 * retry_cnt); | |
849 | } | |
850 | } | |
851 | } | |
852 | ||
c21e0bbf MO |
853 | /** |
854 | * cxlflash_remove() - PCI entry point to tear down host | |
855 | * @pdev: PCI device associated with the host. | |
856 | * | |
f92ba507 MO |
857 | * Safe to use as a cleanup in partially allocated/initialized state. Note that |
858 | * the reset_waitq is flushed as part of the stop/termination of user contexts. | |
c21e0bbf MO |
859 | */ |
860 | static void cxlflash_remove(struct pci_dev *pdev) | |
861 | { | |
862 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
88d33628 | 863 | struct device *dev = &pdev->dev; |
c21e0bbf MO |
864 | ulong lock_flags; |
865 | ||
babf985d | 866 | if (!pci_is_enabled(pdev)) { |
88d33628 | 867 | dev_dbg(dev, "%s: Device is disabled\n", __func__); |
babf985d UK |
868 | return; |
869 | } | |
870 | ||
c21e0bbf MO |
871 | /* If a Task Management Function is active, wait for it to complete |
872 | * before continuing with remove. | |
873 | */ | |
018d1dc9 | 874 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 875 | if (cfg->tmf_active) |
018d1dc9 MO |
876 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
877 | !cfg->tmf_active, | |
878 | cfg->tmf_slock); | |
879 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); | |
c21e0bbf | 880 | |
704c4b0d UK |
881 | /* Notify AFU and wait for shutdown processing to complete */ |
882 | notify_shutdown(cfg, true); | |
883 | ||
5cdac81a | 884 | cfg->state = STATE_FAILTERM; |
65be2c79 | 885 | cxlflash_stop_term_user_contexts(cfg); |
5cdac81a | 886 | |
c21e0bbf MO |
887 | switch (cfg->init_state) { |
888 | case INIT_STATE_SCSI: | |
65be2c79 | 889 | cxlflash_term_local_luns(cfg); |
c21e0bbf | 890 | scsi_remove_host(cfg->host); |
c21e0bbf | 891 | case INIT_STATE_AFU: |
b45cdbaf | 892 | term_afu(cfg); |
c21e0bbf | 893 | case INIT_STATE_PCI: |
c21e0bbf MO |
894 | pci_disable_device(pdev); |
895 | case INIT_STATE_NONE: | |
c21e0bbf | 896 | free_mem(cfg); |
8b5b1e87 | 897 | scsi_host_put(cfg->host); |
c21e0bbf MO |
898 | break; |
899 | } | |
900 | ||
88d33628 | 901 | dev_dbg(dev, "%s: returning\n", __func__); |
c21e0bbf MO |
902 | } |
903 | ||
904 | /** | |
905 | * alloc_mem() - allocates the AFU and its command pool | |
1284fb0c | 906 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
907 | * |
908 | * A partially allocated state remains on failure. | |
909 | * | |
910 | * Return: | |
911 | * 0 on success | |
912 | * -ENOMEM on failure to allocate memory | |
913 | */ | |
914 | static int alloc_mem(struct cxlflash_cfg *cfg) | |
915 | { | |
916 | int rc = 0; | |
4392ba49 | 917 | struct device *dev = &cfg->dev->dev; |
c21e0bbf | 918 | |
bae0ac69 | 919 | /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */ |
c21e0bbf MO |
920 | cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
921 | get_order(sizeof(struct afu))); | |
922 | if (unlikely(!cfg->afu)) { | |
4392ba49 MO |
923 | dev_err(dev, "%s: cannot get %d free pages\n", |
924 | __func__, get_order(sizeof(struct afu))); | |
c21e0bbf MO |
925 | rc = -ENOMEM; |
926 | goto out; | |
927 | } | |
928 | cfg->afu->parent = cfg; | |
bb85ef68 | 929 | cfg->afu->desired_hwqs = CXLFLASH_DEF_HWQS; |
c21e0bbf | 930 | cfg->afu->afu_map = NULL; |
c21e0bbf MO |
931 | out: |
932 | return rc; | |
933 | } | |
934 | ||
935 | /** | |
936 | * init_pci() - initializes the host as a PCI device | |
1284fb0c | 937 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 938 | * |
1284fb0c | 939 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
940 | */ |
941 | static int init_pci(struct cxlflash_cfg *cfg) | |
942 | { | |
943 | struct pci_dev *pdev = cfg->dev; | |
88d33628 | 944 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
945 | int rc = 0; |
946 | ||
c21e0bbf MO |
947 | rc = pci_enable_device(pdev); |
948 | if (rc || pci_channel_offline(pdev)) { | |
949 | if (pci_channel_offline(pdev)) { | |
950 | cxlflash_wait_for_pci_err_recovery(cfg); | |
951 | rc = pci_enable_device(pdev); | |
952 | } | |
953 | ||
954 | if (rc) { | |
88d33628 | 955 | dev_err(dev, "%s: Cannot enable adapter\n", __func__); |
c21e0bbf | 956 | cxlflash_wait_for_pci_err_recovery(cfg); |
961487e4 | 957 | goto out; |
c21e0bbf MO |
958 | } |
959 | } | |
960 | ||
c21e0bbf | 961 | out: |
88d33628 | 962 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 963 | return rc; |
c21e0bbf MO |
964 | } |
965 | ||
966 | /** | |
967 | * init_scsi() - adds the host to the SCSI stack and kicks off host scan | |
1284fb0c | 968 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 969 | * |
1284fb0c | 970 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
971 | */ |
972 | static int init_scsi(struct cxlflash_cfg *cfg) | |
973 | { | |
974 | struct pci_dev *pdev = cfg->dev; | |
88d33628 | 975 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
976 | int rc = 0; |
977 | ||
978 | rc = scsi_add_host(cfg->host, &pdev->dev); | |
979 | if (rc) { | |
88d33628 | 980 | dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
981 | goto out; |
982 | } | |
983 | ||
984 | scsi_scan_host(cfg->host); | |
985 | ||
986 | out: | |
88d33628 | 987 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
988 | return rc; |
989 | } | |
990 | ||
991 | /** | |
992 | * set_port_online() - transitions the specified host FC port to online state | |
993 | * @fc_regs: Top of MMIO region defined for specified port. | |
994 | * | |
995 | * The provided MMIO region must be mapped prior to call. Online state means | |
996 | * that the FC link layer has synced, completed the handshaking process, and | |
997 | * is ready for login to start. | |
998 | */ | |
1786f4a0 | 999 | static void set_port_online(__be64 __iomem *fc_regs) |
c21e0bbf MO |
1000 | { |
1001 | u64 cmdcfg; | |
1002 | ||
1003 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1004 | cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */ | |
1005 | cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */ | |
1006 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1007 | } | |
1008 | ||
1009 | /** | |
1010 | * set_port_offline() - transitions the specified host FC port to offline state | |
1011 | * @fc_regs: Top of MMIO region defined for specified port. | |
1012 | * | |
1013 | * The provided MMIO region must be mapped prior to call. | |
1014 | */ | |
1786f4a0 | 1015 | static void set_port_offline(__be64 __iomem *fc_regs) |
c21e0bbf MO |
1016 | { |
1017 | u64 cmdcfg; | |
1018 | ||
1019 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1020 | cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */ | |
1021 | cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */ | |
1022 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1023 | } | |
1024 | ||
1025 | /** | |
1026 | * wait_port_online() - waits for the specified host FC port come online | |
1027 | * @fc_regs: Top of MMIO region defined for specified port. | |
1028 | * @delay_us: Number of microseconds to delay between reading port status. | |
1029 | * @nretry: Number of cycles to retry reading port status. | |
1030 | * | |
1031 | * The provided MMIO region must be mapped prior to call. This will timeout | |
1032 | * when the cable is not plugged in. | |
1033 | * | |
1034 | * Return: | |
1035 | * TRUE (1) when the specified port is online | |
1036 | * FALSE (0) when the specified port fails to come online after timeout | |
c21e0bbf | 1037 | */ |
88d33628 | 1038 | static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
c21e0bbf MO |
1039 | { |
1040 | u64 status; | |
1041 | ||
88d33628 | 1042 | WARN_ON(delay_us < 1000); |
c21e0bbf MO |
1043 | |
1044 | do { | |
1045 | msleep(delay_us / 1000); | |
1046 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); | |
05dab432 MO |
1047 | if (status == U64_MAX) |
1048 | nretry /= 2; | |
c21e0bbf MO |
1049 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE && |
1050 | nretry--); | |
1051 | ||
1052 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE); | |
1053 | } | |
1054 | ||
1055 | /** | |
1056 | * wait_port_offline() - waits for the specified host FC port go offline | |
1057 | * @fc_regs: Top of MMIO region defined for specified port. | |
1058 | * @delay_us: Number of microseconds to delay between reading port status. | |
1059 | * @nretry: Number of cycles to retry reading port status. | |
1060 | * | |
1061 | * The provided MMIO region must be mapped prior to call. | |
1062 | * | |
1063 | * Return: | |
1064 | * TRUE (1) when the specified port is offline | |
1065 | * FALSE (0) when the specified port fails to go offline after timeout | |
c21e0bbf | 1066 | */ |
88d33628 | 1067 | static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
c21e0bbf MO |
1068 | { |
1069 | u64 status; | |
1070 | ||
88d33628 | 1071 | WARN_ON(delay_us < 1000); |
c21e0bbf MO |
1072 | |
1073 | do { | |
1074 | msleep(delay_us / 1000); | |
1075 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); | |
05dab432 MO |
1076 | if (status == U64_MAX) |
1077 | nretry /= 2; | |
c21e0bbf MO |
1078 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE && |
1079 | nretry--); | |
1080 | ||
1081 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE); | |
1082 | } | |
1083 | ||
1084 | /** | |
1085 | * afu_set_wwpn() - configures the WWPN for the specified host FC port | |
1086 | * @afu: AFU associated with the host that owns the specified FC port. | |
1087 | * @port: Port number being configured. | |
1088 | * @fc_regs: Top of MMIO region defined for specified port. | |
1089 | * @wwpn: The world-wide-port-number previously discovered for port. | |
1090 | * | |
1091 | * The provided MMIO region must be mapped prior to call. As part of the | |
1092 | * sequence to configure the WWPN, the port is toggled offline and then back | |
1093 | * online. This toggling action can cause this routine to delay up to a few | |
1094 | * seconds. When configured to use the internal LUN feature of the AFU, a | |
1095 | * failure to come online is overridden. | |
c21e0bbf | 1096 | */ |
f8013261 MO |
1097 | static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs, |
1098 | u64 wwpn) | |
c21e0bbf | 1099 | { |
88d33628 MO |
1100 | struct cxlflash_cfg *cfg = afu->parent; |
1101 | struct device *dev = &cfg->dev->dev; | |
1102 | ||
c21e0bbf | 1103 | set_port_offline(fc_regs); |
c21e0bbf MO |
1104 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
1105 | FC_PORT_STATUS_RETRY_CNT)) { | |
88d33628 MO |
1106 | dev_dbg(dev, "%s: wait on port %d to go offline timed out\n", |
1107 | __func__, port); | |
c21e0bbf MO |
1108 | } |
1109 | ||
f8013261 | 1110 | writeq_be(wwpn, &fc_regs[FC_PNAME / 8]); |
964497b3 | 1111 | |
c21e0bbf | 1112 | set_port_online(fc_regs); |
c21e0bbf MO |
1113 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
1114 | FC_PORT_STATUS_RETRY_CNT)) { | |
88d33628 MO |
1115 | dev_dbg(dev, "%s: wait on port %d to go online timed out\n", |
1116 | __func__, port); | |
c21e0bbf | 1117 | } |
c21e0bbf MO |
1118 | } |
1119 | ||
1120 | /** | |
1121 | * afu_link_reset() - resets the specified host FC port | |
1122 | * @afu: AFU associated with the host that owns the specified FC port. | |
1123 | * @port: Port number being configured. | |
1124 | * @fc_regs: Top of MMIO region defined for specified port. | |
1125 | * | |
1126 | * The provided MMIO region must be mapped prior to call. The sequence to | |
1127 | * reset the port involves toggling it offline and then back online. This | |
1128 | * action can cause this routine to delay up to a few seconds. An effort | |
1129 | * is made to maintain link with the device by switching to host to use | |
1130 | * the alternate port exclusively while the reset takes place. | |
1131 | * failure to come online is overridden. | |
1132 | */ | |
1786f4a0 | 1133 | static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs) |
c21e0bbf | 1134 | { |
88d33628 MO |
1135 | struct cxlflash_cfg *cfg = afu->parent; |
1136 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf MO |
1137 | u64 port_sel; |
1138 | ||
1139 | /* first switch the AFU to the other links, if any */ | |
1140 | port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); | |
4da74db0 | 1141 | port_sel &= ~(1ULL << port); |
c21e0bbf MO |
1142 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
1143 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); | |
1144 | ||
1145 | set_port_offline(fc_regs); | |
1146 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, | |
1147 | FC_PORT_STATUS_RETRY_CNT)) | |
88d33628 MO |
1148 | dev_err(dev, "%s: wait on port %d to go offline timed out\n", |
1149 | __func__, port); | |
c21e0bbf MO |
1150 | |
1151 | set_port_online(fc_regs); | |
1152 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, | |
1153 | FC_PORT_STATUS_RETRY_CNT)) | |
88d33628 MO |
1154 | dev_err(dev, "%s: wait on port %d to go online timed out\n", |
1155 | __func__, port); | |
c21e0bbf MO |
1156 | |
1157 | /* switch back to include this port */ | |
4da74db0 | 1158 | port_sel |= (1ULL << port); |
c21e0bbf MO |
1159 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
1160 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); | |
1161 | ||
88d33628 | 1162 | dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); |
c21e0bbf MO |
1163 | } |
1164 | ||
c21e0bbf MO |
1165 | /** |
1166 | * afu_err_intr_init() - clears and initializes the AFU for error interrupts | |
1167 | * @afu: AFU associated with the host. | |
1168 | */ | |
1169 | static void afu_err_intr_init(struct afu *afu) | |
1170 | { | |
66d4bce4 | 1171 | struct cxlflash_cfg *cfg = afu->parent; |
c885d3fe | 1172 | __be64 __iomem *fc_port_regs; |
c21e0bbf | 1173 | int i; |
a583d00a | 1174 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
c21e0bbf MO |
1175 | u64 reg; |
1176 | ||
1177 | /* global async interrupts: AFU clears afu_ctrl on context exit | |
1178 | * if async interrupts were sent to that context. This prevents | |
1179 | * the AFU form sending further async interrupts when | |
1180 | * there is | |
1181 | * nobody to receive them. | |
1182 | */ | |
1183 | ||
1184 | /* mask all */ | |
1185 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask); | |
a583d00a UK |
1186 | /* set LISN# to send and point to primary master context */ |
1187 | reg = ((u64) (((hwq->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); | |
c21e0bbf MO |
1188 | |
1189 | if (afu->internal_lun) | |
1190 | reg |= 1; /* Bit 63 indicates local lun */ | |
1191 | writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl); | |
1192 | /* clear all */ | |
1193 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); | |
1194 | /* unmask bits that are of interest */ | |
1195 | /* note: afu can send an interrupt after this step */ | |
1196 | writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask); | |
1197 | /* clear again in case a bit came on after previous clear but before */ | |
1198 | /* unmask */ | |
1199 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); | |
1200 | ||
1201 | /* Clear/Set internal lun bits */ | |
c885d3fe MO |
1202 | fc_port_regs = get_fc_port_regs(cfg, 0); |
1203 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); | |
c21e0bbf MO |
1204 | reg &= SISL_FC_INTERNAL_MASK; |
1205 | if (afu->internal_lun) | |
1206 | reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT); | |
c885d3fe | 1207 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
c21e0bbf MO |
1208 | |
1209 | /* now clear FC errors */ | |
66d4bce4 | 1210 | for (i = 0; i < cfg->num_fc_ports; i++) { |
c885d3fe MO |
1211 | fc_port_regs = get_fc_port_regs(cfg, i); |
1212 | ||
1213 | writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]); | |
1214 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); | |
c21e0bbf MO |
1215 | } |
1216 | ||
1217 | /* sync interrupts for master's IOARRIN write */ | |
1218 | /* note that unlike asyncs, there can be no pending sync interrupts */ | |
1219 | /* at this time (this is a fresh context and master has not written */ | |
1220 | /* IOARRIN yet), so there is nothing to clear. */ | |
1221 | ||
1222 | /* set LISN#, it is always sent to the context that wrote IOARRIN */ | |
bb85ef68 | 1223 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
1224 | hwq = get_hwq(afu, i); |
1225 | ||
1226 | writeq_be(SISL_MSI_SYNC_ERROR, &hwq->host_map->ctx_ctrl); | |
1227 | writeq_be(SISL_ISTATUS_MASK, &hwq->host_map->intr_mask); | |
1228 | } | |
c21e0bbf MO |
1229 | } |
1230 | ||
1231 | /** | |
1232 | * cxlflash_sync_err_irq() - interrupt handler for synchronous errors | |
1233 | * @irq: Interrupt number. | |
1234 | * @data: Private data provided at interrupt registration, the AFU. | |
1235 | * | |
1236 | * Return: Always return IRQ_HANDLED. | |
1237 | */ | |
1238 | static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) | |
1239 | { | |
a583d00a UK |
1240 | struct hwq *hwq = (struct hwq *)data; |
1241 | struct cxlflash_cfg *cfg = hwq->afu->parent; | |
88d33628 | 1242 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
1243 | u64 reg; |
1244 | u64 reg_unmasked; | |
1245 | ||
a583d00a | 1246 | reg = readq_be(&hwq->host_map->intr_status); |
c21e0bbf MO |
1247 | reg_unmasked = (reg & SISL_ISTATUS_UNMASK); |
1248 | ||
1249 | if (reg_unmasked == 0UL) { | |
88d33628 MO |
1250 | dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n", |
1251 | __func__, reg); | |
c21e0bbf MO |
1252 | goto cxlflash_sync_err_irq_exit; |
1253 | } | |
1254 | ||
88d33628 MO |
1255 | dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n", |
1256 | __func__, reg); | |
c21e0bbf | 1257 | |
a583d00a | 1258 | writeq_be(reg_unmasked, &hwq->host_map->intr_clear); |
c21e0bbf MO |
1259 | |
1260 | cxlflash_sync_err_irq_exit: | |
c21e0bbf MO |
1261 | return IRQ_HANDLED; |
1262 | } | |
1263 | ||
1264 | /** | |
9ba1a1fb MO |
1265 | * process_hrrq() - process the read-response queue |
1266 | * @afu: AFU associated with the host. | |
7bb512aa | 1267 | * @doneq: Queue of commands harvested from the RRQ. |
2588f222 | 1268 | * @budget: Threshold of RRQ entries to process. |
7bb512aa MO |
1269 | * |
1270 | * This routine must be called holding the disabled RRQ spin lock. | |
c21e0bbf | 1271 | * |
9ba1a1fb | 1272 | * Return: The number of entries processed. |
c21e0bbf | 1273 | */ |
a583d00a | 1274 | static int process_hrrq(struct hwq *hwq, struct list_head *doneq, int budget) |
c21e0bbf | 1275 | { |
a583d00a | 1276 | struct afu *afu = hwq->afu; |
c21e0bbf | 1277 | struct afu_cmd *cmd; |
bae0ac69 MO |
1278 | struct sisl_ioasa *ioasa; |
1279 | struct sisl_ioarcb *ioarcb; | |
a583d00a | 1280 | bool toggle = hwq->toggle; |
9ba1a1fb | 1281 | int num_hrrq = 0; |
c21e0bbf | 1282 | u64 entry, |
a583d00a UK |
1283 | *hrrq_start = hwq->hrrq_start, |
1284 | *hrrq_end = hwq->hrrq_end, | |
1285 | *hrrq_curr = hwq->hrrq_curr; | |
c21e0bbf | 1286 | |
2588f222 | 1287 | /* Process ready RRQ entries up to the specified budget (if any) */ |
c21e0bbf MO |
1288 | while (true) { |
1289 | entry = *hrrq_curr; | |
1290 | ||
1291 | if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle) | |
1292 | break; | |
1293 | ||
bae0ac69 MO |
1294 | entry &= ~SISL_RESP_HANDLE_T_BIT; |
1295 | ||
1296 | if (afu_is_sq_cmd_mode(afu)) { | |
1297 | ioasa = (struct sisl_ioasa *)entry; | |
1298 | cmd = container_of(ioasa, struct afu_cmd, sa); | |
1299 | } else { | |
1300 | ioarcb = (struct sisl_ioarcb *)entry; | |
1301 | cmd = container_of(ioarcb, struct afu_cmd, rcb); | |
1302 | } | |
1303 | ||
7bb512aa | 1304 | list_add_tail(&cmd->queue, doneq); |
c21e0bbf MO |
1305 | |
1306 | /* Advance to next entry or wrap and flip the toggle bit */ | |
1307 | if (hrrq_curr < hrrq_end) | |
1308 | hrrq_curr++; | |
1309 | else { | |
1310 | hrrq_curr = hrrq_start; | |
1311 | toggle ^= SISL_RESP_HANDLE_T_BIT; | |
1312 | } | |
bae0ac69 | 1313 | |
a583d00a | 1314 | atomic_inc(&hwq->hsq_credits); |
9ba1a1fb | 1315 | num_hrrq++; |
2588f222 MO |
1316 | |
1317 | if (budget > 0 && num_hrrq >= budget) | |
1318 | break; | |
c21e0bbf MO |
1319 | } |
1320 | ||
a583d00a UK |
1321 | hwq->hrrq_curr = hrrq_curr; |
1322 | hwq->toggle = toggle; | |
c21e0bbf | 1323 | |
9ba1a1fb MO |
1324 | return num_hrrq; |
1325 | } | |
1326 | ||
7bb512aa MO |
1327 | /** |
1328 | * process_cmd_doneq() - process a queue of harvested RRQ commands | |
1329 | * @doneq: Queue of completed commands. | |
1330 | * | |
1331 | * Note that upon return the queue can no longer be trusted. | |
1332 | */ | |
1333 | static void process_cmd_doneq(struct list_head *doneq) | |
1334 | { | |
1335 | struct afu_cmd *cmd, *tmp; | |
1336 | ||
1337 | WARN_ON(list_empty(doneq)); | |
1338 | ||
1339 | list_for_each_entry_safe(cmd, tmp, doneq, queue) | |
1340 | cmd_complete(cmd); | |
1341 | } | |
1342 | ||
2588f222 MO |
1343 | /** |
1344 | * cxlflash_irqpoll() - process a queue of harvested RRQ commands | |
1345 | * @irqpoll: IRQ poll structure associated with queue to poll. | |
1346 | * @budget: Threshold of RRQ entries to process per poll. | |
1347 | * | |
1348 | * Return: The number of entries processed. | |
1349 | */ | |
1350 | static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget) | |
1351 | { | |
a583d00a | 1352 | struct hwq *hwq = container_of(irqpoll, struct hwq, irqpoll); |
2588f222 MO |
1353 | unsigned long hrrq_flags; |
1354 | LIST_HEAD(doneq); | |
1355 | int num_entries = 0; | |
1356 | ||
a583d00a | 1357 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
2588f222 | 1358 | |
a583d00a | 1359 | num_entries = process_hrrq(hwq, &doneq, budget); |
2588f222 MO |
1360 | if (num_entries < budget) |
1361 | irq_poll_complete(irqpoll); | |
1362 | ||
a583d00a | 1363 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); |
2588f222 MO |
1364 | |
1365 | process_cmd_doneq(&doneq); | |
1366 | return num_entries; | |
1367 | } | |
1368 | ||
9ba1a1fb MO |
1369 | /** |
1370 | * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) | |
1371 | * @irq: Interrupt number. | |
1372 | * @data: Private data provided at interrupt registration, the AFU. | |
1373 | * | |
7bb512aa | 1374 | * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found. |
9ba1a1fb MO |
1375 | */ |
1376 | static irqreturn_t cxlflash_rrq_irq(int irq, void *data) | |
1377 | { | |
a583d00a UK |
1378 | struct hwq *hwq = (struct hwq *)data; |
1379 | struct afu *afu = hwq->afu; | |
7bb512aa MO |
1380 | unsigned long hrrq_flags; |
1381 | LIST_HEAD(doneq); | |
1382 | int num_entries = 0; | |
9ba1a1fb | 1383 | |
a583d00a | 1384 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
2588f222 MO |
1385 | |
1386 | if (afu_is_irqpoll_enabled(afu)) { | |
a583d00a UK |
1387 | irq_poll_sched(&hwq->irqpoll); |
1388 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); | |
2588f222 MO |
1389 | return IRQ_HANDLED; |
1390 | } | |
1391 | ||
a583d00a UK |
1392 | num_entries = process_hrrq(hwq, &doneq, -1); |
1393 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); | |
7bb512aa MO |
1394 | |
1395 | if (num_entries == 0) | |
1396 | return IRQ_NONE; | |
1397 | ||
1398 | process_cmd_doneq(&doneq); | |
c21e0bbf MO |
1399 | return IRQ_HANDLED; |
1400 | } | |
1401 | ||
8056044c MO |
1402 | /* |
1403 | * Asynchronous interrupt information table | |
1404 | * | |
1405 | * NOTE: | |
1406 | * - Order matters here as this array is indexed by bit position. | |
1407 | * | |
1408 | * - The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro | |
1409 | * as complex and complains due to a lack of parentheses/braces. | |
1410 | */ | |
1411 | #define ASTATUS_FC(_a, _b, _c, _d) \ | |
1412 | { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) } | |
1413 | ||
1414 | #define BUILD_SISL_ASTATUS_FC_PORT(_a) \ | |
1415 | ASTATUS_FC(_a, LINK_UP, "link up", 0), \ | |
1416 | ASTATUS_FC(_a, LINK_DN, "link down", 0), \ | |
1417 | ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \ | |
1418 | ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \ | |
1419 | ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \ | |
1420 | ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \ | |
1421 | ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \ | |
1422 | ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET) | |
1423 | ||
1424 | static const struct asyc_intr_info ainfo[] = { | |
1425 | BUILD_SISL_ASTATUS_FC_PORT(1), | |
1426 | BUILD_SISL_ASTATUS_FC_PORT(0), | |
1427 | BUILD_SISL_ASTATUS_FC_PORT(3), | |
1428 | BUILD_SISL_ASTATUS_FC_PORT(2) | |
1429 | }; | |
1430 | ||
c21e0bbf MO |
1431 | /** |
1432 | * cxlflash_async_err_irq() - interrupt handler for asynchronous errors | |
1433 | * @irq: Interrupt number. | |
1434 | * @data: Private data provided at interrupt registration, the AFU. | |
1435 | * | |
1436 | * Return: Always return IRQ_HANDLED. | |
1437 | */ | |
1438 | static irqreturn_t cxlflash_async_err_irq(int irq, void *data) | |
1439 | { | |
a583d00a UK |
1440 | struct hwq *hwq = (struct hwq *)data; |
1441 | struct afu *afu = hwq->afu; | |
4392ba49 MO |
1442 | struct cxlflash_cfg *cfg = afu->parent; |
1443 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf | 1444 | const struct asyc_intr_info *info; |
1786f4a0 | 1445 | struct sisl_global_map __iomem *global = &afu->afu_map->global; |
c885d3fe | 1446 | __be64 __iomem *fc_port_regs; |
8056044c | 1447 | u64 reg_unmasked; |
c21e0bbf | 1448 | u64 reg; |
8056044c | 1449 | u64 bit; |
c21e0bbf | 1450 | u8 port; |
c21e0bbf | 1451 | |
c21e0bbf MO |
1452 | reg = readq_be(&global->regs.aintr_status); |
1453 | reg_unmasked = (reg & SISL_ASTATUS_UNMASK); | |
1454 | ||
8056044c | 1455 | if (unlikely(reg_unmasked == 0)) { |
88d33628 | 1456 | dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n", |
4392ba49 | 1457 | __func__, reg); |
c21e0bbf MO |
1458 | goto out; |
1459 | } | |
1460 | ||
f15fbf8d | 1461 | /* FYI, it is 'okay' to clear AFU status before FC_ERROR */ |
c21e0bbf MO |
1462 | writeq_be(reg_unmasked, &global->regs.aintr_clear); |
1463 | ||
f15fbf8d | 1464 | /* Check each bit that is on */ |
8056044c MO |
1465 | for_each_set_bit(bit, (ulong *)®_unmasked, BITS_PER_LONG) { |
1466 | if (unlikely(bit >= ARRAY_SIZE(ainfo))) { | |
1467 | WARN_ON_ONCE(1); | |
c21e0bbf | 1468 | continue; |
8056044c MO |
1469 | } |
1470 | ||
1471 | info = &ainfo[bit]; | |
1472 | if (unlikely(info->status != 1ULL << bit)) { | |
1473 | WARN_ON_ONCE(1); | |
1474 | continue; | |
1475 | } | |
c21e0bbf MO |
1476 | |
1477 | port = info->port; | |
c885d3fe | 1478 | fc_port_regs = get_fc_port_regs(cfg, port); |
c21e0bbf | 1479 | |
88d33628 | 1480 | dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n", |
4392ba49 | 1481 | __func__, port, info->desc, |
c885d3fe | 1482 | readq_be(&fc_port_regs[FC_STATUS / 8])); |
c21e0bbf MO |
1483 | |
1484 | /* | |
f15fbf8d | 1485 | * Do link reset first, some OTHER errors will set FC_ERROR |
c21e0bbf MO |
1486 | * again if cleared before or w/o a reset |
1487 | */ | |
1488 | if (info->action & LINK_RESET) { | |
4392ba49 MO |
1489 | dev_err(dev, "%s: FC Port %d: resetting link\n", |
1490 | __func__, port); | |
c21e0bbf MO |
1491 | cfg->lr_state = LINK_RESET_REQUIRED; |
1492 | cfg->lr_port = port; | |
1493 | schedule_work(&cfg->work_q); | |
1494 | } | |
1495 | ||
1496 | if (info->action & CLR_FC_ERROR) { | |
c885d3fe | 1497 | reg = readq_be(&fc_port_regs[FC_ERROR / 8]); |
c21e0bbf MO |
1498 | |
1499 | /* | |
f15fbf8d | 1500 | * Since all errors are unmasked, FC_ERROR and FC_ERRCAP |
c21e0bbf MO |
1501 | * should be the same and tracing one is sufficient. |
1502 | */ | |
1503 | ||
88d33628 | 1504 | dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n", |
4392ba49 | 1505 | __func__, port, reg); |
c21e0bbf | 1506 | |
c885d3fe MO |
1507 | writeq_be(reg, &fc_port_regs[FC_ERROR / 8]); |
1508 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); | |
c21e0bbf | 1509 | } |
ef51074a MO |
1510 | |
1511 | if (info->action & SCAN_HOST) { | |
1512 | atomic_inc(&cfg->scan_host_needed); | |
1513 | schedule_work(&cfg->work_q); | |
1514 | } | |
c21e0bbf MO |
1515 | } |
1516 | ||
1517 | out: | |
c21e0bbf MO |
1518 | return IRQ_HANDLED; |
1519 | } | |
1520 | ||
1521 | /** | |
1522 | * start_context() - starts the master context | |
1284fb0c | 1523 | * @cfg: Internal structure associated with the host. |
a583d00a | 1524 | * @index: Index of the hardware queue. |
c21e0bbf MO |
1525 | * |
1526 | * Return: A success or failure value from CXL services. | |
1527 | */ | |
a583d00a | 1528 | static int start_context(struct cxlflash_cfg *cfg, u32 index) |
c21e0bbf | 1529 | { |
88d33628 | 1530 | struct device *dev = &cfg->dev->dev; |
a583d00a | 1531 | struct hwq *hwq = get_hwq(cfg->afu, index); |
c21e0bbf MO |
1532 | int rc = 0; |
1533 | ||
a583d00a UK |
1534 | rc = cxl_start_context(hwq->ctx, |
1535 | hwq->work.work_element_descriptor, | |
c21e0bbf MO |
1536 | NULL); |
1537 | ||
88d33628 | 1538 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1539 | return rc; |
1540 | } | |
1541 | ||
1542 | /** | |
1543 | * read_vpd() - obtains the WWPNs from VPD | |
1284fb0c | 1544 | * @cfg: Internal structure associated with the host. |
66d4bce4 | 1545 | * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs |
c21e0bbf | 1546 | * |
1284fb0c | 1547 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
1548 | */ |
1549 | static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) | |
1550 | { | |
88d33628 MO |
1551 | struct device *dev = &cfg->dev->dev; |
1552 | struct pci_dev *pdev = cfg->dev; | |
c21e0bbf MO |
1553 | int rc = 0; |
1554 | int ro_start, ro_size, i, j, k; | |
1555 | ssize_t vpd_size; | |
1556 | char vpd_data[CXLFLASH_VPD_LEN]; | |
1557 | char tmp_buf[WWPN_BUF_LEN] = { 0 }; | |
bdcff1c5 | 1558 | char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" }; |
c21e0bbf MO |
1559 | |
1560 | /* Get the VPD data from the device */ | |
88d33628 | 1561 | vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data)); |
c21e0bbf | 1562 | if (unlikely(vpd_size <= 0)) { |
88d33628 MO |
1563 | dev_err(dev, "%s: Unable to read VPD (size = %ld)\n", |
1564 | __func__, vpd_size); | |
c21e0bbf MO |
1565 | rc = -ENODEV; |
1566 | goto out; | |
1567 | } | |
1568 | ||
1569 | /* Get the read only section offset */ | |
1570 | ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, | |
1571 | PCI_VPD_LRDT_RO_DATA); | |
1572 | if (unlikely(ro_start < 0)) { | |
88d33628 | 1573 | dev_err(dev, "%s: VPD Read-only data not found\n", __func__); |
c21e0bbf MO |
1574 | rc = -ENODEV; |
1575 | goto out; | |
1576 | } | |
1577 | ||
1578 | /* Get the read only section size, cap when extends beyond read VPD */ | |
1579 | ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); | |
1580 | j = ro_size; | |
1581 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; | |
1582 | if (unlikely((i + j) > vpd_size)) { | |
88d33628 MO |
1583 | dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n", |
1584 | __func__, (i + j), vpd_size); | |
c21e0bbf MO |
1585 | ro_size = vpd_size - i; |
1586 | } | |
1587 | ||
1588 | /* | |
1589 | * Find the offset of the WWPN tag within the read only | |
1590 | * VPD data and validate the found field (partials are | |
1591 | * no good to us). Convert the ASCII data to an integer | |
1592 | * value. Note that we must copy to a temporary buffer | |
1593 | * because the conversion service requires that the ASCII | |
1594 | * string be terminated. | |
1595 | */ | |
66d4bce4 | 1596 | for (k = 0; k < cfg->num_fc_ports; k++) { |
c21e0bbf MO |
1597 | j = ro_size; |
1598 | i = ro_start + PCI_VPD_LRDT_TAG_SIZE; | |
1599 | ||
1600 | i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]); | |
1601 | if (unlikely(i < 0)) { | |
88d33628 MO |
1602 | dev_err(dev, "%s: Port %d WWPN not found in VPD\n", |
1603 | __func__, k); | |
c21e0bbf MO |
1604 | rc = -ENODEV; |
1605 | goto out; | |
1606 | } | |
1607 | ||
1608 | j = pci_vpd_info_field_size(&vpd_data[i]); | |
1609 | i += PCI_VPD_INFO_FLD_HDR_SIZE; | |
1610 | if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) { | |
88d33628 MO |
1611 | dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n", |
1612 | __func__, k); | |
c21e0bbf MO |
1613 | rc = -ENODEV; |
1614 | goto out; | |
1615 | } | |
1616 | ||
1617 | memcpy(tmp_buf, &vpd_data[i], WWPN_LEN); | |
1618 | rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]); | |
1619 | if (unlikely(rc)) { | |
88d33628 MO |
1620 | dev_err(dev, "%s: WWPN conversion failed for port %d\n", |
1621 | __func__, k); | |
c21e0bbf MO |
1622 | rc = -ENODEV; |
1623 | goto out; | |
1624 | } | |
66d4bce4 MO |
1625 | |
1626 | dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]); | |
c21e0bbf MO |
1627 | } |
1628 | ||
1629 | out: | |
88d33628 | 1630 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1631 | return rc; |
1632 | } | |
1633 | ||
1634 | /** | |
15305514 | 1635 | * init_pcr() - initialize the provisioning and control registers |
1284fb0c | 1636 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1637 | * |
15305514 MO |
1638 | * Also sets up fast access to the mapped registers and initializes AFU |
1639 | * command fields that never change. | |
c21e0bbf | 1640 | */ |
15305514 | 1641 | static void init_pcr(struct cxlflash_cfg *cfg) |
c21e0bbf MO |
1642 | { |
1643 | struct afu *afu = cfg->afu; | |
1786f4a0 | 1644 | struct sisl_ctrl_map __iomem *ctrl_map; |
a583d00a | 1645 | struct hwq *hwq; |
c21e0bbf MO |
1646 | int i; |
1647 | ||
1648 | for (i = 0; i < MAX_CONTEXT; i++) { | |
1649 | ctrl_map = &afu->afu_map->ctrls[i].ctrl; | |
f15fbf8d MO |
1650 | /* Disrupt any clients that could be running */ |
1651 | /* e.g. clients that survived a master restart */ | |
c21e0bbf MO |
1652 | writeq_be(0, &ctrl_map->rht_start); |
1653 | writeq_be(0, &ctrl_map->rht_cnt_id); | |
1654 | writeq_be(0, &ctrl_map->ctx_cap); | |
1655 | } | |
1656 | ||
a583d00a | 1657 | /* Copy frequently used fields into hwq */ |
bb85ef68 | 1658 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
1659 | hwq = get_hwq(afu, i); |
1660 | ||
1661 | hwq->ctx_hndl = (u16) cxl_process_element(hwq->ctx); | |
1662 | hwq->host_map = &afu->afu_map->hosts[hwq->ctx_hndl].host; | |
1663 | hwq->ctrl_map = &afu->afu_map->ctrls[hwq->ctx_hndl].ctrl; | |
c21e0bbf | 1664 | |
a583d00a UK |
1665 | /* Program the Endian Control for the master context */ |
1666 | writeq_be(SISL_ENDIAN_CTRL, &hwq->host_map->endian_ctrl); | |
1667 | } | |
c21e0bbf MO |
1668 | } |
1669 | ||
1670 | /** | |
1671 | * init_global() - initialize AFU global registers | |
1284fb0c | 1672 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1673 | */ |
15305514 | 1674 | static int init_global(struct cxlflash_cfg *cfg) |
c21e0bbf MO |
1675 | { |
1676 | struct afu *afu = cfg->afu; | |
4392ba49 | 1677 | struct device *dev = &cfg->dev->dev; |
a583d00a UK |
1678 | struct hwq *hwq; |
1679 | struct sisl_host_map __iomem *hmap; | |
c885d3fe | 1680 | __be64 __iomem *fc_port_regs; |
66d4bce4 | 1681 | u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */ |
c21e0bbf MO |
1682 | int i = 0, num_ports = 0; |
1683 | int rc = 0; | |
1684 | u64 reg; | |
1685 | ||
1686 | rc = read_vpd(cfg, &wwpn[0]); | |
1687 | if (rc) { | |
4392ba49 | 1688 | dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc); |
c21e0bbf MO |
1689 | goto out; |
1690 | } | |
1691 | ||
a583d00a | 1692 | /* Set up RRQ and SQ in HWQ for master issued cmds */ |
bb85ef68 | 1693 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
1694 | hwq = get_hwq(afu, i); |
1695 | hmap = hwq->host_map; | |
c21e0bbf | 1696 | |
a583d00a UK |
1697 | writeq_be((u64) hwq->hrrq_start, &hmap->rrq_start); |
1698 | writeq_be((u64) hwq->hrrq_end, &hmap->rrq_end); | |
1699 | ||
1700 | if (afu_is_sq_cmd_mode(afu)) { | |
1701 | writeq_be((u64)hwq->hsq_start, &hmap->sq_start); | |
1702 | writeq_be((u64)hwq->hsq_end, &hmap->sq_end); | |
1703 | } | |
bae0ac69 MO |
1704 | } |
1705 | ||
c21e0bbf MO |
1706 | /* AFU configuration */ |
1707 | reg = readq_be(&afu->afu_map->global.regs.afu_config); | |
1708 | reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN; | |
1709 | /* enable all auto retry options and control endianness */ | |
1710 | /* leave others at default: */ | |
1711 | /* CTX_CAP write protected, mbox_r does not clear on read and */ | |
1712 | /* checker on if dual afu */ | |
1713 | writeq_be(reg, &afu->afu_map->global.regs.afu_config); | |
1714 | ||
f15fbf8d | 1715 | /* Global port select: select either port */ |
c21e0bbf | 1716 | if (afu->internal_lun) { |
f15fbf8d | 1717 | /* Only use port 0 */ |
c21e0bbf | 1718 | writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel); |
66d4bce4 | 1719 | num_ports = 0; |
c21e0bbf | 1720 | } else { |
e8e17ea6 MO |
1721 | writeq_be(PORT_MASK(cfg->num_fc_ports), |
1722 | &afu->afu_map->global.regs.afu_port_sel); | |
66d4bce4 | 1723 | num_ports = cfg->num_fc_ports; |
c21e0bbf MO |
1724 | } |
1725 | ||
1726 | for (i = 0; i < num_ports; i++) { | |
c885d3fe MO |
1727 | fc_port_regs = get_fc_port_regs(cfg, i); |
1728 | ||
f15fbf8d | 1729 | /* Unmask all errors (but they are still masked at AFU) */ |
c885d3fe | 1730 | writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]); |
f15fbf8d | 1731 | /* Clear CRC error cnt & set a threshold */ |
c885d3fe MO |
1732 | (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]); |
1733 | writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]); | |
c21e0bbf | 1734 | |
f15fbf8d | 1735 | /* Set WWPNs. If already programmed, wwpn[i] is 0 */ |
f8013261 | 1736 | if (wwpn[i] != 0) |
c885d3fe | 1737 | afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]); |
c21e0bbf MO |
1738 | /* Programming WWPN back to back causes additional |
1739 | * offline/online transitions and a PLOGI | |
1740 | */ | |
1741 | msleep(100); | |
c21e0bbf MO |
1742 | } |
1743 | ||
f15fbf8d MO |
1744 | /* Set up master's own CTX_CAP to allow real mode, host translation */ |
1745 | /* tables, afu cmds and read/write GSCSI cmds. */ | |
c21e0bbf | 1746 | /* First, unlock ctx_cap write by reading mbox */ |
bb85ef68 | 1747 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
1748 | hwq = get_hwq(afu, i); |
1749 | ||
1750 | (void)readq_be(&hwq->ctrl_map->mbox_r); /* unlock ctx_cap */ | |
1751 | writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | | |
1752 | SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | | |
1753 | SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), | |
1754 | &hwq->ctrl_map->ctx_cap); | |
1755 | } | |
f15fbf8d | 1756 | /* Initialize heartbeat */ |
c21e0bbf | 1757 | afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb); |
c21e0bbf MO |
1758 | out: |
1759 | return rc; | |
1760 | } | |
1761 | ||
1762 | /** | |
1763 | * start_afu() - initializes and starts the AFU | |
1284fb0c | 1764 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
1765 | */ |
1766 | static int start_afu(struct cxlflash_cfg *cfg) | |
1767 | { | |
1768 | struct afu *afu = cfg->afu; | |
88d33628 | 1769 | struct device *dev = &cfg->dev->dev; |
a583d00a | 1770 | struct hwq *hwq; |
c21e0bbf | 1771 | int rc = 0; |
a583d00a | 1772 | int i; |
c21e0bbf | 1773 | |
c21e0bbf MO |
1774 | init_pcr(cfg); |
1775 | ||
a583d00a | 1776 | /* Initialize each HWQ */ |
bb85ef68 | 1777 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a | 1778 | hwq = get_hwq(afu, i); |
c21e0bbf | 1779 | |
a583d00a UK |
1780 | /* After an AFU reset, RRQ entries are stale, clear them */ |
1781 | memset(&hwq->rrq_entry, 0, sizeof(hwq->rrq_entry)); | |
bae0ac69 | 1782 | |
a583d00a UK |
1783 | /* Initialize RRQ pointers */ |
1784 | hwq->hrrq_start = &hwq->rrq_entry[0]; | |
1785 | hwq->hrrq_end = &hwq->rrq_entry[NUM_RRQ_ENTRY - 1]; | |
1786 | hwq->hrrq_curr = hwq->hrrq_start; | |
1787 | hwq->toggle = 1; | |
edc034e8 UK |
1788 | |
1789 | /* Initialize spin locks */ | |
a583d00a | 1790 | spin_lock_init(&hwq->hrrq_slock); |
edc034e8 | 1791 | spin_lock_init(&hwq->hsq_slock); |
bae0ac69 | 1792 | |
a583d00a UK |
1793 | /* Initialize SQ */ |
1794 | if (afu_is_sq_cmd_mode(afu)) { | |
1795 | memset(&hwq->sq, 0, sizeof(hwq->sq)); | |
1796 | hwq->hsq_start = &hwq->sq[0]; | |
1797 | hwq->hsq_end = &hwq->sq[NUM_SQ_ENTRY - 1]; | |
1798 | hwq->hsq_curr = hwq->hsq_start; | |
1799 | ||
a583d00a UK |
1800 | atomic_set(&hwq->hsq_credits, NUM_SQ_ENTRY - 1); |
1801 | } | |
1802 | ||
1803 | /* Initialize IRQ poll */ | |
1804 | if (afu_is_irqpoll_enabled(afu)) | |
1805 | irq_poll_init(&hwq->irqpoll, afu->irqpoll_weight, | |
1806 | cxlflash_irqpoll); | |
1807 | ||
1808 | } | |
2588f222 | 1809 | |
c21e0bbf MO |
1810 | rc = init_global(cfg); |
1811 | ||
88d33628 | 1812 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1813 | return rc; |
1814 | } | |
1815 | ||
1816 | /** | |
9526f360 | 1817 | * init_intr() - setup interrupt handlers for the master context |
1284fb0c | 1818 | * @cfg: Internal structure associated with the host. |
a583d00a | 1819 | * @hwq: Hardware queue to initialize. |
c21e0bbf | 1820 | * |
1284fb0c | 1821 | * Return: 0 on success, -errno on failure |
c21e0bbf | 1822 | */ |
9526f360 | 1823 | static enum undo_level init_intr(struct cxlflash_cfg *cfg, |
a583d00a | 1824 | struct hwq *hwq) |
c21e0bbf | 1825 | { |
9526f360 | 1826 | struct device *dev = &cfg->dev->dev; |
a583d00a | 1827 | struct cxl_context *ctx = hwq->ctx; |
c21e0bbf | 1828 | int rc = 0; |
9526f360 | 1829 | enum undo_level level = UNDO_NOOP; |
a583d00a UK |
1830 | bool is_primary_hwq = (hwq->index == PRIMARY_HWQ); |
1831 | int num_irqs = is_primary_hwq ? 3 : 2; | |
c21e0bbf | 1832 | |
a583d00a | 1833 | rc = cxl_allocate_afu_irqs(ctx, num_irqs); |
c21e0bbf | 1834 | if (unlikely(rc)) { |
88d33628 | 1835 | dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n", |
c21e0bbf | 1836 | __func__, rc); |
9526f360 | 1837 | level = UNDO_NOOP; |
c21e0bbf MO |
1838 | goto out; |
1839 | } | |
1840 | ||
a583d00a | 1841 | rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, hwq, |
c21e0bbf MO |
1842 | "SISL_MSI_SYNC_ERROR"); |
1843 | if (unlikely(rc <= 0)) { | |
88d33628 | 1844 | dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__); |
c21e0bbf MO |
1845 | level = FREE_IRQ; |
1846 | goto out; | |
1847 | } | |
1848 | ||
a583d00a | 1849 | rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, hwq, |
c21e0bbf MO |
1850 | "SISL_MSI_RRQ_UPDATED"); |
1851 | if (unlikely(rc <= 0)) { | |
88d33628 | 1852 | dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__); |
c21e0bbf MO |
1853 | level = UNMAP_ONE; |
1854 | goto out; | |
1855 | } | |
1856 | ||
a583d00a UK |
1857 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
1858 | if (!is_primary_hwq) | |
1859 | goto out; | |
1860 | ||
1861 | rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, hwq, | |
c21e0bbf MO |
1862 | "SISL_MSI_ASYNC_ERROR"); |
1863 | if (unlikely(rc <= 0)) { | |
88d33628 | 1864 | dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__); |
c21e0bbf MO |
1865 | level = UNMAP_TWO; |
1866 | goto out; | |
1867 | } | |
9526f360 MK |
1868 | out: |
1869 | return level; | |
1870 | } | |
c21e0bbf | 1871 | |
9526f360 MK |
1872 | /** |
1873 | * init_mc() - create and register as the master context | |
1874 | * @cfg: Internal structure associated with the host. | |
a583d00a | 1875 | * index: HWQ Index of the master context. |
9526f360 MK |
1876 | * |
1877 | * Return: 0 on success, -errno on failure | |
1878 | */ | |
a583d00a | 1879 | static int init_mc(struct cxlflash_cfg *cfg, u32 index) |
9526f360 MK |
1880 | { |
1881 | struct cxl_context *ctx; | |
1882 | struct device *dev = &cfg->dev->dev; | |
a583d00a | 1883 | struct hwq *hwq = get_hwq(cfg->afu, index); |
9526f360 MK |
1884 | int rc = 0; |
1885 | enum undo_level level; | |
1886 | ||
a583d00a UK |
1887 | hwq->afu = cfg->afu; |
1888 | hwq->index = index; | |
d732d14f | 1889 | INIT_LIST_HEAD(&hwq->pending_cmds); |
a583d00a UK |
1890 | |
1891 | if (index == PRIMARY_HWQ) | |
1892 | ctx = cxl_get_context(cfg->dev); | |
1893 | else | |
1894 | ctx = cxl_dev_context_init(cfg->dev); | |
9526f360 MK |
1895 | if (unlikely(!ctx)) { |
1896 | rc = -ENOMEM; | |
a583d00a | 1897 | goto err1; |
9526f360 | 1898 | } |
a583d00a UK |
1899 | |
1900 | WARN_ON(hwq->ctx); | |
1901 | hwq->ctx = ctx; | |
9526f360 MK |
1902 | |
1903 | /* Set it up as a master with the CXL */ | |
1904 | cxl_set_master(ctx); | |
1905 | ||
a583d00a UK |
1906 | /* Reset AFU when initializing primary context */ |
1907 | if (index == PRIMARY_HWQ) { | |
1908 | rc = cxl_afu_reset(ctx); | |
1909 | if (unlikely(rc)) { | |
1910 | dev_err(dev, "%s: AFU reset failed rc=%d\n", | |
1911 | __func__, rc); | |
1912 | goto err1; | |
1913 | } | |
9526f360 MK |
1914 | } |
1915 | ||
a583d00a | 1916 | level = init_intr(cfg, hwq); |
9526f360 | 1917 | if (unlikely(level)) { |
88d33628 | 1918 | dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc); |
a583d00a | 1919 | goto err2; |
9526f360 | 1920 | } |
c21e0bbf MO |
1921 | |
1922 | /* This performs the equivalent of the CXL_IOCTL_START_WORK. | |
1923 | * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process | |
1924 | * element (pe) that is embedded in the context (ctx) | |
1925 | */ | |
a583d00a | 1926 | rc = start_context(cfg, index); |
c21e0bbf MO |
1927 | if (unlikely(rc)) { |
1928 | dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc); | |
1929 | level = UNMAP_THREE; | |
a583d00a | 1930 | goto err2; |
c21e0bbf | 1931 | } |
a583d00a UK |
1932 | |
1933 | out: | |
88d33628 | 1934 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 1935 | return rc; |
a583d00a UK |
1936 | err2: |
1937 | term_intr(cfg, level, index); | |
1938 | if (index != PRIMARY_HWQ) | |
1939 | cxl_release_context(ctx); | |
1940 | err1: | |
1941 | hwq->ctx = NULL; | |
1942 | goto out; | |
c21e0bbf MO |
1943 | } |
1944 | ||
a290b480 MO |
1945 | /** |
1946 | * get_num_afu_ports() - determines and configures the number of AFU ports | |
1947 | * @cfg: Internal structure associated with the host. | |
1948 | * | |
1949 | * This routine determines the number of AFU ports by converting the global | |
1950 | * port selection mask. The converted value is only valid following an AFU | |
1951 | * reset (explicit or power-on). This routine must be invoked shortly after | |
1952 | * mapping as other routines are dependent on the number of ports during the | |
1953 | * initialization sequence. | |
1954 | * | |
1955 | * To support legacy AFUs that might not have reflected an initial global | |
1956 | * port mask (value read is 0), default to the number of ports originally | |
1957 | * supported by the cxlflash driver (2) before hardware with other port | |
1958 | * offerings was introduced. | |
1959 | */ | |
1960 | static void get_num_afu_ports(struct cxlflash_cfg *cfg) | |
1961 | { | |
1962 | struct afu *afu = cfg->afu; | |
1963 | struct device *dev = &cfg->dev->dev; | |
1964 | u64 port_mask; | |
1965 | int num_fc_ports = LEGACY_FC_PORTS; | |
1966 | ||
1967 | port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel); | |
1968 | if (port_mask != 0ULL) | |
1969 | num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS); | |
1970 | ||
1971 | dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n", | |
1972 | __func__, port_mask, num_fc_ports); | |
1973 | ||
1974 | cfg->num_fc_ports = num_fc_ports; | |
1975 | cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports); | |
1976 | } | |
1977 | ||
c21e0bbf MO |
1978 | /** |
1979 | * init_afu() - setup as master context and start AFU | |
1284fb0c | 1980 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
1981 | * |
1982 | * This routine is a higher level of control for configuring the | |
1983 | * AFU on probe and reset paths. | |
1984 | * | |
1284fb0c | 1985 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
1986 | */ |
1987 | static int init_afu(struct cxlflash_cfg *cfg) | |
1988 | { | |
1989 | u64 reg; | |
1990 | int rc = 0; | |
1991 | struct afu *afu = cfg->afu; | |
1992 | struct device *dev = &cfg->dev->dev; | |
a583d00a UK |
1993 | struct hwq *hwq; |
1994 | int i; | |
c21e0bbf | 1995 | |
5cdac81a MO |
1996 | cxl_perst_reloads_same_image(cfg->cxl_afu, true); |
1997 | ||
bb85ef68 MO |
1998 | afu->num_hwqs = afu->desired_hwqs; |
1999 | for (i = 0; i < afu->num_hwqs; i++) { | |
a583d00a UK |
2000 | rc = init_mc(cfg, i); |
2001 | if (rc) { | |
2002 | dev_err(dev, "%s: init_mc failed rc=%d index=%d\n", | |
2003 | __func__, rc, i); | |
2004 | goto err1; | |
2005 | } | |
c21e0bbf MO |
2006 | } |
2007 | ||
a583d00a UK |
2008 | /* Map the entire MMIO space of the AFU using the first context */ |
2009 | hwq = get_hwq(afu, PRIMARY_HWQ); | |
2010 | afu->afu_map = cxl_psa_map(hwq->ctx); | |
c21e0bbf | 2011 | if (!afu->afu_map) { |
88d33628 | 2012 | dev_err(dev, "%s: cxl_psa_map failed\n", __func__); |
ee3491ba | 2013 | rc = -ENOMEM; |
c21e0bbf MO |
2014 | goto err1; |
2015 | } | |
2016 | ||
e5ce067b MO |
2017 | /* No byte reverse on reading afu_version or string will be backwards */ |
2018 | reg = readq(&afu->afu_map->global.regs.afu_version); | |
2019 | memcpy(afu->version, ®, sizeof(reg)); | |
c21e0bbf MO |
2020 | afu->interface_version = |
2021 | readq_be(&afu->afu_map->global.regs.interface_version); | |
e5ce067b | 2022 | if ((afu->interface_version + 1) == 0) { |
88d33628 MO |
2023 | dev_err(dev, "Back level AFU, please upgrade. AFU version %s " |
2024 | "interface version %016llx\n", afu->version, | |
e5ce067b MO |
2025 | afu->interface_version); |
2026 | rc = -EINVAL; | |
d940f9ae | 2027 | goto err1; |
ee3491ba MO |
2028 | } |
2029 | ||
bae0ac69 MO |
2030 | if (afu_is_sq_cmd_mode(afu)) { |
2031 | afu->send_cmd = send_cmd_sq; | |
2032 | afu->context_reset = context_reset_sq; | |
2033 | } else { | |
2034 | afu->send_cmd = send_cmd_ioarrin; | |
2035 | afu->context_reset = context_reset_ioarrin; | |
2036 | } | |
48b4be36 | 2037 | |
88d33628 MO |
2038 | dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__, |
2039 | afu->version, afu->interface_version); | |
c21e0bbf | 2040 | |
a290b480 MO |
2041 | get_num_afu_ports(cfg); |
2042 | ||
c21e0bbf MO |
2043 | rc = start_afu(cfg); |
2044 | if (rc) { | |
88d33628 | 2045 | dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc); |
d940f9ae | 2046 | goto err1; |
c21e0bbf MO |
2047 | } |
2048 | ||
2049 | afu_err_intr_init(cfg->afu); | |
bb85ef68 | 2050 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
2051 | hwq = get_hwq(afu, i); |
2052 | ||
a583d00a UK |
2053 | hwq->room = readq_be(&hwq->host_map->cmd_room); |
2054 | } | |
c21e0bbf | 2055 | |
2cb79266 MO |
2056 | /* Restore the LUN mappings */ |
2057 | cxlflash_restore_luntable(cfg); | |
ee3491ba | 2058 | out: |
88d33628 | 2059 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 2060 | return rc; |
ee3491ba | 2061 | |
ee3491ba | 2062 | err1: |
bb85ef68 | 2063 | for (i = afu->num_hwqs - 1; i >= 0; i--) { |
a583d00a UK |
2064 | term_intr(cfg, UNMAP_THREE, i); |
2065 | term_mc(cfg, i); | |
2066 | } | |
ee3491ba | 2067 | goto out; |
c21e0bbf MO |
2068 | } |
2069 | ||
3b4f03cd UK |
2070 | /** |
2071 | * afu_reset() - resets the AFU | |
2072 | * @cfg: Internal structure associated with the host. | |
2073 | * | |
2074 | * Return: 0 on success, -errno on failure | |
2075 | */ | |
2076 | static int afu_reset(struct cxlflash_cfg *cfg) | |
2077 | { | |
2078 | struct device *dev = &cfg->dev->dev; | |
2079 | int rc = 0; | |
2080 | ||
2081 | /* Stop the context before the reset. Since the context is | |
2082 | * no longer available restart it after the reset is complete | |
2083 | */ | |
2084 | term_afu(cfg); | |
2085 | ||
2086 | rc = init_afu(cfg); | |
2087 | ||
2088 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); | |
2089 | return rc; | |
2090 | } | |
2091 | ||
2092 | /** | |
2093 | * drain_ioctls() - wait until all currently executing ioctls have completed | |
2094 | * @cfg: Internal structure associated with the host. | |
2095 | * | |
2096 | * Obtain write access to read/write semaphore that wraps ioctl | |
2097 | * handling to 'drain' ioctls currently executing. | |
2098 | */ | |
2099 | static void drain_ioctls(struct cxlflash_cfg *cfg) | |
2100 | { | |
2101 | down_write(&cfg->ioctl_rwsem); | |
2102 | up_write(&cfg->ioctl_rwsem); | |
2103 | } | |
2104 | ||
2105 | /** | |
2106 | * cxlflash_async_reset_host() - asynchronous host reset handler | |
2107 | * @data: Private data provided while scheduling reset. | |
2108 | * @cookie: Cookie that can be used for checkpointing. | |
2109 | */ | |
2110 | static void cxlflash_async_reset_host(void *data, async_cookie_t cookie) | |
2111 | { | |
2112 | struct cxlflash_cfg *cfg = data; | |
2113 | struct device *dev = &cfg->dev->dev; | |
2114 | int rc = 0; | |
2115 | ||
2116 | if (cfg->state != STATE_RESET) { | |
2117 | dev_dbg(dev, "%s: Not performing a reset, state=%d\n", | |
2118 | __func__, cfg->state); | |
2119 | goto out; | |
2120 | } | |
2121 | ||
2122 | drain_ioctls(cfg); | |
2123 | cxlflash_mark_contexts_error(cfg); | |
2124 | rc = afu_reset(cfg); | |
2125 | if (rc) | |
2126 | cfg->state = STATE_FAILTERM; | |
2127 | else | |
2128 | cfg->state = STATE_NORMAL; | |
2129 | wake_up_all(&cfg->reset_waitq); | |
2130 | ||
2131 | out: | |
2132 | scsi_unblock_requests(cfg->host); | |
2133 | } | |
2134 | ||
2135 | /** | |
2136 | * cxlflash_schedule_async_reset() - schedule an asynchronous host reset | |
2137 | * @cfg: Internal structure associated with the host. | |
2138 | */ | |
2139 | static void cxlflash_schedule_async_reset(struct cxlflash_cfg *cfg) | |
2140 | { | |
2141 | struct device *dev = &cfg->dev->dev; | |
2142 | ||
2143 | if (cfg->state != STATE_NORMAL) { | |
2144 | dev_dbg(dev, "%s: Not performing reset state=%d\n", | |
2145 | __func__, cfg->state); | |
2146 | return; | |
2147 | } | |
2148 | ||
2149 | cfg->state = STATE_RESET; | |
2150 | scsi_block_requests(cfg->host); | |
2151 | cfg->async_reset_cookie = async_schedule(cxlflash_async_reset_host, | |
2152 | cfg); | |
2153 | } | |
2154 | ||
c21e0bbf MO |
2155 | /** |
2156 | * cxlflash_afu_sync() - builds and sends an AFU sync command | |
2157 | * @afu: AFU associated with the host. | |
2158 | * @ctx_hndl_u: Identifies context requesting sync. | |
2159 | * @res_hndl_u: Identifies resource requesting sync. | |
2160 | * @mode: Type of sync to issue (lightweight, heavyweight, global). | |
2161 | * | |
2162 | * The AFU can only take 1 sync command at a time. This routine enforces this | |
f15fbf8d | 2163 | * limitation by using a mutex to provide exclusive access to the AFU during |
c21e0bbf MO |
2164 | * the sync. This design point requires calling threads to not be on interrupt |
2165 | * context due to the possibility of sleeping during concurrent sync operations. | |
2166 | * | |
5cdac81a MO |
2167 | * AFU sync operations are only necessary and allowed when the device is |
2168 | * operating normally. When not operating normally, sync requests can occur as | |
2169 | * part of cleaning up resources associated with an adapter prior to removal. | |
2170 | * In this scenario, these requests are simply ignored (safe due to the AFU | |
2171 | * going away). | |
2172 | * | |
c21e0bbf | 2173 | * Return: |
91995b34 | 2174 | * 0 on success, -errno on failure |
c21e0bbf MO |
2175 | */ |
2176 | int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u, | |
2177 | res_hndl_t res_hndl_u, u8 mode) | |
2178 | { | |
5cdac81a | 2179 | struct cxlflash_cfg *cfg = afu->parent; |
4392ba49 | 2180 | struct device *dev = &cfg->dev->dev; |
c21e0bbf | 2181 | struct afu_cmd *cmd = NULL; |
a583d00a | 2182 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
350bb478 | 2183 | char *buf = NULL; |
c21e0bbf | 2184 | int rc = 0; |
ddc869e9 | 2185 | int nretry = 0; |
c21e0bbf MO |
2186 | static DEFINE_MUTEX(sync_active); |
2187 | ||
5cdac81a | 2188 | if (cfg->state != STATE_NORMAL) { |
88d33628 MO |
2189 | dev_dbg(dev, "%s: Sync not required state=%u\n", |
2190 | __func__, cfg->state); | |
5cdac81a MO |
2191 | return 0; |
2192 | } | |
2193 | ||
c21e0bbf | 2194 | mutex_lock(&sync_active); |
de01283b | 2195 | atomic_inc(&afu->cmds_active); |
2450a5e3 | 2196 | buf = kmalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL); |
350bb478 MO |
2197 | if (unlikely(!buf)) { |
2198 | dev_err(dev, "%s: no memory for command\n", __func__); | |
91995b34 | 2199 | rc = -ENOMEM; |
c21e0bbf MO |
2200 | goto out; |
2201 | } | |
2202 | ||
350bb478 | 2203 | cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd)); |
ddc869e9 UK |
2204 | |
2205 | retry: | |
2450a5e3 UK |
2206 | memset(cmd, 0, sizeof(*cmd)); |
2207 | INIT_LIST_HEAD(&cmd->queue); | |
350bb478 | 2208 | init_completion(&cmd->cevent); |
350bb478 | 2209 | cmd->parent = afu; |
a583d00a | 2210 | cmd->hwq_index = hwq->index; |
c21e0bbf | 2211 | |
ddc869e9 UK |
2212 | dev_dbg(dev, "%s: afu=%p cmd=%p ctx=%d nretry=%d\n", |
2213 | __func__, afu, cmd, ctx_hndl_u, nretry); | |
c21e0bbf MO |
2214 | |
2215 | cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; | |
a583d00a | 2216 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
350bb478 | 2217 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
c21e0bbf MO |
2218 | cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT; |
2219 | ||
2220 | cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */ | |
2221 | cmd->rcb.cdb[1] = mode; | |
2222 | ||
2223 | /* The cdb is aligned, no unaligned accessors required */ | |
1786f4a0 MO |
2224 | *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u); |
2225 | *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u); | |
c21e0bbf | 2226 | |
48b4be36 | 2227 | rc = afu->send_cmd(afu, cmd); |
91995b34 UK |
2228 | if (unlikely(rc)) { |
2229 | rc = -ENOBUFS; | |
c21e0bbf | 2230 | goto out; |
91995b34 | 2231 | } |
c21e0bbf | 2232 | |
9ba848ac | 2233 | rc = wait_resp(afu, cmd); |
2450a5e3 UK |
2234 | switch (rc) { |
2235 | case -ETIMEDOUT: | |
ddc869e9 | 2236 | rc = afu->context_reset(hwq); |
2450a5e3 UK |
2237 | if (rc) { |
2238 | cxlflash_schedule_async_reset(cfg); | |
2239 | break; | |
2240 | } | |
2241 | /* fall through to retry */ | |
2242 | case -EAGAIN: | |
2243 | if (++nretry < 2) | |
ddc869e9 | 2244 | goto retry; |
2450a5e3 UK |
2245 | /* fall through to exit */ |
2246 | default: | |
2247 | break; | |
ddc869e9 UK |
2248 | } |
2249 | ||
c21e0bbf | 2250 | out: |
de01283b | 2251 | atomic_dec(&afu->cmds_active); |
c21e0bbf | 2252 | mutex_unlock(&sync_active); |
350bb478 | 2253 | kfree(buf); |
88d33628 | 2254 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
2255 | return rc; |
2256 | } | |
2257 | ||
15305514 MO |
2258 | /** |
2259 | * cxlflash_eh_device_reset_handler() - reset a single LUN | |
2260 | * @scp: SCSI command to send. | |
2261 | * | |
2262 | * Return: | |
2263 | * SUCCESS as defined in scsi/scsi.h | |
2264 | * FAILED as defined in scsi/scsi.h | |
2265 | */ | |
2266 | static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp) | |
2267 | { | |
2268 | int rc = SUCCESS; | |
2269 | struct Scsi_Host *host = scp->device->host; | |
88d33628 MO |
2270 | struct cxlflash_cfg *cfg = shost_priv(host); |
2271 | struct device *dev = &cfg->dev->dev; | |
15305514 MO |
2272 | struct afu *afu = cfg->afu; |
2273 | int rcr = 0; | |
2274 | ||
88d33628 MO |
2275 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
2276 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, | |
2277 | scp->device->channel, scp->device->id, scp->device->lun, | |
2278 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
2279 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
2280 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
2281 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
15305514 | 2282 | |
ed486daa | 2283 | retry: |
15305514 MO |
2284 | switch (cfg->state) { |
2285 | case STATE_NORMAL: | |
2286 | rcr = send_tmf(afu, scp, TMF_LUN_RESET); | |
2287 | if (unlikely(rcr)) | |
2288 | rc = FAILED; | |
2289 | break; | |
2290 | case STATE_RESET: | |
2291 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
ed486daa | 2292 | goto retry; |
15305514 MO |
2293 | default: |
2294 | rc = FAILED; | |
2295 | break; | |
2296 | } | |
2297 | ||
88d33628 | 2298 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
15305514 MO |
2299 | return rc; |
2300 | } | |
2301 | ||
2302 | /** | |
2303 | * cxlflash_eh_host_reset_handler() - reset the host adapter | |
2304 | * @scp: SCSI command from stack identifying host. | |
2305 | * | |
1d3324c3 MO |
2306 | * Following a reset, the state is evaluated again in case an EEH occurred |
2307 | * during the reset. In such a scenario, the host reset will either yield | |
2308 | * until the EEH recovery is complete or return success or failure based | |
2309 | * upon the current device state. | |
2310 | * | |
15305514 MO |
2311 | * Return: |
2312 | * SUCCESS as defined in scsi/scsi.h | |
2313 | * FAILED as defined in scsi/scsi.h | |
2314 | */ | |
2315 | static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp) | |
2316 | { | |
2317 | int rc = SUCCESS; | |
2318 | int rcr = 0; | |
2319 | struct Scsi_Host *host = scp->device->host; | |
88d33628 MO |
2320 | struct cxlflash_cfg *cfg = shost_priv(host); |
2321 | struct device *dev = &cfg->dev->dev; | |
15305514 | 2322 | |
88d33628 MO |
2323 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
2324 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, | |
2325 | scp->device->channel, scp->device->id, scp->device->lun, | |
2326 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
2327 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
2328 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
2329 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
15305514 MO |
2330 | |
2331 | switch (cfg->state) { | |
2332 | case STATE_NORMAL: | |
2333 | cfg->state = STATE_RESET; | |
f411396d | 2334 | drain_ioctls(cfg); |
15305514 MO |
2335 | cxlflash_mark_contexts_error(cfg); |
2336 | rcr = afu_reset(cfg); | |
2337 | if (rcr) { | |
2338 | rc = FAILED; | |
2339 | cfg->state = STATE_FAILTERM; | |
2340 | } else | |
2341 | cfg->state = STATE_NORMAL; | |
2342 | wake_up_all(&cfg->reset_waitq); | |
1d3324c3 MO |
2343 | ssleep(1); |
2344 | /* fall through */ | |
15305514 MO |
2345 | case STATE_RESET: |
2346 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
2347 | if (cfg->state == STATE_NORMAL) | |
2348 | break; | |
2349 | /* fall through */ | |
2350 | default: | |
2351 | rc = FAILED; | |
2352 | break; | |
2353 | } | |
2354 | ||
88d33628 | 2355 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
15305514 MO |
2356 | return rc; |
2357 | } | |
2358 | ||
2359 | /** | |
2360 | * cxlflash_change_queue_depth() - change the queue depth for the device | |
2361 | * @sdev: SCSI device destined for queue depth change. | |
2362 | * @qdepth: Requested queue depth value to set. | |
2363 | * | |
2364 | * The requested queue depth is capped to the maximum supported value. | |
2365 | * | |
2366 | * Return: The actual queue depth set. | |
2367 | */ | |
2368 | static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth) | |
2369 | { | |
2370 | ||
2371 | if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN) | |
2372 | qdepth = CXLFLASH_MAX_CMDS_PER_LUN; | |
2373 | ||
2374 | scsi_change_queue_depth(sdev, qdepth); | |
2375 | return sdev->queue_depth; | |
2376 | } | |
2377 | ||
2378 | /** | |
2379 | * cxlflash_show_port_status() - queries and presents the current port status | |
e0f01a21 | 2380 | * @port: Desired port for status reporting. |
90c9f8f4 | 2381 | * @cfg: Internal structure associated with the host. |
15305514 MO |
2382 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
2383 | * | |
66d4bce4 | 2384 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
15305514 | 2385 | */ |
90c9f8f4 MO |
2386 | static ssize_t cxlflash_show_port_status(u32 port, |
2387 | struct cxlflash_cfg *cfg, | |
2388 | char *buf) | |
15305514 | 2389 | { |
66d4bce4 | 2390 | struct device *dev = &cfg->dev->dev; |
15305514 | 2391 | char *disp_status; |
15305514 | 2392 | u64 status; |
c885d3fe | 2393 | __be64 __iomem *fc_port_regs; |
15305514 | 2394 | |
66d4bce4 MO |
2395 | WARN_ON(port >= MAX_FC_PORTS); |
2396 | ||
2397 | if (port >= cfg->num_fc_ports) { | |
2398 | dev_info(dev, "%s: Port %d not supported on this card.\n", | |
2399 | __func__, port); | |
2400 | return -EINVAL; | |
2401 | } | |
15305514 | 2402 | |
c885d3fe MO |
2403 | fc_port_regs = get_fc_port_regs(cfg, port); |
2404 | status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]); | |
e0f01a21 | 2405 | status &= FC_MTIP_STATUS_MASK; |
15305514 MO |
2406 | |
2407 | if (status == FC_MTIP_STATUS_ONLINE) | |
2408 | disp_status = "online"; | |
2409 | else if (status == FC_MTIP_STATUS_OFFLINE) | |
2410 | disp_status = "offline"; | |
2411 | else | |
2412 | disp_status = "unknown"; | |
2413 | ||
e0f01a21 MO |
2414 | return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status); |
2415 | } | |
2416 | ||
2417 | /** | |
2418 | * port0_show() - queries and presents the current status of port 0 | |
2419 | * @dev: Generic device associated with the host owning the port. | |
2420 | * @attr: Device attribute representing the port. | |
2421 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2422 | * | |
2423 | * Return: The size of the ASCII string returned in @buf. | |
2424 | */ | |
2425 | static ssize_t port0_show(struct device *dev, | |
2426 | struct device_attribute *attr, | |
2427 | char *buf) | |
2428 | { | |
88d33628 | 2429 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2430 | |
90c9f8f4 | 2431 | return cxlflash_show_port_status(0, cfg, buf); |
15305514 MO |
2432 | } |
2433 | ||
2434 | /** | |
e0f01a21 MO |
2435 | * port1_show() - queries and presents the current status of port 1 |
2436 | * @dev: Generic device associated with the host owning the port. | |
2437 | * @attr: Device attribute representing the port. | |
2438 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2439 | * | |
2440 | * Return: The size of the ASCII string returned in @buf. | |
2441 | */ | |
2442 | static ssize_t port1_show(struct device *dev, | |
2443 | struct device_attribute *attr, | |
2444 | char *buf) | |
2445 | { | |
88d33628 | 2446 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2447 | |
90c9f8f4 | 2448 | return cxlflash_show_port_status(1, cfg, buf); |
e0f01a21 MO |
2449 | } |
2450 | ||
bdcff1c5 MO |
2451 | /** |
2452 | * port2_show() - queries and presents the current status of port 2 | |
2453 | * @dev: Generic device associated with the host owning the port. | |
2454 | * @attr: Device attribute representing the port. | |
2455 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2456 | * | |
2457 | * Return: The size of the ASCII string returned in @buf. | |
2458 | */ | |
2459 | static ssize_t port2_show(struct device *dev, | |
2460 | struct device_attribute *attr, | |
2461 | char *buf) | |
2462 | { | |
2463 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2464 | ||
2465 | return cxlflash_show_port_status(2, cfg, buf); | |
2466 | } | |
2467 | ||
2468 | /** | |
2469 | * port3_show() - queries and presents the current status of port 3 | |
2470 | * @dev: Generic device associated with the host owning the port. | |
2471 | * @attr: Device attribute representing the port. | |
2472 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2473 | * | |
2474 | * Return: The size of the ASCII string returned in @buf. | |
2475 | */ | |
2476 | static ssize_t port3_show(struct device *dev, | |
2477 | struct device_attribute *attr, | |
2478 | char *buf) | |
2479 | { | |
2480 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2481 | ||
2482 | return cxlflash_show_port_status(3, cfg, buf); | |
2483 | } | |
2484 | ||
e0f01a21 MO |
2485 | /** |
2486 | * lun_mode_show() - presents the current LUN mode of the host | |
15305514 | 2487 | * @dev: Generic device associated with the host. |
e0f01a21 | 2488 | * @attr: Device attribute representing the LUN mode. |
15305514 MO |
2489 | * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII. |
2490 | * | |
2491 | * Return: The size of the ASCII string returned in @buf. | |
2492 | */ | |
e0f01a21 MO |
2493 | static ssize_t lun_mode_show(struct device *dev, |
2494 | struct device_attribute *attr, char *buf) | |
15305514 | 2495 | { |
88d33628 | 2496 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
15305514 MO |
2497 | struct afu *afu = cfg->afu; |
2498 | ||
e0f01a21 | 2499 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun); |
15305514 MO |
2500 | } |
2501 | ||
2502 | /** | |
e0f01a21 | 2503 | * lun_mode_store() - sets the LUN mode of the host |
15305514 | 2504 | * @dev: Generic device associated with the host. |
e0f01a21 | 2505 | * @attr: Device attribute representing the LUN mode. |
15305514 MO |
2506 | * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII. |
2507 | * @count: Length of data resizing in @buf. | |
2508 | * | |
2509 | * The CXL Flash AFU supports a dummy LUN mode where the external | |
2510 | * links and storage are not required. Space on the FPGA is used | |
2511 | * to create 1 or 2 small LUNs which are presented to the system | |
2512 | * as if they were a normal storage device. This feature is useful | |
2513 | * during development and also provides manufacturing with a way | |
2514 | * to test the AFU without an actual device. | |
2515 | * | |
2516 | * 0 = external LUN[s] (default) | |
2517 | * 1 = internal LUN (1 x 64K, 512B blocks, id 0) | |
2518 | * 2 = internal LUN (1 x 64K, 4K blocks, id 0) | |
2519 | * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1) | |
2520 | * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1) | |
2521 | * | |
2522 | * Return: The size of the ASCII string returned in @buf. | |
2523 | */ | |
e0f01a21 MO |
2524 | static ssize_t lun_mode_store(struct device *dev, |
2525 | struct device_attribute *attr, | |
2526 | const char *buf, size_t count) | |
15305514 MO |
2527 | { |
2528 | struct Scsi_Host *shost = class_to_shost(dev); | |
88d33628 | 2529 | struct cxlflash_cfg *cfg = shost_priv(shost); |
15305514 MO |
2530 | struct afu *afu = cfg->afu; |
2531 | int rc; | |
2532 | u32 lun_mode; | |
2533 | ||
2534 | rc = kstrtouint(buf, 10, &lun_mode); | |
2535 | if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) { | |
2536 | afu->internal_lun = lun_mode; | |
603ecce9 MK |
2537 | |
2538 | /* | |
2539 | * When configured for internal LUN, there is only one channel, | |
66d4bce4 MO |
2540 | * channel number 0, else there will be one less than the number |
2541 | * of fc ports for this card. | |
603ecce9 MK |
2542 | */ |
2543 | if (afu->internal_lun) | |
2544 | shost->max_channel = 0; | |
2545 | else | |
e8e17ea6 | 2546 | shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports); |
603ecce9 | 2547 | |
15305514 MO |
2548 | afu_reset(cfg); |
2549 | scsi_scan_host(cfg->host); | |
2550 | } | |
2551 | ||
2552 | return count; | |
2553 | } | |
2554 | ||
2555 | /** | |
e0f01a21 | 2556 | * ioctl_version_show() - presents the current ioctl version of the host |
15305514 MO |
2557 | * @dev: Generic device associated with the host. |
2558 | * @attr: Device attribute representing the ioctl version. | |
2559 | * @buf: Buffer of length PAGE_SIZE to report back the ioctl version. | |
2560 | * | |
2561 | * Return: The size of the ASCII string returned in @buf. | |
2562 | */ | |
e0f01a21 MO |
2563 | static ssize_t ioctl_version_show(struct device *dev, |
2564 | struct device_attribute *attr, char *buf) | |
15305514 MO |
2565 | { |
2566 | return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0); | |
2567 | } | |
2568 | ||
2569 | /** | |
e0f01a21 MO |
2570 | * cxlflash_show_port_lun_table() - queries and presents the port LUN table |
2571 | * @port: Desired port for status reporting. | |
90c9f8f4 | 2572 | * @cfg: Internal structure associated with the host. |
e0f01a21 MO |
2573 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
2574 | * | |
66d4bce4 | 2575 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
e0f01a21 MO |
2576 | */ |
2577 | static ssize_t cxlflash_show_port_lun_table(u32 port, | |
90c9f8f4 | 2578 | struct cxlflash_cfg *cfg, |
e0f01a21 MO |
2579 | char *buf) |
2580 | { | |
66d4bce4 | 2581 | struct device *dev = &cfg->dev->dev; |
c885d3fe | 2582 | __be64 __iomem *fc_port_luns; |
e0f01a21 MO |
2583 | int i; |
2584 | ssize_t bytes = 0; | |
e0f01a21 | 2585 | |
66d4bce4 MO |
2586 | WARN_ON(port >= MAX_FC_PORTS); |
2587 | ||
2588 | if (port >= cfg->num_fc_ports) { | |
2589 | dev_info(dev, "%s: Port %d not supported on this card.\n", | |
2590 | __func__, port); | |
2591 | return -EINVAL; | |
2592 | } | |
e0f01a21 | 2593 | |
c885d3fe | 2594 | fc_port_luns = get_fc_port_luns(cfg, port); |
e0f01a21 MO |
2595 | |
2596 | for (i = 0; i < CXLFLASH_NUM_VLUNS; i++) | |
2597 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, | |
c885d3fe MO |
2598 | "%03d: %016llx\n", |
2599 | i, readq_be(&fc_port_luns[i])); | |
e0f01a21 MO |
2600 | return bytes; |
2601 | } | |
2602 | ||
2603 | /** | |
2604 | * port0_lun_table_show() - presents the current LUN table of port 0 | |
2605 | * @dev: Generic device associated with the host owning the port. | |
2606 | * @attr: Device attribute representing the port. | |
2607 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2608 | * | |
2609 | * Return: The size of the ASCII string returned in @buf. | |
2610 | */ | |
2611 | static ssize_t port0_lun_table_show(struct device *dev, | |
2612 | struct device_attribute *attr, | |
2613 | char *buf) | |
2614 | { | |
88d33628 | 2615 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2616 | |
90c9f8f4 | 2617 | return cxlflash_show_port_lun_table(0, cfg, buf); |
e0f01a21 MO |
2618 | } |
2619 | ||
2620 | /** | |
2621 | * port1_lun_table_show() - presents the current LUN table of port 1 | |
2622 | * @dev: Generic device associated with the host owning the port. | |
2623 | * @attr: Device attribute representing the port. | |
2624 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2625 | * | |
2626 | * Return: The size of the ASCII string returned in @buf. | |
2627 | */ | |
2628 | static ssize_t port1_lun_table_show(struct device *dev, | |
2629 | struct device_attribute *attr, | |
2630 | char *buf) | |
2631 | { | |
88d33628 | 2632 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2633 | |
90c9f8f4 | 2634 | return cxlflash_show_port_lun_table(1, cfg, buf); |
e0f01a21 MO |
2635 | } |
2636 | ||
bdcff1c5 MO |
2637 | /** |
2638 | * port2_lun_table_show() - presents the current LUN table of port 2 | |
2639 | * @dev: Generic device associated with the host owning the port. | |
2640 | * @attr: Device attribute representing the port. | |
2641 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2642 | * | |
2643 | * Return: The size of the ASCII string returned in @buf. | |
2644 | */ | |
2645 | static ssize_t port2_lun_table_show(struct device *dev, | |
2646 | struct device_attribute *attr, | |
2647 | char *buf) | |
2648 | { | |
2649 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2650 | ||
2651 | return cxlflash_show_port_lun_table(2, cfg, buf); | |
2652 | } | |
2653 | ||
2654 | /** | |
2655 | * port3_lun_table_show() - presents the current LUN table of port 3 | |
2656 | * @dev: Generic device associated with the host owning the port. | |
2657 | * @attr: Device attribute representing the port. | |
2658 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2659 | * | |
2660 | * Return: The size of the ASCII string returned in @buf. | |
2661 | */ | |
2662 | static ssize_t port3_lun_table_show(struct device *dev, | |
2663 | struct device_attribute *attr, | |
2664 | char *buf) | |
2665 | { | |
2666 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2667 | ||
2668 | return cxlflash_show_port_lun_table(3, cfg, buf); | |
2669 | } | |
2670 | ||
2588f222 MO |
2671 | /** |
2672 | * irqpoll_weight_show() - presents the current IRQ poll weight for the host | |
2673 | * @dev: Generic device associated with the host. | |
2674 | * @attr: Device attribute representing the IRQ poll weight. | |
2675 | * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll | |
2676 | * weight in ASCII. | |
2677 | * | |
2678 | * An IRQ poll weight of 0 indicates polling is disabled. | |
2679 | * | |
2680 | * Return: The size of the ASCII string returned in @buf. | |
2681 | */ | |
2682 | static ssize_t irqpoll_weight_show(struct device *dev, | |
2683 | struct device_attribute *attr, char *buf) | |
2684 | { | |
2685 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2686 | struct afu *afu = cfg->afu; | |
2687 | ||
2688 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight); | |
2689 | } | |
2690 | ||
2691 | /** | |
2692 | * irqpoll_weight_store() - sets the current IRQ poll weight for the host | |
2693 | * @dev: Generic device associated with the host. | |
2694 | * @attr: Device attribute representing the IRQ poll weight. | |
2695 | * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll | |
2696 | * weight in ASCII. | |
2697 | * @count: Length of data resizing in @buf. | |
2698 | * | |
2699 | * An IRQ poll weight of 0 indicates polling is disabled. | |
2700 | * | |
2701 | * Return: The size of the ASCII string returned in @buf. | |
2702 | */ | |
2703 | static ssize_t irqpoll_weight_store(struct device *dev, | |
2704 | struct device_attribute *attr, | |
2705 | const char *buf, size_t count) | |
2706 | { | |
2707 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2708 | struct device *cfgdev = &cfg->dev->dev; | |
2709 | struct afu *afu = cfg->afu; | |
a583d00a | 2710 | struct hwq *hwq; |
2588f222 | 2711 | u32 weight; |
a583d00a | 2712 | int rc, i; |
2588f222 MO |
2713 | |
2714 | rc = kstrtouint(buf, 10, &weight); | |
2715 | if (rc) | |
2716 | return -EINVAL; | |
2717 | ||
2718 | if (weight > 256) { | |
2719 | dev_info(cfgdev, | |
2720 | "Invalid IRQ poll weight. It must be 256 or less.\n"); | |
2721 | return -EINVAL; | |
2722 | } | |
2723 | ||
2724 | if (weight == afu->irqpoll_weight) { | |
2725 | dev_info(cfgdev, | |
2726 | "Current IRQ poll weight has the same weight.\n"); | |
2727 | return -EINVAL; | |
2728 | } | |
2729 | ||
a583d00a | 2730 | if (afu_is_irqpoll_enabled(afu)) { |
bb85ef68 | 2731 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
2732 | hwq = get_hwq(afu, i); |
2733 | ||
2734 | irq_poll_disable(&hwq->irqpoll); | |
2735 | } | |
2736 | } | |
2588f222 MO |
2737 | |
2738 | afu->irqpoll_weight = weight; | |
2739 | ||
a583d00a | 2740 | if (weight > 0) { |
bb85ef68 | 2741 | for (i = 0; i < afu->num_hwqs; i++) { |
a583d00a UK |
2742 | hwq = get_hwq(afu, i); |
2743 | ||
2744 | irq_poll_init(&hwq->irqpoll, weight, cxlflash_irqpoll); | |
2745 | } | |
2746 | } | |
2588f222 MO |
2747 | |
2748 | return count; | |
2749 | } | |
2750 | ||
bb85ef68 MO |
2751 | /** |
2752 | * num_hwqs_show() - presents the number of hardware queues for the host | |
2753 | * @dev: Generic device associated with the host. | |
2754 | * @attr: Device attribute representing the number of hardware queues. | |
2755 | * @buf: Buffer of length PAGE_SIZE to report back the number of hardware | |
2756 | * queues in ASCII. | |
2757 | * | |
2758 | * Return: The size of the ASCII string returned in @buf. | |
2759 | */ | |
2760 | static ssize_t num_hwqs_show(struct device *dev, | |
2761 | struct device_attribute *attr, char *buf) | |
2762 | { | |
2763 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2764 | struct afu *afu = cfg->afu; | |
2765 | ||
2766 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->num_hwqs); | |
2767 | } | |
2768 | ||
2769 | /** | |
2770 | * num_hwqs_store() - sets the number of hardware queues for the host | |
2771 | * @dev: Generic device associated with the host. | |
2772 | * @attr: Device attribute representing the number of hardware queues. | |
2773 | * @buf: Buffer of length PAGE_SIZE containing the number of hardware | |
2774 | * queues in ASCII. | |
2775 | * @count: Length of data resizing in @buf. | |
2776 | * | |
2777 | * n > 0: num_hwqs = n | |
2778 | * n = 0: num_hwqs = num_online_cpus() | |
2779 | * n < 0: num_online_cpus() / abs(n) | |
2780 | * | |
2781 | * Return: The size of the ASCII string returned in @buf. | |
2782 | */ | |
2783 | static ssize_t num_hwqs_store(struct device *dev, | |
2784 | struct device_attribute *attr, | |
2785 | const char *buf, size_t count) | |
2786 | { | |
2787 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2788 | struct afu *afu = cfg->afu; | |
2789 | int rc; | |
2790 | int nhwqs, num_hwqs; | |
2791 | ||
2792 | rc = kstrtoint(buf, 10, &nhwqs); | |
2793 | if (rc) | |
2794 | return -EINVAL; | |
2795 | ||
2796 | if (nhwqs >= 1) | |
2797 | num_hwqs = nhwqs; | |
2798 | else if (nhwqs == 0) | |
2799 | num_hwqs = num_online_cpus(); | |
2800 | else | |
2801 | num_hwqs = num_online_cpus() / abs(nhwqs); | |
2802 | ||
2803 | afu->desired_hwqs = min(num_hwqs, CXLFLASH_MAX_HWQS); | |
2804 | WARN_ON_ONCE(afu->desired_hwqs == 0); | |
2805 | ||
2806 | retry: | |
2807 | switch (cfg->state) { | |
2808 | case STATE_NORMAL: | |
2809 | cfg->state = STATE_RESET; | |
2810 | drain_ioctls(cfg); | |
2811 | cxlflash_mark_contexts_error(cfg); | |
2812 | rc = afu_reset(cfg); | |
2813 | if (rc) | |
2814 | cfg->state = STATE_FAILTERM; | |
2815 | else | |
2816 | cfg->state = STATE_NORMAL; | |
2817 | wake_up_all(&cfg->reset_waitq); | |
2818 | break; | |
2819 | case STATE_RESET: | |
2820 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
2821 | if (cfg->state == STATE_NORMAL) | |
2822 | goto retry; | |
2823 | default: | |
2824 | /* Ideally should not happen */ | |
2825 | dev_err(dev, "%s: Device is not ready, state=%d\n", | |
2826 | __func__, cfg->state); | |
2827 | break; | |
2828 | } | |
2829 | ||
2830 | return count; | |
2831 | } | |
2832 | ||
8c052e9e MO |
2833 | static const char *hwq_mode_name[MAX_HWQ_MODE] = { "rr", "tag", "cpu" }; |
2834 | ||
2835 | /** | |
2836 | * hwq_mode_show() - presents the HWQ steering mode for the host | |
2837 | * @dev: Generic device associated with the host. | |
2838 | * @attr: Device attribute representing the HWQ steering mode. | |
2839 | * @buf: Buffer of length PAGE_SIZE to report back the HWQ steering mode | |
2840 | * as a character string. | |
2841 | * | |
2842 | * Return: The size of the ASCII string returned in @buf. | |
2843 | */ | |
2844 | static ssize_t hwq_mode_show(struct device *dev, | |
2845 | struct device_attribute *attr, char *buf) | |
2846 | { | |
2847 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2848 | struct afu *afu = cfg->afu; | |
2849 | ||
2850 | return scnprintf(buf, PAGE_SIZE, "%s\n", hwq_mode_name[afu->hwq_mode]); | |
2851 | } | |
2852 | ||
2853 | /** | |
2854 | * hwq_mode_store() - sets the HWQ steering mode for the host | |
2855 | * @dev: Generic device associated with the host. | |
2856 | * @attr: Device attribute representing the HWQ steering mode. | |
2857 | * @buf: Buffer of length PAGE_SIZE containing the HWQ steering mode | |
2858 | * as a character string. | |
2859 | * @count: Length of data resizing in @buf. | |
2860 | * | |
2861 | * rr = Round-Robin | |
2862 | * tag = Block MQ Tagging | |
2863 | * cpu = CPU Affinity | |
2864 | * | |
2865 | * Return: The size of the ASCII string returned in @buf. | |
2866 | */ | |
2867 | static ssize_t hwq_mode_store(struct device *dev, | |
2868 | struct device_attribute *attr, | |
2869 | const char *buf, size_t count) | |
2870 | { | |
2871 | struct Scsi_Host *shost = class_to_shost(dev); | |
2872 | struct cxlflash_cfg *cfg = shost_priv(shost); | |
2873 | struct device *cfgdev = &cfg->dev->dev; | |
2874 | struct afu *afu = cfg->afu; | |
2875 | int i; | |
2876 | u32 mode = MAX_HWQ_MODE; | |
2877 | ||
2878 | for (i = 0; i < MAX_HWQ_MODE; i++) { | |
2879 | if (!strncmp(hwq_mode_name[i], buf, strlen(hwq_mode_name[i]))) { | |
2880 | mode = i; | |
2881 | break; | |
2882 | } | |
2883 | } | |
2884 | ||
2885 | if (mode >= MAX_HWQ_MODE) { | |
2886 | dev_info(cfgdev, "Invalid HWQ steering mode.\n"); | |
2887 | return -EINVAL; | |
2888 | } | |
2889 | ||
2890 | if ((mode == HWQ_MODE_TAG) && !shost_use_blk_mq(shost)) { | |
2891 | dev_info(cfgdev, "SCSI-MQ is not enabled, use a different " | |
2892 | "HWQ steering mode.\n"); | |
2893 | return -EINVAL; | |
2894 | } | |
2895 | ||
2896 | afu->hwq_mode = mode; | |
2897 | ||
2898 | return count; | |
2899 | } | |
2900 | ||
e0f01a21 MO |
2901 | /** |
2902 | * mode_show() - presents the current mode of the device | |
15305514 MO |
2903 | * @dev: Generic device associated with the device. |
2904 | * @attr: Device attribute representing the device mode. | |
2905 | * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII. | |
2906 | * | |
2907 | * Return: The size of the ASCII string returned in @buf. | |
2908 | */ | |
e0f01a21 MO |
2909 | static ssize_t mode_show(struct device *dev, |
2910 | struct device_attribute *attr, char *buf) | |
15305514 MO |
2911 | { |
2912 | struct scsi_device *sdev = to_scsi_device(dev); | |
2913 | ||
e0f01a21 MO |
2914 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
2915 | sdev->hostdata ? "superpipe" : "legacy"); | |
15305514 MO |
2916 | } |
2917 | ||
2918 | /* | |
2919 | * Host attributes | |
2920 | */ | |
e0f01a21 MO |
2921 | static DEVICE_ATTR_RO(port0); |
2922 | static DEVICE_ATTR_RO(port1); | |
bdcff1c5 MO |
2923 | static DEVICE_ATTR_RO(port2); |
2924 | static DEVICE_ATTR_RO(port3); | |
e0f01a21 MO |
2925 | static DEVICE_ATTR_RW(lun_mode); |
2926 | static DEVICE_ATTR_RO(ioctl_version); | |
2927 | static DEVICE_ATTR_RO(port0_lun_table); | |
2928 | static DEVICE_ATTR_RO(port1_lun_table); | |
bdcff1c5 MO |
2929 | static DEVICE_ATTR_RO(port2_lun_table); |
2930 | static DEVICE_ATTR_RO(port3_lun_table); | |
2588f222 | 2931 | static DEVICE_ATTR_RW(irqpoll_weight); |
bb85ef68 | 2932 | static DEVICE_ATTR_RW(num_hwqs); |
8c052e9e | 2933 | static DEVICE_ATTR_RW(hwq_mode); |
15305514 MO |
2934 | |
2935 | static struct device_attribute *cxlflash_host_attrs[] = { | |
2936 | &dev_attr_port0, | |
2937 | &dev_attr_port1, | |
bdcff1c5 MO |
2938 | &dev_attr_port2, |
2939 | &dev_attr_port3, | |
15305514 MO |
2940 | &dev_attr_lun_mode, |
2941 | &dev_attr_ioctl_version, | |
e0f01a21 MO |
2942 | &dev_attr_port0_lun_table, |
2943 | &dev_attr_port1_lun_table, | |
bdcff1c5 MO |
2944 | &dev_attr_port2_lun_table, |
2945 | &dev_attr_port3_lun_table, | |
2588f222 | 2946 | &dev_attr_irqpoll_weight, |
bb85ef68 | 2947 | &dev_attr_num_hwqs, |
8c052e9e | 2948 | &dev_attr_hwq_mode, |
15305514 MO |
2949 | NULL |
2950 | }; | |
2951 | ||
2952 | /* | |
2953 | * Device attributes | |
2954 | */ | |
e0f01a21 | 2955 | static DEVICE_ATTR_RO(mode); |
15305514 MO |
2956 | |
2957 | static struct device_attribute *cxlflash_dev_attrs[] = { | |
2958 | &dev_attr_mode, | |
2959 | NULL | |
2960 | }; | |
2961 | ||
2962 | /* | |
2963 | * Host template | |
2964 | */ | |
2965 | static struct scsi_host_template driver_template = { | |
2966 | .module = THIS_MODULE, | |
2967 | .name = CXLFLASH_ADAPTER_NAME, | |
2968 | .info = cxlflash_driver_info, | |
2969 | .ioctl = cxlflash_ioctl, | |
2970 | .proc_name = CXLFLASH_NAME, | |
2971 | .queuecommand = cxlflash_queuecommand, | |
2972 | .eh_device_reset_handler = cxlflash_eh_device_reset_handler, | |
2973 | .eh_host_reset_handler = cxlflash_eh_host_reset_handler, | |
2974 | .change_queue_depth = cxlflash_change_queue_depth, | |
83430833 | 2975 | .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN, |
15305514 | 2976 | .can_queue = CXLFLASH_MAX_CMDS, |
5fbb96c8 | 2977 | .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1, |
15305514 | 2978 | .this_id = -1, |
68ab2d76 | 2979 | .sg_tablesize = 1, /* No scatter gather support */ |
15305514 MO |
2980 | .max_sectors = CXLFLASH_MAX_SECTORS, |
2981 | .use_clustering = ENABLE_CLUSTERING, | |
2982 | .shost_attrs = cxlflash_host_attrs, | |
2983 | .sdev_attrs = cxlflash_dev_attrs, | |
2984 | }; | |
2985 | ||
2986 | /* | |
2987 | * Device dependent values | |
2988 | */ | |
96e1b660 UK |
2989 | static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS, |
2990 | 0ULL }; | |
2991 | static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS, | |
704c4b0d | 2992 | CXLFLASH_NOTIFY_SHUTDOWN }; |
42f90a6b MO |
2993 | static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS, |
2994 | CXLFLASH_NOTIFY_SHUTDOWN }; | |
15305514 MO |
2995 | |
2996 | /* | |
2997 | * PCI device binding table | |
2998 | */ | |
2999 | static struct pci_device_id cxlflash_pci_table[] = { | |
3000 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA, | |
3001 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals}, | |
a2746fb1 MK |
3002 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT, |
3003 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals}, | |
42f90a6b MO |
3004 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD, |
3005 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals}, | |
15305514 MO |
3006 | {} |
3007 | }; | |
3008 | ||
3009 | MODULE_DEVICE_TABLE(pci, cxlflash_pci_table); | |
3010 | ||
c21e0bbf MO |
3011 | /** |
3012 | * cxlflash_worker_thread() - work thread handler for the AFU | |
3013 | * @work: Work structure contained within cxlflash associated with host. | |
3014 | * | |
3015 | * Handles the following events: | |
3016 | * - Link reset which cannot be performed on interrupt context due to | |
3017 | * blocking up to a few seconds | |
ef51074a | 3018 | * - Rescan the host |
c21e0bbf MO |
3019 | */ |
3020 | static void cxlflash_worker_thread(struct work_struct *work) | |
3021 | { | |
5cdac81a MO |
3022 | struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg, |
3023 | work_q); | |
c21e0bbf | 3024 | struct afu *afu = cfg->afu; |
4392ba49 | 3025 | struct device *dev = &cfg->dev->dev; |
c885d3fe | 3026 | __be64 __iomem *fc_port_regs; |
c21e0bbf MO |
3027 | int port; |
3028 | ulong lock_flags; | |
3029 | ||
5cdac81a MO |
3030 | /* Avoid MMIO if the device has failed */ |
3031 | ||
3032 | if (cfg->state != STATE_NORMAL) | |
3033 | return; | |
3034 | ||
c21e0bbf MO |
3035 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
3036 | ||
3037 | if (cfg->lr_state == LINK_RESET_REQUIRED) { | |
3038 | port = cfg->lr_port; | |
3039 | if (port < 0) | |
4392ba49 MO |
3040 | dev_err(dev, "%s: invalid port index %d\n", |
3041 | __func__, port); | |
c21e0bbf MO |
3042 | else { |
3043 | spin_unlock_irqrestore(cfg->host->host_lock, | |
3044 | lock_flags); | |
3045 | ||
3046 | /* The reset can block... */ | |
c885d3fe MO |
3047 | fc_port_regs = get_fc_port_regs(cfg, port); |
3048 | afu_link_reset(afu, port, fc_port_regs); | |
c21e0bbf MO |
3049 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
3050 | } | |
3051 | ||
3052 | cfg->lr_state = LINK_RESET_COMPLETE; | |
3053 | } | |
3054 | ||
c21e0bbf | 3055 | spin_unlock_irqrestore(cfg->host->host_lock, lock_flags); |
ef51074a MO |
3056 | |
3057 | if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0) | |
3058 | scsi_scan_host(cfg->host); | |
c21e0bbf MO |
3059 | } |
3060 | ||
3061 | /** | |
3062 | * cxlflash_probe() - PCI entry point to add host | |
3063 | * @pdev: PCI device associated with the host. | |
3064 | * @dev_id: PCI device id associated with device. | |
3065 | * | |
f92ba507 MO |
3066 | * The device will initially start out in a 'probing' state and |
3067 | * transition to the 'normal' state at the end of a successful | |
3068 | * probe. Should an EEH event occur during probe, the notification | |
3069 | * thread (error_detected()) will wait until the probe handler | |
3070 | * is nearly complete. At that time, the device will be moved to | |
3071 | * a 'probed' state and the EEH thread woken up to drive the slot | |
3072 | * reset and recovery (device moves to 'normal' state). Meanwhile, | |
3073 | * the probe will be allowed to exit successfully. | |
3074 | * | |
1284fb0c | 3075 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
3076 | */ |
3077 | static int cxlflash_probe(struct pci_dev *pdev, | |
3078 | const struct pci_device_id *dev_id) | |
3079 | { | |
3080 | struct Scsi_Host *host; | |
3081 | struct cxlflash_cfg *cfg = NULL; | |
88d33628 | 3082 | struct device *dev = &pdev->dev; |
c21e0bbf MO |
3083 | struct dev_dependent_vals *ddv; |
3084 | int rc = 0; | |
66d4bce4 | 3085 | int k; |
c21e0bbf MO |
3086 | |
3087 | dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n", | |
3088 | __func__, pdev->irq); | |
3089 | ||
3090 | ddv = (struct dev_dependent_vals *)dev_id->driver_data; | |
3091 | driver_template.max_sectors = ddv->max_sectors; | |
3092 | ||
3093 | host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg)); | |
3094 | if (!host) { | |
88d33628 | 3095 | dev_err(dev, "%s: scsi_host_alloc failed\n", __func__); |
c21e0bbf MO |
3096 | rc = -ENOMEM; |
3097 | goto out; | |
3098 | } | |
3099 | ||
3100 | host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS; | |
3101 | host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET; | |
c21e0bbf MO |
3102 | host->unique_id = host->host_no; |
3103 | host->max_cmd_len = CXLFLASH_MAX_CDB_LEN; | |
3104 | ||
88d33628 | 3105 | cfg = shost_priv(host); |
c21e0bbf MO |
3106 | cfg->host = host; |
3107 | rc = alloc_mem(cfg); | |
3108 | if (rc) { | |
88d33628 | 3109 | dev_err(dev, "%s: alloc_mem failed\n", __func__); |
c21e0bbf | 3110 | rc = -ENOMEM; |
8b5b1e87 | 3111 | scsi_host_put(cfg->host); |
c21e0bbf MO |
3112 | goto out; |
3113 | } | |
3114 | ||
3115 | cfg->init_state = INIT_STATE_NONE; | |
3116 | cfg->dev = pdev; | |
17ead26f | 3117 | cfg->cxl_fops = cxlflash_cxl_fops; |
2cb79266 MO |
3118 | |
3119 | /* | |
66d4bce4 MO |
3120 | * Promoted LUNs move to the top of the LUN table. The rest stay on |
3121 | * the bottom half. The bottom half grows from the end (index = 255), | |
3122 | * whereas the top half grows from the beginning (index = 0). | |
3123 | * | |
3124 | * Initialize the last LUN index for all possible ports. | |
2cb79266 | 3125 | */ |
66d4bce4 MO |
3126 | cfg->promote_lun_index = 0; |
3127 | ||
3128 | for (k = 0; k < MAX_FC_PORTS; k++) | |
3129 | cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1; | |
2cb79266 | 3130 | |
c21e0bbf | 3131 | cfg->dev_id = (struct pci_device_id *)dev_id; |
c21e0bbf MO |
3132 | |
3133 | init_waitqueue_head(&cfg->tmf_waitq); | |
439e85c1 | 3134 | init_waitqueue_head(&cfg->reset_waitq); |
c21e0bbf MO |
3135 | |
3136 | INIT_WORK(&cfg->work_q, cxlflash_worker_thread); | |
3137 | cfg->lr_state = LINK_RESET_INVALID; | |
3138 | cfg->lr_port = -1; | |
0d73122c | 3139 | spin_lock_init(&cfg->tmf_slock); |
65be2c79 MO |
3140 | mutex_init(&cfg->ctx_tbl_list_mutex); |
3141 | mutex_init(&cfg->ctx_recovery_mutex); | |
0a27ae51 | 3142 | init_rwsem(&cfg->ioctl_rwsem); |
65be2c79 MO |
3143 | INIT_LIST_HEAD(&cfg->ctx_err_recovery); |
3144 | INIT_LIST_HEAD(&cfg->lluns); | |
c21e0bbf MO |
3145 | |
3146 | pci_set_drvdata(pdev, cfg); | |
3147 | ||
c21e0bbf MO |
3148 | cfg->cxl_afu = cxl_pci_to_afu(pdev); |
3149 | ||
3150 | rc = init_pci(cfg); | |
3151 | if (rc) { | |
88d33628 | 3152 | dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3153 | goto out_remove; |
3154 | } | |
3155 | cfg->init_state = INIT_STATE_PCI; | |
3156 | ||
3157 | rc = init_afu(cfg); | |
f92ba507 | 3158 | if (rc && !wq_has_sleeper(&cfg->reset_waitq)) { |
88d33628 | 3159 | dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3160 | goto out_remove; |
3161 | } | |
3162 | cfg->init_state = INIT_STATE_AFU; | |
3163 | ||
c21e0bbf MO |
3164 | rc = init_scsi(cfg); |
3165 | if (rc) { | |
88d33628 | 3166 | dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3167 | goto out_remove; |
3168 | } | |
3169 | cfg->init_state = INIT_STATE_SCSI; | |
3170 | ||
f92ba507 MO |
3171 | if (wq_has_sleeper(&cfg->reset_waitq)) { |
3172 | cfg->state = STATE_PROBED; | |
3173 | wake_up_all(&cfg->reset_waitq); | |
3174 | } else | |
3175 | cfg->state = STATE_NORMAL; | |
c21e0bbf | 3176 | out: |
88d33628 | 3177 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
3178 | return rc; |
3179 | ||
3180 | out_remove: | |
3181 | cxlflash_remove(pdev); | |
3182 | goto out; | |
3183 | } | |
3184 | ||
5cdac81a MO |
3185 | /** |
3186 | * cxlflash_pci_error_detected() - called when a PCI error is detected | |
3187 | * @pdev: PCI device struct. | |
3188 | * @state: PCI channel state. | |
3189 | * | |
1d3324c3 MO |
3190 | * When an EEH occurs during an active reset, wait until the reset is |
3191 | * complete and then take action based upon the device state. | |
3192 | * | |
5cdac81a MO |
3193 | * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT |
3194 | */ | |
3195 | static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev, | |
3196 | pci_channel_state_t state) | |
3197 | { | |
65be2c79 | 3198 | int rc = 0; |
5cdac81a MO |
3199 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
3200 | struct device *dev = &cfg->dev->dev; | |
3201 | ||
3202 | dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state); | |
3203 | ||
3204 | switch (state) { | |
3205 | case pci_channel_io_frozen: | |
f92ba507 MO |
3206 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET && |
3207 | cfg->state != STATE_PROBING); | |
1d3324c3 MO |
3208 | if (cfg->state == STATE_FAILTERM) |
3209 | return PCI_ERS_RESULT_DISCONNECT; | |
3210 | ||
439e85c1 | 3211 | cfg->state = STATE_RESET; |
5cdac81a | 3212 | scsi_block_requests(cfg->host); |
0a27ae51 | 3213 | drain_ioctls(cfg); |
65be2c79 MO |
3214 | rc = cxlflash_mark_contexts_error(cfg); |
3215 | if (unlikely(rc)) | |
88d33628 | 3216 | dev_err(dev, "%s: Failed to mark user contexts rc=%d\n", |
65be2c79 | 3217 | __func__, rc); |
9526f360 | 3218 | term_afu(cfg); |
5cdac81a MO |
3219 | return PCI_ERS_RESULT_NEED_RESET; |
3220 | case pci_channel_io_perm_failure: | |
3221 | cfg->state = STATE_FAILTERM; | |
439e85c1 | 3222 | wake_up_all(&cfg->reset_waitq); |
5cdac81a MO |
3223 | scsi_unblock_requests(cfg->host); |
3224 | return PCI_ERS_RESULT_DISCONNECT; | |
3225 | default: | |
3226 | break; | |
3227 | } | |
3228 | return PCI_ERS_RESULT_NEED_RESET; | |
3229 | } | |
3230 | ||
3231 | /** | |
3232 | * cxlflash_pci_slot_reset() - called when PCI slot has been reset | |
3233 | * @pdev: PCI device struct. | |
3234 | * | |
3235 | * This routine is called by the pci error recovery code after the PCI | |
3236 | * slot has been reset, just before we should resume normal operations. | |
3237 | * | |
3238 | * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT | |
3239 | */ | |
3240 | static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev) | |
3241 | { | |
3242 | int rc = 0; | |
3243 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
3244 | struct device *dev = &cfg->dev->dev; | |
3245 | ||
3246 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); | |
3247 | ||
3248 | rc = init_afu(cfg); | |
3249 | if (unlikely(rc)) { | |
88d33628 | 3250 | dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc); |
5cdac81a MO |
3251 | return PCI_ERS_RESULT_DISCONNECT; |
3252 | } | |
3253 | ||
3254 | return PCI_ERS_RESULT_RECOVERED; | |
3255 | } | |
3256 | ||
3257 | /** | |
3258 | * cxlflash_pci_resume() - called when normal operation can resume | |
3259 | * @pdev: PCI device struct | |
3260 | */ | |
3261 | static void cxlflash_pci_resume(struct pci_dev *pdev) | |
3262 | { | |
3263 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
3264 | struct device *dev = &cfg->dev->dev; | |
3265 | ||
3266 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); | |
3267 | ||
3268 | cfg->state = STATE_NORMAL; | |
439e85c1 | 3269 | wake_up_all(&cfg->reset_waitq); |
5cdac81a MO |
3270 | scsi_unblock_requests(cfg->host); |
3271 | } | |
3272 | ||
3273 | static const struct pci_error_handlers cxlflash_err_handler = { | |
3274 | .error_detected = cxlflash_pci_error_detected, | |
3275 | .slot_reset = cxlflash_pci_slot_reset, | |
3276 | .resume = cxlflash_pci_resume, | |
3277 | }; | |
3278 | ||
c21e0bbf MO |
3279 | /* |
3280 | * PCI device structure | |
3281 | */ | |
3282 | static struct pci_driver cxlflash_driver = { | |
3283 | .name = CXLFLASH_NAME, | |
3284 | .id_table = cxlflash_pci_table, | |
3285 | .probe = cxlflash_probe, | |
3286 | .remove = cxlflash_remove, | |
babf985d | 3287 | .shutdown = cxlflash_remove, |
5cdac81a | 3288 | .err_handler = &cxlflash_err_handler, |
c21e0bbf MO |
3289 | }; |
3290 | ||
3291 | /** | |
3292 | * init_cxlflash() - module entry point | |
3293 | * | |
1284fb0c | 3294 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
3295 | */ |
3296 | static int __init init_cxlflash(void) | |
3297 | { | |
db853d50 | 3298 | check_sizes(); |
65be2c79 MO |
3299 | cxlflash_list_init(); |
3300 | ||
c21e0bbf MO |
3301 | return pci_register_driver(&cxlflash_driver); |
3302 | } | |
3303 | ||
3304 | /** | |
3305 | * exit_cxlflash() - module exit point | |
3306 | */ | |
3307 | static void __exit exit_cxlflash(void) | |
3308 | { | |
65be2c79 MO |
3309 | cxlflash_term_global_luns(); |
3310 | cxlflash_free_errpage(); | |
3311 | ||
c21e0bbf MO |
3312 | pci_unregister_driver(&cxlflash_driver); |
3313 | } | |
3314 | ||
3315 | module_init(init_cxlflash); | |
3316 | module_exit(exit_cxlflash); |