Documentation/devicetree/bindings/arm/arm,scpi.txt

   1 System Control and Power Interface (SCPI) Message Protocol
   2 ----------------------------------------------------------
   3
   4 Firmware implementing the SCPI described in ARM document number ARM DUI 0922B
   5 ("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be used
   6 by Linux to initiate various system control and power operations.
   7
   8 Required properties:
   9
  10 - compatible : should be "arm,scpi"
  11 - mboxes: List of phandle and mailbox channel specifiers
  12           All the channels reserved by remote SCP firmware for use by
  13           SCPI message protocol should be specified in any order
  14 - shmem : List of phandle pointing to the shared memory(SHM) area between the
  15           processors using these mailboxes for IPC, one for each mailbox
  16           SHM can be any memory reserved for the purpose of this communication
  17           between the processors.
  18
  19 See Documentation/devicetree/bindings/mailbox/mailbox.txt
  20 for more details about the generic mailbox controller and
  21 client driver bindings.
  22
  23 Clock bindings for the clocks based on SCPI Message Protocol
  24 ------------------------------------------------------------
  25
  26 This binding uses the common clock binding[1].
  27
  28 Container Node
  29 ==============
  30 Required properties:
  31 - compatible : should be "arm,scpi-clocks"
  32                All the clocks provided by SCP firmware via SCPI message
  33                protocol much be listed as sub-nodes under this node.
  34
  35 Sub-nodes
  36 =========
  37 Required properties:
  38 - compatible : shall include one of the following
  39         "arm,scpi-dvfs-clocks" - all the clocks that are variable and index based.
  40                 These clocks don't provide an entire range of values between the
  41                 limits but only discrete points within the range. The firmware
  42                 provides the mapping for each such operating frequency and the
  43                 index associated with it. The firmware also manages the
  44                 voltage scaling appropriately with the clock scaling.
  45         "arm,scpi-variable-clocks" - all the clocks that are variable and provide full
  46                 range within the specified range. The firmware provides the
  47                 range of values within a specified range.
  48
  49 Other required properties for all clocks(all from common clock binding):
  50 - #clock-cells : Should be 1. Contains the Clock ID value used by SCPI commands.
  51 - clock-output-names : shall be the corresponding names of the outputs.
  52 - clock-indices: The identifying number for the clocks(i.e.clock_id) in the
  53         node. It can be non linear and hence provide the mapping of identifiers
  54         into the clock-output-names array.
  55
  56 SRAM and Shared Memory for SCPI
  57 -------------------------------
  58
  59 A small area of SRAM is reserved for SCPI communication between application
  60 processors and SCP.
  61
  62 The properties should follow the generic mmio-sram description found in [3]
  63
  64 Each sub-node represents the reserved area for SCPI.
  65
  66 Required sub-node properties:
  67 - reg : The base offset and size of the reserved area with the SRAM
  68 - compatible : should be "arm,scp-shmem" for Non-secure SRAM based
  69                shared memory
  70
  71 Sensor bindings for the sensors based on SCPI Message Protocol
  72 --------------------------------------------------------------
  73 SCPI provides an API to access the various sensors on the SoC.
  74
  75 Required properties:
  76 - compatible : should be "arm,scpi-sensors".
  77 - #thermal-sensor-cells: should be set to 1. This property follows the
  78                          thermal device tree bindings[2].
  79
  80                          Valid cell values are raw identifiers (Sensor ID)
  81                          as used by the firmware. Refer to  platform details
  82                          for your implementation for the IDs to use.
  83
  84 Power domain bindings for the power domains based on SCPI Message Protocol
  85 ------------------------------------------------------------
  86
  87 This binding uses the generic power domain binding[4].
  88
  89 PM domain providers
  90 ===================
  91
  92 Required properties:
  93  - #power-domain-cells : Should be 1. Contains the device or the power
  94                          domain ID value used by SCPI commands.
  95  - num-domains: Total number of power domains provided by SCPI. This is
  96                 needed as the SCPI message protocol lacks a mechanism to
  97                 query this information at runtime.
  98
  99 PM domain consumers
 100 ===================
 101
 102 Required properties:
 103  - power-domains : A phandle and PM domain specifier as defined by bindings of
 104                    the power controller specified by phandle.
 105
 106 [0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html
 107 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
 108 [2] Documentation/devicetree/bindings/thermal/thermal.txt
 109 [3] Documentation/devicetree/bindings/sram/sram.txt
 110 [4] Documentation/devicetree/bindings/power/power_domain.txt
 111
 112 Example:
 113
 114 sram: sram@50000000 {
 115         compatible = "arm,juno-sram-ns", "mmio-sram";
 116         reg = <0x0 0x50000000 0x0 0x10000>;
 117
 118         #address-cells = <1>;
 119         #size-cells = <1>;
 120         ranges = <0 0x0 0x50000000 0x10000>;
 121
 122         cpu_scp_lpri: scp-shmem@0 {
 123                 compatible = "arm,juno-scp-shmem";
 124                 reg = <0x0 0x200>;
 125         };
 126
 127         cpu_scp_hpri: scp-shmem@200 {
 128                 compatible = "arm,juno-scp-shmem";
 129                 reg = <0x200 0x200>;
 130         };
 131 };
 132
 133 mailbox: mailbox0@40000000 {
 134         ....
 135         #mbox-cells = <1>;
 136 };
 137
 138 scpi_protocol: scpi@2e000000 {
 139         compatible = "arm,scpi";
 140         mboxes = <&mailbox 0 &mailbox 1>;
 141         shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
 142
 143         clocks {
 144                 compatible = "arm,scpi-clocks";
 145
 146                 scpi_dvfs: scpi_clocks@0 {
 147                         compatible = "arm,scpi-dvfs-clocks";
 148                         #clock-cells = <1>;
 149                         clock-indices = <0>, <1>, <2>;
 150                         clock-output-names = "atlclk", "aplclk","gpuclk";
 151                 };
 152                 scpi_clk: scpi_clocks@3 {
 153                         compatible = "arm,scpi-variable-clocks";
 154                         #clock-cells = <1>;
 155                         clock-indices = <3>, <4>;
 156                         clock-output-names = "pxlclk0", "pxlclk1";
 157                 };
 158         };
 159
 160         scpi_sensors0: sensors {
 161                 compatible = "arm,scpi-sensors";
 162                 #thermal-sensor-cells = <1>;
 163         };
 164
 165         scpi_devpd: scpi-power-domains {
 166                 compatible = "arm,scpi-power-domains";
 167                 num-domains = <2>;
 168                 #power-domain-cells = <1>;
 169         };
 170 };
 171
 172 cpu@0 {
 173         ...
 174         reg = <0 0>;
 175         clocks = <&scpi_dvfs 0>;
 176 };
 177
 178 hdlcd@7ff60000 {
 179         ...
 180         reg = <0 0x7ff60000 0 0x1000>;
 181         clocks = <&scpi_clk 4>;
 182         power-domains = <&scpi_devpd 1>;
 183 };
 184
 185 thermal-zones {
 186         soc_thermal {
 187                 polling-delay-passive = <100>;
 188                 polling-delay = <1000>;
 189
 190                                 /* sensor         ID */
 191                 thermal-sensors = <&scpi_sensors0 3>;
 192                 ...
 193         };
 194 };
 195
 196 In the above example, the #clock-cells is set to 1 as required.
 197 scpi_dvfs has 3 output clocks namely: atlclk, aplclk, and gpuclk with 0,
 198 1 and 2 as clock-indices. scpi_clk has 2 output clocks namely: pxlclk0
 199 and pxlclk1 with 3 and 4 as clock-indices.
 200
 201 The first consumer in the example is cpu@0 and it has '0' as the clock
 202 specifier which points to the first entry in the output clocks of
 203 scpi_dvfs i.e. "atlclk".
 204
 205 Similarly the second example is hdlcd@7ff60000 and it has pxlclk1 as input
 206 clock. '4' in the clock specifier here points to the second entry
 207 in the output clocks of scpi_clocks  i.e. "pxlclk1"
 208
 209 The thermal-sensors property in the soc_thermal node uses the
 210 temperature sensor provided by SCP firmware to setup a thermal
 211 zone. The ID "3" is the sensor identifier for the temperature sensor
 212 as used by the firmware.
 213
 214 The num-domains property in scpi-power-domains domain specifies that
 215 SCPI provides 2 power domains. The hdlcd node uses the power domain with
 216 domain ID 1.