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[mirror_ubuntu-zesty-kernel.git] / arch / arm / boot / dts / imx53-tx53.dtsi
1 /*
2 * Copyright 2012 <LW@KARO-electronics.de>
3 * based on imx53-qsb.dts
4 * Copyright 2011 Freescale Semiconductor, Inc.
5 * Copyright 2011 Linaro Ltd.
6 *
7 * The code contained herein is licensed under the GNU General Public
8 * License. You may obtain a copy of the GNU General Public License
9 * Version 2 at the following locations:
10 *
11 * http://www.opensource.org/licenses/gpl-license.html
12 * http://www.gnu.org/copyleft/gpl.html
13 */
14
15 #include "imx53.dtsi"
16 #include <dt-bindings/gpio/gpio.h>
17
18 / {
19 model = "Ka-Ro electronics TX53 module";
20 compatible = "karo,tx53", "fsl,imx53";
21
22 aliases {
23 can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
24 can1 = &can1;
25 ipu = &ipu;
26 reg_can_xcvr = &reg_can_xcvr;
27 usbh1 = &usbh1;
28 usbotg = &usbotg;
29 };
30
31 clocks {
32 ckih1 {
33 clock-frequency = <0>;
34 };
35
36 mclk: clock@0 {
37 compatible = "fixed-clock";
38 reg = <0>;
39 #clock-cells = <0>;
40 clock-frequency = <27000000>;
41 };
42 };
43
44 gpio-keys {
45 compatible = "gpio-keys";
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_gpio_key>;
48
49 power {
50 label = "Power Button";
51 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
52 linux,code = <116>; /* KEY_POWER */
53 gpio-key,wakeup;
54 };
55 };
56
57 leds {
58 compatible = "gpio-leds";
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinctrl_stk5led>;
61
62 user {
63 label = "Heartbeat";
64 gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>;
65 linux,default-trigger = "heartbeat";
66 };
67 };
68
69 regulators {
70 compatible = "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <0>;
73
74 reg_2v5: regulator@0 {
75 compatible = "regulator-fixed";
76 reg = <0>;
77 regulator-name = "2V5";
78 regulator-min-microvolt = <2500000>;
79 regulator-max-microvolt = <2500000>;
80 };
81
82 reg_3v3: regulator@1 {
83 compatible = "regulator-fixed";
84 reg = <1>;
85 regulator-name = "3V3";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
88 };
89
90 reg_can_xcvr: regulator@2 {
91 compatible = "regulator-fixed";
92 reg = <2>;
93 regulator-name = "CAN XCVR";
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_can_xcvr>;
98 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
99 };
100
101 reg_usbh1_vbus: regulator@3 {
102 compatible = "regulator-fixed";
103 reg = <3>;
104 regulator-name = "usbh1_vbus";
105 regulator-min-microvolt = <5000000>;
106 regulator-max-microvolt = <5000000>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_usbh1_vbus>;
109 gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
110 enable-active-high;
111 };
112
113 reg_usbotg_vbus: regulator@4 {
114 compatible = "regulator-fixed";
115 reg = <4>;
116 regulator-name = "usbotg_vbus";
117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <5000000>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_usbotg_vbus>;
121 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
122 enable-active-high;
123 };
124 };
125
126 sound {
127 compatible = "karo,tx53-audio-sgtl5000", "fsl,imx-audio-sgtl5000";
128 model = "tx53-audio-sgtl5000";
129 ssi-controller = <&ssi1>;
130 audio-codec = <&sgtl5000>;
131 audio-routing =
132 "MIC_IN", "Mic Jack",
133 "Mic Jack", "Mic Bias",
134 "Headphone Jack", "HP_OUT";
135 /* '1' based port numbers according to datasheet names */
136 mux-int-port = <1>;
137 mux-ext-port = <5>;
138 };
139 };
140
141 &audmux {
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_ssi1>;
144 status = "okay";
145 };
146
147 &can1 {
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_can1>;
150 xceiver-supply = <&reg_can_xcvr>;
151 status = "okay";
152 };
153
154 &can2 {
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_can2>;
157 xceiver-supply = <&reg_can_xcvr>;
158 status = "okay";
159 };
160
161 &ecspi1 {
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_ecspi1>;
164 fsl,spi-num-chipselects = <2>;
165 status = "okay";
166
167 cs-gpios = <
168 &gpio2 30 GPIO_ACTIVE_HIGH
169 &gpio3 19 GPIO_ACTIVE_HIGH
170 >;
171
172 spidev0: spi@0 {
173 compatible = "spidev";
174 reg = <0>;
175 spi-max-frequency = <54000000>;
176 };
177
178 spidev1: spi@1 {
179 compatible = "spidev";
180 reg = <1>;
181 spi-max-frequency = <54000000>;
182 };
183 };
184
185 &esdhc1 {
186 cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
187 fsl,wp-controller;
188 pinctrl-names = "default";
189 pinctrl-0 = <&pinctrl_esdhc1>;
190 status = "okay";
191 };
192
193 &esdhc2 {
194 cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
195 fsl,wp-controller;
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_esdhc2>;
198 status = "okay";
199 };
200
201 &fec {
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_fec>;
204 phy-mode = "rmii";
205 phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>;
206 phy-handle = <&phy0>;
207 mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
208 status = "okay";
209
210 phy0: ethernet-phy@0 {
211 interrupt-parent = <&gpio2>;
212 interrupts = <4>;
213 device_type = "ethernet-phy";
214 };
215 };
216
217 &i2c1 {
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_i2c1>;
220 clock-frequency = <400000>;
221 status = "okay";
222
223 rtc1: ds1339@68 {
224 compatible = "dallas,ds1339";
225 reg = <0x68>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&pinctrl_ds1339>;
228 interrupt-parent = <&gpio4>;
229 interrupts = <20 0>;
230 };
231 };
232
233 &iomuxc {
234 pinctrl-names = "default";
235 pinctrl-0 = <&pinctrl_hog>;
236
237 imx53-tx53 {
238 pinctrl_hog: hoggrp {
239 /* pins not in use by any device on the Starterkit board series */
240 fsl,pins = <
241 /* CMOS Sensor Interface */
242 MX53_PAD_CSI0_DAT12__GPIO5_30 0x1f4
243 MX53_PAD_CSI0_DAT13__GPIO5_31 0x1f4
244 MX53_PAD_CSI0_DAT14__GPIO6_0 0x1f4
245 MX53_PAD_CSI0_DAT15__GPIO6_1 0x1f4
246 MX53_PAD_CSI0_DAT16__GPIO6_2 0x1f4
247 MX53_PAD_CSI0_DAT17__GPIO6_3 0x1f4
248 MX53_PAD_CSI0_DAT18__GPIO6_4 0x1f4
249 MX53_PAD_CSI0_DAT19__GPIO6_5 0x1f4
250 MX53_PAD_CSI0_MCLK__GPIO5_19 0x1f4
251 MX53_PAD_CSI0_VSYNC__GPIO5_21 0x1f4
252 MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x1f4
253 MX53_PAD_GPIO_0__GPIO1_0 0x1f4
254 /* Module Specific Signal */
255 /* MX53_PAD_NANDF_CS2__GPIO6_15 0x1f4 maybe used by EDT-FT5x06 */
256 /* MX53_PAD_EIM_A16__GPIO2_22 0x1f4 maybe used by EDT-FT5x06 */
257 MX53_PAD_EIM_D29__GPIO3_29 0x1f4
258 MX53_PAD_EIM_EB3__GPIO2_31 0x1f4
259 /* MX53_PAD_EIM_A17__GPIO2_21 0x1f4 maybe used by EDT-FT5x06 */
260 /* MX53_PAD_EIM_A18__GPIO2_20 0x1f4 used by LED */
261 MX53_PAD_EIM_A19__GPIO2_19 0x1f4
262 MX53_PAD_EIM_A20__GPIO2_18 0x1f4
263 MX53_PAD_EIM_A21__GPIO2_17 0x1f4
264 MX53_PAD_EIM_A22__GPIO2_16 0x1f4
265 MX53_PAD_EIM_A23__GPIO6_6 0x1f4
266 MX53_PAD_EIM_A24__GPIO5_4 0x1f4
267 MX53_PAD_CSI0_DAT8__GPIO5_26 0x1f4
268 MX53_PAD_CSI0_DAT9__GPIO5_27 0x1f4
269 MX53_PAD_CSI0_DAT10__GPIO5_28 0x1f4
270 MX53_PAD_CSI0_DAT11__GPIO5_29 0x1f4
271 /* MX53_PAD_EIM_D22__GPIO3_22 0x1f4 maybe used by EETI touchpanel driver */
272 /* MX53_PAD_EIM_D23__GPIO3_23 0x1f4 maybe used by EETI touchpanel driver */
273 MX53_PAD_GPIO_13__GPIO4_3 0x1f4
274 MX53_PAD_EIM_CS0__GPIO2_23 0x1f4
275 MX53_PAD_EIM_CS1__GPIO2_24 0x1f4
276 MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x1f4
277 MX53_PAD_EIM_WAIT__GPIO5_0 0x1f4
278 MX53_PAD_EIM_EB0__GPIO2_28 0x1f4
279 MX53_PAD_EIM_EB1__GPIO2_29 0x1f4
280 MX53_PAD_EIM_OE__GPIO2_25 0x1f4
281 MX53_PAD_EIM_LBA__GPIO2_27 0x1f4
282 MX53_PAD_EIM_RW__GPIO2_26 0x1f4
283 MX53_PAD_EIM_DA8__GPIO3_8 0x1f4
284 MX53_PAD_EIM_DA9__GPIO3_9 0x1f4
285 MX53_PAD_EIM_DA10__GPIO3_10 0x1f4
286 MX53_PAD_EIM_DA11__GPIO3_11 0x1f4
287 MX53_PAD_EIM_DA12__GPIO3_12 0x1f4
288 MX53_PAD_EIM_DA13__GPIO3_13 0x1f4
289 MX53_PAD_EIM_DA14__GPIO3_14 0x1f4
290 MX53_PAD_EIM_DA15__GPIO3_15 0x1f4
291 >;
292 };
293
294 pinctrl_can1: can1grp {
295 fsl,pins = <
296 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
297 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
298 >;
299 };
300
301 pinctrl_can2: can2grp {
302 fsl,pins = <
303 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
304 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
305 >;
306 };
307
308 pinctrl_can_xcvr: can-xcvrgrp {
309 fsl,pins = <MX53_PAD_DISP0_DAT0__GPIO4_21 0xe0>; /* Flexcan XCVR enable */
310 };
311
312 pinctrl_ds1339: ds1339grp {
313 fsl,pins = <MX53_PAD_DI0_PIN4__GPIO4_20 0xe0>;
314 };
315
316 pinctrl_ecspi1: ecspi1grp {
317 fsl,pins = <
318 MX53_PAD_GPIO_19__ECSPI1_RDY 0x80000000
319 MX53_PAD_EIM_EB2__ECSPI1_SS0 0x80000000
320 MX53_PAD_EIM_D16__ECSPI1_SCLK 0x80000000
321 MX53_PAD_EIM_D17__ECSPI1_MISO 0x80000000
322 MX53_PAD_EIM_D18__ECSPI1_MOSI 0x80000000
323 MX53_PAD_EIM_D19__ECSPI1_SS1 0x80000000
324 >;
325 };
326
327 pinctrl_esdhc1: esdhc1grp {
328 fsl,pins = <
329 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
330 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
331 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
332 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
333 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
334 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
335 MX53_PAD_EIM_D24__GPIO3_24 0x1f0
336 >;
337 };
338
339 pinctrl_esdhc2: esdhc2grp {
340 fsl,pins = <
341 MX53_PAD_SD2_CMD__ESDHC2_CMD 0x1d5
342 MX53_PAD_SD2_CLK__ESDHC2_CLK 0x1d5
343 MX53_PAD_SD2_DATA0__ESDHC2_DAT0 0x1d5
344 MX53_PAD_SD2_DATA1__ESDHC2_DAT1 0x1d5
345 MX53_PAD_SD2_DATA2__ESDHC2_DAT2 0x1d5
346 MX53_PAD_SD2_DATA3__ESDHC2_DAT3 0x1d5
347 MX53_PAD_EIM_D25__GPIO3_25 0x1f0
348 >;
349 };
350
351 pinctrl_fec: fecgrp {
352 fsl,pins = <
353 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
354 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
355 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
356 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
357 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
358 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
359 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
360 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
361 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
362 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
363 >;
364 };
365
366 pinctrl_gpio_key: gpio-keygrp {
367 fsl,pins = <MX53_PAD_EIM_A25__GPIO5_2 0x1f4>;
368 };
369
370 pinctrl_i2c1: i2c1grp {
371 fsl,pins = <
372 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
373 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
374 >;
375 };
376
377 pinctrl_i2c3: i2c3grp {
378 fsl,pins = <
379 MX53_PAD_GPIO_3__I2C3_SCL 0xc0000000
380 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
381 >;
382 };
383
384 pinctrl_nand: nandgrp {
385 fsl,pins = <
386 MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B 0x4
387 MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B 0x4
388 MX53_PAD_NANDF_CLE__EMI_NANDF_CLE 0x4
389 MX53_PAD_NANDF_ALE__EMI_NANDF_ALE 0x4
390 MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B 0xe0
391 MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 0xe0
392 MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 0x4
393 MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0xa4
394 MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0xa4
395 MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0xa4
396 MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0xa4
397 MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0xa4
398 MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0xa4
399 MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0xa4
400 MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 0xa4
401 >;
402 };
403
404 pinctrl_pwm2: pwm2grp {
405 fsl,pins = <
406 MX53_PAD_GPIO_1__PWM2_PWMO 0x80000000
407 >;
408 };
409
410 pinctrl_ssi1: ssi1grp {
411 fsl,pins = <
412 MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
413 MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
414 MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
415 MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
416 >;
417 };
418
419 pinctrl_ssi2: ssi2grp {
420 fsl,pins = <
421 MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC 0x80000000
422 MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD 0x80000000
423 MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS 0x80000000
424 MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD 0x80000000
425 MX53_PAD_EIM_D27__GPIO3_27 0x1f0
426 >;
427 };
428
429 pinctrl_stk5led: stk5ledgrp {
430 fsl,pins = <MX53_PAD_EIM_A18__GPIO2_20 0xc0>;
431 };
432
433 pinctrl_uart1: uart1grp {
434 fsl,pins = <
435 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
436 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
437 MX53_PAD_PATA_RESET_B__UART1_CTS 0x1c5
438 MX53_PAD_PATA_IORDY__UART1_RTS 0x1c5
439 >;
440 };
441
442 pinctrl_uart2: uart2grp {
443 fsl,pins = <
444 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
445 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5
446 MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5
447 MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5
448 >;
449 };
450
451 pinctrl_uart3: uart3grp {
452 fsl,pins = <
453 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
454 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
455 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
456 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
457 >;
458 };
459
460 pinctrl_usbh1: usbh1grp {
461 fsl,pins = <
462 MX53_PAD_EIM_D30__GPIO3_30 0x100 /* OC */
463 >;
464 };
465
466 pinctrl_usbh1_vbus: usbh1-vbusgrp {
467 fsl,pins = <
468 MX53_PAD_EIM_D31__GPIO3_31 0xe0 /* VBUS ENABLE */
469 >;
470 };
471
472 pinctrl_usbotg_vbus: usbotg-vbusgrp {
473 fsl,pins = <
474 MX53_PAD_GPIO_7__GPIO1_7 0xe0 /* VBUS ENABLE */
475 MX53_PAD_GPIO_8__GPIO1_8 0x100 /* OC */
476 >;
477 };
478 };
479 };
480
481 &ipu {
482 status = "okay";
483 };
484
485 &nfc {
486 pinctrl-names = "default";
487 pinctrl-0 = <&pinctrl_nand>;
488 nand-bus-width = <8>;
489 nand-ecc-mode = "hw";
490 nand-on-flash-bbt;
491 status = "okay";
492 };
493
494 &pwm2 {
495 pinctrl-names = "default";
496 pinctrl-0 = <&pinctrl_pwm2>;
497 #pwm-cells = <3>;
498 };
499
500 &sdma {
501 fsl,sdma-ram-script-name = "sdma-imx53.bin";
502 };
503
504 &ssi1 {
505 codec-handle = <&sgtl5000>;
506 status = "okay";
507 };
508
509 &ssi2 {
510 status = "disabled";
511 };
512
513 &uart1 {
514 pinctrl-names = "default";
515 pinctrl-0 = <&pinctrl_uart1>;
516 fsl,uart-has-rtscts;
517 status = "okay";
518 };
519
520 &uart2 {
521 pinctrl-names = "default";
522 pinctrl-0 = <&pinctrl_uart2>;
523 fsl,uart-has-rtscts;
524 status = "okay";
525 };
526
527 &uart3 {
528 pinctrl-names = "default";
529 pinctrl-0 = <&pinctrl_uart3>;
530 fsl,uart-has-rtscts;
531 status = "okay";
532 };
533
534 &usbh1 {
535 pinctrl-names = "default";
536 pinctrl-0 = <&pinctrl_usbh1>;
537 phy_type = "utmi";
538 disable-over-current;
539 vbus-supply = <&reg_usbh1_vbus>;
540 status = "okay";
541 };
542
543 &usbotg {
544 phy_type = "utmi";
545 dr_mode = "peripheral";
546 disable-over-current;
547 vbus-supply = <&reg_usbotg_vbus>;
548 status = "okay";
549 };
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