arch/arm/boot/dts/omap3-n900.dts

   1 /*
   2  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
   3  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 (or later) as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "omap34xx.dtsi"
  13 #include <dt-bindings/input/input.h>
  14
  15 /*
  16  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
  17  * for omap AES HW crypto support. When linux kernel try to access memory of AES
  18  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
  19  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
  20  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
  21  * There is "unofficial" version of bootloader which enables AES in L3 firewall
  22  * but it is not widely used and to prevent kernel crash rather AES is disabled.
  23  * There is also no runtime detection code if AES is disabled in L3 firewall...
  24  */
  25 &aes {
  26         status = "disabled";
  27 };
  28
  29 / {
  30         model = "Nokia N900";
  31         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
  32
  33         aliases {
  34                 i2c0;
  35                 i2c1 = &i2c1;
  36                 i2c2 = &i2c2;
  37                 i2c3 = &i2c3;
  38         };
  39
  40         cpus {
  41                 cpu@0 {
  42                         cpu0-supply = <&vcc>;
  43                 };
  44         };
  45
  46         leds {
  47                 compatible = "gpio-leds";
  48                 heartbeat {
  49                         label = "debug::sleep";
  50                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* gpio162 */
  51                         linux,default-trigger = "default-on";
  52                         pinctrl-names = "default";
  53                         pinctrl-0 = <&debug_leds>;
  54                 };
  55         };
  56
  57         memory {
  58                 device_type = "memory";
  59                 reg = <0x80000000 0x10000000>; /* 256 MB */
  60         };
  61
  62         gpio_keys {
  63                 compatible = "gpio-keys";
  64
  65                 camera_lens_cover {
  66                         label = "Camera Lens Cover";
  67                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
  68                         linux,input-type = <5>; /* EV_SW */
  69                         linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */
  70                         wakeup-source;
  71                 };
  72
  73                 camera_focus {
  74                         label = "Camera Focus";
  75                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
  76                         linux,code = <0x210>; /* KEY_CAMERA_FOCUS */
  77                         wakeup-source;
  78                 };
  79
  80                 camera_capture {
  81                         label = "Camera Capture";
  82                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
  83                         linux,code = <0xd4>; /* KEY_CAMERA */
  84                         wakeup-source;
  85                 };
  86
  87                 lock_button {
  88                         label = "Lock Button";
  89                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
  90                         linux,code = <0x98>; /* KEY_SCREENLOCK */
  91                         wakeup-source;
  92                 };
  93
  94                 keypad_slide {
  95                         label = "Keypad Slide";
  96                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
  97                         linux,input-type = <5>; /* EV_SW */
  98                         linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */
  99                         wakeup-source;
 100                 };
 101
 102                 proximity_sensor {
 103                         label = "Proximity Sensor";
 104                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
 105                         linux,input-type = <5>; /* EV_SW */
 106                         linux,code = <0x0b>; /* SW_FRONT_PROXIMITY */
 107                 };
 108         };
 109
 110         isp1704: isp1704 {
 111                 compatible = "nxp,isp1704";
 112                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 113                 usb-phy = <&usb2_phy>;
 114         };
 115
 116         tv: connector {
 117                 compatible = "composite-video-connector";
 118                 label = "tv";
 119
 120                 port {
 121                         tv_connector_in: endpoint {
 122                                 remote-endpoint = <&venc_out>;
 123                         };
 124                 };
 125         };
 126
 127         sound: n900-audio {
 128                 compatible = "nokia,n900-audio";
 129
 130                 nokia,cpu-dai = <&mcbsp2>;
 131                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
 132                 nokia,headphone-amplifier = <&tpa6130a2>;
 133
 134                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
 135                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
 136                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
 137                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
 138         };
 139
 140         battery: n900-battery {
 141                 compatible = "nokia,n900-battery";
 142                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
 143                 io-channel-names = "temp", "bsi", "vbat";
 144         };
 145 };
 146
 147 &omap3_pmx_core {
 148         pinctrl-names = "default";
 149
 150         uart2_pins: pinmux_uart2_pins {
 151                 pinctrl-single,pins = <
 152                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 153                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 154                 >;
 155         };
 156
 157         uart3_pins: pinmux_uart3_pins {
 158                 pinctrl-single,pins = <
 159                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
 160                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
 161                 >;
 162         };
 163
 164         ethernet_pins: pinmux_ethernet_pins {
 165                 pinctrl-single,pins = <
 166                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
 167                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
 168                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 169                 >;
 170         };
 171
 172         gpmc_pins: pinmux_gpmc_pins {
 173                 pinctrl-single,pins = <
 174
 175                         /* address lines */
 176                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
 177                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
 178                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
 179
 180                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
 181                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
 182                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
 183                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
 184                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
 185                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
 186                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
 187                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
 188                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
 189
 190                         /*
 191                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
 192                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
 193                          */
 194                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
 195                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
 196                 >;
 197         };
 198
 199         i2c1_pins: pinmux_i2c1_pins {
 200                 pinctrl-single,pins = <
 201                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
 202                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
 203                 >;
 204         };
 205
 206         i2c2_pins: pinmux_i2c2_pins {
 207                 pinctrl-single,pins = <
 208                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
 209                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
 210                 >;
 211         };
 212
 213         i2c3_pins: pinmux_i2c3_pins {
 214                 pinctrl-single,pins = <
 215                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
 216                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
 217                 >;
 218         };
 219
 220         debug_leds: pinmux_debug_led_pins {
 221                 pinctrl-single,pins = <
 222                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 223                 >;
 224         };
 225
 226         mcspi4_pins: pinmux_mcspi4_pins {
 227                 pinctrl-single,pins = <
 228                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
 229                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
 230                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
 231                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
 232                 >;
 233         };
 234
 235         mmc1_pins: pinmux_mmc1_pins {
 236                 pinctrl-single,pins = <
 237                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
 238                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
 239                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
 240                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
 241                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
 242                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
 243                 >;
 244         };
 245
 246         mmc2_pins: pinmux_mmc2_pins {
 247                 pinctrl-single,pins = <
 248                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
 249                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
 250                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
 251                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
 252                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
 253                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
 254                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
 255                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
 256                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
 257                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
 258                 >;
 259         };
 260
 261         acx565akm_pins: pinmux_acx565akm_pins {
 262                 pinctrl-single,pins = <
 263                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
 264                 >;
 265         };
 266
 267         dss_sdi_pins: pinmux_dss_sdi_pins {
 268                 pinctrl-single,pins = <
 269                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
 270                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
 271                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
 272                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 273
 274                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
 275                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
 276                 >;
 277         };
 278
 279         wl1251_pins: pinmux_wl1251 {
 280                 pinctrl-single,pins = <
 281                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
 282                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
 283                 >;
 284         };
 285
 286         ssi_pins: pinmux_ssi {
 287                 pinctrl-single,pins = <
 288                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
 289                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
 290                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* ssi1_wake_tx (cawake) */
 291                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
 292                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
 293                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
 294                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
 295                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
 296                 >;
 297         };
 298
 299         modem_pins: pinmux_modem {
 300                 pinctrl-single,pins = <
 301                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
 302                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | WAKEUP_EN | MUX_MODE4) /* gpio 72 => ape_rst_rq */
 303                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
 304                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
 305                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
 306                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
 307                 >;
 308         };
 309 };
 310
 311 &i2c1 {
 312         pinctrl-names = "default";
 313         pinctrl-0 = <&i2c1_pins>;
 314
 315         clock-frequency = <2200000>;
 316
 317         twl: twl@48 {
 318                 reg = <0x48>;
 319                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 320                 interrupt-parent = <&intc>;
 321         };
 322 };
 323
 324 #include "twl4030.dtsi"
 325 #include "twl4030_omap3.dtsi"
 326
 327 &vaux1 {
 328         regulator-name = "V28";
 329         regulator-min-microvolt = <2800000>;
 330         regulator-max-microvolt = <2800000>;
 331         regulator-always-on; /* due to battery cover sensor */
 332 };
 333
 334 &vaux2 {
 335         regulator-name = "VCSI";
 336         regulator-min-microvolt = <1800000>;
 337         regulator-max-microvolt = <1800000>;
 338 };
 339
 340 &vaux3 {
 341         regulator-name = "VMMC2_30";
 342         regulator-min-microvolt = <2800000>;
 343         regulator-max-microvolt = <3000000>;
 344 };
 345
 346 &vaux4 {
 347         regulator-name = "VCAM_ANA_28";
 348         regulator-min-microvolt = <2800000>;
 349         regulator-max-microvolt = <2800000>;
 350 };
 351
 352 &vmmc1 {
 353         regulator-name = "VMMC1";
 354         regulator-min-microvolt = <1850000>;
 355         regulator-max-microvolt = <3150000>;
 356 };
 357
 358 &vmmc2 {
 359         regulator-name = "V28_A";
 360         regulator-min-microvolt = <2800000>;
 361         regulator-max-microvolt = <3000000>;
 362         regulator-always-on; /* due VIO leak to AIC34 VDDs */
 363 };
 364
 365 &vpll1 {
 366         regulator-name = "VPLL";
 367         regulator-min-microvolt = <1800000>;
 368         regulator-max-microvolt = <1800000>;
 369         regulator-always-on;
 370 };
 371
 372 &vpll2 {
 373         regulator-name = "VSDI_CSI";
 374         regulator-min-microvolt = <1800000>;
 375         regulator-max-microvolt = <1800000>;
 376         regulator-always-on;
 377 };
 378
 379 &vsim {
 380         regulator-name = "VMMC2_IO_18";
 381         regulator-min-microvolt = <1800000>;
 382         regulator-max-microvolt = <1800000>;
 383 };
 384
 385 &vio {
 386         regulator-name = "VIO";
 387         regulator-min-microvolt = <1800000>;
 388         regulator-max-microvolt = <1800000>;
 389 };
 390
 391 &vintana1 {
 392         regulator-name = "VINTANA1";
 393         /* fixed to 1500000 */
 394         regulator-always-on;
 395 };
 396
 397 &vintana2 {
 398         regulator-name = "VINTANA2";
 399         regulator-min-microvolt = <2750000>;
 400         regulator-max-microvolt = <2750000>;
 401         regulator-always-on;
 402 };
 403
 404 &vintdig {
 405         regulator-name = "VINTDIG";
 406         /* fixed to 1500000 */
 407         regulator-always-on;
 408 };
 409
 410 &twl {
 411         twl_audio: audio {
 412                 compatible = "ti,twl4030-audio";
 413                 ti,enable-vibra = <1>;
 414         };
 415
 416         twl_power: power {
 417                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
 418                 ti,use_poweroff;
 419         };
 420 };
 421
 422 &twl_keypad {
 423         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
 424                          MATRIX_KEY(0x00, 0x01, KEY_O)
 425                          MATRIX_KEY(0x00, 0x02, KEY_P)
 426                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
 427                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
 428                          MATRIX_KEY(0x00, 0x06, KEY_A)
 429                          MATRIX_KEY(0x00, 0x07, KEY_S)
 430
 431                          MATRIX_KEY(0x01, 0x00, KEY_W)
 432                          MATRIX_KEY(0x01, 0x01, KEY_D)
 433                          MATRIX_KEY(0x01, 0x02, KEY_F)
 434                          MATRIX_KEY(0x01, 0x03, KEY_G)
 435                          MATRIX_KEY(0x01, 0x04, KEY_H)
 436                          MATRIX_KEY(0x01, 0x05, KEY_J)
 437                          MATRIX_KEY(0x01, 0x06, KEY_K)
 438                          MATRIX_KEY(0x01, 0x07, KEY_L)
 439
 440                          MATRIX_KEY(0x02, 0x00, KEY_E)
 441                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
 442                          MATRIX_KEY(0x02, 0x02, KEY_UP)
 443                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
 444                          MATRIX_KEY(0x02, 0x05, KEY_Z)
 445                          MATRIX_KEY(0x02, 0x06, KEY_X)
 446                          MATRIX_KEY(0x02, 0x07, KEY_C)
 447                          MATRIX_KEY(0x02, 0x08, KEY_F9)
 448
 449                          MATRIX_KEY(0x03, 0x00, KEY_R)
 450                          MATRIX_KEY(0x03, 0x01, KEY_V)
 451                          MATRIX_KEY(0x03, 0x02, KEY_B)
 452                          MATRIX_KEY(0x03, 0x03, KEY_N)
 453                          MATRIX_KEY(0x03, 0x04, KEY_M)
 454                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
 455                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
 456                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
 457
 458                          MATRIX_KEY(0x04, 0x00, KEY_T)
 459                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
 460                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
 461                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
 462                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
 463                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
 464                          MATRIX_KEY(0x04, 0x08, KEY_F10)
 465
 466                          MATRIX_KEY(0x05, 0x00, KEY_Y)
 467                          MATRIX_KEY(0x05, 0x08, KEY_F11)
 468
 469                          MATRIX_KEY(0x06, 0x00, KEY_U)
 470
 471                          MATRIX_KEY(0x07, 0x00, KEY_I)
 472                          MATRIX_KEY(0x07, 0x01, KEY_F7)
 473                          MATRIX_KEY(0x07, 0x02, KEY_F8)
 474                          >;
 475 };
 476
 477 &twl_gpio {
 478         ti,pullups      = <0x0>;
 479         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
 480 };
 481
 482 &i2c2 {
 483         pinctrl-names = "default";
 484         pinctrl-0 = <&i2c2_pins>;
 485
 486         clock-frequency = <100000>;
 487
 488         tlv320aic3x: tlv320aic3x@18 {
 489                 compatible = "ti,tlv320aic3x";
 490                 reg = <0x18>;
 491                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
 492                 ai3x-gpio-func = <
 493                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
 494                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
 495                 >;
 496
 497                 AVDD-supply = <&vmmc2>;
 498                 DRVDD-supply = <&vmmc2>;
 499                 IOVDD-supply = <&vio>;
 500                 DVDD-supply = <&vio>;
 501
 502                 ai3x-micbias-vg = <1>;
 503         };
 504
 505         tlv320aic3x_aux: tlv320aic3x@19 {
 506                 compatible = "ti,tlv320aic3x";
 507                 reg = <0x19>;
 508                 gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
 509
 510                 AVDD-supply = <&vmmc2>;
 511                 DRVDD-supply = <&vmmc2>;
 512                 IOVDD-supply = <&vio>;
 513                 DVDD-supply = <&vio>;
 514
 515                 ai3x-micbias-vg = <2>;
 516         };
 517
 518         tsl2563: tsl2563@29 {
 519                 compatible = "amstaos,tsl2563";
 520                 reg = <0x29>;
 521
 522                 amstaos,cover-comp-gain = <16>;
 523         };
 524
 525         lp5523: lp5523@32 {
 526                 compatible = "national,lp5523";
 527                 reg = <0x32>;
 528                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
 529                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
 530
 531                 chan0 {
 532                         chan-name = "lp5523:kb1";
 533                         led-cur = /bits/ 8 <50>;
 534                         max-cur = /bits/ 8 <100>;
 535                 };
 536
 537                 chan1 {
 538                         chan-name = "lp5523:kb2";
 539                         led-cur = /bits/ 8 <50>;
 540                         max-cur = /bits/ 8 <100>;
 541                 };
 542
 543                 chan2 {
 544                         chan-name = "lp5523:kb3";
 545                         led-cur = /bits/ 8 <50>;
 546                         max-cur = /bits/ 8 <100>;
 547                 };
 548
 549                 chan3 {
 550                         chan-name = "lp5523:kb4";
 551                         led-cur = /bits/ 8 <50>;
 552                         max-cur = /bits/ 8 <100>;
 553                 };
 554
 555                 chan4 {
 556                         chan-name = "lp5523:b";
 557                         led-cur = /bits/ 8 <50>;
 558                         max-cur = /bits/ 8 <100>;
 559                 };
 560
 561                 chan5 {
 562                         chan-name = "lp5523:g";
 563                         led-cur = /bits/ 8 <50>;
 564                         max-cur = /bits/ 8 <100>;
 565                 };
 566
 567                 chan6 {
 568                         chan-name = "lp5523:r";
 569                         led-cur = /bits/ 8 <50>;
 570                         max-cur = /bits/ 8 <100>;
 571                 };
 572
 573                 chan7 {
 574                         chan-name = "lp5523:kb5";
 575                         led-cur = /bits/ 8 <50>;
 576                         max-cur = /bits/ 8 <100>;
 577                 };
 578
 579                 chan8 {
 580                         chan-name = "lp5523:kb6";
 581                         led-cur = /bits/ 8 <50>;
 582                         max-cur = /bits/ 8 <100>;
 583                 };
 584         };
 585
 586         bq27200: bq27200@55 {
 587                 compatible = "ti,bq27200";
 588                 reg = <0x55>;
 589         };
 590
 591         tpa6130a2: tpa6130a2@60 {
 592                 compatible = "ti,tpa6130a2";
 593                 reg = <0x60>;
 594
 595                 Vdd-supply = <&vmmc2>;
 596
 597                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
 598         };
 599
 600         si4713: si4713@63 {
 601                 compatible = "silabs,si4713";
 602                 reg = <0x63>;
 603
 604                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
 605                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
 606                 vio-supply = <&vio>;
 607                 vdd-supply = <&vaux1>;
 608         };
 609
 610         bq24150a: bq24150a@6b {
 611                 compatible = "ti,bq24150a";
 612                 reg = <0x6b>;
 613
 614                 ti,current-limit = <100>;
 615                 ti,weak-battery-voltage = <3400>;
 616                 ti,battery-regulation-voltage = <4200>;
 617                 ti,charge-current = <650>;
 618                 ti,termination-current = <100>;
 619                 ti,resistor-sense = <68>;
 620
 621                 ti,usb-charger-detection = <&isp1704>;
 622         };
 623 };
 624
 625 &i2c3 {
 626         pinctrl-names = "default";
 627         pinctrl-0 = <&i2c3_pins>;
 628
 629         clock-frequency = <400000>;
 630
 631         lis302dl: lis3lv02d@1d {
 632                 compatible = "st,lis3lv02d";
 633                 reg = <0x1d>;
 634
 635                 Vdd-supply = <&vaux1>;
 636                 Vdd_IO-supply = <&vio>;
 637
 638                 interrupt-parent = <&gpio6>;
 639                 interrupts = <21 20>; /* 181 and 180 */
 640
 641                 /* click flags */
 642                 st,click-single-x;
 643                 st,click-single-y;
 644                 st,click-single-z;
 645
 646                 /* Limits are 0.5g * value */
 647                 st,click-threshold-x = <8>;
 648                 st,click-threshold-y = <8>;
 649                 st,click-threshold-z = <10>;
 650
 651                 /* Click must be longer than time limit */
 652                 st,click-time-limit = <9>;
 653
 654                 /* Kind of debounce filter */
 655                 st,click-latency = <50>;
 656
 657                 /* Interrupt line 2 for click detection */
 658                 st,irq2-click;
 659
 660                 st,wakeup-x-hi;
 661                 st,wakeup-y-hi;
 662                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 663
 664                 st,wakeup2-z-hi;
 665                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
 666
 667                 st,hipass1-disable;
 668                 st,hipass2-disable;
 669
 670                 st,axis-x = <1>;    /* LIS3_DEV_X */
 671                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
 672                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
 673
 674                 st,min-limit-x = <(-32)>;
 675                 st,min-limit-y = <3>;
 676                 st,min-limit-z = <3>;
 677
 678                 st,max-limit-x = <(-3)>;
 679                 st,max-limit-y = <32>;
 680                 st,max-limit-z = <32>;
 681         };
 682 };
 683
 684 &mmc1 {
 685         pinctrl-names = "default";
 686         pinctrl-0 = <&mmc1_pins>;
 687         vmmc-supply = <&vmmc1>;
 688         bus-width = <4>;
 689         cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
 690 };
 691
 692 /* most boards use vaux3, only some old versions use vmmc2 instead */
 693 &mmc2 {
 694         pinctrl-names = "default";
 695         pinctrl-0 = <&mmc2_pins>;
 696         vmmc-supply = <&vaux3>;
 697         vmmc_aux-supply = <&vsim>;
 698         bus-width = <8>;
 699         non-removable;
 700 };
 701
 702 &mmc3 {
 703         status = "disabled";
 704 };
 705
 706 &gpmc {
 707         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
 708                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
 709         pinctrl-names = "default";
 710         pinctrl-0 = <&gpmc_pins>;
 711
 712         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 713         onenand@0,0 {
 714                 #address-cells = <1>;
 715                 #size-cells = <1>;
 716                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 717
 718                 gpmc,sync-read;
 719                 gpmc,sync-write;
 720                 gpmc,burst-length = <16>;
 721                 gpmc,burst-read;
 722                 gpmc,burst-wrap;
 723                 gpmc,burst-write;
 724                 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
 725                 gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
 726                 gpmc,cs-on-ns = <0>;
 727                 gpmc,cs-rd-off-ns = <87>;
 728                 gpmc,cs-wr-off-ns = <87>;
 729                 gpmc,adv-on-ns = <0>;
 730                 gpmc,adv-rd-off-ns = <10>;
 731                 gpmc,adv-wr-off-ns = <10>;
 732                 gpmc,oe-on-ns = <15>;
 733                 gpmc,oe-off-ns = <87>;
 734                 gpmc,we-on-ns = <0>;
 735                 gpmc,we-off-ns = <87>;
 736                 gpmc,rd-cycle-ns = <112>;
 737                 gpmc,wr-cycle-ns = <112>;
 738                 gpmc,access-ns = <81>;
 739                 gpmc,page-burst-access-ns = <15>;
 740                 gpmc,bus-turnaround-ns = <0>;
 741                 gpmc,cycle2cycle-delay-ns = <0>;
 742                 gpmc,wait-monitoring-ns = <0>;
 743                 gpmc,clk-activation-ns = <5>;
 744                 gpmc,wr-data-mux-bus-ns = <30>;
 745                 gpmc,wr-access-ns = <81>;
 746                 gpmc,sync-clk-ps = <15000>;
 747
 748                 /*
 749                  * MTD partition table corresponding to Nokia's
 750                  * Maemo 5 (Fremantle) release.
 751                  */
 752                 partition@0 {
 753                         label = "bootloader";
 754                         reg = <0x00000000 0x00020000>;
 755                         read-only;
 756                 };
 757                 partition@1 {
 758                         label = "config";
 759                         reg = <0x00020000 0x00060000>;
 760                 };
 761                 partition@2 {
 762                         label = "log";
 763                         reg = <0x00080000 0x00040000>;
 764                 };
 765                 partition@3 {
 766                         label = "kernel";
 767                         reg = <0x000c0000 0x00200000>;
 768                 };
 769                 partition@4 {
 770                         label = "initfs";
 771                         reg = <0x002c0000 0x00200000>;
 772                 };
 773                 partition@5 {
 774                         label = "rootfs";
 775                         reg = <0x004c0000 0x0fb40000>;
 776                 };
 777         };
 778
 779         /* Ethernet is on some early development boards and qemu */
 780         ethernet@gpmc {
 781                 compatible = "smsc,lan91c94";
 782                 interrupt-parent = <&gpio2>;
 783                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
 784                 reg = <1 0 0xf>;                /* 16 byte IO range */
 785                 bank-width = <2>;
 786                 pinctrl-names = "default";
 787                 pinctrl-0 = <&ethernet_pins>;
 788                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
 789                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
 790                 gpmc,device-width = <2>;
 791                 gpmc,sync-clk-ps = <0>;
 792                 gpmc,cs-on-ns = <0>;
 793                 gpmc,cs-rd-off-ns = <48>;
 794                 gpmc,cs-wr-off-ns = <24>;
 795                 gpmc,adv-on-ns = <0>;
 796                 gpmc,adv-rd-off-ns = <0>;
 797                 gpmc,adv-wr-off-ns = <0>;
 798                 gpmc,we-on-ns = <12>;
 799                 gpmc,we-off-ns = <18>;
 800                 gpmc,oe-on-ns = <12>;
 801                 gpmc,oe-off-ns = <48>;
 802                 gpmc,page-burst-access-ns = <0>;
 803                 gpmc,access-ns = <42>;
 804                 gpmc,rd-cycle-ns = <180>;
 805                 gpmc,wr-cycle-ns = <180>;
 806                 gpmc,bus-turnaround-ns = <0>;
 807                 gpmc,cycle2cycle-delay-ns = <0>;
 808                 gpmc,wait-monitoring-ns = <0>;
 809                 gpmc,clk-activation-ns = <0>;
 810                 gpmc,wr-access-ns = <0>;
 811                 gpmc,wr-data-mux-bus-ns = <12>;
 812         };
 813 };
 814
 815 &mcspi1 {
 816         /*
 817          * For some reason, touchscreen is necessary for screen to work at
 818          * all on real hw. It works well without it on emulator.
 819          *
 820          * Also... order in the device tree actually matters here.
 821          */
 822         tsc2005@0 {
 823                 compatible = "ti,tsc2005";
 824                 spi-max-frequency = <6000000>;
 825                 reg = <0>;
 826
 827                 vio-supply = <&vio>;
 828
 829                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
 830                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
 831
 832                 touchscreen-fuzz-x = <4>;
 833                 touchscreen-fuzz-y = <7>;
 834                 touchscreen-fuzz-pressure = <2>;
 835                 touchscreen-size-x = <4096>;
 836                 touchscreen-size-y = <4096>;
 837                 touchscreen-max-pressure = <2048>;
 838
 839                 ti,x-plate-ohms = <280>;
 840                 ti,esd-recovery-timeout-ms = <8000>;
 841         };
 842
 843         acx565akm@2 {
 844                 compatible = "sony,acx565akm";
 845                 spi-max-frequency = <6000000>;
 846                 reg = <2>;
 847
 848                 pinctrl-names = "default";
 849                 pinctrl-0 = <&acx565akm_pins>;
 850
 851                 label = "lcd";
 852                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
 853
 854                 port {
 855                         lcd_in: endpoint {
 856                                 remote-endpoint = <&sdi_out>;
 857                         };
 858                 };
 859         };
 860 };
 861
 862 &mcspi4 {
 863         pinctrl-names = "default";
 864         pinctrl-0 = <&mcspi4_pins>;
 865
 866         wl1251@0 {
 867                 pinctrl-names = "default";
 868                 pinctrl-0 = <&wl1251_pins>;
 869
 870                 vio-supply = <&vio>;
 871
 872                 compatible = "ti,wl1251";
 873                 reg = <0>;
 874                 spi-max-frequency = <48000000>;
 875
 876                 spi-cpol;
 877                 spi-cpha;
 878
 879                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
 880
 881                 interrupt-parent = <&gpio2>;
 882                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
 883         };
 884 };
 885
 886 &usb_otg_hs {
 887         interface-type = <0>;
 888         usb-phy = <&usb2_phy>;
 889         phys = <&usb2_phy>;
 890         phy-names = "usb2-phy";
 891         mode = <2>;
 892         power = <50>;
 893 };
 894
 895 &uart1 {
 896         status = "disabled";
 897 };
 898
 899 &uart2 {
 900         interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
 901         pinctrl-names = "default";
 902         pinctrl-0 = <&uart2_pins>;
 903 };
 904
 905 &uart3 {
 906         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
 907         pinctrl-names = "default";
 908         pinctrl-0 = <&uart3_pins>;
 909 };
 910
 911 &dss {
 912         status = "ok";
 913
 914         pinctrl-names = "default";
 915         pinctrl-0 = <&dss_sdi_pins>;
 916
 917         vdds_sdi-supply = <&vaux1>;
 918
 919         ports {
 920                 #address-cells = <1>;
 921                 #size-cells = <0>;
 922
 923                 port@1 {
 924                         reg = <1>;
 925
 926                         sdi_out: endpoint {
 927                                 remote-endpoint = <&lcd_in>;
 928                                 datapairs = <2>;
 929                         };
 930                 };
 931         };
 932 };
 933
 934 &venc {
 935         status = "ok";
 936
 937         vdda-supply = <&vdac>;
 938
 939         port {
 940                 venc_out: endpoint {
 941                         remote-endpoint = <&tv_connector_in>;
 942                         ti,channels = <1>;
 943                 };
 944         };
 945 };
 946
 947 &mcbsp2 {
 948         status = "ok";
 949 };
 950
 951 &ssi_port1 {
 952         pinctrl-names = "default";
 953         pinctrl-0 = <&ssi_pins>;
 954
 955         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
 956
 957         modem: hsi-client {
 958                 compatible = "nokia,n900-modem";
 959
 960                 pinctrl-names = "default";
 961                 pinctrl-0 = <&modem_pins>;
 962
 963                 hsi-channel-ids = <0>, <1>, <2>, <3>;
 964                 hsi-channel-names = "mcsaab-control",
 965                                     "speech-control",
 966                                     "speech-data",
 967                                     "mcsaab-data";
 968                 hsi-speed-kbps = <55000>;
 969                 hsi-mode = "frame";
 970                 hsi-flow = "synchronized";
 971                 hsi-arb-mode = "round-robin";
 972
 973                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
 974
 975                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
 976                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
 977                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
 978                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
 979                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
 980                 gpio-names = "cmt_apeslpx",
 981                              "cmt_rst_rq",
 982                              "cmt_en",
 983                              "cmt_rst",
 984                              "cmt_bsi";
 985         };
 986 };
 987
 988 &ssi_port2 {
 989         status = "disabled";
 990 };