arch/arm/boot/dts/tegra20-paz00.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra20.dtsi"
   5
   6 / {
   7         model = "Toshiba AC100 / Dynabook AZ";
   8         compatible = "compal,paz00", "nvidia,tegra20";
   9
  10         aliases {
  11                 rtc0 = "/i2c@7000d000/tps6586x@34";
  12                 rtc1 = "/rtc@7000e000";
  13                 serial0 = &uarta;
  14                 serial1 = &uartc;
  15         };
  16
  17         memory {
  18                 reg = <0x00000000 0x20000000>;
  19         };
  20
  21         host1x@50000000 {
  22                 dc@54200000 {
  23                         rgb {
  24                                 status = "okay";
  25
  26                                 nvidia,panel = <&panel>;
  27                         };
  28                 };
  29
  30                 hdmi@54280000 {
  31                         status = "okay";
  32
  33                         vdd-supply = <&hdmi_vdd_reg>;
  34                         pll-supply = <&hdmi_pll_reg>;
  35
  36                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  37                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  38                                 GPIO_ACTIVE_HIGH>;
  39                 };
  40         };
  41
  42         pinmux@70000014 {
  43                 pinctrl-names = "default";
  44                 pinctrl-0 = <&state_default>;
  45
  46                 state_default: pinmux {
  47                         ata {
  48                                 nvidia,pins = "ata", "atc", "atd", "ate",
  49                                         "dap2", "gmb", "gmc", "gmd", "spia",
  50                                         "spib", "spic", "spid", "spie";
  51                                 nvidia,function = "gmi";
  52                         };
  53                         atb {
  54                                 nvidia,pins = "atb", "gma", "gme";
  55                                 nvidia,function = "sdio4";
  56                         };
  57                         cdev1 {
  58                                 nvidia,pins = "cdev1";
  59                                 nvidia,function = "plla_out";
  60                         };
  61                         cdev2 {
  62                                 nvidia,pins = "cdev2";
  63                                 nvidia,function = "pllp_out4";
  64                         };
  65                         crtp {
  66                                 nvidia,pins = "crtp";
  67                                 nvidia,function = "crt";
  68                         };
  69                         csus {
  70                                 nvidia,pins = "csus";
  71                                 nvidia,function = "pllc_out1";
  72                         };
  73                         dap1 {
  74                                 nvidia,pins = "dap1";
  75                                 nvidia,function = "dap1";
  76                         };
  77                         dap3 {
  78                                 nvidia,pins = "dap3";
  79                                 nvidia,function = "dap3";
  80                         };
  81                         dap4 {
  82                                 nvidia,pins = "dap4";
  83                                 nvidia,function = "dap4";
  84                         };
  85                         ddc {
  86                                 nvidia,pins = "ddc";
  87                                 nvidia,function = "i2c2";
  88                         };
  89                         dta {
  90                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  91                                 nvidia,function = "rsvd1";
  92                         };
  93                         dtf {
  94                                 nvidia,pins = "dtf";
  95                                 nvidia,function = "i2c3";
  96                         };
  97                         gpu {
  98                                 nvidia,pins = "gpu", "sdb", "sdd";
  99                                 nvidia,function = "pwm";
 100                         };
 101                         gpu7 {
 102                                 nvidia,pins = "gpu7";
 103                                 nvidia,function = "rtck";
 104                         };
 105                         gpv {
 106                                 nvidia,pins = "gpv", "slxa", "slxk";
 107                                 nvidia,function = "pcie";
 108                         };
 109                         hdint {
 110                                 nvidia,pins = "hdint", "pta";
 111                                 nvidia,function = "hdmi";
 112                         };
 113                         i2cp {
 114                                 nvidia,pins = "i2cp";
 115                                 nvidia,function = "i2cp";
 116                         };
 117                         irrx {
 118                                 nvidia,pins = "irrx", "irtx";
 119                                 nvidia,function = "uarta";
 120                         };
 121                         kbca {
 122                                 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
 123                                 nvidia,function = "kbc";
 124                         };
 125                         kbcb {
 126                                 nvidia,pins = "kbcb", "kbcd";
 127                                 nvidia,function = "sdio2";
 128                         };
 129                         lcsn {
 130                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
 131                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 132                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 133                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 134                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
 135                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
 136                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
 137                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
 138                                         "lvs";
 139                                 nvidia,function = "displaya";
 140                         };
 141                         owc {
 142                                 nvidia,pins = "owc";
 143                                 nvidia,function = "owr";
 144                         };
 145                         pmc {
 146                                 nvidia,pins = "pmc";
 147                                 nvidia,function = "pwr_on";
 148                         };
 149                         rm {
 150                                 nvidia,pins = "rm";
 151                                 nvidia,function = "i2c1";
 152                         };
 153                         sdc {
 154                                 nvidia,pins = "sdc";
 155                                 nvidia,function = "twc";
 156                         };
 157                         sdio1 {
 158                                 nvidia,pins = "sdio1";
 159                                 nvidia,function = "sdio1";
 160                         };
 161                         slxc {
 162                                 nvidia,pins = "slxc", "slxd";
 163                                 nvidia,function = "spi4";
 164                         };
 165                         spdi {
 166                                 nvidia,pins = "spdi", "spdo";
 167                                 nvidia,function = "rsvd2";
 168                         };
 169                         spif {
 170                                 nvidia,pins = "spif", "uac";
 171                                 nvidia,function = "rsvd4";
 172                         };
 173                         spig {
 174                                 nvidia,pins = "spig", "spih";
 175                                 nvidia,function = "spi2_alt";
 176                         };
 177                         uaa {
 178                                 nvidia,pins = "uaa", "uab", "uda";
 179                                 nvidia,function = "ulpi";
 180                         };
 181                         uad {
 182                                 nvidia,pins = "uad";
 183                                 nvidia,function = "spdif";
 184                         };
 185                         uca {
 186                                 nvidia,pins = "uca", "ucb";
 187                                 nvidia,function = "uartc";
 188                         };
 189                         conf_ata {
 190                                 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
 191                                         "cdev1", "cdev2", "dap1", "dap2", "dtf",
 192                                         "gma", "gmb", "gmc", "gmd", "gme",
 193                                         "gpu", "gpu7", "gpv", "i2cp", "pta",
 194                                         "rm", "sdio1", "slxk", "spdo", "uac",
 195                                         "uda";
 196                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 197                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 198                         };
 199                         conf_ck32 {
 200                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 201                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 202                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 203                         };
 204                         conf_crtp {
 205                                 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
 206                                         "dtc", "dte", "slxa", "slxc", "slxd",
 207                                         "spdi";
 208                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 209                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 210                         };
 211                         conf_csus {
 212                                 nvidia,pins = "csus", "spia", "spib", "spid",
 213                                         "spif";
 214                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 215                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 216                         };
 217                         conf_ddc {
 218                                 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
 219                                         "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
 220                                         "spic", "spig", "uaa", "uab";
 221                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 222                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 223                         };
 224                         conf_dta {
 225                                 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
 226                                         "spie", "spih", "uad", "uca", "ucb";
 227                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 228                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 229                         };
 230                         conf_hdint {
 231                                 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
 232                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 233                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 234                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 235                                         "ldc", "ldi", "lhs", "lsc0", "lspi",
 236                                         "lvs", "pmc";
 237                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 238                         };
 239                         conf_lc {
 240                                 nvidia,pins = "lc", "ls";
 241                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 242                         };
 243                         conf_lcsn {
 244                                 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
 245                                         "lm0", "lm1", "lpp", "lpw0", "lpw1",
 246                                         "lpw2", "lsc1", "lsck", "lsda", "lsdi",
 247                                         "lvp0", "lvp1", "sdb";
 248                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 249                         };
 250                         conf_ld17_0 {
 251                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 252                                         "ld23_22";
 253                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 254                         };
 255                 };
 256         };
 257
 258         i2s@70002800 {
 259                 status = "okay";
 260         };
 261
 262         serial@70006000 {
 263                 status = "okay";
 264         };
 265
 266         serial@70006200 {
 267                 status = "okay";
 268         };
 269
 270         pwm: pwm@7000a000 {
 271                 status = "okay";
 272         };
 273
 274         lvds_ddc: i2c@7000c000 {
 275                 status = "okay";
 276                 clock-frequency = <400000>;
 277
 278                 alc5632: alc5632@1e {
 279                         compatible = "realtek,alc5632";
 280                         reg = <0x1e>;
 281                         gpio-controller;
 282                         #gpio-cells = <2>;
 283                 };
 284         };
 285
 286         hdmi_ddc: i2c@7000c400 {
 287                 status = "okay";
 288                 clock-frequency = <100000>;
 289         };
 290
 291         nvec@7000c500 {
 292                 compatible = "nvidia,nvec";
 293                 reg = <0x7000c500 0x100>;
 294                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
 295                 #address-cells = <1>;
 296                 #size-cells = <0>;
 297                 clock-frequency = <80000>;
 298                 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
 299                 slave-addr = <138>;
 300                 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
 301                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
 302                 clock-names = "div-clk", "fast-clk";
 303                 resets = <&tegra_car 67>;
 304                 reset-names = "i2c";
 305         };
 306
 307         i2c@7000d000 {
 308                 status = "okay";
 309                 clock-frequency = <400000>;
 310
 311                 pmic: tps6586x@34 {
 312                         compatible = "ti,tps6586x";
 313                         reg = <0x34>;
 314                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 315
 316                         #gpio-cells = <2>;
 317                         gpio-controller;
 318
 319                         sys-supply = <&p5valw_reg>;
 320                         vin-sm0-supply = <&sys_reg>;
 321                         vin-sm1-supply = <&sys_reg>;
 322                         vin-sm2-supply = <&sys_reg>;
 323                         vinldo01-supply = <&sm2_reg>;
 324                         vinldo23-supply = <&sm2_reg>;
 325                         vinldo4-supply = <&sm2_reg>;
 326                         vinldo678-supply = <&sm2_reg>;
 327                         vinldo9-supply = <&sm2_reg>;
 328
 329                         regulators {
 330                                 sys_reg: sys {
 331                                         regulator-name = "vdd_sys";
 332                                         regulator-always-on;
 333                                 };
 334
 335                                 sm0 {
 336                                         regulator-name = "+1.2vs_sm0,vdd_core";
 337                                         regulator-min-microvolt = <1200000>;
 338                                         regulator-max-microvolt = <1200000>;
 339                                         regulator-always-on;
 340                                 };
 341
 342                                 sm1 {
 343                                         regulator-name = "+1.0vs_sm1,vdd_cpu";
 344                                         regulator-min-microvolt = <1000000>;
 345                                         regulator-max-microvolt = <1000000>;
 346                                         regulator-always-on;
 347                                 };
 348
 349                                 sm2_reg: sm2 {
 350                                         regulator-name = "+3.7vs_sm2,vin_ldo*";
 351                                         regulator-min-microvolt = <3700000>;
 352                                         regulator-max-microvolt = <3700000>;
 353                                         regulator-always-on;
 354                                 };
 355
 356                                 /* LDO0 is not connected to anything */
 357
 358                                 ldo1 {
 359                                         regulator-name = "+1.1vs_ldo1,avdd_pll*";
 360                                         regulator-min-microvolt = <1100000>;
 361                                         regulator-max-microvolt = <1100000>;
 362                                         regulator-always-on;
 363                                 };
 364
 365                                 ldo2 {
 366                                         regulator-name = "+1.2vs_ldo2,vdd_rtc";
 367                                         regulator-min-microvolt = <1200000>;
 368                                         regulator-max-microvolt = <1200000>;
 369                                 };
 370
 371                                 ldo3 {
 372                                         regulator-name = "+3.3vs_ldo3,avdd_usb*";
 373                                         regulator-min-microvolt = <3300000>;
 374                                         regulator-max-microvolt = <3300000>;
 375                                         regulator-always-on;
 376                                 };
 377
 378                                 ldo4 {
 379                                         regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
 380                                         regulator-min-microvolt = <1800000>;
 381                                         regulator-max-microvolt = <1800000>;
 382                                         regulator-always-on;
 383                                 };
 384
 385                                 ldo5 {
 386                                         regulator-name = "+2.85vs_ldo5,vcore_mmc";
 387                                         regulator-min-microvolt = <2850000>;
 388                                         regulator-max-microvolt = <2850000>;
 389                                         regulator-always-on;
 390                                 };
 391
 392                                 ldo6 {
 393                                         /*
 394                                          * Research indicates this should be
 395                                          * 1.8v; other boards that use this
 396                                          * rail for the same purpose need it
 397                                          * set to 1.8v. The schematic signal
 398                                          * name is incorrect; perhaps copied
 399                                          * from an incorrect NVIDIA reference.
 400                                          */
 401                                         regulator-name = "+2.85vs_ldo6,avdd_vdac";
 402                                         regulator-min-microvolt = <1800000>;
 403                                         regulator-max-microvolt = <1800000>;
 404                                 };
 405
 406                                 hdmi_vdd_reg: ldo7 {
 407                                         regulator-name = "+3.3vs_ldo7,avdd_hdmi";
 408                                         regulator-min-microvolt = <3300000>;
 409                                         regulator-max-microvolt = <3300000>;
 410                                 };
 411
 412                                 hdmi_pll_reg: ldo8 {
 413                                         regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
 414                                         regulator-min-microvolt = <1800000>;
 415                                         regulator-max-microvolt = <1800000>;
 416                                 };
 417
 418                                 ldo9 {
 419                                         regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
 420                                         regulator-min-microvolt = <2850000>;
 421                                         regulator-max-microvolt = <2850000>;
 422                                         regulator-always-on;
 423                                 };
 424
 425                                 ldo_rtc {
 426                                         regulator-name = "+3.3vs_rtc";
 427                                         regulator-min-microvolt = <3300000>;
 428                                         regulator-max-microvolt = <3300000>;
 429                                         regulator-always-on;
 430                                 };
 431                         };
 432                 };
 433
 434                 adt7461@4c {
 435                         compatible = "adi,adt7461";
 436                         reg = <0x4c>;
 437                 };
 438         };
 439
 440         pmc@7000e400 {
 441                 nvidia,invert-interrupt;
 442                 nvidia,suspend-mode = <1>;
 443                 nvidia,cpu-pwr-good-time = <2000>;
 444                 nvidia,cpu-pwr-off-time = <0>;
 445                 nvidia,core-pwr-good-time = <3845 3845>;
 446                 nvidia,core-pwr-off-time = <0>;
 447                 nvidia,sys-clock-req-active-high;
 448         };
 449
 450         usb@c5000000 {
 451                 status = "okay";
 452         };
 453
 454         usb-phy@c5000000 {
 455                 status = "okay";
 456         };
 457
 458         usb@c5004000 {
 459                 status = "okay";
 460                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 461                         GPIO_ACTIVE_LOW>;
 462         };
 463
 464         usb-phy@c5004000 {
 465                 status = "okay";
 466                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 467                         GPIO_ACTIVE_LOW>;
 468         };
 469
 470         usb@c5008000 {
 471                 status = "okay";
 472         };
 473
 474         usb-phy@c5008000 {
 475                 status = "okay";
 476         };
 477
 478         sdhci@c8000000 {
 479                 status = "okay";
 480                 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
 481                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 482                 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
 483                 bus-width = <4>;
 484         };
 485
 486         sdhci@c8000600 {
 487                 status = "okay";
 488                 bus-width = <8>;
 489                 non-removable;
 490         };
 491
 492         backlight: backlight {
 493                 compatible = "pwm-backlight";
 494
 495                 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
 496                 pwms = <&pwm 0 5000000>;
 497
 498                 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
 499                 default-brightness-level = <10>;
 500
 501                 backlight-boot-off;
 502         };
 503
 504         clocks {
 505                 compatible = "simple-bus";
 506                 #address-cells = <1>;
 507                 #size-cells = <0>;
 508
 509                 clk32k_in: clock@0 {
 510                         compatible = "fixed-clock";
 511                         reg=<0>;
 512                         #clock-cells = <0>;
 513                         clock-frequency = <32768>;
 514                 };
 515         };
 516
 517         gpio-keys {
 518                 compatible = "gpio-keys";
 519
 520                 power {
 521                         label = "Power";
 522                         gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
 523                         linux,code = <KEY_POWER>;
 524                         gpio-key,wakeup;
 525                 };
 526         };
 527
 528         gpio-leds {
 529                 compatible = "gpio-leds";
 530
 531                 wifi {
 532                         label = "wifi-led";
 533                         gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 534                         linux,default-trigger = "rfkill0";
 535                 };
 536         };
 537
 538         panel: panel {
 539                 compatible = "samsung,ltn101nt05", "simple-panel";
 540
 541                 ddc-i2c-bus = <&lvds_ddc>;
 542                 power-supply = <&vdd_pnl_reg>;
 543                 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
 544
 545                 backlight = <&backlight>;
 546         };
 547
 548         regulators {
 549                 compatible = "simple-bus";
 550                 #address-cells = <1>;
 551                 #size-cells = <0>;
 552
 553                 p5valw_reg: regulator@0 {
 554                         compatible = "regulator-fixed";
 555                         reg = <0>;
 556                         regulator-name = "+5valw";
 557                         regulator-min-microvolt = <5000000>;
 558                         regulator-max-microvolt = <5000000>;
 559                         regulator-always-on;
 560                 };
 561
 562                 vdd_pnl_reg: regulator@1 {
 563                         compatible = "regulator-fixed";
 564                         reg = <1>;
 565                         regulator-name = "+3VS,vdd_pnl";
 566                         regulator-min-microvolt = <3300000>;
 567                         regulator-max-microvolt = <3300000>;
 568                         gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
 569                         enable-active-high;
 570                 };
 571         };
 572
 573         sound {
 574                 compatible = "nvidia,tegra-audio-alc5632-paz00",
 575                         "nvidia,tegra-audio-alc5632";
 576
 577                 nvidia,model = "Compal PAZ00";
 578
 579                 nvidia,audio-routing =
 580                         "Int Spk", "SPKOUT",
 581                         "Int Spk", "SPKOUTN",
 582                         "Headset Mic", "MICBIAS1",
 583                         "MIC1", "Headset Mic",
 584                         "Headset Stereophone", "HPR",
 585                         "Headset Stereophone", "HPL",
 586                         "DMICDAT", "Digital Mic";
 587
 588                 nvidia,audio-codec = <&alc5632>;
 589                 nvidia,i2s-controller = <&tegra_i2s1>;
 590                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 591                         GPIO_ACTIVE_HIGH>;
 592
 593                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 594                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 595                          <&tegra_car TEGRA20_CLK_CDEV1>;
 596                 clock-names = "pll_a", "pll_a_out0", "mclk";
 597         };
 598 };