arch/arm/boot/dts/vexpress-v2m.dtsi

   1 /*
   2  * ARM Ltd. Versatile Express
   3  *
   4  * Motherboard Express uATX
   5  * V2M-P1
   6  *
   7  * HBI-0190D
   8  *
   9  * Original memory map ("Legacy memory map" in the board's
  10  * Technical Reference Manual)
  11  *
  12  * WARNING! The hardware described in this file is independent from the
  13  * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
  14  * correspondence between the two configurations.
  15  *
  16  * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
  17  * CHANGES TO vexpress-v2m-rs1.dtsi!
  18  */
  19
  20         motherboard {
  21                 model = "V2M-P1";
  22                 arm,hbi = <0x190>;
  23                 arm,vexpress,site = <0>;
  24                 compatible = "arm,vexpress,v2m-p1", "simple-bus";
  25                 #address-cells = <2>; /* SMB chipselect number and offset */
  26                 #size-cells = <1>;
  27                 #interrupt-cells = <1>;
  28                 ranges;
  29
  30                 flash@0,00000000 {
  31                         compatible = "arm,vexpress-flash", "cfi-flash";
  32                         reg = <0 0x00000000 0x04000000>,
  33                               <1 0x00000000 0x04000000>;
  34                         bank-width = <4>;
  35                 };
  36
  37                 psram@2,00000000 {
  38                         compatible = "arm,vexpress-psram", "mtd-ram";
  39                         reg = <2 0x00000000 0x02000000>;
  40                         bank-width = <4>;
  41                 };
  42
  43                 v2m_video_ram: vram@3,00000000 {
  44                         compatible = "arm,vexpress-vram";
  45                         reg = <3 0x00000000 0x00800000>;
  46                 };
  47
  48                 ethernet@3,02000000 {
  49                         compatible = "smsc,lan9118", "smsc,lan9115";
  50                         reg = <3 0x02000000 0x10000>;
  51                         interrupts = <15>;
  52                         phy-mode = "mii";
  53                         reg-io-width = <4>;
  54                         smsc,irq-active-high;
  55                         smsc,irq-push-pull;
  56                         vdd33a-supply = <&v2m_fixed_3v3>;
  57                         vddvario-supply = <&v2m_fixed_3v3>;
  58                 };
  59
  60                 usb@3,03000000 {
  61                         compatible = "nxp,usb-isp1761";
  62                         reg = <3 0x03000000 0x20000>;
  63                         interrupts = <16>;
  64                         port1-otg;
  65                 };
  66
  67                 iofpga@7,00000000 {
  68                         compatible = "simple-bus";
  69                         #address-cells = <1>;
  70                         #size-cells = <1>;
  71                         ranges = <0 7 0 0x20000>;
  72
  73                         v2m_sysreg: sysreg@00000 {
  74                                 compatible = "arm,vexpress-sysreg";
  75                                 reg = <0x00000 0x1000>;
  76
  77                                 v2m_led_gpios: sys_led@08 {
  78                                         compatible = "arm,vexpress-sysreg,sys_led";
  79                                         gpio-controller;
  80                                         #gpio-cells = <2>;
  81                                 };
  82
  83                                 v2m_mmc_gpios: sys_mci@48 {
  84                                         compatible = "arm,vexpress-sysreg,sys_mci";
  85                                         gpio-controller;
  86                                         #gpio-cells = <2>;
  87                                 };
  88
  89                                 v2m_flash_gpios: sys_flash@4c {
  90                                         compatible = "arm,vexpress-sysreg,sys_flash";
  91                                         gpio-controller;
  92                                         #gpio-cells = <2>;
  93                                 };
  94                         };
  95
  96                         v2m_sysctl: sysctl@01000 {
  97                                 compatible = "arm,sp810", "arm,primecell";
  98                                 reg = <0x01000 0x1000>;
  99                                 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
 100                                 clock-names = "refclk", "timclk", "apb_pclk";
 101                                 #clock-cells = <1>;
 102                                 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
 103                                 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
 104                                 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
 105                         };
 106
 107                         /* PCI-E I2C bus */
 108                         v2m_i2c_pcie: i2c@02000 {
 109                                 compatible = "arm,versatile-i2c";
 110                                 reg = <0x02000 0x1000>;
 111
 112                                 #address-cells = <1>;
 113                                 #size-cells = <0>;
 114
 115                                 pcie-switch@60 {
 116                                         compatible = "idt,89hpes32h8";
 117                                         reg = <0x60>;
 118                                 };
 119                         };
 120
 121                         aaci@04000 {
 122                                 compatible = "arm,pl041", "arm,primecell";
 123                                 reg = <0x04000 0x1000>;
 124                                 interrupts = <11>;
 125                                 clocks = <&smbclk>;
 126                                 clock-names = "apb_pclk";
 127                         };
 128
 129                         mmci@05000 {
 130                                 compatible = "arm,pl180", "arm,primecell";
 131                                 reg = <0x05000 0x1000>;
 132                                 interrupts = <9 10>;
 133                                 cd-gpios = <&v2m_mmc_gpios 0 0>;
 134                                 wp-gpios = <&v2m_mmc_gpios 1 0>;
 135                                 max-frequency = <12000000>;
 136                                 vmmc-supply = <&v2m_fixed_3v3>;
 137                                 clocks = <&v2m_clk24mhz>, <&smbclk>;
 138                                 clock-names = "mclk", "apb_pclk";
 139                         };
 140
 141                         kmi@06000 {
 142                                 compatible = "arm,pl050", "arm,primecell";
 143                                 reg = <0x06000 0x1000>;
 144                                 interrupts = <12>;
 145                                 clocks = <&v2m_clk24mhz>, <&smbclk>;
 146                                 clock-names = "KMIREFCLK", "apb_pclk";
 147                         };
 148
 149                         kmi@07000 {
 150                                 compatible = "arm,pl050", "arm,primecell";
 151                                 reg = <0x07000 0x1000>;
 152                                 interrupts = <13>;
 153                                 clocks = <&v2m_clk24mhz>, <&smbclk>;
 154                                 clock-names = "KMIREFCLK", "apb_pclk";
 155                         };
 156
 157                         v2m_serial0: uart@09000 {
 158                                 compatible = "arm,pl011", "arm,primecell";
 159                                 reg = <0x09000 0x1000>;
 160                                 interrupts = <5>;
 161                                 clocks = <&v2m_oscclk2>, <&smbclk>;
 162                                 clock-names = "uartclk", "apb_pclk";
 163                         };
 164
 165                         v2m_serial1: uart@0a000 {
 166                                 compatible = "arm,pl011", "arm,primecell";
 167                                 reg = <0x0a000 0x1000>;
 168                                 interrupts = <6>;
 169                                 clocks = <&v2m_oscclk2>, <&smbclk>;
 170                                 clock-names = "uartclk", "apb_pclk";
 171                         };
 172
 173                         v2m_serial2: uart@0b000 {
 174                                 compatible = "arm,pl011", "arm,primecell";
 175                                 reg = <0x0b000 0x1000>;
 176                                 interrupts = <7>;
 177                                 clocks = <&v2m_oscclk2>, <&smbclk>;
 178                                 clock-names = "uartclk", "apb_pclk";
 179                         };
 180
 181                         v2m_serial3: uart@0c000 {
 182                                 compatible = "arm,pl011", "arm,primecell";
 183                                 reg = <0x0c000 0x1000>;
 184                                 interrupts = <8>;
 185                                 clocks = <&v2m_oscclk2>, <&smbclk>;
 186                                 clock-names = "uartclk", "apb_pclk";
 187                         };
 188
 189                         wdt@0f000 {
 190                                 compatible = "arm,sp805", "arm,primecell";
 191                                 reg = <0x0f000 0x1000>;
 192                                 interrupts = <0>;
 193                                 clocks = <&v2m_refclk32khz>, <&smbclk>;
 194                                 clock-names = "wdogclk", "apb_pclk";
 195                         };
 196
 197                         v2m_timer01: timer@11000 {
 198                                 compatible = "arm,sp804", "arm,primecell";
 199                                 reg = <0x11000 0x1000>;
 200                                 interrupts = <2>;
 201                                 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
 202                                 clock-names = "timclken1", "timclken2", "apb_pclk";
 203                         };
 204
 205                         v2m_timer23: timer@12000 {
 206                                 compatible = "arm,sp804", "arm,primecell";
 207                                 reg = <0x12000 0x1000>;
 208                                 interrupts = <3>;
 209                                 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
 210                                 clock-names = "timclken1", "timclken2", "apb_pclk";
 211                         };
 212
 213                         /* DVI I2C bus */
 214                         v2m_i2c_dvi: i2c@16000 {
 215                                 compatible = "arm,versatile-i2c";
 216                                 reg = <0x16000 0x1000>;
 217
 218                                 #address-cells = <1>;
 219                                 #size-cells = <0>;
 220
 221                                 dvi-transmitter@39 {
 222                                         compatible = "sil,sii9022-tpi", "sil,sii9022";
 223                                         reg = <0x39>;
 224                                 };
 225
 226                                 dvi-transmitter@60 {
 227                                         compatible = "sil,sii9022-cpi", "sil,sii9022";
 228                                         reg = <0x60>;
 229                                 };
 230                         };
 231
 232                         rtc@17000 {
 233                                 compatible = "arm,pl031", "arm,primecell";
 234                                 reg = <0x17000 0x1000>;
 235                                 interrupts = <4>;
 236                                 clocks = <&smbclk>;
 237                                 clock-names = "apb_pclk";
 238                         };
 239
 240                         compact-flash@1a000 {
 241                                 compatible = "arm,vexpress-cf", "ata-generic";
 242                                 reg = <0x1a000 0x100
 243                                        0x1a100 0xf00>;
 244                                 reg-shift = <2>;
 245                         };
 246
 247                         clcd@1f000 {
 248                                 compatible = "arm,pl111", "arm,primecell";
 249                                 reg = <0x1f000 0x1000>;
 250                                 interrupt-names = "combined";
 251                                 interrupts = <14>;
 252                                 clocks = <&v2m_oscclk1>, <&smbclk>;
 253                                 clock-names = "clcdclk", "apb_pclk";
 254                                 memory-region = <&v2m_video_ram>;
 255                                 max-memory-bandwidth = <50350000>; /* 16bpp @ 25.175MHz */
 256
 257                                 port {
 258                                         v2m_clcd_pads: endpoint {
 259                                                 remote-endpoint = <&v2m_clcd_panel>;
 260                                                 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
 261                                         };
 262                                 };
 263
 264                                 panel {
 265                                         compatible = "panel-dpi";
 266
 267                                         port {
 268                                                 v2m_clcd_panel: endpoint {
 269                                                         remote-endpoint = <&v2m_clcd_pads>;
 270                                                 };
 271                                         };
 272
 273                                         panel-timing {
 274                                                 clock-frequency = <25175000>;
 275                                                 hactive = <640>;
 276                                                 hback-porch = <40>;
 277                                                 hfront-porch = <24>;
 278                                                 hsync-len = <96>;
 279                                                 vactive = <480>;
 280                                                 vback-porch = <32>;
 281                                                 vfront-porch = <11>;
 282                                                 vsync-len = <2>;
 283                                         };
 284                                 };
 285                         };
 286                 };
 287
 288                 v2m_fixed_3v3: fixedregulator@0 {
 289                         compatible = "regulator-fixed";
 290                         regulator-name = "3V3";
 291                         regulator-min-microvolt = <3300000>;
 292                         regulator-max-microvolt = <3300000>;
 293                         regulator-always-on;
 294                 };
 295
 296                 v2m_clk24mhz: clk24mhz {
 297                         compatible = "fixed-clock";
 298                         #clock-cells = <0>;
 299                         clock-frequency = <24000000>;
 300                         clock-output-names = "v2m:clk24mhz";
 301                 };
 302
 303                 v2m_refclk1mhz: refclk1mhz {
 304                         compatible = "fixed-clock";
 305                         #clock-cells = <0>;
 306                         clock-frequency = <1000000>;
 307                         clock-output-names = "v2m:refclk1mhz";
 308                 };
 309
 310                 v2m_refclk32khz: refclk32khz {
 311                         compatible = "fixed-clock";
 312                         #clock-cells = <0>;
 313                         clock-frequency = <32768>;
 314                         clock-output-names = "v2m:refclk32khz";
 315                 };
 316
 317                 leds {
 318                         compatible = "gpio-leds";
 319
 320                         user@1 {
 321                                 label = "v2m:green:user1";
 322                                 gpios = <&v2m_led_gpios 0 0>;
 323                                 linux,default-trigger = "heartbeat";
 324                         };
 325
 326                         user@2 {
 327                                 label = "v2m:green:user2";
 328                                 gpios = <&v2m_led_gpios 1 0>;
 329                                 linux,default-trigger = "mmc0";
 330                         };
 331
 332                         user@3 {
 333                                 label = "v2m:green:user3";
 334                                 gpios = <&v2m_led_gpios 2 0>;
 335                                 linux,default-trigger = "cpu0";
 336                         };
 337
 338                         user@4 {
 339                                 label = "v2m:green:user4";
 340                                 gpios = <&v2m_led_gpios 3 0>;
 341                                 linux,default-trigger = "cpu1";
 342                         };
 343
 344                         user@5 {
 345                                 label = "v2m:green:user5";
 346                                 gpios = <&v2m_led_gpios 4 0>;
 347                                 linux,default-trigger = "cpu2";
 348                         };
 349
 350                         user@6 {
 351                                 label = "v2m:green:user6";
 352                                 gpios = <&v2m_led_gpios 5 0>;
 353                                 linux,default-trigger = "cpu3";
 354                         };
 355
 356                         user@7 {
 357                                 label = "v2m:green:user7";
 358                                 gpios = <&v2m_led_gpios 6 0>;
 359                                 linux,default-trigger = "cpu4";
 360                         };
 361
 362                         user@8 {
 363                                 label = "v2m:green:user8";
 364                                 gpios = <&v2m_led_gpios 7 0>;
 365                                 linux,default-trigger = "cpu5";
 366                         };
 367                 };
 368
 369                 mcc {
 370                         compatible = "arm,vexpress,config-bus";
 371                         arm,vexpress,config-bridge = <&v2m_sysreg>;
 372
 373                         osc@0 {
 374                                 /* MCC static memory clock */
 375                                 compatible = "arm,vexpress-osc";
 376                                 arm,vexpress-sysreg,func = <1 0>;
 377                                 freq-range = <25000000 60000000>;
 378                                 #clock-cells = <0>;
 379                                 clock-output-names = "v2m:oscclk0";
 380                         };
 381
 382                         v2m_oscclk1: osc@1 {
 383                                 /* CLCD clock */
 384                                 compatible = "arm,vexpress-osc";
 385                                 arm,vexpress-sysreg,func = <1 1>;
 386                                 freq-range = <23750000 65000000>;
 387                                 #clock-cells = <0>;
 388                                 clock-output-names = "v2m:oscclk1";
 389                         };
 390
 391                         v2m_oscclk2: osc@2 {
 392                                 /* IO FPGA peripheral clock */
 393                                 compatible = "arm,vexpress-osc";
 394                                 arm,vexpress-sysreg,func = <1 2>;
 395                                 freq-range = <24000000 24000000>;
 396                                 #clock-cells = <0>;
 397                                 clock-output-names = "v2m:oscclk2";
 398                         };
 399
 400                         volt@0 {
 401                                 /* Logic level voltage */
 402                                 compatible = "arm,vexpress-volt";
 403                                 arm,vexpress-sysreg,func = <2 0>;
 404                                 regulator-name = "VIO";
 405                                 regulator-always-on;
 406                                 label = "VIO";
 407                         };
 408
 409                         temp@0 {
 410                                 /* MCC internal operating temperature */
 411                                 compatible = "arm,vexpress-temp";
 412                                 arm,vexpress-sysreg,func = <4 0>;
 413                                 label = "MCC";
 414                         };
 415
 416                         reset@0 {
 417                                 compatible = "arm,vexpress-reset";
 418                                 arm,vexpress-sysreg,func = <5 0>;
 419                         };
 420
 421                         muxfpga@0 {
 422                                 compatible = "arm,vexpress-muxfpga";
 423                                 arm,vexpress-sysreg,func = <7 0>;
 424                         };
 425
 426                         shutdown@0 {
 427                                 compatible = "arm,vexpress-shutdown";
 428                                 arm,vexpress-sysreg,func = <8 0>;
 429                         };
 430
 431                         reboot@0 {
 432                                 compatible = "arm,vexpress-reboot";
 433                                 arm,vexpress-sysreg,func = <9 0>;
 434                         };
 435
 436                         dvimode@0 {
 437                                 compatible = "arm,vexpress-dvimode";
 438                                 arm,vexpress-sysreg,func = <11 0>;
 439                         };
 440                 };
 441         };