arch/powerpc/kernel/exceptions-64s.S

   1 /*
   2  * This file contains the 64-bit "server" PowerPC variant
   3  * of the low level exception handling including exception
   4  * vectors, exception return, part of the slb and stab
   5  * handling and other fixed offset specific things.
   6  *
   7  * This file is meant to be #included from head_64.S due to
   8  * position dependent assembly.
   9  *
  10  * Most of this originates from head_64.S and thus has the same
  11  * copyright history.
  12  *
  13  */
  14
  15 #include <asm/hw_irq.h>
  16 #include <asm/exception-64s.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/cpuidle.h>
  19 #include <asm/head-64.h>
  20
  21 /*
  22  * There are a few constraints to be concerned with.
  23  * - Real mode exceptions code/data must be located at their physical location.
  24  * - Virtual mode exceptions must be mapped at their 0xc000... location.
  25  * - Fixed location code must not call directly beyond the __end_interrupts
  26  *   area when built with CONFIG_RELOCATABLE. LOAD_HANDLER / bctr sequence
  27  *   must be used.
  28  * - LOAD_HANDLER targets must be within first 64K of physical 0 /
  29  *   virtual 0xc00...
  30  * - Conditional branch targets must be within +/-32K of caller.
  31  *
  32  * "Virtual exceptions" run with relocation on (MSR_IR=1, MSR_DR=1), and
  33  * therefore don't have to run in physically located code or rfid to
  34  * virtual mode kernel code. However on relocatable kernels they do have
  35  * to branch to KERNELBASE offset because the rest of the kernel (outside
  36  * the exception vectors) may be located elsewhere.
  37  *
  38  * Virtual exceptions correspond with physical, except their entry points
  39  * are offset by 0xc000000000000000 and also tend to get an added 0x4000
  40  * offset applied. Virtual exceptions are enabled with the Alternate
  41  * Interrupt Location (AIL) bit set in the LPCR. However this does not
  42  * guarantee they will be delivered virtually. Some conditions (see the ISA)
  43  * cause exceptions to be delivered in real mode.
  44  *
  45  * It's impossible to receive interrupts below 0x300 via AIL.
  46  *
  47  * KVM: None of the virtual exceptions are from the guest. Anything that
  48  * escalated to HV=1 from HV=0 is delivered via real mode handlers.
  49  *
  50  *
  51  * We layout physical memory as follows:
  52  * 0x0000 - 0x00ff : Secondary processor spin code
  53  * 0x0100 - 0x18ff : Real mode pSeries interrupt vectors
  54  * 0x1900 - 0x3fff : Real mode trampolines
  55  * 0x4000 - 0x58ff : Relon (IR=1,DR=1) mode pSeries interrupt vectors
  56  * 0x5900 - 0x6fff : Relon mode trampolines
  57  * 0x7000 - 0x7fff : FWNMI data area
  58  * 0x8000 -   .... : Common interrupt handlers, remaining early
  59  *                   setup code, rest of kernel.
  60  *
  61  * We could reclaim 0x4000-0x42ff for real mode trampolines if the space
  62  * is necessary. Until then it's more consistent to explicitly put VIRT_NONE
  63  * vectors there.
  64  */
  65 OPEN_FIXED_SECTION(real_vectors,        0x0100, 0x1900)
  66 OPEN_FIXED_SECTION(real_trampolines,    0x1900, 0x4000)
  67 OPEN_FIXED_SECTION(virt_vectors,        0x4000, 0x5900)
  68 OPEN_FIXED_SECTION(virt_trampolines,    0x5900, 0x7000)
  69 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
  70 /*
  71  * Data area reserved for FWNMI option.
  72  * This address (0x7000) is fixed by the RPA.
  73  * pseries and powernv need to keep the whole page from
  74  * 0x7000 to 0x8000 free for use by the firmware
  75  */
  76 ZERO_FIXED_SECTION(fwnmi_page,          0x7000, 0x8000)
  77 OPEN_TEXT_SECTION(0x8000)
  78 #else
  79 OPEN_TEXT_SECTION(0x7000)
  80 #endif
  81
  82 USE_FIXED_SECTION(real_vectors)
  83
  84 /*
  85  * This is the start of the interrupt handlers for pSeries
  86  * This code runs with relocation off.
  87  * Code from here to __end_interrupts gets copied down to real
  88  * address 0x100 when we are running a relocatable kernel.
  89  * Therefore any relative branches in this section must only
  90  * branch to labels in this section.
  91  */
  92         .globl __start_interrupts
  93 __start_interrupts:
  94
  95 /* No virt vectors corresponding with 0x0..0x100 */
  96 EXC_VIRT_NONE(0x4000, 0x4100)
  97
  98
  99 #ifdef CONFIG_PPC_P7_NAP
 100         /*
 101          * If running native on arch 2.06 or later, check if we are waking up
 102          * from nap/sleep/winkle, and branch to idle handler.
 103          */
 104 #define IDLETEST(n)                                                     \
 105         BEGIN_FTR_SECTION ;                                             \
 106         mfspr   r10,SPRN_SRR1 ;                                         \
 107         rlwinm. r10,r10,47-31,30,31 ;                                   \
 108         beq-    1f ;                                                    \
 109         cmpwi   cr3,r10,2 ;                                             \
 110         BRANCH_TO_COMMON(r10, system_reset_idle_common) ;               \
 111 1:                                                                      \
 112         END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
 113 #else
 114 #define IDLETEST NOTEST
 115 #endif
 116
 117 EXC_REAL_BEGIN(system_reset, 0x100, 0x200)
 118         SET_SCRATCH0(r13)
 119         GET_PACA(r13)
 120         clrrdi  r13,r13,1 /* Last bit of HSPRG0 is set if waking from winkle */
 121         EXCEPTION_PROLOG_PSERIES_PACA(PACA_EXGEN, system_reset_common, EXC_STD,
 122                                  IDLETEST, 0x100)
 123
 124 EXC_REAL_END(system_reset, 0x100, 0x200)
 125 EXC_VIRT_NONE(0x4100, 0x4200)
 126
 127 #ifdef CONFIG_PPC_P7_NAP
 128 EXC_COMMON_BEGIN(system_reset_idle_common)
 129 BEGIN_FTR_SECTION
 130         GET_PACA(r13) /* Restore HSPRG0 to get the winkle bit in r13 */
 131 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
 132         bl      pnv_restore_hyp_resource
 133
 134         li      r0,PNV_THREAD_RUNNING
 135         stb     r0,PACA_THREAD_IDLE_STATE(r13)  /* Clear thread state */
 136
 137 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 138         li      r0,KVM_HWTHREAD_IN_KERNEL
 139         stb     r0,HSTATE_HWTHREAD_STATE(r13)
 140         /* Order setting hwthread_state vs. testing hwthread_req */
 141         sync
 142         lbz     r0,HSTATE_HWTHREAD_REQ(r13)
 143         cmpwi   r0,0
 144         beq     1f
 145         b       kvm_start_guest
 146 1:
 147 #endif
 148
 149         /* Return SRR1 from power7_nap() */
 150         mfspr   r3,SPRN_SRR1
 151         blt     cr3,2f
 152         b       pnv_wakeup_loss
 153 2:      b       pnv_wakeup_noloss
 154 #endif
 155
 156 EXC_COMMON(system_reset_common, 0x100, system_reset_exception)
 157
 158 #ifdef CONFIG_PPC_PSERIES
 159 /*
 160  * Vectors for the FWNMI option.  Share common code.
 161  */
 162 TRAMP_REAL_BEGIN(system_reset_fwnmi)
 163         SET_SCRATCH0(r13)               /* save r13 */
 164         EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
 165                                  NOTEST, 0x100)
 166 #endif /* CONFIG_PPC_PSERIES */
 167
 168
 169 EXC_REAL_BEGIN(machine_check, 0x200, 0x300)
 170         /* This is moved out of line as it can be patched by FW, but
 171          * some code path might still want to branch into the original
 172          * vector
 173          */
 174         SET_SCRATCH0(r13)               /* save r13 */
 175         /*
 176          * Running native on arch 2.06 or later, we may wakeup from winkle
 177          * inside machine check. If yes, then last bit of HSPRG0 would be set
 178          * to 1. Hence clear it unconditionally.
 179          */
 180         GET_PACA(r13)
 181         clrrdi  r13,r13,1
 182         SET_PACA(r13)
 183         EXCEPTION_PROLOG_0(PACA_EXMC)
 184 BEGIN_FTR_SECTION
 185         b       machine_check_powernv_early
 186 FTR_SECTION_ELSE
 187         b       machine_check_pSeries_0
 188 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
 189 EXC_REAL_END(machine_check, 0x200, 0x300)
 190 EXC_VIRT_NONE(0x4200, 0x4300)
 191 TRAMP_REAL_BEGIN(machine_check_powernv_early)
 192 BEGIN_FTR_SECTION
 193         EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
 194         /*
 195          * Register contents:
 196          * R13          = PACA
 197          * R9           = CR
 198          * Original R9 to R13 is saved on PACA_EXMC
 199          *
 200          * Switch to mc_emergency stack and handle re-entrancy (we limit
 201          * the nested MCE upto level 4 to avoid stack overflow).
 202          * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
 203          *
 204          * We use paca->in_mce to check whether this is the first entry or
 205          * nested machine check. We increment paca->in_mce to track nested
 206          * machine checks.
 207          *
 208          * If this is the first entry then set stack pointer to
 209          * paca->mc_emergency_sp, otherwise r1 is already pointing to
 210          * stack frame on mc_emergency stack.
 211          *
 212          * NOTE: We are here with MSR_ME=0 (off), which means we risk a
 213          * checkstop if we get another machine check exception before we do
 214          * rfid with MSR_ME=1.
 215          */
 216         mr      r11,r1                  /* Save r1 */
 217         lhz     r10,PACA_IN_MCE(r13)
 218         cmpwi   r10,0                   /* Are we in nested machine check */
 219         bne     0f                      /* Yes, we are. */
 220         /* First machine check entry */
 221         ld      r1,PACAMCEMERGSP(r13)   /* Use MC emergency stack */
 222 0:      subi    r1,r1,INT_FRAME_SIZE    /* alloc stack frame */
 223         addi    r10,r10,1               /* increment paca->in_mce */
 224         sth     r10,PACA_IN_MCE(r13)
 225         /* Limit nested MCE to level 4 to avoid stack overflow */
 226         cmpwi   r10,4
 227         bgt     2f                      /* Check if we hit limit of 4 */
 228         std     r11,GPR1(r1)            /* Save r1 on the stack. */
 229         std     r11,0(r1)               /* make stack chain pointer */
 230         mfspr   r11,SPRN_SRR0           /* Save SRR0 */
 231         std     r11,_NIP(r1)
 232         mfspr   r11,SPRN_SRR1           /* Save SRR1 */
 233         std     r11,_MSR(r1)
 234         mfspr   r11,SPRN_DAR            /* Save DAR */
 235         std     r11,_DAR(r1)
 236         mfspr   r11,SPRN_DSISR          /* Save DSISR */
 237         std     r11,_DSISR(r1)
 238         std     r9,_CCR(r1)             /* Save CR in stackframe */
 239         /* Save r9 through r13 from EXMC save area to stack frame. */
 240         EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
 241         mfmsr   r11                     /* get MSR value */
 242         ori     r11,r11,MSR_ME          /* turn on ME bit */
 243         ori     r11,r11,MSR_RI          /* turn on RI bit */
 244         LOAD_HANDLER(r12, machine_check_handle_early)
 245 1:      mtspr   SPRN_SRR0,r12
 246         mtspr   SPRN_SRR1,r11
 247         rfid
 248         b       .       /* prevent speculative execution */
 249 2:
 250         /* Stack overflow. Stay on emergency stack and panic.
 251          * Keep the ME bit off while panic-ing, so that if we hit
 252          * another machine check we checkstop.
 253          */
 254         addi    r1,r1,INT_FRAME_SIZE    /* go back to previous stack frame */
 255         ld      r11,PACAKMSR(r13)
 256         LOAD_HANDLER(r12, unrecover_mce)
 257         li      r10,MSR_ME
 258         andc    r11,r11,r10             /* Turn off MSR_ME */
 259         b       1b
 260         b       .       /* prevent speculative execution */
 261 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
 262
 263 TRAMP_REAL_BEGIN(machine_check_pSeries)
 264         .globl machine_check_fwnmi
 265 machine_check_fwnmi:
 266         SET_SCRATCH0(r13)               /* save r13 */
 267         EXCEPTION_PROLOG_0(PACA_EXMC)
 268 machine_check_pSeries_0:
 269         EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST_PR, 0x200)
 270         /*
 271          * The following is essentially EXCEPTION_PROLOG_PSERIES_1 with the
 272          * difference that MSR_RI is not enabled, because PACA_EXMC is being
 273          * used, so nested machine check corrupts it. machine_check_common
 274          * enables MSR_RI.
 275          */
 276         ld      r10,PACAKMSR(r13)
 277         xori    r10,r10,MSR_RI
 278         mfspr   r11,SPRN_SRR0
 279         LOAD_HANDLER(r12, machine_check_common)
 280         mtspr   SPRN_SRR0,r12
 281         mfspr   r12,SPRN_SRR1
 282         mtspr   SPRN_SRR1,r10
 283         rfid
 284         b       .       /* prevent speculative execution */
 285
 286 TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
 287
 288 EXC_COMMON_BEGIN(machine_check_common)
 289         /*
 290          * Machine check is different because we use a different
 291          * save area: PACA_EXMC instead of PACA_EXGEN.
 292          */
 293         mfspr   r10,SPRN_DAR
 294         std     r10,PACA_EXMC+EX_DAR(r13)
 295         mfspr   r10,SPRN_DSISR
 296         stw     r10,PACA_EXMC+EX_DSISR(r13)
 297         EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
 298         FINISH_NAP
 299         RECONCILE_IRQ_STATE(r10, r11)
 300         ld      r3,PACA_EXMC+EX_DAR(r13)
 301         lwz     r4,PACA_EXMC+EX_DSISR(r13)
 302         /* Enable MSR_RI when finished with PACA_EXMC */
 303         li      r10,MSR_RI
 304         mtmsrd  r10,1
 305         std     r3,_DAR(r1)
 306         std     r4,_DSISR(r1)
 307         bl      save_nvgprs
 308         addi    r3,r1,STACK_FRAME_OVERHEAD
 309         bl      machine_check_exception
 310         b       ret_from_except
 311
 312 #define MACHINE_CHECK_HANDLER_WINDUP                    \
 313         /* Clear MSR_RI before setting SRR0 and SRR1. */\
 314         li      r0,MSR_RI;                              \
 315         mfmsr   r9;             /* get MSR value */     \
 316         andc    r9,r9,r0;                               \
 317         mtmsrd  r9,1;           /* Clear MSR_RI */      \
 318         /* Move original SRR0 and SRR1 into the respective regs */      \
 319         ld      r9,_MSR(r1);                            \
 320         mtspr   SPRN_SRR1,r9;                           \
 321         ld      r3,_NIP(r1);                            \
 322         mtspr   SPRN_SRR0,r3;                           \
 323         ld      r9,_CTR(r1);                            \
 324         mtctr   r9;                                     \
 325         ld      r9,_XER(r1);                            \
 326         mtxer   r9;                                     \
 327         ld      r9,_LINK(r1);                           \
 328         mtlr    r9;                                     \
 329         REST_GPR(0, r1);                                \
 330         REST_8GPRS(2, r1);                              \
 331         REST_GPR(10, r1);                               \
 332         ld      r11,_CCR(r1);                           \
 333         mtcr    r11;                                    \
 334         /* Decrement paca->in_mce. */                   \
 335         lhz     r12,PACA_IN_MCE(r13);                   \
 336         subi    r12,r12,1;                              \
 337         sth     r12,PACA_IN_MCE(r13);                   \
 338         REST_GPR(11, r1);                               \
 339         REST_2GPRS(12, r1);                             \
 340         /* restore original r1. */                      \
 341         ld      r1,GPR1(r1)
 342
 343         /*
 344          * Handle machine check early in real mode. We come here with
 345          * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
 346          */
 347 EXC_COMMON_BEGIN(machine_check_handle_early)
 348         std     r0,GPR0(r1)     /* Save r0 */
 349         EXCEPTION_PROLOG_COMMON_3(0x200)
 350         bl      save_nvgprs
 351         addi    r3,r1,STACK_FRAME_OVERHEAD
 352         bl      machine_check_early
 353         std     r3,RESULT(r1)   /* Save result */
 354         ld      r12,_MSR(r1)
 355 #ifdef  CONFIG_PPC_P7_NAP
 356         /*
 357          * Check if thread was in power saving mode. We come here when any
 358          * of the following is true:
 359          * a. thread wasn't in power saving mode
 360          * b. thread was in power saving mode with no state loss,
 361          *    supervisor state loss or hypervisor state loss.
 362          *
 363          * Go back to nap/sleep/winkle mode again if (b) is true.
 364          */
 365         rlwinm. r11,r12,47-31,30,31     /* Was it in power saving mode? */
 366         beq     4f                      /* No, it wasn;t */
 367         /* Thread was in power saving mode. Go back to nap again. */
 368         cmpwi   r11,2
 369         blt     3f
 370         /* Supervisor/Hypervisor state loss */
 371         li      r0,1
 372         stb     r0,PACA_NAPSTATELOST(r13)
 373 3:      bl      machine_check_queue_event
 374         MACHINE_CHECK_HANDLER_WINDUP
 375         GET_PACA(r13)
 376         ld      r1,PACAR1(r13)
 377         /*
 378          * Check what idle state this CPU was in and go back to same mode
 379          * again.
 380          */
 381         lbz     r3,PACA_THREAD_IDLE_STATE(r13)
 382         cmpwi   r3,PNV_THREAD_NAP
 383         bgt     10f
 384         IDLE_STATE_ENTER_SEQ(PPC_NAP)
 385         /* No return */
 386 10:
 387         cmpwi   r3,PNV_THREAD_SLEEP
 388         bgt     2f
 389         IDLE_STATE_ENTER_SEQ(PPC_SLEEP)
 390         /* No return */
 391
 392 2:
 393         /*
 394          * Go back to winkle. Please note that this thread was woken up in
 395          * machine check from winkle and have not restored the per-subcore
 396          * state. Hence before going back to winkle, set last bit of HSPRG0
 397          * to 1. This will make sure that if this thread gets woken up
 398          * again at reset vector 0x100 then it will get chance to restore
 399          * the subcore state.
 400          */
 401         ori     r13,r13,1
 402         SET_PACA(r13)
 403         IDLE_STATE_ENTER_SEQ(PPC_WINKLE)
 404         /* No return */
 405 4:
 406 #endif
 407         /*
 408          * Check if we are coming from hypervisor userspace. If yes then we
 409          * continue in host kernel in V mode to deliver the MC event.
 410          */
 411         rldicl. r11,r12,4,63            /* See if MC hit while in HV mode. */
 412         beq     5f
 413         andi.   r11,r12,MSR_PR          /* See if coming from user. */
 414         bne     9f                      /* continue in V mode if we are. */
 415
 416 5:
 417 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
 418         /*
 419          * We are coming from kernel context. Check if we are coming from
 420          * guest. if yes, then we can continue. We will fall through
 421          * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
 422          */
 423         lbz     r11,HSTATE_IN_GUEST(r13)
 424         cmpwi   r11,0                   /* Check if coming from guest */
 425         bne     9f                      /* continue if we are. */
 426 #endif
 427         /*
 428          * At this point we are not sure about what context we come from.
 429          * Queue up the MCE event and return from the interrupt.
 430          * But before that, check if this is an un-recoverable exception.
 431          * If yes, then stay on emergency stack and panic.
 432          */
 433         andi.   r11,r12,MSR_RI
 434         bne     2f
 435 1:      mfspr   r11,SPRN_SRR0
 436         LOAD_HANDLER(r10,unrecover_mce)
 437         mtspr   SPRN_SRR0,r10
 438         ld      r10,PACAKMSR(r13)
 439         /*
 440          * We are going down. But there are chances that we might get hit by
 441          * another MCE during panic path and we may run into unstable state
 442          * with no way out. Hence, turn ME bit off while going down, so that
 443          * when another MCE is hit during panic path, system will checkstop
 444          * and hypervisor will get restarted cleanly by SP.
 445          */
 446         li      r3,MSR_ME
 447         andc    r10,r10,r3              /* Turn off MSR_ME */
 448         mtspr   SPRN_SRR1,r10
 449         rfid
 450         b       .
 451 2:
 452         /*
 453          * Check if we have successfully handled/recovered from error, if not
 454          * then stay on emergency stack and panic.
 455          */
 456         ld      r3,RESULT(r1)   /* Load result */
 457         cmpdi   r3,0            /* see if we handled MCE successfully */
 458
 459         beq     1b              /* if !handled then panic */
 460         /*
 461          * Return from MC interrupt.
 462          * Queue up the MCE event so that we can log it later, while
 463          * returning from kernel or opal call.
 464          */
 465         bl      machine_check_queue_event
 466         MACHINE_CHECK_HANDLER_WINDUP
 467         rfid
 468 9:
 469         /* Deliver the machine check to host kernel in V mode. */
 470         MACHINE_CHECK_HANDLER_WINDUP
 471         b       machine_check_pSeries
 472
 473 EXC_COMMON_BEGIN(unrecover_mce)
 474         /* Invoke machine_check_exception to print MCE event and panic. */
 475         addi    r3,r1,STACK_FRAME_OVERHEAD
 476         bl      machine_check_exception
 477         /*
 478          * We will not reach here. Even if we did, there is no way out. Call
 479          * unrecoverable_exception and die.
 480          */
 481 1:      addi    r3,r1,STACK_FRAME_OVERHEAD
 482         bl      unrecoverable_exception
 483         b       1b
 484
 485
 486 EXC_REAL(data_access, 0x300, 0x380)
 487 EXC_VIRT(data_access, 0x4300, 0x4380, 0x300)
 488 TRAMP_KVM_SKIP(PACA_EXGEN, 0x300)
 489
 490 EXC_COMMON_BEGIN(data_access_common)
 491         /*
 492          * Here r13 points to the paca, r9 contains the saved CR,
 493          * SRR0 and SRR1 are saved in r11 and r12,
 494          * r9 - r13 are saved in paca->exgen.
 495          */
 496         mfspr   r10,SPRN_DAR
 497         std     r10,PACA_EXGEN+EX_DAR(r13)
 498         mfspr   r10,SPRN_DSISR
 499         stw     r10,PACA_EXGEN+EX_DSISR(r13)
 500         EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
 501         RECONCILE_IRQ_STATE(r10, r11)
 502         ld      r12,_MSR(r1)
 503         ld      r3,PACA_EXGEN+EX_DAR(r13)
 504         lwz     r4,PACA_EXGEN+EX_DSISR(r13)
 505         li      r5,0x300
 506         std     r3,_DAR(r1)
 507         std     r4,_DSISR(r1)
 508 BEGIN_MMU_FTR_SECTION
 509         b       do_hash_page            /* Try to handle as hpte fault */
 510 MMU_FTR_SECTION_ELSE
 511         b       handle_page_fault
 512 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
 513
 514
 515 EXC_REAL_BEGIN(data_access_slb, 0x380, 0x400)
 516         SET_SCRATCH0(r13)
 517         EXCEPTION_PROLOG_0(PACA_EXSLB)
 518         EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
 519         std     r3,PACA_EXSLB+EX_R3(r13)
 520         mfspr   r3,SPRN_DAR
 521         mfspr   r12,SPRN_SRR1
 522         crset   4*cr6+eq
 523 #ifndef CONFIG_RELOCATABLE
 524         b       slb_miss_realmode
 525 #else
 526         /*
 527          * We can't just use a direct branch to slb_miss_realmode
 528          * because the distance from here to there depends on where
 529          * the kernel ends up being put.
 530          */
 531         mfctr   r11
 532         LOAD_HANDLER(r10, slb_miss_realmode)
 533         mtctr   r10
 534         bctr
 535 #endif
 536 EXC_REAL_END(data_access_slb, 0x380, 0x400)
 537
 538 EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x4400)
 539         SET_SCRATCH0(r13)
 540         EXCEPTION_PROLOG_0(PACA_EXSLB)
 541         EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
 542         std     r3,PACA_EXSLB+EX_R3(r13)
 543         mfspr   r3,SPRN_DAR
 544         mfspr   r12,SPRN_SRR1
 545         crset   4*cr6+eq
 546 #ifndef CONFIG_RELOCATABLE
 547         b       slb_miss_realmode
 548 #else
 549         /*
 550          * We can't just use a direct branch to slb_miss_realmode
 551          * because the distance from here to there depends on where
 552          * the kernel ends up being put.
 553          */
 554         mfctr   r11
 555         LOAD_HANDLER(r10, slb_miss_realmode)
 556         mtctr   r10
 557         bctr
 558 #endif
 559 EXC_VIRT_END(data_access_slb, 0x4380, 0x4400)
 560 TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
 561
 562
 563 EXC_REAL(instruction_access, 0x400, 0x480)
 564 EXC_VIRT(instruction_access, 0x4400, 0x4480, 0x400)
 565 TRAMP_KVM(PACA_EXGEN, 0x400)
 566
 567 EXC_COMMON_BEGIN(instruction_access_common)
 568         EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
 569         RECONCILE_IRQ_STATE(r10, r11)
 570         ld      r12,_MSR(r1)
 571         ld      r3,_NIP(r1)
 572         andis.  r4,r12,0x5820
 573         li      r5,0x400
 574         std     r3,_DAR(r1)
 575         std     r4,_DSISR(r1)
 576 BEGIN_MMU_FTR_SECTION
 577         b       do_hash_page            /* Try to handle as hpte fault */
 578 MMU_FTR_SECTION_ELSE
 579         b       handle_page_fault
 580 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
 581
 582
 583 EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x500)
 584         SET_SCRATCH0(r13)
 585         EXCEPTION_PROLOG_0(PACA_EXSLB)
 586         EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
 587         std     r3,PACA_EXSLB+EX_R3(r13)
 588         mfspr   r3,SPRN_SRR0            /* SRR0 is faulting address */
 589         mfspr   r12,SPRN_SRR1
 590         crclr   4*cr6+eq
 591 #ifndef CONFIG_RELOCATABLE
 592         b       slb_miss_realmode
 593 #else
 594         mfctr   r11
 595         LOAD_HANDLER(r10, slb_miss_realmode)
 596         mtctr   r10
 597         bctr
 598 #endif
 599 EXC_REAL_END(instruction_access_slb, 0x480, 0x500)
 600
 601 EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x4500)
 602         SET_SCRATCH0(r13)
 603         EXCEPTION_PROLOG_0(PACA_EXSLB)
 604         EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
 605         std     r3,PACA_EXSLB+EX_R3(r13)
 606         mfspr   r3,SPRN_SRR0            /* SRR0 is faulting address */
 607         mfspr   r12,SPRN_SRR1
 608         crclr   4*cr6+eq
 609 #ifndef CONFIG_RELOCATABLE
 610         b       slb_miss_realmode
 611 #else
 612         mfctr   r11
 613         LOAD_HANDLER(r10, slb_miss_realmode)
 614         mtctr   r10
 615         bctr
 616 #endif
 617 EXC_VIRT_END(instruction_access_slb, 0x4480, 0x4500)
 618 TRAMP_KVM(PACA_EXSLB, 0x480)
 619
 620
 621 /* This handler is used by both 0x380 and 0x480 slb miss interrupts */
 622 EXC_COMMON_BEGIN(slb_miss_realmode)
 623         /*
 624          * r13 points to the PACA, r9 contains the saved CR,
 625          * r12 contain the saved SRR1, SRR0 is still ready for return
 626          * r3 has the faulting address
 627          * r9 - r13 are saved in paca->exslb.
 628          * r3 is saved in paca->slb_r3
 629          * cr6.eq is set for a D-SLB miss, clear for a I-SLB miss
 630          * We assume we aren't going to take any exceptions during this
 631          * procedure.
 632          */
 633         mflr    r10
 634 #ifdef CONFIG_RELOCATABLE
 635         mtctr   r11
 636 #endif
 637
 638         stw     r9,PACA_EXSLB+EX_CCR(r13)       /* save CR in exc. frame */
 639         std     r10,PACA_EXSLB+EX_LR(r13)       /* save LR */
 640         std     r3,PACA_EXSLB+EX_DAR(r13)
 641
 642         crset   4*cr0+eq
 643 #ifdef CONFIG_PPC_STD_MMU_64
 644 BEGIN_MMU_FTR_SECTION
 645         bl      slb_allocate_realmode
 646 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
 647 #endif
 648
 649         ld      r10,PACA_EXSLB+EX_LR(r13)
 650         ld      r3,PACA_EXSLB+EX_R3(r13)
 651         lwz     r9,PACA_EXSLB+EX_CCR(r13)       /* get saved CR */
 652         mtlr    r10
 653
 654         beq     8f              /* if bad address, make full stack frame */
 655
 656         andi.   r10,r12,MSR_RI  /* check for unrecoverable exception */
 657         beq-    2f
 658
 659         /* All done -- return from exception. */
 660
 661 .machine        push
 662 .machine        "power4"
 663         mtcrf   0x80,r9
 664         mtcrf   0x02,r9         /* I/D indication is in cr6 */
 665         mtcrf   0x01,r9         /* slb_allocate uses cr0 and cr7 */
 666 .machine        pop
 667
 668         RESTORE_PPR_PACA(PACA_EXSLB, r9)
 669         ld      r9,PACA_EXSLB+EX_R9(r13)
 670         ld      r10,PACA_EXSLB+EX_R10(r13)
 671         ld      r11,PACA_EXSLB+EX_R11(r13)
 672         ld      r12,PACA_EXSLB+EX_R12(r13)
 673         ld      r13,PACA_EXSLB+EX_R13(r13)
 674         rfid
 675         b       .       /* prevent speculative execution */
 676
 677 2:      mfspr   r11,SPRN_SRR0
 678         LOAD_HANDLER(r10,unrecov_slb)
 679         mtspr   SPRN_SRR0,r10
 680         ld      r10,PACAKMSR(r13)
 681         mtspr   SPRN_SRR1,r10
 682         rfid
 683         b       .
 684
 685 8:      mfspr   r11,SPRN_SRR0
 686         LOAD_HANDLER(r10,bad_addr_slb)
 687         mtspr   SPRN_SRR0,r10
 688         ld      r10,PACAKMSR(r13)
 689         mtspr   SPRN_SRR1,r10
 690         rfid
 691         b       .
 692
 693 EXC_COMMON_BEGIN(unrecov_slb)
 694         EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
 695         RECONCILE_IRQ_STATE(r10, r11)
 696         bl      save_nvgprs
 697 1:      addi    r3,r1,STACK_FRAME_OVERHEAD
 698         bl      unrecoverable_exception
 699         b       1b
 700
 701 EXC_COMMON_BEGIN(bad_addr_slb)
 702         EXCEPTION_PROLOG_COMMON(0x380, PACA_EXSLB)
 703         RECONCILE_IRQ_STATE(r10, r11)
 704         ld      r3, PACA_EXSLB+EX_DAR(r13)
 705         std     r3, _DAR(r1)
 706         beq     cr6, 2f
 707         li      r10, 0x480              /* fix trap number for I-SLB miss */
 708         std     r10, _TRAP(r1)
 709 2:      bl      save_nvgprs
 710         addi    r3, r1, STACK_FRAME_OVERHEAD
 711         bl      slb_miss_bad_addr
 712         b       ret_from_except
 713
 714 EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x600)
 715         .globl hardware_interrupt_hv;
 716 hardware_interrupt_hv:
 717         BEGIN_FTR_SECTION
 718                 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
 719                                             EXC_HV, SOFTEN_TEST_HV)
 720 do_kvm_H0x500:
 721                 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
 722         FTR_SECTION_ELSE
 723                 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
 724                                             EXC_STD, SOFTEN_TEST_PR)
 725 do_kvm_0x500:
 726                 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
 727         ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
 728 EXC_REAL_END(hardware_interrupt, 0x500, 0x600)
 729
 730 EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x4600)
 731         .globl hardware_interrupt_relon_hv;
 732 hardware_interrupt_relon_hv:
 733         BEGIN_FTR_SECTION
 734                 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_HV, SOFTEN_TEST_HV)
 735         FTR_SECTION_ELSE
 736                 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_STD, SOFTEN_TEST_PR)
 737         ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
 738 EXC_VIRT_END(hardware_interrupt, 0x4500, 0x4600)
 739
 740 EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
 741
 742
 743 EXC_REAL(alignment, 0x600, 0x700)
 744 EXC_VIRT(alignment, 0x4600, 0x4700, 0x600)
 745 TRAMP_KVM(PACA_EXGEN, 0x600)
 746 EXC_COMMON_BEGIN(alignment_common)
 747         mfspr   r10,SPRN_DAR
 748         std     r10,PACA_EXGEN+EX_DAR(r13)
 749         mfspr   r10,SPRN_DSISR
 750         stw     r10,PACA_EXGEN+EX_DSISR(r13)
 751         EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
 752         ld      r3,PACA_EXGEN+EX_DAR(r13)
 753         lwz     r4,PACA_EXGEN+EX_DSISR(r13)
 754         std     r3,_DAR(r1)
 755         std     r4,_DSISR(r1)
 756         bl      save_nvgprs
 757         RECONCILE_IRQ_STATE(r10, r11)
 758         addi    r3,r1,STACK_FRAME_OVERHEAD
 759         bl      alignment_exception
 760         b       ret_from_except
 761
 762
 763 EXC_REAL(program_check, 0x700, 0x800)
 764 EXC_VIRT(program_check, 0x4700, 0x4800, 0x700)
 765 TRAMP_KVM(PACA_EXGEN, 0x700)
 766 EXC_COMMON_BEGIN(program_check_common)
 767         EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
 768         bl      save_nvgprs
 769         RECONCILE_IRQ_STATE(r10, r11)
 770         addi    r3,r1,STACK_FRAME_OVERHEAD
 771         bl      program_check_exception
 772         b       ret_from_except
 773
 774
 775 EXC_REAL(fp_unavailable, 0x800, 0x900)
 776 EXC_VIRT(fp_unavailable, 0x4800, 0x4900, 0x800)
 777 TRAMP_KVM(PACA_EXGEN, 0x800)
 778 EXC_COMMON_BEGIN(fp_unavailable_common)
 779         EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
 780         bne     1f                      /* if from user, just load it up */
 781         bl      save_nvgprs
 782         RECONCILE_IRQ_STATE(r10, r11)
 783         addi    r3,r1,STACK_FRAME_OVERHEAD
 784         bl      kernel_fp_unavailable_exception
 785         BUG_OPCODE
 786 1:
 787 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 788 BEGIN_FTR_SECTION
 789         /* Test if 2 TM state bits are zero.  If non-zero (ie. userspace was in
 790          * transaction), go do TM stuff
 791          */
 792         rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
 793         bne-    2f
 794 END_FTR_SECTION_IFSET(CPU_FTR_TM)
 795 #endif
 796         bl      load_up_fpu
 797         b       fast_exception_return
 798 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 799 2:      /* User process was in a transaction */
 800         bl      save_nvgprs
 801         RECONCILE_IRQ_STATE(r10, r11)
 802         addi    r3,r1,STACK_FRAME_OVERHEAD
 803         bl      fp_unavailable_tm
 804         b       ret_from_except
 805 #endif
 806
 807
 808 EXC_REAL_MASKABLE(decrementer, 0x900, 0x980)
 809 EXC_VIRT_MASKABLE(decrementer, 0x4900, 0x4980, 0x900)
 810 TRAMP_KVM(PACA_EXGEN, 0x900)
 811 EXC_COMMON_ASYNC(decrementer_common, 0x900, timer_interrupt)
 812
 813
 814 EXC_REAL_HV(hdecrementer, 0x980, 0xa00)
 815 EXC_VIRT_HV(hdecrementer, 0x4980, 0x4a00, 0x980)
 816 TRAMP_KVM_HV(PACA_EXGEN, 0x980)
 817 EXC_COMMON(hdecrementer_common, 0x980, hdec_interrupt)
 818
 819
 820 EXC_REAL_MASKABLE(doorbell_super, 0xa00, 0xb00)
 821 EXC_VIRT_MASKABLE(doorbell_super, 0x4a00, 0x4b00, 0xa00)
 822 TRAMP_KVM(PACA_EXGEN, 0xa00)
 823 #ifdef CONFIG_PPC_DOORBELL
 824 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, doorbell_exception)
 825 #else
 826 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, unknown_exception)
 827 #endif
 828
 829
 830 EXC_REAL(trap_0b, 0xb00, 0xc00)
 831 EXC_VIRT(trap_0b, 0x4b00, 0x4c00, 0xb00)
 832 TRAMP_KVM(PACA_EXGEN, 0xb00)
 833 EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
 834
 835 #define LOAD_SYSCALL_HANDLER(reg)                                       \
 836         __LOAD_HANDLER(reg, system_call_common)
 837
 838 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
 839 #define SYSCALL_PSERIES_1                                       \
 840 BEGIN_FTR_SECTION                                               \
 841         cmpdi   r0,0x1ebe ;                                     \
 842         beq-    1f ;                                            \
 843 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)                          \
 844         mr      r9,r13 ;                                        \
 845         GET_PACA(r13) ;                                         \
 846         mfspr   r11,SPRN_SRR0 ;                                 \
 847 0:
 848
 849 #define SYSCALL_PSERIES_2_RFID                                  \
 850         mfspr   r12,SPRN_SRR1 ;                                 \
 851         LOAD_SYSCALL_HANDLER(r10) ;                             \
 852         mtspr   SPRN_SRR0,r10 ;                                 \
 853         ld      r10,PACAKMSR(r13) ;                             \
 854         mtspr   SPRN_SRR1,r10 ;                                 \
 855         rfid ;                                                  \
 856         b       . ;     /* prevent speculative execution */
 857
 858 #define SYSCALL_PSERIES_3                                       \
 859         /* Fast LE/BE switch system call */                     \
 860 1:      mfspr   r12,SPRN_SRR1 ;                                 \
 861         xori    r12,r12,MSR_LE ;                                \
 862         mtspr   SPRN_SRR1,r12 ;                                 \
 863         rfid ;          /* return to userspace */               \
 864         b       . ;     /* prevent speculative execution */
 865
 866 #if defined(CONFIG_RELOCATABLE)
 867         /*
 868          * We can't branch directly so we do it via the CTR which
 869          * is volatile across system calls.
 870          */
 871 #define SYSCALL_PSERIES_2_DIRECT                                \
 872         LOAD_SYSCALL_HANDLER(r12) ;                             \
 873         mtctr   r12 ;                                           \
 874         mfspr   r12,SPRN_SRR1 ;                                 \
 875         li      r10,MSR_RI ;                                    \
 876         mtmsrd  r10,1 ;                                         \
 877         bctr ;
 878 #else
 879         /* We can branch directly */
 880 #define SYSCALL_PSERIES_2_DIRECT                                \
 881         mfspr   r12,SPRN_SRR1 ;                                 \
 882         li      r10,MSR_RI ;                                    \
 883         mtmsrd  r10,1 ;                 /* Set RI (EE=0) */     \
 884         b       system_call_common ;
 885 #endif
 886
 887 EXC_REAL_BEGIN(system_call, 0xc00, 0xd00)
 888          /*
 889           * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
 890           * that support it) before changing to HMT_MEDIUM. That allows the KVM
 891           * code to save that value into the guest state (it is the guest's PPR
 892           * value). Otherwise just change to HMT_MEDIUM as userspace has
 893           * already saved the PPR.
 894           */
 895 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
 896         SET_SCRATCH0(r13)
 897         GET_PACA(r13)
 898         std     r9,PACA_EXGEN+EX_R9(r13)
 899         OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
 900         HMT_MEDIUM;
 901         std     r10,PACA_EXGEN+EX_R10(r13)
 902         OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
 903         mfcr    r9
 904         KVMTEST_PR(0xc00)
 905         GET_SCRATCH0(r13)
 906 #else
 907         HMT_MEDIUM;
 908 #endif
 909         SYSCALL_PSERIES_1
 910         SYSCALL_PSERIES_2_RFID
 911         SYSCALL_PSERIES_3
 912 EXC_REAL_END(system_call, 0xc00, 0xd00)
 913
 914 EXC_VIRT_BEGIN(system_call, 0x4c00, 0x4d00)
 915         HMT_MEDIUM
 916         SYSCALL_PSERIES_1
 917         SYSCALL_PSERIES_2_DIRECT
 918         SYSCALL_PSERIES_3
 919 EXC_VIRT_END(system_call, 0x4c00, 0x4d00)
 920
 921 TRAMP_KVM(PACA_EXGEN, 0xc00)
 922
 923
 924 EXC_REAL(single_step, 0xd00, 0xe00)
 925 EXC_VIRT(single_step, 0x4d00, 0x4e00, 0xd00)
 926 TRAMP_KVM(PACA_EXGEN, 0xd00)
 927 EXC_COMMON(single_step_common, 0xd00, single_step_exception)
 928
 929 EXC_REAL_OOL_HV(h_data_storage, 0xe00, 0xe20)
 930 EXC_VIRT_NONE(0x4e00, 0x4e20)
 931 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0xe00)
 932 EXC_COMMON_BEGIN(h_data_storage_common)
 933         mfspr   r10,SPRN_HDAR
 934         std     r10,PACA_EXGEN+EX_DAR(r13)
 935         mfspr   r10,SPRN_HDSISR
 936         stw     r10,PACA_EXGEN+EX_DSISR(r13)
 937         EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
 938         bl      save_nvgprs
 939         RECONCILE_IRQ_STATE(r10, r11)
 940         addi    r3,r1,STACK_FRAME_OVERHEAD
 941         bl      unknown_exception
 942         b       ret_from_except
 943
 944
 945 EXC_REAL_OOL_HV(h_instr_storage, 0xe20, 0xe40)
 946 EXC_VIRT_NONE(0x4e20, 0x4e40)
 947 TRAMP_KVM_HV(PACA_EXGEN, 0xe20)
 948 EXC_COMMON(h_instr_storage_common, 0xe20, unknown_exception)
 949
 950
 951 EXC_REAL_OOL_HV(emulation_assist, 0xe40, 0xe60)
 952 EXC_VIRT_OOL_HV(emulation_assist, 0x4e40, 0x4e60, 0xe40)
 953 TRAMP_KVM_HV(PACA_EXGEN, 0xe40)
 954 EXC_COMMON(emulation_assist_common, 0xe40, emulation_assist_interrupt)
 955
 956
 957 /*
 958  * hmi_exception trampoline is a special case. It jumps to hmi_exception_early
 959  * first, and then eventaully from there to the trampoline to get into virtual
 960  * mode.
 961  */
 962 __EXC_REAL_OOL_HV_DIRECT(hmi_exception, 0xe60, 0xe80, hmi_exception_early)
 963 __TRAMP_REAL_REAL_OOL_MASKABLE_HV(hmi_exception, 0xe60)
 964 EXC_VIRT_NONE(0x4e60, 0x4e80)
 965 TRAMP_KVM_HV(PACA_EXGEN, 0xe60)
 966 TRAMP_REAL_BEGIN(hmi_exception_early)
 967         EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, 0xe60)
 968         mr      r10,r1                  /* Save r1                      */
 969         ld      r1,PACAEMERGSP(r13)     /* Use emergency stack          */
 970         subi    r1,r1,INT_FRAME_SIZE    /* alloc stack frame            */
 971         std     r9,_CCR(r1)             /* save CR in stackframe        */
 972         mfspr   r11,SPRN_HSRR0          /* Save HSRR0 */
 973         std     r11,_NIP(r1)            /* save HSRR0 in stackframe     */
 974         mfspr   r12,SPRN_HSRR1          /* Save SRR1 */
 975         std     r12,_MSR(r1)            /* save SRR1 in stackframe      */
 976         std     r10,0(r1)               /* make stack chain pointer     */
 977         std     r0,GPR0(r1)             /* save r0 in stackframe        */
 978         std     r10,GPR1(r1)            /* save r1 in stackframe        */
 979         EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
 980         EXCEPTION_PROLOG_COMMON_3(0xe60)
 981         addi    r3,r1,STACK_FRAME_OVERHEAD
 982         bl      hmi_exception_realmode
 983         /* Windup the stack. */
 984         /* Move original HSRR0 and HSRR1 into the respective regs */
 985         ld      r9,_MSR(r1)
 986         mtspr   SPRN_HSRR1,r9
 987         ld      r3,_NIP(r1)
 988         mtspr   SPRN_HSRR0,r3
 989         ld      r9,_CTR(r1)
 990         mtctr   r9
 991         ld      r9,_XER(r1)
 992         mtxer   r9
 993         ld      r9,_LINK(r1)
 994         mtlr    r9
 995         REST_GPR(0, r1)
 996         REST_8GPRS(2, r1)
 997         REST_GPR(10, r1)
 998         ld      r11,_CCR(r1)
 999         mtcr    r11
1000         REST_GPR(11, r1)
1001         REST_2GPRS(12, r1)
1002         /* restore original r1. */
1003         ld      r1,GPR1(r1)
1004
1005         /*
1006          * Go to virtual mode and pull the HMI event information from
1007          * firmware.
1008          */
1009         .globl hmi_exception_after_realmode
1010 hmi_exception_after_realmode:
1011         SET_SCRATCH0(r13)
1012         EXCEPTION_PROLOG_0(PACA_EXGEN)
1013         b       tramp_real_hmi_exception
1014
1015 EXC_COMMON_ASYNC(hmi_exception_common, 0xe60, handle_hmi_exception)
1016
1017
1018 EXC_REAL_OOL_MASKABLE_HV(h_doorbell, 0xe80, 0xea0)
1019 EXC_VIRT_OOL_MASKABLE_HV(h_doorbell, 0x4e80, 0x4ea0, 0xe80)
1020 TRAMP_KVM_HV(PACA_EXGEN, 0xe80)
1021 #ifdef CONFIG_PPC_DOORBELL
1022 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, doorbell_exception)
1023 #else
1024 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, unknown_exception)
1025 #endif
1026
1027
1028 EXC_REAL_OOL_MASKABLE_HV(h_virt_irq, 0xea0, 0xec0)
1029 EXC_VIRT_OOL_MASKABLE_HV(h_virt_irq, 0x4ea0, 0x4ec0, 0xea0)
1030 TRAMP_KVM_HV(PACA_EXGEN, 0xea0)
1031 EXC_COMMON_ASYNC(h_virt_irq_common, 0xea0, do_IRQ)
1032
1033
1034 EXC_REAL_NONE(0xec0, 0xf00)
1035 EXC_VIRT_NONE(0x4ec0, 0x4f00)
1036
1037
1038 EXC_REAL_OOL(performance_monitor, 0xf00, 0xf20)
1039 EXC_VIRT_OOL(performance_monitor, 0x4f00, 0x4f20, 0xf00)
1040 TRAMP_KVM(PACA_EXGEN, 0xf00)
1041 EXC_COMMON_ASYNC(performance_monitor_common, 0xf00, performance_monitor_exception)
1042
1043
1044 EXC_REAL_OOL(altivec_unavailable, 0xf20, 0xf40)
1045 EXC_VIRT_OOL(altivec_unavailable, 0x4f20, 0x4f40, 0xf20)
1046 TRAMP_KVM(PACA_EXGEN, 0xf20)
1047 EXC_COMMON_BEGIN(altivec_unavailable_common)
1048         EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1049 #ifdef CONFIG_ALTIVEC
1050 BEGIN_FTR_SECTION
1051         beq     1f
1052 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1053   BEGIN_FTR_SECTION_NESTED(69)
1054         /* Test if 2 TM state bits are zero.  If non-zero (ie. userspace was in
1055          * transaction), go do TM stuff
1056          */
1057         rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1058         bne-    2f
1059   END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1060 #endif
1061         bl      load_up_altivec
1062         b       fast_exception_return
1063 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1064 2:      /* User process was in a transaction */
1065         bl      save_nvgprs
1066         RECONCILE_IRQ_STATE(r10, r11)
1067         addi    r3,r1,STACK_FRAME_OVERHEAD
1068         bl      altivec_unavailable_tm
1069         b       ret_from_except
1070 #endif
1071 1:
1072 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1073 #endif
1074         bl      save_nvgprs
1075         RECONCILE_IRQ_STATE(r10, r11)
1076         addi    r3,r1,STACK_FRAME_OVERHEAD
1077         bl      altivec_unavailable_exception
1078         b       ret_from_except
1079
1080
1081 EXC_REAL_OOL(vsx_unavailable, 0xf40, 0xf60)
1082 EXC_VIRT_OOL(vsx_unavailable, 0x4f40, 0x4f60, 0xf40)
1083 TRAMP_KVM(PACA_EXGEN, 0xf40)
1084 EXC_COMMON_BEGIN(vsx_unavailable_common)
1085         EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1086 #ifdef CONFIG_VSX
1087 BEGIN_FTR_SECTION
1088         beq     1f
1089 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1090   BEGIN_FTR_SECTION_NESTED(69)
1091         /* Test if 2 TM state bits are zero.  If non-zero (ie. userspace was in
1092          * transaction), go do TM stuff
1093          */
1094         rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1095         bne-    2f
1096   END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1097 #endif
1098         b       load_up_vsx
1099 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1100 2:      /* User process was in a transaction */
1101         bl      save_nvgprs
1102         RECONCILE_IRQ_STATE(r10, r11)
1103         addi    r3,r1,STACK_FRAME_OVERHEAD
1104         bl      vsx_unavailable_tm
1105         b       ret_from_except
1106 #endif
1107 1:
1108 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1109 #endif
1110         bl      save_nvgprs
1111         RECONCILE_IRQ_STATE(r10, r11)
1112         addi    r3,r1,STACK_FRAME_OVERHEAD
1113         bl      vsx_unavailable_exception
1114         b       ret_from_except
1115
1116
1117 EXC_REAL_OOL(facility_unavailable, 0xf60, 0xf80)
1118 EXC_VIRT_OOL(facility_unavailable, 0x4f60, 0x4f80, 0xf60)
1119 TRAMP_KVM(PACA_EXGEN, 0xf60)
1120 EXC_COMMON(facility_unavailable_common, 0xf60, facility_unavailable_exception)
1121
1122
1123 EXC_REAL_OOL_HV(h_facility_unavailable, 0xf80, 0xfa0)
1124 EXC_VIRT_OOL_HV(h_facility_unavailable, 0x4f80, 0x4fa0, 0xf80)
1125 TRAMP_KVM_HV(PACA_EXGEN, 0xf80)
1126 EXC_COMMON(h_facility_unavailable_common, 0xf80, facility_unavailable_exception)
1127
1128
1129 EXC_REAL_NONE(0xfa0, 0x1200)
1130 EXC_VIRT_NONE(0x4fa0, 0x5200)
1131
1132 #ifdef CONFIG_CBE_RAS
1133 EXC_REAL_HV(cbe_system_error, 0x1200, 0x1300)
1134 EXC_VIRT_NONE(0x5200, 0x5300)
1135 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1200)
1136 EXC_COMMON(cbe_system_error_common, 0x1200, cbe_system_error_exception)
1137 #else /* CONFIG_CBE_RAS */
1138 EXC_REAL_NONE(0x1200, 0x1300)
1139 EXC_VIRT_NONE(0x5200, 0x5300)
1140 #endif
1141
1142
1143 EXC_REAL(instruction_breakpoint, 0x1300, 0x1400)
1144 EXC_VIRT(instruction_breakpoint, 0x5300, 0x5400, 0x1300)
1145 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1300)
1146 EXC_COMMON(instruction_breakpoint_common, 0x1300, instruction_breakpoint_exception)
1147
1148 EXC_REAL_NONE(0x1400, 0x1500)
1149 EXC_VIRT_NONE(0x5400, 0x5500)
1150
1151 EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x1600)
1152         mtspr   SPRN_SPRG_HSCRATCH0,r13
1153         EXCEPTION_PROLOG_0(PACA_EXGEN)
1154         EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
1155
1156 #ifdef CONFIG_PPC_DENORMALISATION
1157         mfspr   r10,SPRN_HSRR1
1158         mfspr   r11,SPRN_HSRR0          /* save HSRR0 */
1159         andis.  r10,r10,(HSRR1_DENORM)@h /* denorm? */
1160         addi    r11,r11,-4              /* HSRR0 is next instruction */
1161         bne+    denorm_assist
1162 #endif
1163
1164         KVMTEST_PR(0x1500)
1165         EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
1166 EXC_REAL_END(denorm_exception_hv, 0x1500, 0x1600)
1167
1168 #ifdef CONFIG_PPC_DENORMALISATION
1169 EXC_VIRT_BEGIN(denorm_exception, 0x5500, 0x5600)
1170         b       exc_real_0x1500_denorm_exception_hv
1171 EXC_VIRT_END(denorm_exception, 0x5500, 0x5600)
1172 #else
1173 EXC_VIRT_NONE(0x5500, 0x5600)
1174 #endif
1175
1176 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1500)
1177
1178 #ifdef CONFIG_PPC_DENORMALISATION
1179 TRAMP_REAL_BEGIN(denorm_assist)
1180 BEGIN_FTR_SECTION
1181 /*
1182  * To denormalise we need to move a copy of the register to itself.
1183  * For POWER6 do that here for all FP regs.
1184  */
1185         mfmsr   r10
1186         ori     r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
1187         xori    r10,r10,(MSR_FE0|MSR_FE1)
1188         mtmsrd  r10
1189         sync
1190
1191 #define FMR2(n)  fmr (n), (n) ; fmr n+1, n+1
1192 #define FMR4(n)  FMR2(n) ; FMR2(n+2)
1193 #define FMR8(n)  FMR4(n) ; FMR4(n+4)
1194 #define FMR16(n) FMR8(n) ; FMR8(n+8)
1195 #define FMR32(n) FMR16(n) ; FMR16(n+16)
1196         FMR32(0)
1197
1198 FTR_SECTION_ELSE
1199 /*
1200  * To denormalise we need to move a copy of the register to itself.
1201  * For POWER7 do that here for the first 32 VSX registers only.
1202  */
1203         mfmsr   r10
1204         oris    r10,r10,MSR_VSX@h
1205         mtmsrd  r10
1206         sync
1207
1208 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
1209 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
1210 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
1211 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
1212 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
1213         XVCPSGNDP32(0)
1214
1215 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
1216
1217 BEGIN_FTR_SECTION
1218         b       denorm_done
1219 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
1220 /*
1221  * To denormalise we need to move a copy of the register to itself.
1222  * For POWER8 we need to do that for all 64 VSX registers
1223  */
1224         XVCPSGNDP32(32)
1225 denorm_done:
1226         mtspr   SPRN_HSRR0,r11
1227         mtcrf   0x80,r9
1228         ld      r9,PACA_EXGEN+EX_R9(r13)
1229         RESTORE_PPR_PACA(PACA_EXGEN, r10)
1230 BEGIN_FTR_SECTION
1231         ld      r10,PACA_EXGEN+EX_CFAR(r13)
1232         mtspr   SPRN_CFAR,r10
1233 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1234         ld      r10,PACA_EXGEN+EX_R10(r13)
1235         ld      r11,PACA_EXGEN+EX_R11(r13)
1236         ld      r12,PACA_EXGEN+EX_R12(r13)
1237         ld      r13,PACA_EXGEN+EX_R13(r13)
1238         HRFID
1239         b       .
1240 #endif
1241
1242 EXC_COMMON_HV(denorm_common, 0x1500, unknown_exception)
1243
1244
1245 #ifdef CONFIG_CBE_RAS
1246 EXC_REAL_HV(cbe_maintenance, 0x1600, 0x1700)
1247 EXC_VIRT_NONE(0x5600, 0x5700)
1248 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1600)
1249 EXC_COMMON(cbe_maintenance_common, 0x1600, cbe_maintenance_exception)
1250 #else /* CONFIG_CBE_RAS */
1251 EXC_REAL_NONE(0x1600, 0x1700)
1252 EXC_VIRT_NONE(0x5600, 0x5700)
1253 #endif
1254
1255
1256 EXC_REAL(altivec_assist, 0x1700, 0x1800)
1257 EXC_VIRT(altivec_assist, 0x5700, 0x5800, 0x1700)
1258 TRAMP_KVM(PACA_EXGEN, 0x1700)
1259 #ifdef CONFIG_ALTIVEC
1260 EXC_COMMON(altivec_assist_common, 0x1700, altivec_assist_exception)
1261 #else
1262 EXC_COMMON(altivec_assist_common, 0x1700, unknown_exception)
1263 #endif
1264
1265
1266 #ifdef CONFIG_CBE_RAS
1267 EXC_REAL_HV(cbe_thermal, 0x1800, 0x1900)
1268 EXC_VIRT_NONE(0x5800, 0x5900)
1269 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1800)
1270 EXC_COMMON(cbe_thermal_common, 0x1800, cbe_thermal_exception)
1271 #else /* CONFIG_CBE_RAS */
1272 EXC_REAL_NONE(0x1800, 0x1900)
1273 EXC_VIRT_NONE(0x5800, 0x5900)
1274 #endif
1275
1276
1277 /*
1278  * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
1279  * - If it was a decrementer interrupt, we bump the dec to max and and return.
1280  * - If it was a doorbell we return immediately since doorbells are edge
1281  *   triggered and won't automatically refire.
1282  * - If it was a HMI we return immediately since we handled it in realmode
1283  *   and it won't refire.
1284  * - else we hard disable and return.
1285  * This is called with r10 containing the value to OR to the paca field.
1286  */
1287 #define MASKED_INTERRUPT(_H)                            \
1288 masked_##_H##interrupt:                                 \
1289         std     r11,PACA_EXGEN+EX_R11(r13);             \
1290         lbz     r11,PACAIRQHAPPENED(r13);               \
1291         or      r11,r11,r10;                            \
1292         stb     r11,PACAIRQHAPPENED(r13);               \
1293         cmpwi   r10,PACA_IRQ_DEC;                       \
1294         bne     1f;                                     \
1295         lis     r10,0x7fff;                             \
1296         ori     r10,r10,0xffff;                         \
1297         mtspr   SPRN_DEC,r10;                           \
1298         b       2f;                                     \
1299 1:      cmpwi   r10,PACA_IRQ_DBELL;                     \
1300         beq     2f;                                     \
1301         cmpwi   r10,PACA_IRQ_HMI;                       \
1302         beq     2f;                                     \
1303         mfspr   r10,SPRN_##_H##SRR1;                    \
1304         rldicl  r10,r10,48,1; /* clear MSR_EE */        \
1305         rotldi  r10,r10,16;                             \
1306         mtspr   SPRN_##_H##SRR1,r10;                    \
1307 2:      mtcrf   0x80,r9;                                \
1308         ld      r9,PACA_EXGEN+EX_R9(r13);               \
1309         ld      r10,PACA_EXGEN+EX_R10(r13);             \
1310         ld      r11,PACA_EXGEN+EX_R11(r13);             \
1311         GET_SCRATCH0(r13);                              \
1312         ##_H##rfid;                                     \
1313         b       .
1314
1315 /*
1316  * Real mode exceptions actually use this too, but alternate
1317  * instruction code patches (which end up in the common .text area)
1318  * cannot reach these if they are put there.
1319  */
1320 USE_FIXED_SECTION(virt_trampolines)
1321         MASKED_INTERRUPT()
1322         MASKED_INTERRUPT(H)
1323
1324 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1325 TRAMP_REAL_BEGIN(kvmppc_skip_interrupt)
1326         /*
1327          * Here all GPRs are unchanged from when the interrupt happened
1328          * except for r13, which is saved in SPRG_SCRATCH0.
1329          */
1330         mfspr   r13, SPRN_SRR0
1331         addi    r13, r13, 4
1332         mtspr   SPRN_SRR0, r13
1333         GET_SCRATCH0(r13)
1334         rfid
1335         b       .
1336
1337 TRAMP_REAL_BEGIN(kvmppc_skip_Hinterrupt)
1338         /*
1339          * Here all GPRs are unchanged from when the interrupt happened
1340          * except for r13, which is saved in SPRG_SCRATCH0.
1341          */
1342         mfspr   r13, SPRN_HSRR0
1343         addi    r13, r13, 4
1344         mtspr   SPRN_HSRR0, r13
1345         GET_SCRATCH0(r13)
1346         hrfid
1347         b       .
1348 #endif
1349
1350 /*
1351  * Ensure that any handlers that get invoked from the exception prologs
1352  * above are below the first 64KB (0x10000) of the kernel image because
1353  * the prologs assemble the addresses of these handlers using the
1354  * LOAD_HANDLER macro, which uses an ori instruction.
1355  */
1356
1357 /*** Common interrupt handlers ***/
1358
1359
1360         /*
1361          * Relocation-on interrupts: A subset of the interrupts can be delivered
1362          * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
1363          * it.  Addresses are the same as the original interrupt addresses, but
1364          * offset by 0xc000000000004000.
1365          * It's impossible to receive interrupts below 0x300 via this mechanism.
1366          * KVM: None of these traps are from the guest ; anything that escalated
1367          * to HV=1 from HV=0 is delivered via real mode handlers.
1368          */
1369
1370         /*
1371          * This uses the standard macro, since the original 0x300 vector
1372          * only has extra guff for STAB-based processors -- which never
1373          * come here.
1374          */
1375
1376 EXC_COMMON_BEGIN(ppc64_runlatch_on_trampoline)
1377         b       __ppc64_runlatch_on
1378
1379 USE_FIXED_SECTION(virt_trampolines)
1380         /*
1381          * The __end_interrupts marker must be past the out-of-line (OOL)
1382          * handlers, so that they are copied to real address 0x100 when running
1383          * a relocatable kernel. This ensures they can be reached from the short
1384          * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1385          * directly, without using LOAD_HANDLER().
1386          */
1387         .align  7
1388         .globl  __end_interrupts
1389 __end_interrupts:
1390 DEFINE_FIXED_SYMBOL(__end_interrupts)
1391
1392 #ifdef CONFIG_PPC_970_NAP
1393 EXC_COMMON_BEGIN(power4_fixup_nap)
1394         andc    r9,r9,r10
1395         std     r9,TI_LOCAL_FLAGS(r11)
1396         ld      r10,_LINK(r1)           /* make idle task do the */
1397         std     r10,_NIP(r1)            /* equivalent of a blr */
1398         blr
1399 #endif
1400
1401 CLOSE_FIXED_SECTION(real_vectors);
1402 CLOSE_FIXED_SECTION(real_trampolines);
1403 CLOSE_FIXED_SECTION(virt_vectors);
1404 CLOSE_FIXED_SECTION(virt_trampolines);
1405
1406 USE_TEXT_SECTION()
1407
1408 /*
1409  * Hash table stuff
1410  */
1411         .balign IFETCH_ALIGN_BYTES
1412 do_hash_page:
1413 #ifdef CONFIG_PPC_STD_MMU_64
1414         andis.  r0,r4,0xa410            /* weird error? */
1415         bne-    handle_page_fault       /* if not, try to insert a HPTE */
1416         andis.  r0,r4,DSISR_DABRMATCH@h
1417         bne-    handle_dabr_fault
1418         CURRENT_THREAD_INFO(r11, r1)
1419         lwz     r0,TI_PREEMPT(r11)      /* If we're in an "NMI" */
1420         andis.  r0,r0,NMI_MASK@h        /* (i.e. an irq when soft-disabled) */
1421         bne     77f                     /* then don't call hash_page now */
1422
1423         /*
1424          * r3 contains the faulting address
1425          * r4 msr
1426          * r5 contains the trap number
1427          * r6 contains dsisr
1428          *
1429          * at return r3 = 0 for success, 1 for page fault, negative for error
1430          */
1431         mr      r4,r12
1432         ld      r6,_DSISR(r1)
1433         bl      __hash_page             /* build HPTE if possible */
1434         cmpdi   r3,0                    /* see if __hash_page succeeded */
1435
1436         /* Success */
1437         beq     fast_exc_return_irq     /* Return from exception on success */
1438
1439         /* Error */
1440         blt-    13f
1441 #endif /* CONFIG_PPC_STD_MMU_64 */
1442
1443 /* Here we have a page fault that hash_page can't handle. */
1444 handle_page_fault:
1445 11:     ld      r4,_DAR(r1)
1446         ld      r5,_DSISR(r1)
1447         addi    r3,r1,STACK_FRAME_OVERHEAD
1448         bl      do_page_fault
1449         cmpdi   r3,0
1450         beq+    12f
1451         bl      save_nvgprs
1452         mr      r5,r3
1453         addi    r3,r1,STACK_FRAME_OVERHEAD
1454         lwz     r4,_DAR(r1)
1455         bl      bad_page_fault
1456         b       ret_from_except
1457
1458 /* We have a data breakpoint exception - handle it */
1459 handle_dabr_fault:
1460         bl      save_nvgprs
1461         ld      r4,_DAR(r1)
1462         ld      r5,_DSISR(r1)
1463         addi    r3,r1,STACK_FRAME_OVERHEAD
1464         bl      do_break
1465 12:     b       ret_from_except_lite
1466
1467
1468 #ifdef CONFIG_PPC_STD_MMU_64
1469 /* We have a page fault that hash_page could handle but HV refused
1470  * the PTE insertion
1471  */
1472 13:     bl      save_nvgprs
1473         mr      r5,r3
1474         addi    r3,r1,STACK_FRAME_OVERHEAD
1475         ld      r4,_DAR(r1)
1476         bl      low_hash_fault
1477         b       ret_from_except
1478 #endif
1479
1480 /*
1481  * We come here as a result of a DSI at a point where we don't want
1482  * to call hash_page, such as when we are accessing memory (possibly
1483  * user memory) inside a PMU interrupt that occurred while interrupts
1484  * were soft-disabled.  We want to invoke the exception handler for
1485  * the access, or panic if there isn't a handler.
1486  */
1487 77:     bl      save_nvgprs
1488         mr      r4,r3
1489         addi    r3,r1,STACK_FRAME_OVERHEAD
1490         li      r5,SIGSEGV
1491         bl      bad_page_fault
1492         b       ret_from_except
1493
1494 /*
1495  * Here we have detected that the kernel stack pointer is bad.
1496  * R9 contains the saved CR, r13 points to the paca,
1497  * r10 contains the (bad) kernel stack pointer,
1498  * r11 and r12 contain the saved SRR0 and SRR1.
1499  * We switch to using an emergency stack, save the registers there,
1500  * and call kernel_bad_stack(), which panics.
1501  */
1502 bad_stack:
1503         ld      r1,PACAEMERGSP(r13)
1504         subi    r1,r1,64+INT_FRAME_SIZE
1505         std     r9,_CCR(r1)
1506         std     r10,GPR1(r1)
1507         std     r11,_NIP(r1)
1508         std     r12,_MSR(r1)
1509         mfspr   r11,SPRN_DAR
1510         mfspr   r12,SPRN_DSISR
1511         std     r11,_DAR(r1)
1512         std     r12,_DSISR(r1)
1513         mflr    r10
1514         mfctr   r11
1515         mfxer   r12
1516         std     r10,_LINK(r1)
1517         std     r11,_CTR(r1)
1518         std     r12,_XER(r1)
1519         SAVE_GPR(0,r1)
1520         SAVE_GPR(2,r1)
1521         ld      r10,EX_R3(r3)
1522         std     r10,GPR3(r1)
1523         SAVE_GPR(4,r1)
1524         SAVE_4GPRS(5,r1)
1525         ld      r9,EX_R9(r3)
1526         ld      r10,EX_R10(r3)
1527         SAVE_2GPRS(9,r1)
1528         ld      r9,EX_R11(r3)
1529         ld      r10,EX_R12(r3)
1530         ld      r11,EX_R13(r3)
1531         std     r9,GPR11(r1)
1532         std     r10,GPR12(r1)
1533         std     r11,GPR13(r1)
1534 BEGIN_FTR_SECTION
1535         ld      r10,EX_CFAR(r3)
1536         std     r10,ORIG_GPR3(r1)
1537 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1538         SAVE_8GPRS(14,r1)
1539         SAVE_10GPRS(22,r1)
1540         lhz     r12,PACA_TRAP_SAVE(r13)
1541         std     r12,_TRAP(r1)
1542         addi    r11,r1,INT_FRAME_SIZE
1543         std     r11,0(r1)
1544         li      r12,0
1545         std     r12,0(r11)
1546         ld      r2,PACATOC(r13)
1547         ld      r11,exception_marker@toc(r2)
1548         std     r12,RESULT(r1)
1549         std     r11,STACK_FRAME_OVERHEAD-16(r1)
1550 1:      addi    r3,r1,STACK_FRAME_OVERHEAD
1551         bl      kernel_bad_stack
1552         b       1b
1553
1554 /*
1555  * Called from arch_local_irq_enable when an interrupt needs
1556  * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
1557  * which kind of interrupt. MSR:EE is already off. We generate a
1558  * stackframe like if a real interrupt had happened.
1559  *
1560  * Note: While MSR:EE is off, we need to make sure that _MSR
1561  * in the generated frame has EE set to 1 or the exception
1562  * handler will not properly re-enable them.
1563  */
1564 _GLOBAL(__replay_interrupt)
1565         /* We are going to jump to the exception common code which
1566          * will retrieve various register values from the PACA which
1567          * we don't give a damn about, so we don't bother storing them.
1568          */
1569         mfmsr   r12
1570         mflr    r11
1571         mfcr    r9
1572         ori     r12,r12,MSR_EE
1573         cmpwi   r3,0x900
1574         beq     decrementer_common
1575         cmpwi   r3,0x500
1576         beq     hardware_interrupt_common
1577 BEGIN_FTR_SECTION
1578         cmpwi   r3,0xe80
1579         beq     h_doorbell_common
1580         cmpwi   r3,0xea0
1581         beq     h_virt_irq_common
1582         cmpwi   r3,0xe60
1583         beq     hmi_exception_common
1584 FTR_SECTION_ELSE
1585         cmpwi   r3,0xa00
1586         beq     doorbell_super_common
1587 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
1588         blr