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powerpc/64: Fix HMI exception on LE with CONFIG_RELOCATABLE=y
[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / kernel / exceptions-64s.S
1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
14
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
19 #include <asm/head-64.h>
20
21 /*
22 * There are a few constraints to be concerned with.
23 * - Real mode exceptions code/data must be located at their physical location.
24 * - Virtual mode exceptions must be mapped at their 0xc000... location.
25 * - Fixed location code must not call directly beyond the __end_interrupts
26 * area when built with CONFIG_RELOCATABLE. LOAD_HANDLER / bctr sequence
27 * must be used.
28 * - LOAD_HANDLER targets must be within first 64K of physical 0 /
29 * virtual 0xc00...
30 * - Conditional branch targets must be within +/-32K of caller.
31 *
32 * "Virtual exceptions" run with relocation on (MSR_IR=1, MSR_DR=1), and
33 * therefore don't have to run in physically located code or rfid to
34 * virtual mode kernel code. However on relocatable kernels they do have
35 * to branch to KERNELBASE offset because the rest of the kernel (outside
36 * the exception vectors) may be located elsewhere.
37 *
38 * Virtual exceptions correspond with physical, except their entry points
39 * are offset by 0xc000000000000000 and also tend to get an added 0x4000
40 * offset applied. Virtual exceptions are enabled with the Alternate
41 * Interrupt Location (AIL) bit set in the LPCR. However this does not
42 * guarantee they will be delivered virtually. Some conditions (see the ISA)
43 * cause exceptions to be delivered in real mode.
44 *
45 * It's impossible to receive interrupts below 0x300 via AIL.
46 *
47 * KVM: None of the virtual exceptions are from the guest. Anything that
48 * escalated to HV=1 from HV=0 is delivered via real mode handlers.
49 *
50 *
51 * We layout physical memory as follows:
52 * 0x0000 - 0x00ff : Secondary processor spin code
53 * 0x0100 - 0x18ff : Real mode pSeries interrupt vectors
54 * 0x1900 - 0x3fff : Real mode trampolines
55 * 0x4000 - 0x58ff : Relon (IR=1,DR=1) mode pSeries interrupt vectors
56 * 0x5900 - 0x6fff : Relon mode trampolines
57 * 0x7000 - 0x7fff : FWNMI data area
58 * 0x8000 - .... : Common interrupt handlers, remaining early
59 * setup code, rest of kernel.
60 *
61 * We could reclaim 0x4000-0x42ff for real mode trampolines if the space
62 * is necessary. Until then it's more consistent to explicitly put VIRT_NONE
63 * vectors there.
64 */
65 OPEN_FIXED_SECTION(real_vectors, 0x0100, 0x1900)
66 OPEN_FIXED_SECTION(real_trampolines, 0x1900, 0x4000)
67 OPEN_FIXED_SECTION(virt_vectors, 0x4000, 0x5900)
68 OPEN_FIXED_SECTION(virt_trampolines, 0x5900, 0x7000)
69 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
70 /*
71 * Data area reserved for FWNMI option.
72 * This address (0x7000) is fixed by the RPA.
73 * pseries and powernv need to keep the whole page from
74 * 0x7000 to 0x8000 free for use by the firmware
75 */
76 ZERO_FIXED_SECTION(fwnmi_page, 0x7000, 0x8000)
77 OPEN_TEXT_SECTION(0x8000)
78 #else
79 OPEN_TEXT_SECTION(0x7000)
80 #endif
81
82 USE_FIXED_SECTION(real_vectors)
83
84 /*
85 * This is the start of the interrupt handlers for pSeries
86 * This code runs with relocation off.
87 * Code from here to __end_interrupts gets copied down to real
88 * address 0x100 when we are running a relocatable kernel.
89 * Therefore any relative branches in this section must only
90 * branch to labels in this section.
91 */
92 .globl __start_interrupts
93 __start_interrupts:
94
95 /* No virt vectors corresponding with 0x0..0x100 */
96 EXC_VIRT_NONE(0x4000, 0x4100)
97
98
99 #ifdef CONFIG_PPC_P7_NAP
100 /*
101 * If running native on arch 2.06 or later, check if we are waking up
102 * from nap/sleep/winkle, and branch to idle handler. This tests SRR1
103 * bits 46:47. A non-0 value indicates that we are coming from a power
104 * saving state. The idle wakeup handler initially runs in real mode,
105 * but we branch to the 0xc000... address so we can turn on relocation
106 * with mtmsr.
107 */
108 #define IDLETEST(n) \
109 BEGIN_FTR_SECTION ; \
110 mfspr r10,SPRN_SRR1 ; \
111 rlwinm. r10,r10,47-31,30,31 ; \
112 beq- 1f ; \
113 cmpwi cr3,r10,2 ; \
114 BRANCH_TO_COMMON(r10, system_reset_idle_common) ; \
115 1: \
116 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
117 #else
118 #define IDLETEST NOTEST
119 #endif
120
121 EXC_REAL_BEGIN(system_reset, 0x100, 0x200)
122 SET_SCRATCH0(r13)
123 GET_PACA(r13)
124 clrrdi r13,r13,1 /* Last bit of HSPRG0 is set if waking from winkle */
125 EXCEPTION_PROLOG_PSERIES_PACA(PACA_EXGEN, system_reset_common, EXC_STD,
126 IDLETEST, 0x100)
127
128 EXC_REAL_END(system_reset, 0x100, 0x200)
129 EXC_VIRT_NONE(0x4100, 0x4200)
130
131 #ifdef CONFIG_PPC_P7_NAP
132 EXC_COMMON_BEGIN(system_reset_idle_common)
133 BEGIN_FTR_SECTION
134 GET_PACA(r13) /* Restore HSPRG0 to get the winkle bit in r13 */
135 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
136 bl pnv_restore_hyp_resource
137
138 li r0,PNV_THREAD_RUNNING
139 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
140
141 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
142 li r0,KVM_HWTHREAD_IN_KERNEL
143 stb r0,HSTATE_HWTHREAD_STATE(r13)
144 /* Order setting hwthread_state vs. testing hwthread_req */
145 sync
146 lbz r0,HSTATE_HWTHREAD_REQ(r13)
147 cmpwi r0,0
148 beq 1f
149 BRANCH_TO_KVM(r10, kvm_start_guest)
150 1:
151 #endif
152
153 /* Return SRR1 from power7_nap() */
154 mfspr r3,SPRN_SRR1
155 blt cr3,2f
156 b pnv_wakeup_loss
157 2: b pnv_wakeup_noloss
158 #endif
159
160 EXC_COMMON(system_reset_common, 0x100, system_reset_exception)
161
162 #ifdef CONFIG_PPC_PSERIES
163 /*
164 * Vectors for the FWNMI option. Share common code.
165 */
166 TRAMP_REAL_BEGIN(system_reset_fwnmi)
167 SET_SCRATCH0(r13) /* save r13 */
168 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
169 NOTEST, 0x100)
170 #endif /* CONFIG_PPC_PSERIES */
171
172
173 EXC_REAL_BEGIN(machine_check, 0x200, 0x300)
174 /* This is moved out of line as it can be patched by FW, but
175 * some code path might still want to branch into the original
176 * vector
177 */
178 SET_SCRATCH0(r13) /* save r13 */
179 /*
180 * Running native on arch 2.06 or later, we may wakeup from winkle
181 * inside machine check. If yes, then last bit of HSPRG0 would be set
182 * to 1. Hence clear it unconditionally.
183 */
184 GET_PACA(r13)
185 clrrdi r13,r13,1
186 SET_PACA(r13)
187 EXCEPTION_PROLOG_0(PACA_EXMC)
188 BEGIN_FTR_SECTION
189 b machine_check_powernv_early
190 FTR_SECTION_ELSE
191 b machine_check_pSeries_0
192 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
193 EXC_REAL_END(machine_check, 0x200, 0x300)
194 EXC_VIRT_NONE(0x4200, 0x4300)
195 TRAMP_REAL_BEGIN(machine_check_powernv_early)
196 BEGIN_FTR_SECTION
197 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
198 /*
199 * Register contents:
200 * R13 = PACA
201 * R9 = CR
202 * Original R9 to R13 is saved on PACA_EXMC
203 *
204 * Switch to mc_emergency stack and handle re-entrancy (we limit
205 * the nested MCE upto level 4 to avoid stack overflow).
206 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
207 *
208 * We use paca->in_mce to check whether this is the first entry or
209 * nested machine check. We increment paca->in_mce to track nested
210 * machine checks.
211 *
212 * If this is the first entry then set stack pointer to
213 * paca->mc_emergency_sp, otherwise r1 is already pointing to
214 * stack frame on mc_emergency stack.
215 *
216 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
217 * checkstop if we get another machine check exception before we do
218 * rfid with MSR_ME=1.
219 */
220 mr r11,r1 /* Save r1 */
221 lhz r10,PACA_IN_MCE(r13)
222 cmpwi r10,0 /* Are we in nested machine check */
223 bne 0f /* Yes, we are. */
224 /* First machine check entry */
225 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
226 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
227 addi r10,r10,1 /* increment paca->in_mce */
228 sth r10,PACA_IN_MCE(r13)
229 /* Limit nested MCE to level 4 to avoid stack overflow */
230 cmpwi r10,4
231 bgt 2f /* Check if we hit limit of 4 */
232 std r11,GPR1(r1) /* Save r1 on the stack. */
233 std r11,0(r1) /* make stack chain pointer */
234 mfspr r11,SPRN_SRR0 /* Save SRR0 */
235 std r11,_NIP(r1)
236 mfspr r11,SPRN_SRR1 /* Save SRR1 */
237 std r11,_MSR(r1)
238 mfspr r11,SPRN_DAR /* Save DAR */
239 std r11,_DAR(r1)
240 mfspr r11,SPRN_DSISR /* Save DSISR */
241 std r11,_DSISR(r1)
242 std r9,_CCR(r1) /* Save CR in stackframe */
243 /* Save r9 through r13 from EXMC save area to stack frame. */
244 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
245 mfmsr r11 /* get MSR value */
246 ori r11,r11,MSR_ME /* turn on ME bit */
247 ori r11,r11,MSR_RI /* turn on RI bit */
248 LOAD_HANDLER(r12, machine_check_handle_early)
249 1: mtspr SPRN_SRR0,r12
250 mtspr SPRN_SRR1,r11
251 rfid
252 b . /* prevent speculative execution */
253 2:
254 /* Stack overflow. Stay on emergency stack and panic.
255 * Keep the ME bit off while panic-ing, so that if we hit
256 * another machine check we checkstop.
257 */
258 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
259 ld r11,PACAKMSR(r13)
260 LOAD_HANDLER(r12, unrecover_mce)
261 li r10,MSR_ME
262 andc r11,r11,r10 /* Turn off MSR_ME */
263 b 1b
264 b . /* prevent speculative execution */
265 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
266
267 TRAMP_REAL_BEGIN(machine_check_pSeries)
268 .globl machine_check_fwnmi
269 machine_check_fwnmi:
270 SET_SCRATCH0(r13) /* save r13 */
271 EXCEPTION_PROLOG_0(PACA_EXMC)
272 machine_check_pSeries_0:
273 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST_PR, 0x200)
274 /*
275 * The following is essentially EXCEPTION_PROLOG_PSERIES_1 with the
276 * difference that MSR_RI is not enabled, because PACA_EXMC is being
277 * used, so nested machine check corrupts it. machine_check_common
278 * enables MSR_RI.
279 */
280 ld r10,PACAKMSR(r13)
281 xori r10,r10,MSR_RI
282 mfspr r11,SPRN_SRR0
283 LOAD_HANDLER(r12, machine_check_common)
284 mtspr SPRN_SRR0,r12
285 mfspr r12,SPRN_SRR1
286 mtspr SPRN_SRR1,r10
287 rfid
288 b . /* prevent speculative execution */
289
290 TRAMP_KVM_SKIP(PACA_EXMC, 0x200)
291
292 EXC_COMMON_BEGIN(machine_check_common)
293 /*
294 * Machine check is different because we use a different
295 * save area: PACA_EXMC instead of PACA_EXGEN.
296 */
297 mfspr r10,SPRN_DAR
298 std r10,PACA_EXMC+EX_DAR(r13)
299 mfspr r10,SPRN_DSISR
300 stw r10,PACA_EXMC+EX_DSISR(r13)
301 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
302 FINISH_NAP
303 RECONCILE_IRQ_STATE(r10, r11)
304 ld r3,PACA_EXMC+EX_DAR(r13)
305 lwz r4,PACA_EXMC+EX_DSISR(r13)
306 /* Enable MSR_RI when finished with PACA_EXMC */
307 li r10,MSR_RI
308 mtmsrd r10,1
309 std r3,_DAR(r1)
310 std r4,_DSISR(r1)
311 bl save_nvgprs
312 addi r3,r1,STACK_FRAME_OVERHEAD
313 bl machine_check_exception
314 b ret_from_except
315
316 #define MACHINE_CHECK_HANDLER_WINDUP \
317 /* Clear MSR_RI before setting SRR0 and SRR1. */\
318 li r0,MSR_RI; \
319 mfmsr r9; /* get MSR value */ \
320 andc r9,r9,r0; \
321 mtmsrd r9,1; /* Clear MSR_RI */ \
322 /* Move original SRR0 and SRR1 into the respective regs */ \
323 ld r9,_MSR(r1); \
324 mtspr SPRN_SRR1,r9; \
325 ld r3,_NIP(r1); \
326 mtspr SPRN_SRR0,r3; \
327 ld r9,_CTR(r1); \
328 mtctr r9; \
329 ld r9,_XER(r1); \
330 mtxer r9; \
331 ld r9,_LINK(r1); \
332 mtlr r9; \
333 REST_GPR(0, r1); \
334 REST_8GPRS(2, r1); \
335 REST_GPR(10, r1); \
336 ld r11,_CCR(r1); \
337 mtcr r11; \
338 /* Decrement paca->in_mce. */ \
339 lhz r12,PACA_IN_MCE(r13); \
340 subi r12,r12,1; \
341 sth r12,PACA_IN_MCE(r13); \
342 REST_GPR(11, r1); \
343 REST_2GPRS(12, r1); \
344 /* restore original r1. */ \
345 ld r1,GPR1(r1)
346
347 /*
348 * Handle machine check early in real mode. We come here with
349 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
350 */
351 EXC_COMMON_BEGIN(machine_check_handle_early)
352 std r0,GPR0(r1) /* Save r0 */
353 EXCEPTION_PROLOG_COMMON_3(0x200)
354 bl save_nvgprs
355 addi r3,r1,STACK_FRAME_OVERHEAD
356 bl machine_check_early
357 std r3,RESULT(r1) /* Save result */
358 ld r12,_MSR(r1)
359 #ifdef CONFIG_PPC_P7_NAP
360 /*
361 * Check if thread was in power saving mode. We come here when any
362 * of the following is true:
363 * a. thread wasn't in power saving mode
364 * b. thread was in power saving mode with no state loss,
365 * supervisor state loss or hypervisor state loss.
366 *
367 * Go back to nap/sleep/winkle mode again if (b) is true.
368 */
369 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
370 beq 4f /* No, it wasn;t */
371 /* Thread was in power saving mode. Go back to nap again. */
372 cmpwi r11,2
373 blt 3f
374 /* Supervisor/Hypervisor state loss */
375 li r0,1
376 stb r0,PACA_NAPSTATELOST(r13)
377 3: bl machine_check_queue_event
378 MACHINE_CHECK_HANDLER_WINDUP
379 GET_PACA(r13)
380 ld r1,PACAR1(r13)
381 /*
382 * Check what idle state this CPU was in and go back to same mode
383 * again.
384 */
385 lbz r3,PACA_THREAD_IDLE_STATE(r13)
386 cmpwi r3,PNV_THREAD_NAP
387 bgt 10f
388 IDLE_STATE_ENTER_SEQ_NORET(PPC_NAP)
389 /* No return */
390 10:
391 cmpwi r3,PNV_THREAD_SLEEP
392 bgt 2f
393 IDLE_STATE_ENTER_SEQ_NORET(PPC_SLEEP)
394 /* No return */
395
396 2:
397 /*
398 * Go back to winkle. Please note that this thread was woken up in
399 * machine check from winkle and have not restored the per-subcore
400 * state. Hence before going back to winkle, set last bit of HSPRG0
401 * to 1. This will make sure that if this thread gets woken up
402 * again at reset vector 0x100 then it will get chance to restore
403 * the subcore state.
404 */
405 ori r13,r13,1
406 SET_PACA(r13)
407 IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE)
408 /* No return */
409 4:
410 #endif
411 /*
412 * Check if we are coming from hypervisor userspace. If yes then we
413 * continue in host kernel in V mode to deliver the MC event.
414 */
415 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
416 beq 5f
417 andi. r11,r12,MSR_PR /* See if coming from user. */
418 bne 9f /* continue in V mode if we are. */
419
420 5:
421 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
422 /*
423 * We are coming from kernel context. Check if we are coming from
424 * guest. if yes, then we can continue. We will fall through
425 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
426 */
427 lbz r11,HSTATE_IN_GUEST(r13)
428 cmpwi r11,0 /* Check if coming from guest */
429 bne 9f /* continue if we are. */
430 #endif
431 /*
432 * At this point we are not sure about what context we come from.
433 * Queue up the MCE event and return from the interrupt.
434 * But before that, check if this is an un-recoverable exception.
435 * If yes, then stay on emergency stack and panic.
436 */
437 andi. r11,r12,MSR_RI
438 bne 2f
439 1: mfspr r11,SPRN_SRR0
440 LOAD_HANDLER(r10,unrecover_mce)
441 mtspr SPRN_SRR0,r10
442 ld r10,PACAKMSR(r13)
443 /*
444 * We are going down. But there are chances that we might get hit by
445 * another MCE during panic path and we may run into unstable state
446 * with no way out. Hence, turn ME bit off while going down, so that
447 * when another MCE is hit during panic path, system will checkstop
448 * and hypervisor will get restarted cleanly by SP.
449 */
450 li r3,MSR_ME
451 andc r10,r10,r3 /* Turn off MSR_ME */
452 mtspr SPRN_SRR1,r10
453 rfid
454 b .
455 2:
456 /*
457 * Check if we have successfully handled/recovered from error, if not
458 * then stay on emergency stack and panic.
459 */
460 ld r3,RESULT(r1) /* Load result */
461 cmpdi r3,0 /* see if we handled MCE successfully */
462
463 beq 1b /* if !handled then panic */
464 /*
465 * Return from MC interrupt.
466 * Queue up the MCE event so that we can log it later, while
467 * returning from kernel or opal call.
468 */
469 bl machine_check_queue_event
470 MACHINE_CHECK_HANDLER_WINDUP
471 rfid
472 9:
473 /* Deliver the machine check to host kernel in V mode. */
474 MACHINE_CHECK_HANDLER_WINDUP
475 b machine_check_pSeries
476
477 EXC_COMMON_BEGIN(unrecover_mce)
478 /* Invoke machine_check_exception to print MCE event and panic. */
479 addi r3,r1,STACK_FRAME_OVERHEAD
480 bl machine_check_exception
481 /*
482 * We will not reach here. Even if we did, there is no way out. Call
483 * unrecoverable_exception and die.
484 */
485 1: addi r3,r1,STACK_FRAME_OVERHEAD
486 bl unrecoverable_exception
487 b 1b
488
489
490 EXC_REAL(data_access, 0x300, 0x380)
491 EXC_VIRT(data_access, 0x4300, 0x4380, 0x300)
492 TRAMP_KVM_SKIP(PACA_EXGEN, 0x300)
493
494 EXC_COMMON_BEGIN(data_access_common)
495 /*
496 * Here r13 points to the paca, r9 contains the saved CR,
497 * SRR0 and SRR1 are saved in r11 and r12,
498 * r9 - r13 are saved in paca->exgen.
499 */
500 mfspr r10,SPRN_DAR
501 std r10,PACA_EXGEN+EX_DAR(r13)
502 mfspr r10,SPRN_DSISR
503 stw r10,PACA_EXGEN+EX_DSISR(r13)
504 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
505 RECONCILE_IRQ_STATE(r10, r11)
506 ld r12,_MSR(r1)
507 ld r3,PACA_EXGEN+EX_DAR(r13)
508 lwz r4,PACA_EXGEN+EX_DSISR(r13)
509 li r5,0x300
510 std r3,_DAR(r1)
511 std r4,_DSISR(r1)
512 BEGIN_MMU_FTR_SECTION
513 b do_hash_page /* Try to handle as hpte fault */
514 MMU_FTR_SECTION_ELSE
515 b handle_page_fault
516 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
517
518
519 EXC_REAL_BEGIN(data_access_slb, 0x380, 0x400)
520 SET_SCRATCH0(r13)
521 EXCEPTION_PROLOG_0(PACA_EXSLB)
522 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
523 std r3,PACA_EXSLB+EX_R3(r13)
524 mfspr r3,SPRN_DAR
525 mfspr r12,SPRN_SRR1
526 crset 4*cr6+eq
527 #ifndef CONFIG_RELOCATABLE
528 b slb_miss_realmode
529 #else
530 /*
531 * We can't just use a direct branch to slb_miss_realmode
532 * because the distance from here to there depends on where
533 * the kernel ends up being put.
534 */
535 mfctr r11
536 LOAD_HANDLER(r10, slb_miss_realmode)
537 mtctr r10
538 bctr
539 #endif
540 EXC_REAL_END(data_access_slb, 0x380, 0x400)
541
542 EXC_VIRT_BEGIN(data_access_slb, 0x4380, 0x4400)
543 SET_SCRATCH0(r13)
544 EXCEPTION_PROLOG_0(PACA_EXSLB)
545 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
546 std r3,PACA_EXSLB+EX_R3(r13)
547 mfspr r3,SPRN_DAR
548 mfspr r12,SPRN_SRR1
549 crset 4*cr6+eq
550 #ifndef CONFIG_RELOCATABLE
551 b slb_miss_realmode
552 #else
553 /*
554 * We can't just use a direct branch to slb_miss_realmode
555 * because the distance from here to there depends on where
556 * the kernel ends up being put.
557 */
558 mfctr r11
559 LOAD_HANDLER(r10, slb_miss_realmode)
560 mtctr r10
561 bctr
562 #endif
563 EXC_VIRT_END(data_access_slb, 0x4380, 0x4400)
564 TRAMP_KVM_SKIP(PACA_EXSLB, 0x380)
565
566
567 EXC_REAL(instruction_access, 0x400, 0x480)
568 EXC_VIRT(instruction_access, 0x4400, 0x4480, 0x400)
569 TRAMP_KVM(PACA_EXGEN, 0x400)
570
571 EXC_COMMON_BEGIN(instruction_access_common)
572 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
573 RECONCILE_IRQ_STATE(r10, r11)
574 ld r12,_MSR(r1)
575 ld r3,_NIP(r1)
576 andis. r4,r12,0x5820
577 li r5,0x400
578 std r3,_DAR(r1)
579 std r4,_DSISR(r1)
580 BEGIN_MMU_FTR_SECTION
581 b do_hash_page /* Try to handle as hpte fault */
582 MMU_FTR_SECTION_ELSE
583 b handle_page_fault
584 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX)
585
586
587 EXC_REAL_BEGIN(instruction_access_slb, 0x480, 0x500)
588 SET_SCRATCH0(r13)
589 EXCEPTION_PROLOG_0(PACA_EXSLB)
590 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
591 std r3,PACA_EXSLB+EX_R3(r13)
592 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
593 mfspr r12,SPRN_SRR1
594 crclr 4*cr6+eq
595 #ifndef CONFIG_RELOCATABLE
596 b slb_miss_realmode
597 #else
598 mfctr r11
599 LOAD_HANDLER(r10, slb_miss_realmode)
600 mtctr r10
601 bctr
602 #endif
603 EXC_REAL_END(instruction_access_slb, 0x480, 0x500)
604
605 EXC_VIRT_BEGIN(instruction_access_slb, 0x4480, 0x4500)
606 SET_SCRATCH0(r13)
607 EXCEPTION_PROLOG_0(PACA_EXSLB)
608 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
609 std r3,PACA_EXSLB+EX_R3(r13)
610 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
611 mfspr r12,SPRN_SRR1
612 crclr 4*cr6+eq
613 #ifndef CONFIG_RELOCATABLE
614 b slb_miss_realmode
615 #else
616 mfctr r11
617 LOAD_HANDLER(r10, slb_miss_realmode)
618 mtctr r10
619 bctr
620 #endif
621 EXC_VIRT_END(instruction_access_slb, 0x4480, 0x4500)
622 TRAMP_KVM(PACA_EXSLB, 0x480)
623
624
625 /* This handler is used by both 0x380 and 0x480 slb miss interrupts */
626 EXC_COMMON_BEGIN(slb_miss_realmode)
627 /*
628 * r13 points to the PACA, r9 contains the saved CR,
629 * r12 contain the saved SRR1, SRR0 is still ready for return
630 * r3 has the faulting address
631 * r9 - r13 are saved in paca->exslb.
632 * r3 is saved in paca->slb_r3
633 * cr6.eq is set for a D-SLB miss, clear for a I-SLB miss
634 * We assume we aren't going to take any exceptions during this
635 * procedure.
636 */
637 mflr r10
638 #ifdef CONFIG_RELOCATABLE
639 mtctr r11
640 #endif
641
642 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
643 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
644 std r3,PACA_EXSLB+EX_DAR(r13)
645
646 crset 4*cr0+eq
647 #ifdef CONFIG_PPC_STD_MMU_64
648 BEGIN_MMU_FTR_SECTION
649 bl slb_allocate_realmode
650 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
651 #endif
652
653 ld r10,PACA_EXSLB+EX_LR(r13)
654 ld r3,PACA_EXSLB+EX_R3(r13)
655 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
656 mtlr r10
657
658 beq 8f /* if bad address, make full stack frame */
659
660 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
661 beq- 2f
662
663 /* All done -- return from exception. */
664
665 .machine push
666 .machine "power4"
667 mtcrf 0x80,r9
668 mtcrf 0x02,r9 /* I/D indication is in cr6 */
669 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
670 .machine pop
671
672 RESTORE_PPR_PACA(PACA_EXSLB, r9)
673 ld r9,PACA_EXSLB+EX_R9(r13)
674 ld r10,PACA_EXSLB+EX_R10(r13)
675 ld r11,PACA_EXSLB+EX_R11(r13)
676 ld r12,PACA_EXSLB+EX_R12(r13)
677 ld r13,PACA_EXSLB+EX_R13(r13)
678 rfid
679 b . /* prevent speculative execution */
680
681 2: mfspr r11,SPRN_SRR0
682 LOAD_HANDLER(r10,unrecov_slb)
683 mtspr SPRN_SRR0,r10
684 ld r10,PACAKMSR(r13)
685 mtspr SPRN_SRR1,r10
686 rfid
687 b .
688
689 8: mfspr r11,SPRN_SRR0
690 LOAD_HANDLER(r10,bad_addr_slb)
691 mtspr SPRN_SRR0,r10
692 ld r10,PACAKMSR(r13)
693 mtspr SPRN_SRR1,r10
694 rfid
695 b .
696
697 EXC_COMMON_BEGIN(unrecov_slb)
698 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
699 RECONCILE_IRQ_STATE(r10, r11)
700 bl save_nvgprs
701 1: addi r3,r1,STACK_FRAME_OVERHEAD
702 bl unrecoverable_exception
703 b 1b
704
705 EXC_COMMON_BEGIN(bad_addr_slb)
706 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXSLB)
707 RECONCILE_IRQ_STATE(r10, r11)
708 ld r3, PACA_EXSLB+EX_DAR(r13)
709 std r3, _DAR(r1)
710 beq cr6, 2f
711 li r10, 0x480 /* fix trap number for I-SLB miss */
712 std r10, _TRAP(r1)
713 2: bl save_nvgprs
714 addi r3, r1, STACK_FRAME_OVERHEAD
715 bl slb_miss_bad_addr
716 b ret_from_except
717
718 EXC_REAL_BEGIN(hardware_interrupt, 0x500, 0x600)
719 .globl hardware_interrupt_hv;
720 hardware_interrupt_hv:
721 BEGIN_FTR_SECTION
722 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
723 EXC_HV, SOFTEN_TEST_HV)
724 FTR_SECTION_ELSE
725 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt_common,
726 EXC_STD, SOFTEN_TEST_PR)
727 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
728 EXC_REAL_END(hardware_interrupt, 0x500, 0x600)
729
730 EXC_VIRT_BEGIN(hardware_interrupt, 0x4500, 0x4600)
731 .globl hardware_interrupt_relon_hv;
732 hardware_interrupt_relon_hv:
733 BEGIN_FTR_SECTION
734 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_HV, SOFTEN_TEST_HV)
735 FTR_SECTION_ELSE
736 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt_common, EXC_STD, SOFTEN_TEST_PR)
737 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
738 EXC_VIRT_END(hardware_interrupt, 0x4500, 0x4600)
739
740 TRAMP_KVM(PACA_EXGEN, 0x500)
741 TRAMP_KVM_HV(PACA_EXGEN, 0x500)
742 EXC_COMMON_ASYNC(hardware_interrupt_common, 0x500, do_IRQ)
743
744
745 EXC_REAL(alignment, 0x600, 0x700)
746 EXC_VIRT(alignment, 0x4600, 0x4700, 0x600)
747 TRAMP_KVM(PACA_EXGEN, 0x600)
748 EXC_COMMON_BEGIN(alignment_common)
749 mfspr r10,SPRN_DAR
750 std r10,PACA_EXGEN+EX_DAR(r13)
751 mfspr r10,SPRN_DSISR
752 stw r10,PACA_EXGEN+EX_DSISR(r13)
753 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
754 ld r3,PACA_EXGEN+EX_DAR(r13)
755 lwz r4,PACA_EXGEN+EX_DSISR(r13)
756 std r3,_DAR(r1)
757 std r4,_DSISR(r1)
758 bl save_nvgprs
759 RECONCILE_IRQ_STATE(r10, r11)
760 addi r3,r1,STACK_FRAME_OVERHEAD
761 bl alignment_exception
762 b ret_from_except
763
764
765 EXC_REAL(program_check, 0x700, 0x800)
766 EXC_VIRT(program_check, 0x4700, 0x4800, 0x700)
767 TRAMP_KVM(PACA_EXGEN, 0x700)
768 EXC_COMMON_BEGIN(program_check_common)
769 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
770 bl save_nvgprs
771 RECONCILE_IRQ_STATE(r10, r11)
772 addi r3,r1,STACK_FRAME_OVERHEAD
773 bl program_check_exception
774 b ret_from_except
775
776
777 EXC_REAL(fp_unavailable, 0x800, 0x900)
778 EXC_VIRT(fp_unavailable, 0x4800, 0x4900, 0x800)
779 TRAMP_KVM(PACA_EXGEN, 0x800)
780 EXC_COMMON_BEGIN(fp_unavailable_common)
781 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
782 bne 1f /* if from user, just load it up */
783 bl save_nvgprs
784 RECONCILE_IRQ_STATE(r10, r11)
785 addi r3,r1,STACK_FRAME_OVERHEAD
786 bl kernel_fp_unavailable_exception
787 BUG_OPCODE
788 1:
789 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
790 BEGIN_FTR_SECTION
791 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
792 * transaction), go do TM stuff
793 */
794 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
795 bne- 2f
796 END_FTR_SECTION_IFSET(CPU_FTR_TM)
797 #endif
798 bl load_up_fpu
799 b fast_exception_return
800 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
801 2: /* User process was in a transaction */
802 bl save_nvgprs
803 RECONCILE_IRQ_STATE(r10, r11)
804 addi r3,r1,STACK_FRAME_OVERHEAD
805 bl fp_unavailable_tm
806 b ret_from_except
807 #endif
808
809
810 EXC_REAL_MASKABLE(decrementer, 0x900, 0x980)
811 EXC_VIRT_MASKABLE(decrementer, 0x4900, 0x4980, 0x900)
812 TRAMP_KVM(PACA_EXGEN, 0x900)
813 EXC_COMMON_ASYNC(decrementer_common, 0x900, timer_interrupt)
814
815
816 EXC_REAL_HV(hdecrementer, 0x980, 0xa00)
817 EXC_VIRT_HV(hdecrementer, 0x4980, 0x4a00, 0x980)
818 TRAMP_KVM_HV(PACA_EXGEN, 0x980)
819 EXC_COMMON(hdecrementer_common, 0x980, hdec_interrupt)
820
821
822 EXC_REAL_MASKABLE(doorbell_super, 0xa00, 0xb00)
823 EXC_VIRT_MASKABLE(doorbell_super, 0x4a00, 0x4b00, 0xa00)
824 TRAMP_KVM(PACA_EXGEN, 0xa00)
825 #ifdef CONFIG_PPC_DOORBELL
826 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, doorbell_exception)
827 #else
828 EXC_COMMON_ASYNC(doorbell_super_common, 0xa00, unknown_exception)
829 #endif
830
831
832 EXC_REAL(trap_0b, 0xb00, 0xc00)
833 EXC_VIRT(trap_0b, 0x4b00, 0x4c00, 0xb00)
834 TRAMP_KVM(PACA_EXGEN, 0xb00)
835 EXC_COMMON(trap_0b_common, 0xb00, unknown_exception)
836
837 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
838 /*
839 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
840 * that support it) before changing to HMT_MEDIUM. That allows the KVM
841 * code to save that value into the guest state (it is the guest's PPR
842 * value). Otherwise just change to HMT_MEDIUM as userspace has
843 * already saved the PPR.
844 */
845 #define SYSCALL_KVMTEST \
846 SET_SCRATCH0(r13); \
847 GET_PACA(r13); \
848 std r9,PACA_EXGEN+EX_R9(r13); \
849 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
850 HMT_MEDIUM; \
851 std r10,PACA_EXGEN+EX_R10(r13); \
852 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR); \
853 mfcr r9; \
854 KVMTEST_PR(0xc00); \
855 GET_SCRATCH0(r13)
856
857 #else
858 #define SYSCALL_KVMTEST \
859 HMT_MEDIUM
860 #endif
861
862 #define LOAD_SYSCALL_HANDLER(reg) \
863 __LOAD_HANDLER(reg, system_call_common)
864
865 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
866 #define SYSCALL_PSERIES_1 \
867 BEGIN_FTR_SECTION \
868 cmpdi r0,0x1ebe ; \
869 beq- 1f ; \
870 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
871 mr r9,r13 ; \
872 GET_PACA(r13) ; \
873 mfspr r11,SPRN_SRR0 ; \
874 0:
875
876 #define SYSCALL_PSERIES_2_RFID \
877 mfspr r12,SPRN_SRR1 ; \
878 LOAD_SYSCALL_HANDLER(r10) ; \
879 mtspr SPRN_SRR0,r10 ; \
880 ld r10,PACAKMSR(r13) ; \
881 mtspr SPRN_SRR1,r10 ; \
882 rfid ; \
883 b . ; /* prevent speculative execution */
884
885 #define SYSCALL_PSERIES_3 \
886 /* Fast LE/BE switch system call */ \
887 1: mfspr r12,SPRN_SRR1 ; \
888 xori r12,r12,MSR_LE ; \
889 mtspr SPRN_SRR1,r12 ; \
890 rfid ; /* return to userspace */ \
891 b . ; /* prevent speculative execution */
892
893 #if defined(CONFIG_RELOCATABLE)
894 /*
895 * We can't branch directly so we do it via the CTR which
896 * is volatile across system calls.
897 */
898 #define SYSCALL_PSERIES_2_DIRECT \
899 LOAD_SYSCALL_HANDLER(r12) ; \
900 mtctr r12 ; \
901 mfspr r12,SPRN_SRR1 ; \
902 li r10,MSR_RI ; \
903 mtmsrd r10,1 ; \
904 bctr ;
905 #else
906 /* We can branch directly */
907 #define SYSCALL_PSERIES_2_DIRECT \
908 mfspr r12,SPRN_SRR1 ; \
909 li r10,MSR_RI ; \
910 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
911 b system_call_common ;
912 #endif
913
914 EXC_REAL_BEGIN(system_call, 0xc00, 0xd00)
915 SYSCALL_KVMTEST
916 SYSCALL_PSERIES_1
917 SYSCALL_PSERIES_2_RFID
918 SYSCALL_PSERIES_3
919 EXC_REAL_END(system_call, 0xc00, 0xd00)
920
921 EXC_VIRT_BEGIN(system_call, 0x4c00, 0x4d00)
922 SYSCALL_KVMTEST
923 SYSCALL_PSERIES_1
924 SYSCALL_PSERIES_2_DIRECT
925 SYSCALL_PSERIES_3
926 EXC_VIRT_END(system_call, 0x4c00, 0x4d00)
927
928 TRAMP_KVM(PACA_EXGEN, 0xc00)
929
930
931 EXC_REAL(single_step, 0xd00, 0xe00)
932 EXC_VIRT(single_step, 0x4d00, 0x4e00, 0xd00)
933 TRAMP_KVM(PACA_EXGEN, 0xd00)
934 EXC_COMMON(single_step_common, 0xd00, single_step_exception)
935
936 EXC_REAL_OOL_HV(h_data_storage, 0xe00, 0xe20)
937 EXC_VIRT_OOL_HV(h_data_storage, 0x4e00, 0x4e20, 0xe00)
938 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0xe00)
939 EXC_COMMON_BEGIN(h_data_storage_common)
940 mfspr r10,SPRN_HDAR
941 std r10,PACA_EXGEN+EX_DAR(r13)
942 mfspr r10,SPRN_HDSISR
943 stw r10,PACA_EXGEN+EX_DSISR(r13)
944 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
945 bl save_nvgprs
946 RECONCILE_IRQ_STATE(r10, r11)
947 addi r3,r1,STACK_FRAME_OVERHEAD
948 bl unknown_exception
949 b ret_from_except
950
951
952 EXC_REAL_OOL_HV(h_instr_storage, 0xe20, 0xe40)
953 EXC_VIRT_OOL_HV(h_instr_storage, 0x4e20, 0x4e40, 0xe20)
954 TRAMP_KVM_HV(PACA_EXGEN, 0xe20)
955 EXC_COMMON(h_instr_storage_common, 0xe20, unknown_exception)
956
957
958 EXC_REAL_OOL_HV(emulation_assist, 0xe40, 0xe60)
959 EXC_VIRT_OOL_HV(emulation_assist, 0x4e40, 0x4e60, 0xe40)
960 TRAMP_KVM_HV(PACA_EXGEN, 0xe40)
961 EXC_COMMON(emulation_assist_common, 0xe40, emulation_assist_interrupt)
962
963
964 /*
965 * hmi_exception trampoline is a special case. It jumps to hmi_exception_early
966 * first, and then eventaully from there to the trampoline to get into virtual
967 * mode.
968 */
969 __EXC_REAL_OOL_HV_DIRECT(hmi_exception, 0xe60, 0xe80, hmi_exception_early)
970 __TRAMP_REAL_REAL_OOL_MASKABLE_HV(hmi_exception, 0xe60)
971 EXC_VIRT_NONE(0x4e60, 0x4e80)
972 TRAMP_KVM_HV(PACA_EXGEN, 0xe60)
973 TRAMP_REAL_BEGIN(hmi_exception_early)
974 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, 0xe60)
975 mr r10,r1 /* Save r1 */
976 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
977 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
978 std r9,_CCR(r1) /* save CR in stackframe */
979 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
980 std r11,_NIP(r1) /* save HSRR0 in stackframe */
981 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
982 std r12,_MSR(r1) /* save SRR1 in stackframe */
983 std r10,0(r1) /* make stack chain pointer */
984 std r0,GPR0(r1) /* save r0 in stackframe */
985 std r10,GPR1(r1) /* save r1 in stackframe */
986 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
987 EXCEPTION_PROLOG_COMMON_3(0xe60)
988 addi r3,r1,STACK_FRAME_OVERHEAD
989 BRANCH_LINK_TO_FAR(hmi_exception_realmode) /* Function call ABI */
990 /* Windup the stack. */
991 /* Move original HSRR0 and HSRR1 into the respective regs */
992 ld r9,_MSR(r1)
993 mtspr SPRN_HSRR1,r9
994 ld r3,_NIP(r1)
995 mtspr SPRN_HSRR0,r3
996 ld r9,_CTR(r1)
997 mtctr r9
998 ld r9,_XER(r1)
999 mtxer r9
1000 ld r9,_LINK(r1)
1001 mtlr r9
1002 REST_GPR(0, r1)
1003 REST_8GPRS(2, r1)
1004 REST_GPR(10, r1)
1005 ld r11,_CCR(r1)
1006 mtcr r11
1007 REST_GPR(11, r1)
1008 REST_2GPRS(12, r1)
1009 /* restore original r1. */
1010 ld r1,GPR1(r1)
1011
1012 /*
1013 * Go to virtual mode and pull the HMI event information from
1014 * firmware.
1015 */
1016 .globl hmi_exception_after_realmode
1017 hmi_exception_after_realmode:
1018 SET_SCRATCH0(r13)
1019 EXCEPTION_PROLOG_0(PACA_EXGEN)
1020 b tramp_real_hmi_exception
1021
1022 EXC_COMMON_ASYNC(hmi_exception_common, 0xe60, handle_hmi_exception)
1023
1024
1025 EXC_REAL_OOL_MASKABLE_HV(h_doorbell, 0xe80, 0xea0)
1026 EXC_VIRT_OOL_MASKABLE_HV(h_doorbell, 0x4e80, 0x4ea0, 0xe80)
1027 TRAMP_KVM_HV(PACA_EXGEN, 0xe80)
1028 #ifdef CONFIG_PPC_DOORBELL
1029 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, doorbell_exception)
1030 #else
1031 EXC_COMMON_ASYNC(h_doorbell_common, 0xe80, unknown_exception)
1032 #endif
1033
1034
1035 EXC_REAL_OOL_MASKABLE_HV(h_virt_irq, 0xea0, 0xec0)
1036 EXC_VIRT_OOL_MASKABLE_HV(h_virt_irq, 0x4ea0, 0x4ec0, 0xea0)
1037 TRAMP_KVM_HV(PACA_EXGEN, 0xea0)
1038 EXC_COMMON_ASYNC(h_virt_irq_common, 0xea0, do_IRQ)
1039
1040
1041 EXC_REAL_NONE(0xec0, 0xf00)
1042 EXC_VIRT_NONE(0x4ec0, 0x4f00)
1043
1044
1045 EXC_REAL_OOL(performance_monitor, 0xf00, 0xf20)
1046 EXC_VIRT_OOL(performance_monitor, 0x4f00, 0x4f20, 0xf00)
1047 TRAMP_KVM(PACA_EXGEN, 0xf00)
1048 EXC_COMMON_ASYNC(performance_monitor_common, 0xf00, performance_monitor_exception)
1049
1050
1051 EXC_REAL_OOL(altivec_unavailable, 0xf20, 0xf40)
1052 EXC_VIRT_OOL(altivec_unavailable, 0x4f20, 0x4f40, 0xf20)
1053 TRAMP_KVM(PACA_EXGEN, 0xf20)
1054 EXC_COMMON_BEGIN(altivec_unavailable_common)
1055 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1056 #ifdef CONFIG_ALTIVEC
1057 BEGIN_FTR_SECTION
1058 beq 1f
1059 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1060 BEGIN_FTR_SECTION_NESTED(69)
1061 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1062 * transaction), go do TM stuff
1063 */
1064 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1065 bne- 2f
1066 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1067 #endif
1068 bl load_up_altivec
1069 b fast_exception_return
1070 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1071 2: /* User process was in a transaction */
1072 bl save_nvgprs
1073 RECONCILE_IRQ_STATE(r10, r11)
1074 addi r3,r1,STACK_FRAME_OVERHEAD
1075 bl altivec_unavailable_tm
1076 b ret_from_except
1077 #endif
1078 1:
1079 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1080 #endif
1081 bl save_nvgprs
1082 RECONCILE_IRQ_STATE(r10, r11)
1083 addi r3,r1,STACK_FRAME_OVERHEAD
1084 bl altivec_unavailable_exception
1085 b ret_from_except
1086
1087
1088 EXC_REAL_OOL(vsx_unavailable, 0xf40, 0xf60)
1089 EXC_VIRT_OOL(vsx_unavailable, 0x4f40, 0x4f60, 0xf40)
1090 TRAMP_KVM(PACA_EXGEN, 0xf40)
1091 EXC_COMMON_BEGIN(vsx_unavailable_common)
1092 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1093 #ifdef CONFIG_VSX
1094 BEGIN_FTR_SECTION
1095 beq 1f
1096 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1097 BEGIN_FTR_SECTION_NESTED(69)
1098 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1099 * transaction), go do TM stuff
1100 */
1101 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1102 bne- 2f
1103 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1104 #endif
1105 b load_up_vsx
1106 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1107 2: /* User process was in a transaction */
1108 bl save_nvgprs
1109 RECONCILE_IRQ_STATE(r10, r11)
1110 addi r3,r1,STACK_FRAME_OVERHEAD
1111 bl vsx_unavailable_tm
1112 b ret_from_except
1113 #endif
1114 1:
1115 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1116 #endif
1117 bl save_nvgprs
1118 RECONCILE_IRQ_STATE(r10, r11)
1119 addi r3,r1,STACK_FRAME_OVERHEAD
1120 bl vsx_unavailable_exception
1121 b ret_from_except
1122
1123
1124 EXC_REAL_OOL(facility_unavailable, 0xf60, 0xf80)
1125 EXC_VIRT_OOL(facility_unavailable, 0x4f60, 0x4f80, 0xf60)
1126 TRAMP_KVM(PACA_EXGEN, 0xf60)
1127 EXC_COMMON(facility_unavailable_common, 0xf60, facility_unavailable_exception)
1128
1129
1130 EXC_REAL_OOL_HV(h_facility_unavailable, 0xf80, 0xfa0)
1131 EXC_VIRT_OOL_HV(h_facility_unavailable, 0x4f80, 0x4fa0, 0xf80)
1132 TRAMP_KVM_HV(PACA_EXGEN, 0xf80)
1133 EXC_COMMON(h_facility_unavailable_common, 0xf80, facility_unavailable_exception)
1134
1135
1136 EXC_REAL_NONE(0xfa0, 0x1200)
1137 EXC_VIRT_NONE(0x4fa0, 0x5200)
1138
1139 #ifdef CONFIG_CBE_RAS
1140 EXC_REAL_HV(cbe_system_error, 0x1200, 0x1300)
1141 EXC_VIRT_NONE(0x5200, 0x5300)
1142 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1200)
1143 EXC_COMMON(cbe_system_error_common, 0x1200, cbe_system_error_exception)
1144 #else /* CONFIG_CBE_RAS */
1145 EXC_REAL_NONE(0x1200, 0x1300)
1146 EXC_VIRT_NONE(0x5200, 0x5300)
1147 #endif
1148
1149
1150 EXC_REAL(instruction_breakpoint, 0x1300, 0x1400)
1151 EXC_VIRT(instruction_breakpoint, 0x5300, 0x5400, 0x1300)
1152 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1300)
1153 EXC_COMMON(instruction_breakpoint_common, 0x1300, instruction_breakpoint_exception)
1154
1155 EXC_REAL_NONE(0x1400, 0x1500)
1156 EXC_VIRT_NONE(0x5400, 0x5500)
1157
1158 EXC_REAL_BEGIN(denorm_exception_hv, 0x1500, 0x1600)
1159 mtspr SPRN_SPRG_HSCRATCH0,r13
1160 EXCEPTION_PROLOG_0(PACA_EXGEN)
1161 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
1162
1163 #ifdef CONFIG_PPC_DENORMALISATION
1164 mfspr r10,SPRN_HSRR1
1165 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
1166 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
1167 addi r11,r11,-4 /* HSRR0 is next instruction */
1168 bne+ denorm_assist
1169 #endif
1170
1171 KVMTEST_PR(0x1500)
1172 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
1173 EXC_REAL_END(denorm_exception_hv, 0x1500, 0x1600)
1174
1175 #ifdef CONFIG_PPC_DENORMALISATION
1176 EXC_VIRT_BEGIN(denorm_exception, 0x5500, 0x5600)
1177 b exc_real_0x1500_denorm_exception_hv
1178 EXC_VIRT_END(denorm_exception, 0x5500, 0x5600)
1179 #else
1180 EXC_VIRT_NONE(0x5500, 0x5600)
1181 #endif
1182
1183 TRAMP_KVM_SKIP(PACA_EXGEN, 0x1500)
1184
1185 #ifdef CONFIG_PPC_DENORMALISATION
1186 TRAMP_REAL_BEGIN(denorm_assist)
1187 BEGIN_FTR_SECTION
1188 /*
1189 * To denormalise we need to move a copy of the register to itself.
1190 * For POWER6 do that here for all FP regs.
1191 */
1192 mfmsr r10
1193 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
1194 xori r10,r10,(MSR_FE0|MSR_FE1)
1195 mtmsrd r10
1196 sync
1197
1198 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
1199 #define FMR4(n) FMR2(n) ; FMR2(n+2)
1200 #define FMR8(n) FMR4(n) ; FMR4(n+4)
1201 #define FMR16(n) FMR8(n) ; FMR8(n+8)
1202 #define FMR32(n) FMR16(n) ; FMR16(n+16)
1203 FMR32(0)
1204
1205 FTR_SECTION_ELSE
1206 /*
1207 * To denormalise we need to move a copy of the register to itself.
1208 * For POWER7 do that here for the first 32 VSX registers only.
1209 */
1210 mfmsr r10
1211 oris r10,r10,MSR_VSX@h
1212 mtmsrd r10
1213 sync
1214
1215 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
1216 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
1217 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
1218 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
1219 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
1220 XVCPSGNDP32(0)
1221
1222 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
1223
1224 BEGIN_FTR_SECTION
1225 b denorm_done
1226 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
1227 /*
1228 * To denormalise we need to move a copy of the register to itself.
1229 * For POWER8 we need to do that for all 64 VSX registers
1230 */
1231 XVCPSGNDP32(32)
1232 denorm_done:
1233 mtspr SPRN_HSRR0,r11
1234 mtcrf 0x80,r9
1235 ld r9,PACA_EXGEN+EX_R9(r13)
1236 RESTORE_PPR_PACA(PACA_EXGEN, r10)
1237 BEGIN_FTR_SECTION
1238 ld r10,PACA_EXGEN+EX_CFAR(r13)
1239 mtspr SPRN_CFAR,r10
1240 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1241 ld r10,PACA_EXGEN+EX_R10(r13)
1242 ld r11,PACA_EXGEN+EX_R11(r13)
1243 ld r12,PACA_EXGEN+EX_R12(r13)
1244 ld r13,PACA_EXGEN+EX_R13(r13)
1245 HRFID
1246 b .
1247 #endif
1248
1249 EXC_COMMON_HV(denorm_common, 0x1500, unknown_exception)
1250
1251
1252 #ifdef CONFIG_CBE_RAS
1253 EXC_REAL_HV(cbe_maintenance, 0x1600, 0x1700)
1254 EXC_VIRT_NONE(0x5600, 0x5700)
1255 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1600)
1256 EXC_COMMON(cbe_maintenance_common, 0x1600, cbe_maintenance_exception)
1257 #else /* CONFIG_CBE_RAS */
1258 EXC_REAL_NONE(0x1600, 0x1700)
1259 EXC_VIRT_NONE(0x5600, 0x5700)
1260 #endif
1261
1262
1263 EXC_REAL(altivec_assist, 0x1700, 0x1800)
1264 EXC_VIRT(altivec_assist, 0x5700, 0x5800, 0x1700)
1265 TRAMP_KVM(PACA_EXGEN, 0x1700)
1266 #ifdef CONFIG_ALTIVEC
1267 EXC_COMMON(altivec_assist_common, 0x1700, altivec_assist_exception)
1268 #else
1269 EXC_COMMON(altivec_assist_common, 0x1700, unknown_exception)
1270 #endif
1271
1272
1273 #ifdef CONFIG_CBE_RAS
1274 EXC_REAL_HV(cbe_thermal, 0x1800, 0x1900)
1275 EXC_VIRT_NONE(0x5800, 0x5900)
1276 TRAMP_KVM_HV_SKIP(PACA_EXGEN, 0x1800)
1277 EXC_COMMON(cbe_thermal_common, 0x1800, cbe_thermal_exception)
1278 #else /* CONFIG_CBE_RAS */
1279 EXC_REAL_NONE(0x1800, 0x1900)
1280 EXC_VIRT_NONE(0x5800, 0x5900)
1281 #endif
1282
1283
1284 /*
1285 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
1286 * - If it was a decrementer interrupt, we bump the dec to max and and return.
1287 * - If it was a doorbell we return immediately since doorbells are edge
1288 * triggered and won't automatically refire.
1289 * - If it was a HMI we return immediately since we handled it in realmode
1290 * and it won't refire.
1291 * - else we hard disable and return.
1292 * This is called with r10 containing the value to OR to the paca field.
1293 */
1294 #define MASKED_INTERRUPT(_H) \
1295 masked_##_H##interrupt: \
1296 std r11,PACA_EXGEN+EX_R11(r13); \
1297 lbz r11,PACAIRQHAPPENED(r13); \
1298 or r11,r11,r10; \
1299 stb r11,PACAIRQHAPPENED(r13); \
1300 cmpwi r10,PACA_IRQ_DEC; \
1301 bne 1f; \
1302 lis r10,0x7fff; \
1303 ori r10,r10,0xffff; \
1304 mtspr SPRN_DEC,r10; \
1305 b 2f; \
1306 1: cmpwi r10,PACA_IRQ_DBELL; \
1307 beq 2f; \
1308 cmpwi r10,PACA_IRQ_HMI; \
1309 beq 2f; \
1310 mfspr r10,SPRN_##_H##SRR1; \
1311 rldicl r10,r10,48,1; /* clear MSR_EE */ \
1312 rotldi r10,r10,16; \
1313 mtspr SPRN_##_H##SRR1,r10; \
1314 2: mtcrf 0x80,r9; \
1315 ld r9,PACA_EXGEN+EX_R9(r13); \
1316 ld r10,PACA_EXGEN+EX_R10(r13); \
1317 ld r11,PACA_EXGEN+EX_R11(r13); \
1318 GET_SCRATCH0(r13); \
1319 ##_H##rfid; \
1320 b .
1321
1322 /*
1323 * Real mode exceptions actually use this too, but alternate
1324 * instruction code patches (which end up in the common .text area)
1325 * cannot reach these if they are put there.
1326 */
1327 USE_FIXED_SECTION(virt_trampolines)
1328 MASKED_INTERRUPT()
1329 MASKED_INTERRUPT(H)
1330
1331 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1332 TRAMP_REAL_BEGIN(kvmppc_skip_interrupt)
1333 /*
1334 * Here all GPRs are unchanged from when the interrupt happened
1335 * except for r13, which is saved in SPRG_SCRATCH0.
1336 */
1337 mfspr r13, SPRN_SRR0
1338 addi r13, r13, 4
1339 mtspr SPRN_SRR0, r13
1340 GET_SCRATCH0(r13)
1341 rfid
1342 b .
1343
1344 TRAMP_REAL_BEGIN(kvmppc_skip_Hinterrupt)
1345 /*
1346 * Here all GPRs are unchanged from when the interrupt happened
1347 * except for r13, which is saved in SPRG_SCRATCH0.
1348 */
1349 mfspr r13, SPRN_HSRR0
1350 addi r13, r13, 4
1351 mtspr SPRN_HSRR0, r13
1352 GET_SCRATCH0(r13)
1353 hrfid
1354 b .
1355 #endif
1356
1357 /*
1358 * Ensure that any handlers that get invoked from the exception prologs
1359 * above are below the first 64KB (0x10000) of the kernel image because
1360 * the prologs assemble the addresses of these handlers using the
1361 * LOAD_HANDLER macro, which uses an ori instruction.
1362 */
1363
1364 /*** Common interrupt handlers ***/
1365
1366
1367 /*
1368 * Relocation-on interrupts: A subset of the interrupts can be delivered
1369 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
1370 * it. Addresses are the same as the original interrupt addresses, but
1371 * offset by 0xc000000000004000.
1372 * It's impossible to receive interrupts below 0x300 via this mechanism.
1373 * KVM: None of these traps are from the guest ; anything that escalated
1374 * to HV=1 from HV=0 is delivered via real mode handlers.
1375 */
1376
1377 /*
1378 * This uses the standard macro, since the original 0x300 vector
1379 * only has extra guff for STAB-based processors -- which never
1380 * come here.
1381 */
1382
1383 EXC_COMMON_BEGIN(ppc64_runlatch_on_trampoline)
1384 b __ppc64_runlatch_on
1385
1386 USE_FIXED_SECTION(virt_trampolines)
1387 /*
1388 * The __end_interrupts marker must be past the out-of-line (OOL)
1389 * handlers, so that they are copied to real address 0x100 when running
1390 * a relocatable kernel. This ensures they can be reached from the short
1391 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1392 * directly, without using LOAD_HANDLER().
1393 */
1394 .align 7
1395 .globl __end_interrupts
1396 __end_interrupts:
1397 DEFINE_FIXED_SYMBOL(__end_interrupts)
1398
1399 #ifdef CONFIG_PPC_970_NAP
1400 EXC_COMMON_BEGIN(power4_fixup_nap)
1401 andc r9,r9,r10
1402 std r9,TI_LOCAL_FLAGS(r11)
1403 ld r10,_LINK(r1) /* make idle task do the */
1404 std r10,_NIP(r1) /* equivalent of a blr */
1405 blr
1406 #endif
1407
1408 CLOSE_FIXED_SECTION(real_vectors);
1409 CLOSE_FIXED_SECTION(real_trampolines);
1410 CLOSE_FIXED_SECTION(virt_vectors);
1411 CLOSE_FIXED_SECTION(virt_trampolines);
1412
1413 USE_TEXT_SECTION()
1414
1415 /*
1416 * Hash table stuff
1417 */
1418 .balign IFETCH_ALIGN_BYTES
1419 do_hash_page:
1420 #ifdef CONFIG_PPC_STD_MMU_64
1421 andis. r0,r4,0xa410 /* weird error? */
1422 bne- handle_page_fault /* if not, try to insert a HPTE */
1423 andis. r0,r4,DSISR_DABRMATCH@h
1424 bne- handle_dabr_fault
1425 CURRENT_THREAD_INFO(r11, r1)
1426 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1427 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1428 bne 77f /* then don't call hash_page now */
1429
1430 /*
1431 * r3 contains the faulting address
1432 * r4 msr
1433 * r5 contains the trap number
1434 * r6 contains dsisr
1435 *
1436 * at return r3 = 0 for success, 1 for page fault, negative for error
1437 */
1438 mr r4,r12
1439 ld r6,_DSISR(r1)
1440 bl __hash_page /* build HPTE if possible */
1441 cmpdi r3,0 /* see if __hash_page succeeded */
1442
1443 /* Success */
1444 beq fast_exc_return_irq /* Return from exception on success */
1445
1446 /* Error */
1447 blt- 13f
1448 #endif /* CONFIG_PPC_STD_MMU_64 */
1449
1450 /* Here we have a page fault that hash_page can't handle. */
1451 handle_page_fault:
1452 11: ld r4,_DAR(r1)
1453 ld r5,_DSISR(r1)
1454 addi r3,r1,STACK_FRAME_OVERHEAD
1455 bl do_page_fault
1456 cmpdi r3,0
1457 beq+ 12f
1458 bl save_nvgprs
1459 mr r5,r3
1460 addi r3,r1,STACK_FRAME_OVERHEAD
1461 lwz r4,_DAR(r1)
1462 bl bad_page_fault
1463 b ret_from_except
1464
1465 /* We have a data breakpoint exception - handle it */
1466 handle_dabr_fault:
1467 bl save_nvgprs
1468 ld r4,_DAR(r1)
1469 ld r5,_DSISR(r1)
1470 addi r3,r1,STACK_FRAME_OVERHEAD
1471 bl do_break
1472 12: b ret_from_except_lite
1473
1474
1475 #ifdef CONFIG_PPC_STD_MMU_64
1476 /* We have a page fault that hash_page could handle but HV refused
1477 * the PTE insertion
1478 */
1479 13: bl save_nvgprs
1480 mr r5,r3
1481 addi r3,r1,STACK_FRAME_OVERHEAD
1482 ld r4,_DAR(r1)
1483 bl low_hash_fault
1484 b ret_from_except
1485 #endif
1486
1487 /*
1488 * We come here as a result of a DSI at a point where we don't want
1489 * to call hash_page, such as when we are accessing memory (possibly
1490 * user memory) inside a PMU interrupt that occurred while interrupts
1491 * were soft-disabled. We want to invoke the exception handler for
1492 * the access, or panic if there isn't a handler.
1493 */
1494 77: bl save_nvgprs
1495 mr r4,r3
1496 addi r3,r1,STACK_FRAME_OVERHEAD
1497 li r5,SIGSEGV
1498 bl bad_page_fault
1499 b ret_from_except
1500
1501 /*
1502 * Here we have detected that the kernel stack pointer is bad.
1503 * R9 contains the saved CR, r13 points to the paca,
1504 * r10 contains the (bad) kernel stack pointer,
1505 * r11 and r12 contain the saved SRR0 and SRR1.
1506 * We switch to using an emergency stack, save the registers there,
1507 * and call kernel_bad_stack(), which panics.
1508 */
1509 bad_stack:
1510 ld r1,PACAEMERGSP(r13)
1511 subi r1,r1,64+INT_FRAME_SIZE
1512 std r9,_CCR(r1)
1513 std r10,GPR1(r1)
1514 std r11,_NIP(r1)
1515 std r12,_MSR(r1)
1516 mfspr r11,SPRN_DAR
1517 mfspr r12,SPRN_DSISR
1518 std r11,_DAR(r1)
1519 std r12,_DSISR(r1)
1520 mflr r10
1521 mfctr r11
1522 mfxer r12
1523 std r10,_LINK(r1)
1524 std r11,_CTR(r1)
1525 std r12,_XER(r1)
1526 SAVE_GPR(0,r1)
1527 SAVE_GPR(2,r1)
1528 ld r10,EX_R3(r3)
1529 std r10,GPR3(r1)
1530 SAVE_GPR(4,r1)
1531 SAVE_4GPRS(5,r1)
1532 ld r9,EX_R9(r3)
1533 ld r10,EX_R10(r3)
1534 SAVE_2GPRS(9,r1)
1535 ld r9,EX_R11(r3)
1536 ld r10,EX_R12(r3)
1537 ld r11,EX_R13(r3)
1538 std r9,GPR11(r1)
1539 std r10,GPR12(r1)
1540 std r11,GPR13(r1)
1541 BEGIN_FTR_SECTION
1542 ld r10,EX_CFAR(r3)
1543 std r10,ORIG_GPR3(r1)
1544 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1545 SAVE_8GPRS(14,r1)
1546 SAVE_10GPRS(22,r1)
1547 lhz r12,PACA_TRAP_SAVE(r13)
1548 std r12,_TRAP(r1)
1549 addi r11,r1,INT_FRAME_SIZE
1550 std r11,0(r1)
1551 li r12,0
1552 std r12,0(r11)
1553 ld r2,PACATOC(r13)
1554 ld r11,exception_marker@toc(r2)
1555 std r12,RESULT(r1)
1556 std r11,STACK_FRAME_OVERHEAD-16(r1)
1557 1: addi r3,r1,STACK_FRAME_OVERHEAD
1558 bl kernel_bad_stack
1559 b 1b
1560
1561 /*
1562 * Called from arch_local_irq_enable when an interrupt needs
1563 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
1564 * which kind of interrupt. MSR:EE is already off. We generate a
1565 * stackframe like if a real interrupt had happened.
1566 *
1567 * Note: While MSR:EE is off, we need to make sure that _MSR
1568 * in the generated frame has EE set to 1 or the exception
1569 * handler will not properly re-enable them.
1570 */
1571 _GLOBAL(__replay_interrupt)
1572 /* We are going to jump to the exception common code which
1573 * will retrieve various register values from the PACA which
1574 * we don't give a damn about, so we don't bother storing them.
1575 */
1576 mfmsr r12
1577 mflr r11
1578 mfcr r9
1579 ori r12,r12,MSR_EE
1580 cmpwi r3,0x900
1581 beq decrementer_common
1582 cmpwi r3,0x500
1583 beq hardware_interrupt_common
1584 BEGIN_FTR_SECTION
1585 cmpwi r3,0xe80
1586 beq h_doorbell_common
1587 cmpwi r3,0xea0
1588 beq h_virt_irq_common
1589 cmpwi r3,0xe60
1590 beq hmi_exception_common
1591 FTR_SECTION_ELSE
1592 cmpwi r3,0xa00
1593 beq doorbell_super_common
1594 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
1595 blr
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