2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include "assigned-dev.h"
34 #include <linux/clocksource.h>
35 #include <linux/interrupt.h>
36 #include <linux/kvm.h>
38 #include <linux/vmalloc.h>
39 #include <linux/export.h>
40 #include <linux/moduleparam.h>
41 #include <linux/mman.h>
42 #include <linux/highmem.h>
43 #include <linux/iommu.h>
44 #include <linux/intel-iommu.h>
45 #include <linux/cpufreq.h>
46 #include <linux/user-return-notifier.h>
47 #include <linux/srcu.h>
48 #include <linux/slab.h>
49 #include <linux/perf_event.h>
50 #include <linux/uaccess.h>
51 #include <linux/hash.h>
52 #include <linux/pci.h>
53 #include <linux/timekeeper_internal.h>
54 #include <linux/pvclock_gtod.h>
55 #include <linux/kvm_irqfd.h>
56 #include <linux/irqbypass.h>
57 #include <trace/events/kvm.h>
59 #include <asm/debugreg.h>
63 #include <linux/kernel_stat.h>
64 #include <asm/fpu/internal.h> /* Ugh! */
65 #include <asm/pvclock.h>
66 #include <asm/div64.h>
67 #include <asm/irq_remapping.h>
69 #define CREATE_TRACE_POINTS
72 #define MAX_IO_MSRS 256
73 #define KVM_MAX_MCE_BANKS 32
74 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
75 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
77 #define emul_to_vcpu(ctxt) \
78 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
81 * - enable syscall per default because its emulated by KVM
82 * - enable LME and LMA per default on 64 bit KVM
86 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
88 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
91 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
92 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
94 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
95 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
97 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
98 static void process_nmi(struct kvm_vcpu
*vcpu
);
99 static void enter_smm(struct kvm_vcpu
*vcpu
);
100 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
102 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
103 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
105 static bool __read_mostly ignore_msrs
= 0;
106 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
108 unsigned int min_timer_period_us
= 500;
109 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
111 static bool __read_mostly kvmclock_periodic_sync
= true;
112 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
114 bool __read_mostly kvm_has_tsc_control
;
115 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
116 u32 __read_mostly kvm_max_guest_tsc_khz
;
117 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
118 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
119 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
120 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
121 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
122 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
123 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
125 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
126 static u32 __read_mostly tsc_tolerance_ppm
= 250;
127 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
129 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
130 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
131 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
133 static bool __read_mostly vector_hashing
= true;
134 module_param(vector_hashing
, bool, S_IRUGO
);
136 static bool __read_mostly backwards_tsc_observed
= false;
138 #define KVM_NR_SHARED_MSRS 16
140 struct kvm_shared_msrs_global
{
142 u32 msrs
[KVM_NR_SHARED_MSRS
];
145 struct kvm_shared_msrs
{
146 struct user_return_notifier urn
;
148 struct kvm_shared_msr_values
{
151 } values
[KVM_NR_SHARED_MSRS
];
154 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
155 static struct kvm_shared_msrs __percpu
*shared_msrs
;
157 struct kvm_stats_debugfs_item debugfs_entries
[] = {
158 { "pf_fixed", VCPU_STAT(pf_fixed
) },
159 { "pf_guest", VCPU_STAT(pf_guest
) },
160 { "tlb_flush", VCPU_STAT(tlb_flush
) },
161 { "invlpg", VCPU_STAT(invlpg
) },
162 { "exits", VCPU_STAT(exits
) },
163 { "io_exits", VCPU_STAT(io_exits
) },
164 { "mmio_exits", VCPU_STAT(mmio_exits
) },
165 { "signal_exits", VCPU_STAT(signal_exits
) },
166 { "irq_window", VCPU_STAT(irq_window_exits
) },
167 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
168 { "halt_exits", VCPU_STAT(halt_exits
) },
169 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
170 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
171 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
172 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
173 { "hypercalls", VCPU_STAT(hypercalls
) },
174 { "request_irq", VCPU_STAT(request_irq_exits
) },
175 { "irq_exits", VCPU_STAT(irq_exits
) },
176 { "host_state_reload", VCPU_STAT(host_state_reload
) },
177 { "efer_reload", VCPU_STAT(efer_reload
) },
178 { "fpu_reload", VCPU_STAT(fpu_reload
) },
179 { "insn_emulation", VCPU_STAT(insn_emulation
) },
180 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
181 { "irq_injections", VCPU_STAT(irq_injections
) },
182 { "nmi_injections", VCPU_STAT(nmi_injections
) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
187 { "mmu_flooded", VM_STAT(mmu_flooded
) },
188 { "mmu_recycled", VM_STAT(mmu_recycled
) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
190 { "mmu_unsync", VM_STAT(mmu_unsync
) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
192 { "largepages", VM_STAT(lpages
) },
196 u64 __read_mostly host_xcr0
;
198 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
200 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
203 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
204 vcpu
->arch
.apf
.gfns
[i
] = ~0;
207 static void kvm_on_user_return(struct user_return_notifier
*urn
)
210 struct kvm_shared_msrs
*locals
211 = container_of(urn
, struct kvm_shared_msrs
, urn
);
212 struct kvm_shared_msr_values
*values
;
216 * Disabling irqs at this point since the following code could be
217 * interrupted and executed through kvm_arch_hardware_disable()
219 local_irq_save(flags
);
220 if (locals
->registered
) {
221 locals
->registered
= false;
222 user_return_notifier_unregister(urn
);
224 local_irq_restore(flags
);
225 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
226 values
= &locals
->values
[slot
];
227 if (values
->host
!= values
->curr
) {
228 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
229 values
->curr
= values
->host
;
234 static void shared_msr_update(unsigned slot
, u32 msr
)
237 unsigned int cpu
= smp_processor_id();
238 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
240 /* only read, and nobody should modify it at this time,
241 * so don't need lock */
242 if (slot
>= shared_msrs_global
.nr
) {
243 printk(KERN_ERR
"kvm: invalid MSR slot!");
246 rdmsrl_safe(msr
, &value
);
247 smsr
->values
[slot
].host
= value
;
248 smsr
->values
[slot
].curr
= value
;
251 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
253 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
254 shared_msrs_global
.msrs
[slot
] = msr
;
255 if (slot
>= shared_msrs_global
.nr
)
256 shared_msrs_global
.nr
= slot
+ 1;
258 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
260 static void kvm_shared_msr_cpu_online(void)
264 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
265 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
268 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
270 unsigned int cpu
= smp_processor_id();
271 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
274 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
276 smsr
->values
[slot
].curr
= value
;
277 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
281 if (!smsr
->registered
) {
282 smsr
->urn
.on_user_return
= kvm_on_user_return
;
283 user_return_notifier_register(&smsr
->urn
);
284 smsr
->registered
= true;
288 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
290 static void drop_user_return_notifiers(void)
292 unsigned int cpu
= smp_processor_id();
293 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
295 if (smsr
->registered
)
296 kvm_on_user_return(&smsr
->urn
);
299 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
301 return vcpu
->arch
.apic_base
;
303 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
305 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
307 u64 old_state
= vcpu
->arch
.apic_base
&
308 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
309 u64 new_state
= msr_info
->data
&
310 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
311 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) |
312 0x2ff | (guest_cpuid_has_x2apic(vcpu
) ? 0 : X2APIC_ENABLE
);
314 if (!msr_info
->host_initiated
&&
315 ((msr_info
->data
& reserved_bits
) != 0 ||
316 new_state
== X2APIC_ENABLE
||
317 (new_state
== MSR_IA32_APICBASE_ENABLE
&&
318 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
319 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
323 kvm_lapic_set_base(vcpu
, msr_info
->data
);
326 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
328 asmlinkage __visible
void kvm_spurious_fault(void)
330 /* Fault while not rebooting. We want the trace. */
333 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
335 #define EXCPT_BENIGN 0
336 #define EXCPT_CONTRIBUTORY 1
339 static int exception_class(int vector
)
349 return EXCPT_CONTRIBUTORY
;
356 #define EXCPT_FAULT 0
358 #define EXCPT_ABORT 2
359 #define EXCPT_INTERRUPT 3
361 static int exception_type(int vector
)
365 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
366 return EXCPT_INTERRUPT
;
370 /* #DB is trap, as instruction watchpoints are handled elsewhere */
371 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
374 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
377 /* Reserved exceptions will result in fault */
381 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
382 unsigned nr
, bool has_error
, u32 error_code
,
388 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
390 if (!vcpu
->arch
.exception
.pending
) {
392 if (has_error
&& !is_protmode(vcpu
))
394 vcpu
->arch
.exception
.pending
= true;
395 vcpu
->arch
.exception
.has_error_code
= has_error
;
396 vcpu
->arch
.exception
.nr
= nr
;
397 vcpu
->arch
.exception
.error_code
= error_code
;
398 vcpu
->arch
.exception
.reinject
= reinject
;
402 /* to check exception */
403 prev_nr
= vcpu
->arch
.exception
.nr
;
404 if (prev_nr
== DF_VECTOR
) {
405 /* triple fault -> shutdown */
406 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
409 class1
= exception_class(prev_nr
);
410 class2
= exception_class(nr
);
411 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
412 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
413 /* generate double fault per SDM Table 5-5 */
414 vcpu
->arch
.exception
.pending
= true;
415 vcpu
->arch
.exception
.has_error_code
= true;
416 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
417 vcpu
->arch
.exception
.error_code
= 0;
419 /* replace previous exception with a new one in a hope
420 that instruction re-execution will regenerate lost
425 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
427 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
429 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
431 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
433 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
435 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
437 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
440 kvm_inject_gp(vcpu
, 0);
442 return kvm_skip_emulated_instruction(vcpu
);
446 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
448 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
450 ++vcpu
->stat
.pf_guest
;
451 vcpu
->arch
.cr2
= fault
->address
;
452 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
454 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
456 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
458 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
459 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
461 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
463 return fault
->nested_page_fault
;
466 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
468 atomic_inc(&vcpu
->arch
.nmi_queued
);
469 kvm_make_request(KVM_REQ_NMI
, vcpu
);
471 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
473 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
475 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
477 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
479 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
481 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
483 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
486 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
487 * a #GP and return false.
489 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
491 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
493 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
496 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
498 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
500 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
503 kvm_queue_exception(vcpu
, UD_VECTOR
);
506 EXPORT_SYMBOL_GPL(kvm_require_dr
);
509 * This function will be used to read from the physical memory of the currently
510 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
511 * can read from guest physical or from the guest's guest physical memory.
513 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
514 gfn_t ngfn
, void *data
, int offset
, int len
,
517 struct x86_exception exception
;
521 ngpa
= gfn_to_gpa(ngfn
);
522 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
523 if (real_gfn
== UNMAPPED_GVA
)
526 real_gfn
= gpa_to_gfn(real_gfn
);
528 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
530 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
532 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
533 void *data
, int offset
, int len
, u32 access
)
535 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
536 data
, offset
, len
, access
);
540 * Load the pae pdptrs. Return true is they are all valid.
542 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
544 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
545 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
548 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
550 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
551 offset
* sizeof(u64
), sizeof(pdpte
),
552 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
557 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
558 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
560 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
567 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
568 __set_bit(VCPU_EXREG_PDPTR
,
569 (unsigned long *)&vcpu
->arch
.regs_avail
);
570 __set_bit(VCPU_EXREG_PDPTR
,
571 (unsigned long *)&vcpu
->arch
.regs_dirty
);
576 EXPORT_SYMBOL_GPL(load_pdptrs
);
578 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
580 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
586 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
589 if (!test_bit(VCPU_EXREG_PDPTR
,
590 (unsigned long *)&vcpu
->arch
.regs_avail
))
593 gfn
= (kvm_read_cr3(vcpu
) & ~31u) >> PAGE_SHIFT
;
594 offset
= (kvm_read_cr3(vcpu
) & ~31u) & (PAGE_SIZE
- 1);
595 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
596 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
599 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
604 EXPORT_SYMBOL_GPL(pdptrs_changed
);
606 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
608 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
609 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
614 if (cr0
& 0xffffffff00000000UL
)
618 cr0
&= ~CR0_RESERVED_BITS
;
620 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
623 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
626 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
628 if ((vcpu
->arch
.efer
& EFER_LME
)) {
633 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
638 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
643 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
646 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
648 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
649 kvm_clear_async_pf_completion_queue(vcpu
);
650 kvm_async_pf_hash_reset(vcpu
);
653 if ((cr0
^ old_cr0
) & update_bits
)
654 kvm_mmu_reset_context(vcpu
);
656 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
657 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
658 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
659 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
663 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
665 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
667 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
669 EXPORT_SYMBOL_GPL(kvm_lmsw
);
671 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
673 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
674 !vcpu
->guest_xcr0_loaded
) {
675 /* kvm_set_xcr() also depends on this */
676 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
677 vcpu
->guest_xcr0_loaded
= 1;
681 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
683 if (vcpu
->guest_xcr0_loaded
) {
684 if (vcpu
->arch
.xcr0
!= host_xcr0
)
685 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
686 vcpu
->guest_xcr0_loaded
= 0;
690 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
693 u64 old_xcr0
= vcpu
->arch
.xcr0
;
696 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
697 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
699 if (!(xcr0
& XFEATURE_MASK_FP
))
701 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
705 * Do not allow the guest to set bits that we do not support
706 * saving. However, xcr0 bit 0 is always set, even if the
707 * emulated CPU does not support XSAVE (see fx_init).
709 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
710 if (xcr0
& ~valid_bits
)
713 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
714 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
717 if (xcr0
& XFEATURE_MASK_AVX512
) {
718 if (!(xcr0
& XFEATURE_MASK_YMM
))
720 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
723 vcpu
->arch
.xcr0
= xcr0
;
725 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
726 kvm_update_cpuid(vcpu
);
730 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
732 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
733 __kvm_set_xcr(vcpu
, index
, xcr
)) {
734 kvm_inject_gp(vcpu
, 0);
739 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
741 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
743 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
744 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
745 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
747 if (cr4
& CR4_RESERVED_BITS
)
750 if (!guest_cpuid_has_xsave(vcpu
) && (cr4
& X86_CR4_OSXSAVE
))
753 if (!guest_cpuid_has_smep(vcpu
) && (cr4
& X86_CR4_SMEP
))
756 if (!guest_cpuid_has_smap(vcpu
) && (cr4
& X86_CR4_SMAP
))
759 if (!guest_cpuid_has_fsgsbase(vcpu
) && (cr4
& X86_CR4_FSGSBASE
))
762 if (!guest_cpuid_has_pku(vcpu
) && (cr4
& X86_CR4_PKE
))
765 if (is_long_mode(vcpu
)) {
766 if (!(cr4
& X86_CR4_PAE
))
768 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
769 && ((cr4
^ old_cr4
) & pdptr_bits
)
770 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
774 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
775 if (!guest_cpuid_has_pcid(vcpu
))
778 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
779 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
783 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
786 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
787 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
788 kvm_mmu_reset_context(vcpu
);
790 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
791 kvm_update_cpuid(vcpu
);
795 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
797 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
800 cr3
&= ~CR3_PCID_INVD
;
803 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
804 kvm_mmu_sync_roots(vcpu
);
805 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
809 if (is_long_mode(vcpu
)) {
810 if (cr3
& CR3_L_MODE_RESERVED_BITS
)
812 } else if (is_pae(vcpu
) && is_paging(vcpu
) &&
813 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
816 vcpu
->arch
.cr3
= cr3
;
817 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
818 kvm_mmu_new_cr3(vcpu
);
821 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
823 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
825 if (cr8
& CR8_RESERVED_BITS
)
827 if (lapic_in_kernel(vcpu
))
828 kvm_lapic_set_tpr(vcpu
, cr8
);
830 vcpu
->arch
.cr8
= cr8
;
833 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
835 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
837 if (lapic_in_kernel(vcpu
))
838 return kvm_lapic_get_cr8(vcpu
);
840 return vcpu
->arch
.cr8
;
842 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
844 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
848 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
849 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
850 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
851 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
855 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
857 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
858 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
861 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
865 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
866 dr7
= vcpu
->arch
.guest_debug_dr7
;
868 dr7
= vcpu
->arch
.dr7
;
869 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
870 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
871 if (dr7
& DR7_BP_EN_MASK
)
872 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
875 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
877 u64 fixed
= DR6_FIXED_1
;
879 if (!guest_cpuid_has_rtm(vcpu
))
884 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
888 vcpu
->arch
.db
[dr
] = val
;
889 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
890 vcpu
->arch
.eff_db
[dr
] = val
;
895 if (val
& 0xffffffff00000000ULL
)
897 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
898 kvm_update_dr6(vcpu
);
903 if (val
& 0xffffffff00000000ULL
)
905 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
906 kvm_update_dr7(vcpu
);
913 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
915 if (__kvm_set_dr(vcpu
, dr
, val
)) {
916 kvm_inject_gp(vcpu
, 0);
921 EXPORT_SYMBOL_GPL(kvm_set_dr
);
923 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
927 *val
= vcpu
->arch
.db
[dr
];
932 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
933 *val
= vcpu
->arch
.dr6
;
935 *val
= kvm_x86_ops
->get_dr6(vcpu
);
940 *val
= vcpu
->arch
.dr7
;
945 EXPORT_SYMBOL_GPL(kvm_get_dr
);
947 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
949 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
953 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
956 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
957 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
960 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
963 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
964 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
966 * This list is modified at module load time to reflect the
967 * capabilities of the host cpu. This capabilities test skips MSRs that are
968 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
969 * may depend on host virtualization features rather than host cpu features.
972 static u32 msrs_to_save
[] = {
973 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
976 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
978 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
979 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
982 static unsigned num_msrs_to_save
;
984 static u32 emulated_msrs
[] = {
985 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
986 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
987 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
988 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
989 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
990 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
993 HV_X64_MSR_VP_RUNTIME
,
995 HV_X64_MSR_STIMER0_CONFIG
,
996 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1000 MSR_IA32_TSCDEADLINE
,
1001 MSR_IA32_MISC_ENABLE
,
1002 MSR_IA32_MCG_STATUS
,
1004 MSR_IA32_MCG_EXT_CTL
,
1008 static unsigned num_emulated_msrs
;
1010 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1012 if (efer
& efer_reserved_bits
)
1015 if (efer
& EFER_FFXSR
) {
1016 struct kvm_cpuid_entry2
*feat
;
1018 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1019 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
)))
1023 if (efer
& EFER_SVME
) {
1024 struct kvm_cpuid_entry2
*feat
;
1026 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
1027 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
)))
1033 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1035 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1037 u64 old_efer
= vcpu
->arch
.efer
;
1039 if (!kvm_valid_efer(vcpu
, efer
))
1043 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1047 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1049 kvm_x86_ops
->set_efer(vcpu
, efer
);
1051 /* Update reserved bits */
1052 if ((efer
^ old_efer
) & EFER_NX
)
1053 kvm_mmu_reset_context(vcpu
);
1058 void kvm_enable_efer_bits(u64 mask
)
1060 efer_reserved_bits
&= ~mask
;
1062 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1065 * Writes msr value into into the appropriate "register".
1066 * Returns 0 on success, non-0 otherwise.
1067 * Assumes vcpu_load() was already called.
1069 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1071 switch (msr
->index
) {
1074 case MSR_KERNEL_GS_BASE
:
1077 if (is_noncanonical_address(msr
->data
))
1080 case MSR_IA32_SYSENTER_EIP
:
1081 case MSR_IA32_SYSENTER_ESP
:
1083 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1084 * non-canonical address is written on Intel but not on
1085 * AMD (which ignores the top 32-bits, because it does
1086 * not implement 64-bit SYSENTER).
1088 * 64-bit code should hence be able to write a non-canonical
1089 * value on AMD. Making the address canonical ensures that
1090 * vmentry does not fail on Intel after writing a non-canonical
1091 * value, and that something deterministic happens if the guest
1092 * invokes 64-bit SYSENTER.
1094 msr
->data
= get_canonical(msr
->data
);
1096 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1098 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1101 * Adapt set_msr() to msr_io()'s calling convention
1103 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1105 struct msr_data msr
;
1109 msr
.host_initiated
= true;
1110 r
= kvm_get_msr(vcpu
, &msr
);
1118 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1120 struct msr_data msr
;
1124 msr
.host_initiated
= true;
1125 return kvm_set_msr(vcpu
, &msr
);
1128 #ifdef CONFIG_X86_64
1129 struct pvclock_gtod_data
{
1132 struct { /* extract of a clocksource struct */
1144 static struct pvclock_gtod_data pvclock_gtod_data
;
1146 static void update_pvclock_gtod(struct timekeeper
*tk
)
1148 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1151 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1153 write_seqcount_begin(&vdata
->seq
);
1155 /* copy pvclock gtod data */
1156 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1157 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1158 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1159 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1160 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1162 vdata
->boot_ns
= boot_ns
;
1163 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1165 write_seqcount_end(&vdata
->seq
);
1169 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1172 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1173 * vcpu_enter_guest. This function is only called from
1174 * the physical CPU that is running vcpu.
1176 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1179 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1183 struct pvclock_wall_clock wc
;
1184 struct timespec64 boot
;
1189 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1194 ++version
; /* first time write, random junk */
1198 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1202 * The guest calculates current wall clock time by adding
1203 * system time (updated by kvm_guest_time_update below) to the
1204 * wall clock specified here. guest system time equals host
1205 * system time for us, thus we must fill in host boot time here.
1207 getboottime64(&boot
);
1209 if (kvm
->arch
.kvmclock_offset
) {
1210 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1211 boot
= timespec64_sub(boot
, ts
);
1213 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1214 wc
.nsec
= boot
.tv_nsec
;
1215 wc
.version
= version
;
1217 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1220 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1223 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1225 do_shl32_div32(dividend
, divisor
);
1229 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1230 s8
*pshift
, u32
*pmultiplier
)
1238 scaled64
= scaled_hz
;
1239 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1244 tps32
= (uint32_t)tps64
;
1245 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1246 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1254 *pmultiplier
= div_frac(scaled64
, tps32
);
1256 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1257 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1260 #ifdef CONFIG_X86_64
1261 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1264 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1265 static unsigned long max_tsc_khz
;
1267 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1269 u64 v
= (u64
)khz
* (1000000 + ppm
);
1274 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1278 /* Guest TSC same frequency as host TSC? */
1280 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1284 /* TSC scaling supported? */
1285 if (!kvm_has_tsc_control
) {
1286 if (user_tsc_khz
> tsc_khz
) {
1287 vcpu
->arch
.tsc_catchup
= 1;
1288 vcpu
->arch
.tsc_always_catchup
= 1;
1291 WARN(1, "user requested TSC rate below hardware speed\n");
1296 /* TSC scaling required - calculate ratio */
1297 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1298 user_tsc_khz
, tsc_khz
);
1300 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1301 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1306 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1310 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1312 u32 thresh_lo
, thresh_hi
;
1313 int use_scaling
= 0;
1315 /* tsc_khz can be zero if TSC calibration fails */
1316 if (user_tsc_khz
== 0) {
1317 /* set tsc_scaling_ratio to a safe value */
1318 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1322 /* Compute a scale to convert nanoseconds in TSC cycles */
1323 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1324 &vcpu
->arch
.virtual_tsc_shift
,
1325 &vcpu
->arch
.virtual_tsc_mult
);
1326 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1329 * Compute the variation in TSC rate which is acceptable
1330 * within the range of tolerance and decide if the
1331 * rate being applied is within that bounds of the hardware
1332 * rate. If so, no scaling or compensation need be done.
1334 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1335 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1336 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1337 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1340 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1343 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1345 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1346 vcpu
->arch
.virtual_tsc_mult
,
1347 vcpu
->arch
.virtual_tsc_shift
);
1348 tsc
+= vcpu
->arch
.this_tsc_write
;
1352 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1354 #ifdef CONFIG_X86_64
1356 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1357 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1359 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1360 atomic_read(&vcpu
->kvm
->online_vcpus
));
1363 * Once the masterclock is enabled, always perform request in
1364 * order to update it.
1366 * In order to enable masterclock, the host clocksource must be TSC
1367 * and the vcpus need to have matched TSCs. When that happens,
1368 * perform request to enable masterclock.
1370 if (ka
->use_master_clock
||
1371 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1372 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1374 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1375 atomic_read(&vcpu
->kvm
->online_vcpus
),
1376 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1380 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1382 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1383 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1387 * Multiply tsc by a fixed point number represented by ratio.
1389 * The most significant 64-N bits (mult) of ratio represent the
1390 * integral part of the fixed point number; the remaining N bits
1391 * (frac) represent the fractional part, ie. ratio represents a fixed
1392 * point number (mult + frac * 2^(-N)).
1394 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1396 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1398 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1401 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1404 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1406 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1407 _tsc
= __scale_tsc(ratio
, tsc
);
1411 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1413 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1417 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1419 return target_tsc
- tsc
;
1422 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1424 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1426 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1428 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1430 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1431 vcpu
->arch
.tsc_offset
= offset
;
1434 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1436 struct kvm
*kvm
= vcpu
->kvm
;
1437 u64 offset
, ns
, elapsed
;
1438 unsigned long flags
;
1441 bool already_matched
;
1442 u64 data
= msr
->data
;
1444 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1445 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1446 ns
= ktime_get_boot_ns();
1447 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1449 if (vcpu
->arch
.virtual_tsc_khz
) {
1452 /* n.b - signed multiplication and division required */
1453 usdiff
= data
- kvm
->arch
.last_tsc_write
;
1454 #ifdef CONFIG_X86_64
1455 usdiff
= (usdiff
* 1000) / vcpu
->arch
.virtual_tsc_khz
;
1457 /* do_div() only does unsigned */
1458 asm("1: idivl %[divisor]\n"
1459 "2: xor %%edx, %%edx\n"
1460 " movl $0, %[faulted]\n"
1462 ".section .fixup,\"ax\"\n"
1463 "4: movl $1, %[faulted]\n"
1467 _ASM_EXTABLE(1b
, 4b
)
1469 : "=A"(usdiff
), [faulted
] "=r" (faulted
)
1470 : "A"(usdiff
* 1000), [divisor
] "rm"(vcpu
->arch
.virtual_tsc_khz
));
1473 do_div(elapsed
, 1000);
1478 /* idivl overflow => difference is larger than USEC_PER_SEC */
1480 usdiff
= USEC_PER_SEC
;
1482 usdiff
= USEC_PER_SEC
; /* disable TSC match window below */
1485 * Special case: TSC write with a small delta (1 second) of virtual
1486 * cycle time against real time is interpreted as an attempt to
1487 * synchronize the CPU.
1489 * For a reliable TSC, we can match TSC offsets, and for an unstable
1490 * TSC, we add elapsed time in this computation. We could let the
1491 * compensation code attempt to catch up if we fall behind, but
1492 * it's better to try to match offsets from the beginning.
1494 if (usdiff
< USEC_PER_SEC
&&
1495 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1496 if (!check_tsc_unstable()) {
1497 offset
= kvm
->arch
.cur_tsc_offset
;
1498 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1500 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1502 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1503 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1506 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1509 * We split periods of matched TSC writes into generations.
1510 * For each generation, we track the original measured
1511 * nanosecond time, offset, and write, so if TSCs are in
1512 * sync, we can match exact offset, and if not, we can match
1513 * exact software computation in compute_guest_tsc()
1515 * These values are tracked in kvm->arch.cur_xxx variables.
1517 kvm
->arch
.cur_tsc_generation
++;
1518 kvm
->arch
.cur_tsc_nsec
= ns
;
1519 kvm
->arch
.cur_tsc_write
= data
;
1520 kvm
->arch
.cur_tsc_offset
= offset
;
1522 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1523 kvm
->arch
.cur_tsc_generation
, data
);
1527 * We also track th most recent recorded KHZ, write and time to
1528 * allow the matching interval to be extended at each write.
1530 kvm
->arch
.last_tsc_nsec
= ns
;
1531 kvm
->arch
.last_tsc_write
= data
;
1532 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1534 vcpu
->arch
.last_guest_tsc
= data
;
1536 /* Keep track of which generation this VCPU has synchronized to */
1537 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1538 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1539 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1541 if (guest_cpuid_has_tsc_adjust(vcpu
) && !msr
->host_initiated
)
1542 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1543 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1544 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1546 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1548 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1549 } else if (!already_matched
) {
1550 kvm
->arch
.nr_vcpus_matched_tsc
++;
1553 kvm_track_tsc_matching(vcpu
);
1554 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1557 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1559 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1562 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1565 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1567 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1568 WARN_ON(adjustment
< 0);
1569 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1570 adjust_tsc_offset_guest(vcpu
, adjustment
);
1573 #ifdef CONFIG_X86_64
1575 static u64
read_tsc(void)
1577 u64 ret
= (u64
)rdtsc_ordered();
1578 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1580 if (likely(ret
>= last
))
1584 * GCC likes to generate cmov here, but this branch is extremely
1585 * predictable (it's just a function of time and the likely is
1586 * very likely) and there's a data dependence, so force GCC
1587 * to generate a branch instead. I don't barrier() because
1588 * we don't actually need a barrier, and if this function
1589 * ever gets inlined it will generate worse code.
1595 static inline u64
vgettsc(u64
*cycle_now
)
1598 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1600 *cycle_now
= read_tsc();
1602 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1603 return v
* gtod
->clock
.mult
;
1606 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1608 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1614 seq
= read_seqcount_begin(>od
->seq
);
1615 mode
= gtod
->clock
.vclock_mode
;
1616 ns
= gtod
->nsec_base
;
1617 ns
+= vgettsc(cycle_now
);
1618 ns
>>= gtod
->clock
.shift
;
1619 ns
+= gtod
->boot_ns
;
1620 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1626 /* returns true if host is using tsc clocksource */
1627 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1629 /* checked again under seqlock below */
1630 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1633 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1639 * Assuming a stable TSC across physical CPUS, and a stable TSC
1640 * across virtual CPUs, the following condition is possible.
1641 * Each numbered line represents an event visible to both
1642 * CPUs at the next numbered event.
1644 * "timespecX" represents host monotonic time. "tscX" represents
1647 * VCPU0 on CPU0 | VCPU1 on CPU1
1649 * 1. read timespec0,tsc0
1650 * 2. | timespec1 = timespec0 + N
1652 * 3. transition to guest | transition to guest
1653 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1654 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1655 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1657 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1660 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1662 * - 0 < N - M => M < N
1664 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1665 * always the case (the difference between two distinct xtime instances
1666 * might be smaller then the difference between corresponding TSC reads,
1667 * when updating guest vcpus pvclock areas).
1669 * To avoid that problem, do not allow visibility of distinct
1670 * system_timestamp/tsc_timestamp values simultaneously: use a master
1671 * copy of host monotonic time values. Update that master copy
1674 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1678 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1680 #ifdef CONFIG_X86_64
1681 struct kvm_arch
*ka
= &kvm
->arch
;
1683 bool host_tsc_clocksource
, vcpus_matched
;
1685 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1686 atomic_read(&kvm
->online_vcpus
));
1689 * If the host uses TSC clock, then passthrough TSC as stable
1692 host_tsc_clocksource
= kvm_get_time_and_clockread(
1693 &ka
->master_kernel_ns
,
1694 &ka
->master_cycle_now
);
1696 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1697 && !backwards_tsc_observed
1698 && !ka
->boot_vcpu_runs_old_kvmclock
;
1700 if (ka
->use_master_clock
)
1701 atomic_set(&kvm_guest_has_master_clock
, 1);
1703 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1704 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1709 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1711 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1714 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1716 #ifdef CONFIG_X86_64
1718 struct kvm_vcpu
*vcpu
;
1719 struct kvm_arch
*ka
= &kvm
->arch
;
1721 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1722 kvm_make_mclock_inprogress_request(kvm
);
1723 /* no guest entries from this point */
1724 pvclock_update_vm_gtod_copy(kvm
);
1726 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1727 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1729 /* guest entries allowed */
1730 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1731 clear_bit(KVM_REQ_MCLOCK_INPROGRESS
, &vcpu
->requests
);
1733 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1737 static u64
__get_kvmclock_ns(struct kvm
*kvm
)
1739 struct kvm_arch
*ka
= &kvm
->arch
;
1740 struct pvclock_vcpu_time_info hv_clock
;
1742 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1743 if (!ka
->use_master_clock
) {
1744 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1745 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1748 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1749 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1750 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1752 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1753 &hv_clock
.tsc_shift
,
1754 &hv_clock
.tsc_to_system_mul
);
1755 return __pvclock_read_cycles(&hv_clock
, rdtsc());
1758 u64
get_kvmclock_ns(struct kvm
*kvm
)
1760 unsigned long flags
;
1763 local_irq_save(flags
);
1764 ns
= __get_kvmclock_ns(kvm
);
1765 local_irq_restore(flags
);
1770 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1772 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1773 struct pvclock_vcpu_time_info guest_hv_clock
;
1775 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1776 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1779 /* This VCPU is paused, but it's legal for a guest to read another
1780 * VCPU's kvmclock, so we really have to follow the specification where
1781 * it says that version is odd if data is being modified, and even after
1784 * Version field updates must be kept separate. This is because
1785 * kvm_write_guest_cached might use a "rep movs" instruction, and
1786 * writes within a string instruction are weakly ordered. So there
1787 * are three writes overall.
1789 * As a small optimization, only write the version field in the first
1790 * and third write. The vcpu->pv_time cache is still valid, because the
1791 * version field is the first in the struct.
1793 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1795 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1796 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1798 sizeof(vcpu
->hv_clock
.version
));
1802 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1803 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1805 if (vcpu
->pvclock_set_guest_stopped_request
) {
1806 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1807 vcpu
->pvclock_set_guest_stopped_request
= false;
1810 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1812 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1814 sizeof(vcpu
->hv_clock
));
1818 vcpu
->hv_clock
.version
++;
1819 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1821 sizeof(vcpu
->hv_clock
.version
));
1824 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1826 unsigned long flags
, tgt_tsc_khz
;
1827 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1828 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1830 u64 tsc_timestamp
, host_tsc
;
1832 bool use_master_clock
;
1838 * If the host uses TSC clock, then passthrough TSC as stable
1841 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1842 use_master_clock
= ka
->use_master_clock
;
1843 if (use_master_clock
) {
1844 host_tsc
= ka
->master_cycle_now
;
1845 kernel_ns
= ka
->master_kernel_ns
;
1847 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1849 /* Keep irq disabled to prevent changes to the clock */
1850 local_irq_save(flags
);
1851 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1852 if (unlikely(tgt_tsc_khz
== 0)) {
1853 local_irq_restore(flags
);
1854 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1857 if (!use_master_clock
) {
1859 kernel_ns
= ktime_get_boot_ns();
1862 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1865 * We may have to catch up the TSC to match elapsed wall clock
1866 * time for two reasons, even if kvmclock is used.
1867 * 1) CPU could have been running below the maximum TSC rate
1868 * 2) Broken TSC compensation resets the base at each VCPU
1869 * entry to avoid unknown leaps of TSC even when running
1870 * again on the same CPU. This may cause apparent elapsed
1871 * time to disappear, and the guest to stand still or run
1874 if (vcpu
->tsc_catchup
) {
1875 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1876 if (tsc
> tsc_timestamp
) {
1877 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1878 tsc_timestamp
= tsc
;
1882 local_irq_restore(flags
);
1884 /* With all the info we got, fill in the values */
1886 if (kvm_has_tsc_control
)
1887 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1889 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1890 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1891 &vcpu
->hv_clock
.tsc_shift
,
1892 &vcpu
->hv_clock
.tsc_to_system_mul
);
1893 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1896 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1897 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1898 vcpu
->last_guest_tsc
= tsc_timestamp
;
1900 /* If the host uses TSC clocksource, then it is stable */
1902 if (use_master_clock
)
1903 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1905 vcpu
->hv_clock
.flags
= pvclock_flags
;
1907 if (vcpu
->pv_time_enabled
)
1908 kvm_setup_pvclock_page(v
);
1909 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1910 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1915 * kvmclock updates which are isolated to a given vcpu, such as
1916 * vcpu->cpu migration, should not allow system_timestamp from
1917 * the rest of the vcpus to remain static. Otherwise ntp frequency
1918 * correction applies to one vcpu's system_timestamp but not
1921 * So in those cases, request a kvmclock update for all vcpus.
1922 * We need to rate-limit these requests though, as they can
1923 * considerably slow guests that have a large number of vcpus.
1924 * The time for a remote vcpu to update its kvmclock is bound
1925 * by the delay we use to rate-limit the updates.
1928 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1930 static void kvmclock_update_fn(struct work_struct
*work
)
1933 struct delayed_work
*dwork
= to_delayed_work(work
);
1934 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1935 kvmclock_update_work
);
1936 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1937 struct kvm_vcpu
*vcpu
;
1939 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1940 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1941 kvm_vcpu_kick(vcpu
);
1945 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1947 struct kvm
*kvm
= v
->kvm
;
1949 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1950 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1951 KVMCLOCK_UPDATE_DELAY
);
1954 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1956 static void kvmclock_sync_fn(struct work_struct
*work
)
1958 struct delayed_work
*dwork
= to_delayed_work(work
);
1959 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1960 kvmclock_sync_work
);
1961 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1963 if (!kvmclock_periodic_sync
)
1966 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1967 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1968 KVMCLOCK_SYNC_PERIOD
);
1971 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1973 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1974 unsigned bank_num
= mcg_cap
& 0xff;
1977 case MSR_IA32_MCG_STATUS
:
1978 vcpu
->arch
.mcg_status
= data
;
1980 case MSR_IA32_MCG_CTL
:
1981 if (!(mcg_cap
& MCG_CTL_P
))
1983 if (data
!= 0 && data
!= ~(u64
)0)
1985 vcpu
->arch
.mcg_ctl
= data
;
1988 if (msr
>= MSR_IA32_MC0_CTL
&&
1989 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
1990 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1991 /* only 0 or all 1s can be written to IA32_MCi_CTL
1992 * some Linux kernels though clear bit 10 in bank 4 to
1993 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1994 * this to avoid an uncatched #GP in the guest
1996 if ((offset
& 0x3) == 0 &&
1997 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
1999 vcpu
->arch
.mce_banks
[offset
] = data
;
2007 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2009 struct kvm
*kvm
= vcpu
->kvm
;
2010 int lm
= is_long_mode(vcpu
);
2011 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2012 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2013 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2014 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2015 u32 page_num
= data
& ~PAGE_MASK
;
2016 u64 page_addr
= data
& PAGE_MASK
;
2021 if (page_num
>= blob_size
)
2024 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2029 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2038 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2040 gpa_t gpa
= data
& ~0x3f;
2042 /* Bits 2:5 are reserved, Should be zero */
2046 vcpu
->arch
.apf
.msr_val
= data
;
2048 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2049 kvm_clear_async_pf_completion_queue(vcpu
);
2050 kvm_async_pf_hash_reset(vcpu
);
2054 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2058 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2059 kvm_async_pf_wakeup_all(vcpu
);
2063 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2065 vcpu
->arch
.pv_time_enabled
= false;
2068 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2070 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2073 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2074 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2077 vcpu
->arch
.st
.steal
.preempted
= 0;
2079 if (vcpu
->arch
.st
.steal
.version
& 1)
2080 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2082 vcpu
->arch
.st
.steal
.version
+= 1;
2084 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2085 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2089 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2090 vcpu
->arch
.st
.last_steal
;
2091 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2093 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2094 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2098 vcpu
->arch
.st
.steal
.version
+= 1;
2100 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2101 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2104 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2107 u32 msr
= msr_info
->index
;
2108 u64 data
= msr_info
->data
;
2111 case MSR_AMD64_NB_CFG
:
2112 case MSR_IA32_UCODE_REV
:
2113 case MSR_IA32_UCODE_WRITE
:
2114 case MSR_VM_HSAVE_PA
:
2115 case MSR_AMD64_PATCH_LOADER
:
2116 case MSR_AMD64_BU_CFG2
:
2120 return set_efer(vcpu
, data
);
2122 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2123 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2124 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2125 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2127 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2132 case MSR_FAM10H_MMIO_CONF_BASE
:
2134 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2139 case MSR_IA32_DEBUGCTLMSR
:
2141 /* We support the non-activated case already */
2143 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2144 /* Values other than LBR and BTF are vendor-specific,
2145 thus reserved and should throw a #GP */
2148 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2151 case 0x200 ... 0x2ff:
2152 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2153 case MSR_IA32_APICBASE
:
2154 return kvm_set_apic_base(vcpu
, msr_info
);
2155 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2156 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2157 case MSR_IA32_TSCDEADLINE
:
2158 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2160 case MSR_IA32_TSC_ADJUST
:
2161 if (guest_cpuid_has_tsc_adjust(vcpu
)) {
2162 if (!msr_info
->host_initiated
) {
2163 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2164 adjust_tsc_offset_guest(vcpu
, adj
);
2166 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2169 case MSR_IA32_MISC_ENABLE
:
2170 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2172 case MSR_IA32_SMBASE
:
2173 if (!msr_info
->host_initiated
)
2175 vcpu
->arch
.smbase
= data
;
2177 case MSR_KVM_WALL_CLOCK_NEW
:
2178 case MSR_KVM_WALL_CLOCK
:
2179 vcpu
->kvm
->arch
.wall_clock
= data
;
2180 kvm_write_wall_clock(vcpu
->kvm
, data
);
2182 case MSR_KVM_SYSTEM_TIME_NEW
:
2183 case MSR_KVM_SYSTEM_TIME
: {
2184 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2186 kvmclock_reset(vcpu
);
2188 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2189 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2191 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2192 set_bit(KVM_REQ_MASTERCLOCK_UPDATE
,
2195 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2198 vcpu
->arch
.time
= data
;
2199 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2201 /* we verify if the enable bit is set... */
2205 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2206 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2207 sizeof(struct pvclock_vcpu_time_info
)))
2208 vcpu
->arch
.pv_time_enabled
= false;
2210 vcpu
->arch
.pv_time_enabled
= true;
2214 case MSR_KVM_ASYNC_PF_EN
:
2215 if (kvm_pv_enable_async_pf(vcpu
, data
))
2218 case MSR_KVM_STEAL_TIME
:
2220 if (unlikely(!sched_info_on()))
2223 if (data
& KVM_STEAL_RESERVED_MASK
)
2226 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2227 data
& KVM_STEAL_VALID_BITS
,
2228 sizeof(struct kvm_steal_time
)))
2231 vcpu
->arch
.st
.msr_val
= data
;
2233 if (!(data
& KVM_MSR_ENABLED
))
2236 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2239 case MSR_KVM_PV_EOI_EN
:
2240 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2244 case MSR_IA32_MCG_CTL
:
2245 case MSR_IA32_MCG_STATUS
:
2246 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2247 return set_msr_mce(vcpu
, msr
, data
);
2249 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2250 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2251 pr
= true; /* fall through */
2252 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2253 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2254 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2255 return kvm_pmu_set_msr(vcpu
, msr_info
);
2257 if (pr
|| data
!= 0)
2258 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2259 "0x%x data 0x%llx\n", msr
, data
);
2261 case MSR_K7_CLK_CTL
:
2263 * Ignore all writes to this no longer documented MSR.
2264 * Writes are only relevant for old K7 processors,
2265 * all pre-dating SVM, but a recommended workaround from
2266 * AMD for these chips. It is possible to specify the
2267 * affected processor models on the command line, hence
2268 * the need to ignore the workaround.
2271 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2272 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2273 case HV_X64_MSR_CRASH_CTL
:
2274 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2275 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2276 msr_info
->host_initiated
);
2277 case MSR_IA32_BBL_CR_CTL3
:
2278 /* Drop writes to this legacy MSR -- see rdmsr
2279 * counterpart for further detail.
2281 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2283 case MSR_AMD64_OSVW_ID_LENGTH
:
2284 if (!guest_cpuid_has_osvw(vcpu
))
2286 vcpu
->arch
.osvw
.length
= data
;
2288 case MSR_AMD64_OSVW_STATUS
:
2289 if (!guest_cpuid_has_osvw(vcpu
))
2291 vcpu
->arch
.osvw
.status
= data
;
2294 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2295 return xen_hvm_config(vcpu
, data
);
2296 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2297 return kvm_pmu_set_msr(vcpu
, msr_info
);
2299 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2303 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2310 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2314 * Reads an msr value (of 'msr_index') into 'pdata'.
2315 * Returns 0 on success, non-0 otherwise.
2316 * Assumes vcpu_load() was already called.
2318 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2320 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2322 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2324 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2327 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2328 unsigned bank_num
= mcg_cap
& 0xff;
2331 case MSR_IA32_P5_MC_ADDR
:
2332 case MSR_IA32_P5_MC_TYPE
:
2335 case MSR_IA32_MCG_CAP
:
2336 data
= vcpu
->arch
.mcg_cap
;
2338 case MSR_IA32_MCG_CTL
:
2339 if (!(mcg_cap
& MCG_CTL_P
))
2341 data
= vcpu
->arch
.mcg_ctl
;
2343 case MSR_IA32_MCG_STATUS
:
2344 data
= vcpu
->arch
.mcg_status
;
2347 if (msr
>= MSR_IA32_MC0_CTL
&&
2348 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2349 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2350 data
= vcpu
->arch
.mce_banks
[offset
];
2359 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2361 switch (msr_info
->index
) {
2362 case MSR_IA32_PLATFORM_ID
:
2363 case MSR_IA32_EBL_CR_POWERON
:
2364 case MSR_IA32_DEBUGCTLMSR
:
2365 case MSR_IA32_LASTBRANCHFROMIP
:
2366 case MSR_IA32_LASTBRANCHTOIP
:
2367 case MSR_IA32_LASTINTFROMIP
:
2368 case MSR_IA32_LASTINTTOIP
:
2370 case MSR_K8_TSEG_ADDR
:
2371 case MSR_K8_TSEG_MASK
:
2373 case MSR_VM_HSAVE_PA
:
2374 case MSR_K8_INT_PENDING_MSG
:
2375 case MSR_AMD64_NB_CFG
:
2376 case MSR_FAM10H_MMIO_CONF_BASE
:
2377 case MSR_AMD64_BU_CFG2
:
2378 case MSR_IA32_PERF_CTL
:
2381 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2382 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2383 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2384 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2385 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2386 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2389 case MSR_IA32_UCODE_REV
:
2390 msr_info
->data
= 0x100000000ULL
;
2393 case 0x200 ... 0x2ff:
2394 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2395 case 0xcd: /* fsb frequency */
2399 * MSR_EBC_FREQUENCY_ID
2400 * Conservative value valid for even the basic CPU models.
2401 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2402 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2403 * and 266MHz for model 3, or 4. Set Core Clock
2404 * Frequency to System Bus Frequency Ratio to 1 (bits
2405 * 31:24) even though these are only valid for CPU
2406 * models > 2, however guests may end up dividing or
2407 * multiplying by zero otherwise.
2409 case MSR_EBC_FREQUENCY_ID
:
2410 msr_info
->data
= 1 << 24;
2412 case MSR_IA32_APICBASE
:
2413 msr_info
->data
= kvm_get_apic_base(vcpu
);
2415 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2416 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2418 case MSR_IA32_TSCDEADLINE
:
2419 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2421 case MSR_IA32_TSC_ADJUST
:
2422 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2424 case MSR_IA32_MISC_ENABLE
:
2425 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2427 case MSR_IA32_SMBASE
:
2428 if (!msr_info
->host_initiated
)
2430 msr_info
->data
= vcpu
->arch
.smbase
;
2432 case MSR_IA32_PERF_STATUS
:
2433 /* TSC increment by tick */
2434 msr_info
->data
= 1000ULL;
2435 /* CPU multiplier */
2436 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2439 msr_info
->data
= vcpu
->arch
.efer
;
2441 case MSR_KVM_WALL_CLOCK
:
2442 case MSR_KVM_WALL_CLOCK_NEW
:
2443 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2445 case MSR_KVM_SYSTEM_TIME
:
2446 case MSR_KVM_SYSTEM_TIME_NEW
:
2447 msr_info
->data
= vcpu
->arch
.time
;
2449 case MSR_KVM_ASYNC_PF_EN
:
2450 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2452 case MSR_KVM_STEAL_TIME
:
2453 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2455 case MSR_KVM_PV_EOI_EN
:
2456 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2458 case MSR_IA32_P5_MC_ADDR
:
2459 case MSR_IA32_P5_MC_TYPE
:
2460 case MSR_IA32_MCG_CAP
:
2461 case MSR_IA32_MCG_CTL
:
2462 case MSR_IA32_MCG_STATUS
:
2463 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2464 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2465 case MSR_K7_CLK_CTL
:
2467 * Provide expected ramp-up count for K7. All other
2468 * are set to zero, indicating minimum divisors for
2471 * This prevents guest kernels on AMD host with CPU
2472 * type 6, model 8 and higher from exploding due to
2473 * the rdmsr failing.
2475 msr_info
->data
= 0x20000000;
2477 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2478 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2479 case HV_X64_MSR_CRASH_CTL
:
2480 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2481 return kvm_hv_get_msr_common(vcpu
,
2482 msr_info
->index
, &msr_info
->data
);
2484 case MSR_IA32_BBL_CR_CTL3
:
2485 /* This legacy MSR exists but isn't fully documented in current
2486 * silicon. It is however accessed by winxp in very narrow
2487 * scenarios where it sets bit #19, itself documented as
2488 * a "reserved" bit. Best effort attempt to source coherent
2489 * read data here should the balance of the register be
2490 * interpreted by the guest:
2492 * L2 cache control register 3: 64GB range, 256KB size,
2493 * enabled, latency 0x1, configured
2495 msr_info
->data
= 0xbe702111;
2497 case MSR_AMD64_OSVW_ID_LENGTH
:
2498 if (!guest_cpuid_has_osvw(vcpu
))
2500 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2502 case MSR_AMD64_OSVW_STATUS
:
2503 if (!guest_cpuid_has_osvw(vcpu
))
2505 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2508 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2509 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2511 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2515 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2522 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2525 * Read or write a bunch of msrs. All parameters are kernel addresses.
2527 * @return number of msrs set successfully.
2529 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2530 struct kvm_msr_entry
*entries
,
2531 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2532 unsigned index
, u64
*data
))
2536 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2537 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2538 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2540 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2546 * Read or write a bunch of msrs. Parameters are user addresses.
2548 * @return number of msrs set successfully.
2550 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2551 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2552 unsigned index
, u64
*data
),
2555 struct kvm_msrs msrs
;
2556 struct kvm_msr_entry
*entries
;
2561 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2565 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2568 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2569 entries
= memdup_user(user_msrs
->entries
, size
);
2570 if (IS_ERR(entries
)) {
2571 r
= PTR_ERR(entries
);
2575 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2580 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2591 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2596 case KVM_CAP_IRQCHIP
:
2598 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2599 case KVM_CAP_SET_TSS_ADDR
:
2600 case KVM_CAP_EXT_CPUID
:
2601 case KVM_CAP_EXT_EMUL_CPUID
:
2602 case KVM_CAP_CLOCKSOURCE
:
2604 case KVM_CAP_NOP_IO_DELAY
:
2605 case KVM_CAP_MP_STATE
:
2606 case KVM_CAP_SYNC_MMU
:
2607 case KVM_CAP_USER_NMI
:
2608 case KVM_CAP_REINJECT_CONTROL
:
2609 case KVM_CAP_IRQ_INJECT_STATUS
:
2610 case KVM_CAP_IOEVENTFD
:
2611 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2613 case KVM_CAP_PIT_STATE2
:
2614 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2615 case KVM_CAP_XEN_HVM
:
2616 case KVM_CAP_VCPU_EVENTS
:
2617 case KVM_CAP_HYPERV
:
2618 case KVM_CAP_HYPERV_VAPIC
:
2619 case KVM_CAP_HYPERV_SPIN
:
2620 case KVM_CAP_HYPERV_SYNIC
:
2621 case KVM_CAP_PCI_SEGMENT
:
2622 case KVM_CAP_DEBUGREGS
:
2623 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2625 case KVM_CAP_ASYNC_PF
:
2626 case KVM_CAP_GET_TSC_KHZ
:
2627 case KVM_CAP_KVMCLOCK_CTRL
:
2628 case KVM_CAP_READONLY_MEM
:
2629 case KVM_CAP_HYPERV_TIME
:
2630 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2631 case KVM_CAP_TSC_DEADLINE_TIMER
:
2632 case KVM_CAP_ENABLE_CAP_VM
:
2633 case KVM_CAP_DISABLE_QUIRKS
:
2634 case KVM_CAP_SET_BOOT_CPU_ID
:
2635 case KVM_CAP_SPLIT_IRQCHIP
:
2636 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2637 case KVM_CAP_ASSIGN_DEV_IRQ
:
2638 case KVM_CAP_PCI_2_3
:
2642 case KVM_CAP_ADJUST_CLOCK
:
2643 r
= KVM_CLOCK_TSC_STABLE
;
2645 case KVM_CAP_X86_SMM
:
2646 /* SMBASE is usually relocated above 1M on modern chipsets,
2647 * and SMM handlers might indeed rely on 4G segment limits,
2648 * so do not report SMM to be available if real mode is
2649 * emulated via vm86 mode. Still, do not go to great lengths
2650 * to avoid userspace's usage of the feature, because it is a
2651 * fringe case that is not enabled except via specific settings
2652 * of the module parameters.
2654 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2656 case KVM_CAP_COALESCED_MMIO
:
2657 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
2660 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2662 case KVM_CAP_NR_VCPUS
:
2663 r
= KVM_SOFT_MAX_VCPUS
;
2665 case KVM_CAP_MAX_VCPUS
:
2668 case KVM_CAP_NR_MEMSLOTS
:
2669 r
= KVM_USER_MEM_SLOTS
;
2671 case KVM_CAP_PV_MMU
: /* obsolete */
2674 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2676 r
= iommu_present(&pci_bus_type
);
2680 r
= KVM_MAX_MCE_BANKS
;
2683 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2685 case KVM_CAP_TSC_CONTROL
:
2686 r
= kvm_has_tsc_control
;
2688 case KVM_CAP_X2APIC_API
:
2689 r
= KVM_X2APIC_API_VALID_FLAGS
;
2699 long kvm_arch_dev_ioctl(struct file
*filp
,
2700 unsigned int ioctl
, unsigned long arg
)
2702 void __user
*argp
= (void __user
*)arg
;
2706 case KVM_GET_MSR_INDEX_LIST
: {
2707 struct kvm_msr_list __user
*user_msr_list
= argp
;
2708 struct kvm_msr_list msr_list
;
2712 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2715 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2716 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2719 if (n
< msr_list
.nmsrs
)
2722 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2723 num_msrs_to_save
* sizeof(u32
)))
2725 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2727 num_emulated_msrs
* sizeof(u32
)))
2732 case KVM_GET_SUPPORTED_CPUID
:
2733 case KVM_GET_EMULATED_CPUID
: {
2734 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2735 struct kvm_cpuid2 cpuid
;
2738 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2741 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2747 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2752 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2754 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2755 sizeof(kvm_mce_cap_supported
)))
2767 static void wbinvd_ipi(void *garbage
)
2772 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2774 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2777 static inline void kvm_migrate_timers(struct kvm_vcpu
*vcpu
)
2779 set_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
);
2782 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2784 /* Address WBINVD may be executed by guest */
2785 if (need_emulate_wbinvd(vcpu
)) {
2786 if (kvm_x86_ops
->has_wbinvd_exit())
2787 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2788 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2789 smp_call_function_single(vcpu
->cpu
,
2790 wbinvd_ipi
, NULL
, 1);
2793 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2795 /* Apply any externally detected TSC adjustments (due to suspend) */
2796 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2797 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2798 vcpu
->arch
.tsc_offset_adjustment
= 0;
2799 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2802 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2803 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2804 rdtsc() - vcpu
->arch
.last_host_tsc
;
2806 mark_tsc_unstable("KVM discovered backwards TSC");
2808 if (check_tsc_unstable()) {
2809 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2810 vcpu
->arch
.last_guest_tsc
);
2811 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2812 vcpu
->arch
.tsc_catchup
= 1;
2814 if (kvm_lapic_hv_timer_in_use(vcpu
) &&
2815 kvm_x86_ops
->set_hv_timer(vcpu
,
2816 kvm_get_lapic_target_expiration_tsc(vcpu
)))
2817 kvm_lapic_switch_to_sw_timer(vcpu
);
2819 * On a host with synchronized TSC, there is no need to update
2820 * kvmclock on vcpu->cpu migration
2822 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2823 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2824 if (vcpu
->cpu
!= cpu
)
2825 kvm_migrate_timers(vcpu
);
2829 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2832 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2834 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2837 vcpu
->arch
.st
.steal
.preempted
= 1;
2839 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2840 &vcpu
->arch
.st
.steal
.preempted
,
2841 offsetof(struct kvm_steal_time
, preempted
),
2842 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2845 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2849 * Disable page faults because we're in atomic context here.
2850 * kvm_write_guest_offset_cached() would call might_fault()
2851 * that relies on pagefault_disable() to tell if there's a
2852 * bug. NOTE: the write to guest memory may not go through if
2853 * during postcopy live migration or if there's heavy guest
2856 pagefault_disable();
2858 * kvm_memslots() will be called by
2859 * kvm_write_guest_offset_cached() so take the srcu lock.
2861 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2862 kvm_steal_time_set_preempted(vcpu
);
2863 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2865 kvm_x86_ops
->vcpu_put(vcpu
);
2866 kvm_put_guest_fpu(vcpu
);
2867 vcpu
->arch
.last_host_tsc
= rdtsc();
2870 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2871 struct kvm_lapic_state
*s
)
2873 if (vcpu
->arch
.apicv_active
)
2874 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2876 return kvm_apic_get_state(vcpu
, s
);
2879 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2880 struct kvm_lapic_state
*s
)
2884 r
= kvm_apic_set_state(vcpu
, s
);
2887 update_cr8_intercept(vcpu
);
2892 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2894 return (!lapic_in_kernel(vcpu
) ||
2895 kvm_apic_accept_pic_intr(vcpu
));
2899 * if userspace requested an interrupt window, check that the
2900 * interrupt window is open.
2902 * No need to exit to userspace if we already have an interrupt queued.
2904 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2906 return kvm_arch_interrupt_allowed(vcpu
) &&
2907 !kvm_cpu_has_interrupt(vcpu
) &&
2908 !kvm_event_needs_reinjection(vcpu
) &&
2909 kvm_cpu_accept_dm_intr(vcpu
);
2912 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2913 struct kvm_interrupt
*irq
)
2915 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2918 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2919 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2920 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2925 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2926 * fail for in-kernel 8259.
2928 if (pic_in_kernel(vcpu
->kvm
))
2931 if (vcpu
->arch
.pending_external_vector
!= -1)
2934 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2935 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2939 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2941 kvm_inject_nmi(vcpu
);
2946 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2948 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2953 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2954 struct kvm_tpr_access_ctl
*tac
)
2958 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2962 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2966 unsigned bank_num
= mcg_cap
& 0xff, bank
;
2969 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
2971 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
2974 vcpu
->arch
.mcg_cap
= mcg_cap
;
2975 /* Init IA32_MCG_CTL to all 1s */
2976 if (mcg_cap
& MCG_CTL_P
)
2977 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
2978 /* Init IA32_MCi_CTL to all 1s */
2979 for (bank
= 0; bank
< bank_num
; bank
++)
2980 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
2982 if (kvm_x86_ops
->setup_mce
)
2983 kvm_x86_ops
->setup_mce(vcpu
);
2988 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
2989 struct kvm_x86_mce
*mce
)
2991 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2992 unsigned bank_num
= mcg_cap
& 0xff;
2993 u64
*banks
= vcpu
->arch
.mce_banks
;
2995 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
2998 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2999 * reporting is disabled
3001 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3002 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3004 banks
+= 4 * mce
->bank
;
3006 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3007 * reporting is disabled for the bank
3009 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3011 if (mce
->status
& MCI_STATUS_UC
) {
3012 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3013 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3014 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3017 if (banks
[1] & MCI_STATUS_VAL
)
3018 mce
->status
|= MCI_STATUS_OVER
;
3019 banks
[2] = mce
->addr
;
3020 banks
[3] = mce
->misc
;
3021 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3022 banks
[1] = mce
->status
;
3023 kvm_queue_exception(vcpu
, MC_VECTOR
);
3024 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3025 || !(banks
[1] & MCI_STATUS_UC
)) {
3026 if (banks
[1] & MCI_STATUS_VAL
)
3027 mce
->status
|= MCI_STATUS_OVER
;
3028 banks
[2] = mce
->addr
;
3029 banks
[3] = mce
->misc
;
3030 banks
[1] = mce
->status
;
3032 banks
[1] |= MCI_STATUS_OVER
;
3036 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3037 struct kvm_vcpu_events
*events
)
3040 events
->exception
.injected
=
3041 vcpu
->arch
.exception
.pending
&&
3042 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3043 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3044 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3045 events
->exception
.pad
= 0;
3046 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3048 events
->interrupt
.injected
=
3049 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3050 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3051 events
->interrupt
.soft
= 0;
3052 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3054 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3055 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3056 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3057 events
->nmi
.pad
= 0;
3059 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3061 events
->smi
.smm
= is_smm(vcpu
);
3062 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3063 events
->smi
.smm_inside_nmi
=
3064 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3065 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3067 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3068 | KVM_VCPUEVENT_VALID_SHADOW
3069 | KVM_VCPUEVENT_VALID_SMM
);
3070 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3073 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3075 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3076 struct kvm_vcpu_events
*events
)
3078 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3079 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3080 | KVM_VCPUEVENT_VALID_SHADOW
3081 | KVM_VCPUEVENT_VALID_SMM
))
3084 if (events
->exception
.injected
&&
3085 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
3089 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3090 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3091 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3092 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3094 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3095 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3096 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3097 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3098 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3099 events
->interrupt
.shadow
);
3101 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3102 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3103 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3104 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3106 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3107 lapic_in_kernel(vcpu
))
3108 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3110 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3111 u32 hflags
= vcpu
->arch
.hflags
;
3112 if (events
->smi
.smm
)
3113 hflags
|= HF_SMM_MASK
;
3115 hflags
&= ~HF_SMM_MASK
;
3116 kvm_set_hflags(vcpu
, hflags
);
3118 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3119 if (events
->smi
.smm_inside_nmi
)
3120 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3122 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3123 if (lapic_in_kernel(vcpu
)) {
3124 if (events
->smi
.latched_init
)
3125 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3127 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3131 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3136 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3137 struct kvm_debugregs
*dbgregs
)
3141 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3142 kvm_get_dr(vcpu
, 6, &val
);
3144 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3146 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3149 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3150 struct kvm_debugregs
*dbgregs
)
3155 if (dbgregs
->dr6
& ~0xffffffffull
)
3157 if (dbgregs
->dr7
& ~0xffffffffull
)
3160 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3161 kvm_update_dr0123(vcpu
);
3162 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3163 kvm_update_dr6(vcpu
);
3164 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3165 kvm_update_dr7(vcpu
);
3170 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3172 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3174 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3175 u64 xstate_bv
= xsave
->header
.xfeatures
;
3179 * Copy legacy XSAVE area, to avoid complications with CPUID
3180 * leaves 0 and 1 in the loop below.
3182 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3185 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3188 * Copy each region from the possibly compacted offset to the
3189 * non-compacted offset.
3191 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3193 u64 feature
= valid
& -valid
;
3194 int index
= fls64(feature
) - 1;
3195 void *src
= get_xsave_addr(xsave
, feature
);
3198 u32 size
, offset
, ecx
, edx
;
3199 cpuid_count(XSTATE_CPUID
, index
,
3200 &size
, &offset
, &ecx
, &edx
);
3201 memcpy(dest
+ offset
, src
, size
);
3208 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3210 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3211 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3215 * Copy legacy XSAVE area, to avoid complications with CPUID
3216 * leaves 0 and 1 in the loop below.
3218 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3220 /* Set XSTATE_BV and possibly XCOMP_BV. */
3221 xsave
->header
.xfeatures
= xstate_bv
;
3222 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3223 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3226 * Copy each region from the non-compacted offset to the
3227 * possibly compacted offset.
3229 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3231 u64 feature
= valid
& -valid
;
3232 int index
= fls64(feature
) - 1;
3233 void *dest
= get_xsave_addr(xsave
, feature
);
3236 u32 size
, offset
, ecx
, edx
;
3237 cpuid_count(XSTATE_CPUID
, index
,
3238 &size
, &offset
, &ecx
, &edx
);
3239 memcpy(dest
, src
+ offset
, size
);
3246 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3247 struct kvm_xsave
*guest_xsave
)
3249 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3250 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3251 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3253 memcpy(guest_xsave
->region
,
3254 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3255 sizeof(struct fxregs_state
));
3256 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3257 XFEATURE_MASK_FPSSE
;
3261 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3262 struct kvm_xsave
*guest_xsave
)
3265 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3267 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3269 * Here we allow setting states that are not present in
3270 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3271 * with old userspace.
3273 if (xstate_bv
& ~kvm_supported_xcr0())
3275 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3277 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
)
3279 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3280 guest_xsave
->region
, sizeof(struct fxregs_state
));
3285 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3286 struct kvm_xcrs
*guest_xcrs
)
3288 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3289 guest_xcrs
->nr_xcrs
= 0;
3293 guest_xcrs
->nr_xcrs
= 1;
3294 guest_xcrs
->flags
= 0;
3295 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3296 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3299 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3300 struct kvm_xcrs
*guest_xcrs
)
3304 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3307 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3310 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3311 /* Only support XCR0 currently */
3312 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3313 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3314 guest_xcrs
->xcrs
[i
].value
);
3323 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3324 * stopped by the hypervisor. This function will be called from the host only.
3325 * EINVAL is returned when the host attempts to set the flag for a guest that
3326 * does not support pv clocks.
3328 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3330 if (!vcpu
->arch
.pv_time_enabled
)
3332 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3333 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3337 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3338 struct kvm_enable_cap
*cap
)
3344 case KVM_CAP_HYPERV_SYNIC
:
3345 return kvm_hv_activate_synic(vcpu
);
3351 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3352 unsigned int ioctl
, unsigned long arg
)
3354 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3355 void __user
*argp
= (void __user
*)arg
;
3358 struct kvm_lapic_state
*lapic
;
3359 struct kvm_xsave
*xsave
;
3360 struct kvm_xcrs
*xcrs
;
3366 case KVM_GET_LAPIC
: {
3368 if (!lapic_in_kernel(vcpu
))
3370 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3375 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3379 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3384 case KVM_SET_LAPIC
: {
3386 if (!lapic_in_kernel(vcpu
))
3388 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3389 if (IS_ERR(u
.lapic
))
3390 return PTR_ERR(u
.lapic
);
3392 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3395 case KVM_INTERRUPT
: {
3396 struct kvm_interrupt irq
;
3399 if (copy_from_user(&irq
, argp
, sizeof irq
))
3401 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3405 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3409 r
= kvm_vcpu_ioctl_smi(vcpu
);
3412 case KVM_SET_CPUID
: {
3413 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3414 struct kvm_cpuid cpuid
;
3417 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3419 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3422 case KVM_SET_CPUID2
: {
3423 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3424 struct kvm_cpuid2 cpuid
;
3427 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3429 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3430 cpuid_arg
->entries
);
3433 case KVM_GET_CPUID2
: {
3434 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3435 struct kvm_cpuid2 cpuid
;
3438 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3440 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3441 cpuid_arg
->entries
);
3445 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3451 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3454 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3456 case KVM_TPR_ACCESS_REPORTING
: {
3457 struct kvm_tpr_access_ctl tac
;
3460 if (copy_from_user(&tac
, argp
, sizeof tac
))
3462 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3466 if (copy_to_user(argp
, &tac
, sizeof tac
))
3471 case KVM_SET_VAPIC_ADDR
: {
3472 struct kvm_vapic_addr va
;
3476 if (!lapic_in_kernel(vcpu
))
3479 if (copy_from_user(&va
, argp
, sizeof va
))
3481 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3482 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3483 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3486 case KVM_X86_SETUP_MCE
: {
3490 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3492 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3495 case KVM_X86_SET_MCE
: {
3496 struct kvm_x86_mce mce
;
3499 if (copy_from_user(&mce
, argp
, sizeof mce
))
3501 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3504 case KVM_GET_VCPU_EVENTS
: {
3505 struct kvm_vcpu_events events
;
3507 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3510 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3515 case KVM_SET_VCPU_EVENTS
: {
3516 struct kvm_vcpu_events events
;
3519 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3522 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3525 case KVM_GET_DEBUGREGS
: {
3526 struct kvm_debugregs dbgregs
;
3528 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3531 if (copy_to_user(argp
, &dbgregs
,
3532 sizeof(struct kvm_debugregs
)))
3537 case KVM_SET_DEBUGREGS
: {
3538 struct kvm_debugregs dbgregs
;
3541 if (copy_from_user(&dbgregs
, argp
,
3542 sizeof(struct kvm_debugregs
)))
3545 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3548 case KVM_GET_XSAVE
: {
3549 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3554 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3557 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3562 case KVM_SET_XSAVE
: {
3563 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3564 if (IS_ERR(u
.xsave
))
3565 return PTR_ERR(u
.xsave
);
3567 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3570 case KVM_GET_XCRS
: {
3571 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3576 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3579 if (copy_to_user(argp
, u
.xcrs
,
3580 sizeof(struct kvm_xcrs
)))
3585 case KVM_SET_XCRS
: {
3586 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3588 return PTR_ERR(u
.xcrs
);
3590 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3593 case KVM_SET_TSC_KHZ
: {
3597 user_tsc_khz
= (u32
)arg
;
3599 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3602 if (user_tsc_khz
== 0)
3603 user_tsc_khz
= tsc_khz
;
3605 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3610 case KVM_GET_TSC_KHZ
: {
3611 r
= vcpu
->arch
.virtual_tsc_khz
;
3614 case KVM_KVMCLOCK_CTRL
: {
3615 r
= kvm_set_guest_paused(vcpu
);
3618 case KVM_ENABLE_CAP
: {
3619 struct kvm_enable_cap cap
;
3622 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3624 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3635 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3637 return VM_FAULT_SIGBUS
;
3640 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3644 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3646 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3650 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3653 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3657 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3658 u32 kvm_nr_mmu_pages
)
3660 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3663 mutex_lock(&kvm
->slots_lock
);
3665 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3666 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3668 mutex_unlock(&kvm
->slots_lock
);
3672 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3674 return kvm
->arch
.n_max_mmu_pages
;
3677 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3682 switch (chip
->chip_id
) {
3683 case KVM_IRQCHIP_PIC_MASTER
:
3684 memcpy(&chip
->chip
.pic
,
3685 &pic_irqchip(kvm
)->pics
[0],
3686 sizeof(struct kvm_pic_state
));
3688 case KVM_IRQCHIP_PIC_SLAVE
:
3689 memcpy(&chip
->chip
.pic
,
3690 &pic_irqchip(kvm
)->pics
[1],
3691 sizeof(struct kvm_pic_state
));
3693 case KVM_IRQCHIP_IOAPIC
:
3694 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3703 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3708 switch (chip
->chip_id
) {
3709 case KVM_IRQCHIP_PIC_MASTER
:
3710 spin_lock(&pic_irqchip(kvm
)->lock
);
3711 memcpy(&pic_irqchip(kvm
)->pics
[0],
3713 sizeof(struct kvm_pic_state
));
3714 spin_unlock(&pic_irqchip(kvm
)->lock
);
3716 case KVM_IRQCHIP_PIC_SLAVE
:
3717 spin_lock(&pic_irqchip(kvm
)->lock
);
3718 memcpy(&pic_irqchip(kvm
)->pics
[1],
3720 sizeof(struct kvm_pic_state
));
3721 spin_unlock(&pic_irqchip(kvm
)->lock
);
3723 case KVM_IRQCHIP_IOAPIC
:
3724 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3730 kvm_pic_update_irq(pic_irqchip(kvm
));
3734 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3736 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3738 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3740 mutex_lock(&kps
->lock
);
3741 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3742 mutex_unlock(&kps
->lock
);
3746 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3749 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3751 mutex_lock(&pit
->pit_state
.lock
);
3752 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3753 for (i
= 0; i
< 3; i
++)
3754 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3755 mutex_unlock(&pit
->pit_state
.lock
);
3759 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3761 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3762 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3763 sizeof(ps
->channels
));
3764 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3765 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3766 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3770 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3774 u32 prev_legacy
, cur_legacy
;
3775 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3777 mutex_lock(&pit
->pit_state
.lock
);
3778 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3779 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3780 if (!prev_legacy
&& cur_legacy
)
3782 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3783 sizeof(pit
->pit_state
.channels
));
3784 pit
->pit_state
.flags
= ps
->flags
;
3785 for (i
= 0; i
< 3; i
++)
3786 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3788 mutex_unlock(&pit
->pit_state
.lock
);
3792 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3793 struct kvm_reinject_control
*control
)
3795 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3800 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3801 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3802 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3804 mutex_lock(&pit
->pit_state
.lock
);
3805 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3806 mutex_unlock(&pit
->pit_state
.lock
);
3812 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3813 * @kvm: kvm instance
3814 * @log: slot id and address to which we copy the log
3816 * Steps 1-4 below provide general overview of dirty page logging. See
3817 * kvm_get_dirty_log_protect() function description for additional details.
3819 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3820 * always flush the TLB (step 4) even if previous step failed and the dirty
3821 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3822 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3823 * writes will be marked dirty for next log read.
3825 * 1. Take a snapshot of the bit and clear it if needed.
3826 * 2. Write protect the corresponding page.
3827 * 3. Copy the snapshot to the userspace.
3828 * 4. Flush TLB's if needed.
3830 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3832 bool is_dirty
= false;
3835 mutex_lock(&kvm
->slots_lock
);
3838 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3840 if (kvm_x86_ops
->flush_log_dirty
)
3841 kvm_x86_ops
->flush_log_dirty(kvm
);
3843 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3846 * All the TLBs can be flushed out of mmu lock, see the comments in
3847 * kvm_mmu_slot_remove_write_access().
3849 lockdep_assert_held(&kvm
->slots_lock
);
3851 kvm_flush_remote_tlbs(kvm
);
3853 mutex_unlock(&kvm
->slots_lock
);
3857 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3860 if (!irqchip_in_kernel(kvm
))
3863 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3864 irq_event
->irq
, irq_event
->level
,
3869 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3870 struct kvm_enable_cap
*cap
)
3878 case KVM_CAP_DISABLE_QUIRKS
:
3879 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3882 case KVM_CAP_SPLIT_IRQCHIP
: {
3883 mutex_lock(&kvm
->lock
);
3885 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3886 goto split_irqchip_unlock
;
3888 if (irqchip_in_kernel(kvm
))
3889 goto split_irqchip_unlock
;
3890 if (kvm
->created_vcpus
)
3891 goto split_irqchip_unlock
;
3892 r
= kvm_setup_empty_irq_routing(kvm
);
3894 goto split_irqchip_unlock
;
3895 /* Pairs with irqchip_in_kernel. */
3897 kvm
->arch
.irqchip_split
= true;
3898 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3900 split_irqchip_unlock
:
3901 mutex_unlock(&kvm
->lock
);
3904 case KVM_CAP_X2APIC_API
:
3906 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3909 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3910 kvm
->arch
.x2apic_format
= true;
3911 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3912 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3923 long kvm_arch_vm_ioctl(struct file
*filp
,
3924 unsigned int ioctl
, unsigned long arg
)
3926 struct kvm
*kvm
= filp
->private_data
;
3927 void __user
*argp
= (void __user
*)arg
;
3930 * This union makes it completely explicit to gcc-3.x
3931 * that these two variables' stack usage should be
3932 * combined, not added together.
3935 struct kvm_pit_state ps
;
3936 struct kvm_pit_state2 ps2
;
3937 struct kvm_pit_config pit_config
;
3941 case KVM_SET_TSS_ADDR
:
3942 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3944 case KVM_SET_IDENTITY_MAP_ADDR
: {
3948 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
3950 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
3953 case KVM_SET_NR_MMU_PAGES
:
3954 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
3956 case KVM_GET_NR_MMU_PAGES
:
3957 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
3959 case KVM_CREATE_IRQCHIP
: {
3960 struct kvm_pic
*vpic
;
3962 mutex_lock(&kvm
->lock
);
3965 goto create_irqchip_unlock
;
3967 if (kvm
->created_vcpus
)
3968 goto create_irqchip_unlock
;
3970 vpic
= kvm_create_pic(kvm
);
3972 r
= kvm_ioapic_init(kvm
);
3974 mutex_lock(&kvm
->slots_lock
);
3975 kvm_destroy_pic(vpic
);
3976 mutex_unlock(&kvm
->slots_lock
);
3977 goto create_irqchip_unlock
;
3980 goto create_irqchip_unlock
;
3981 r
= kvm_setup_default_irq_routing(kvm
);
3983 mutex_lock(&kvm
->slots_lock
);
3984 mutex_lock(&kvm
->irq_lock
);
3985 kvm_ioapic_destroy(kvm
);
3986 kvm_destroy_pic(vpic
);
3987 mutex_unlock(&kvm
->irq_lock
);
3988 mutex_unlock(&kvm
->slots_lock
);
3989 goto create_irqchip_unlock
;
3991 /* Write kvm->irq_routing before kvm->arch.vpic. */
3993 kvm
->arch
.vpic
= vpic
;
3994 create_irqchip_unlock
:
3995 mutex_unlock(&kvm
->lock
);
3998 case KVM_CREATE_PIT
:
3999 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4001 case KVM_CREATE_PIT2
:
4003 if (copy_from_user(&u
.pit_config
, argp
,
4004 sizeof(struct kvm_pit_config
)))
4007 mutex_lock(&kvm
->lock
);
4010 goto create_pit_unlock
;
4012 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4016 mutex_unlock(&kvm
->lock
);
4018 case KVM_GET_IRQCHIP
: {
4019 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4020 struct kvm_irqchip
*chip
;
4022 chip
= memdup_user(argp
, sizeof(*chip
));
4029 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
4030 goto get_irqchip_out
;
4031 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4033 goto get_irqchip_out
;
4035 if (copy_to_user(argp
, chip
, sizeof *chip
))
4036 goto get_irqchip_out
;
4042 case KVM_SET_IRQCHIP
: {
4043 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4044 struct kvm_irqchip
*chip
;
4046 chip
= memdup_user(argp
, sizeof(*chip
));
4053 if (!irqchip_in_kernel(kvm
) || irqchip_split(kvm
))
4054 goto set_irqchip_out
;
4055 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4057 goto set_irqchip_out
;
4065 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4068 if (!kvm
->arch
.vpit
)
4070 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4074 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4081 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4084 if (!kvm
->arch
.vpit
)
4086 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4089 case KVM_GET_PIT2
: {
4091 if (!kvm
->arch
.vpit
)
4093 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4097 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4102 case KVM_SET_PIT2
: {
4104 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4107 if (!kvm
->arch
.vpit
)
4109 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4112 case KVM_REINJECT_CONTROL
: {
4113 struct kvm_reinject_control control
;
4115 if (copy_from_user(&control
, argp
, sizeof(control
)))
4117 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4120 case KVM_SET_BOOT_CPU_ID
:
4122 mutex_lock(&kvm
->lock
);
4123 if (kvm
->created_vcpus
)
4126 kvm
->arch
.bsp_vcpu_id
= arg
;
4127 mutex_unlock(&kvm
->lock
);
4129 case KVM_XEN_HVM_CONFIG
: {
4131 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4132 sizeof(struct kvm_xen_hvm_config
)))
4135 if (kvm
->arch
.xen_hvm_config
.flags
)
4140 case KVM_SET_CLOCK
: {
4141 struct kvm_clock_data user_ns
;
4145 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4153 local_irq_disable();
4154 now_ns
= __get_kvmclock_ns(kvm
);
4155 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4157 kvm_gen_update_masterclock(kvm
);
4160 case KVM_GET_CLOCK
: {
4161 struct kvm_clock_data user_ns
;
4164 local_irq_disable();
4165 now_ns
= __get_kvmclock_ns(kvm
);
4166 user_ns
.clock
= now_ns
;
4167 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4169 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4172 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4177 case KVM_ENABLE_CAP
: {
4178 struct kvm_enable_cap cap
;
4181 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4183 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4187 r
= kvm_vm_ioctl_assigned_device(kvm
, ioctl
, arg
);
4193 static void kvm_init_msr_list(void)
4198 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4199 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4203 * Even MSRs that are valid in the host may not be exposed
4204 * to the guests in some cases.
4206 switch (msrs_to_save
[i
]) {
4207 case MSR_IA32_BNDCFGS
:
4208 if (!kvm_x86_ops
->mpx_supported())
4212 if (!kvm_x86_ops
->rdtscp_supported())
4220 msrs_to_save
[j
] = msrs_to_save
[i
];
4223 num_msrs_to_save
= j
;
4225 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4226 switch (emulated_msrs
[i
]) {
4227 case MSR_IA32_SMBASE
:
4228 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4236 emulated_msrs
[j
] = emulated_msrs
[i
];
4239 num_emulated_msrs
= j
;
4242 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4250 if (!(lapic_in_kernel(vcpu
) &&
4251 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4252 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4263 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4270 if (!(lapic_in_kernel(vcpu
) &&
4271 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4273 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4275 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4285 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4286 struct kvm_segment
*var
, int seg
)
4288 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4291 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4292 struct kvm_segment
*var
, int seg
)
4294 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4297 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4298 struct x86_exception
*exception
)
4302 BUG_ON(!mmu_is_nested(vcpu
));
4304 /* NPT walks are always user-walks */
4305 access
|= PFERR_USER_MASK
;
4306 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4311 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4312 struct x86_exception
*exception
)
4314 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4315 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4318 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4319 struct x86_exception
*exception
)
4321 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4322 access
|= PFERR_FETCH_MASK
;
4323 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4326 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4327 struct x86_exception
*exception
)
4329 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4330 access
|= PFERR_WRITE_MASK
;
4331 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4334 /* uses this to access any guest's mapped memory without checking CPL */
4335 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4336 struct x86_exception
*exception
)
4338 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4341 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4342 struct kvm_vcpu
*vcpu
, u32 access
,
4343 struct x86_exception
*exception
)
4346 int r
= X86EMUL_CONTINUE
;
4349 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4351 unsigned offset
= addr
& (PAGE_SIZE
-1);
4352 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4355 if (gpa
== UNMAPPED_GVA
)
4356 return X86EMUL_PROPAGATE_FAULT
;
4357 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4360 r
= X86EMUL_IO_NEEDED
;
4372 /* used for instruction fetching */
4373 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4374 gva_t addr
, void *val
, unsigned int bytes
,
4375 struct x86_exception
*exception
)
4377 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4378 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4382 /* Inline kvm_read_guest_virt_helper for speed. */
4383 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4385 if (unlikely(gpa
== UNMAPPED_GVA
))
4386 return X86EMUL_PROPAGATE_FAULT
;
4388 offset
= addr
& (PAGE_SIZE
-1);
4389 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4390 bytes
= (unsigned)PAGE_SIZE
- offset
;
4391 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4393 if (unlikely(ret
< 0))
4394 return X86EMUL_IO_NEEDED
;
4396 return X86EMUL_CONTINUE
;
4399 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4400 gva_t addr
, void *val
, unsigned int bytes
,
4401 struct x86_exception
*exception
)
4403 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4404 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4406 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4409 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4411 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4412 gva_t addr
, void *val
, unsigned int bytes
,
4413 struct x86_exception
*exception
)
4415 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4416 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4419 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4420 unsigned long addr
, void *val
, unsigned int bytes
)
4422 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4423 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4425 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4428 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4429 gva_t addr
, void *val
,
4431 struct x86_exception
*exception
)
4433 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4435 int r
= X86EMUL_CONTINUE
;
4438 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4441 unsigned offset
= addr
& (PAGE_SIZE
-1);
4442 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4445 if (gpa
== UNMAPPED_GVA
)
4446 return X86EMUL_PROPAGATE_FAULT
;
4447 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4449 r
= X86EMUL_IO_NEEDED
;
4460 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4462 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4463 gpa_t
*gpa
, struct x86_exception
*exception
,
4466 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4467 | (write
? PFERR_WRITE_MASK
: 0);
4470 * currently PKRU is only applied to ept enabled guest so
4471 * there is no pkey in EPT page table for L1 guest or EPT
4472 * shadow page table for L2 guest.
4474 if (vcpu_match_mmio_gva(vcpu
, gva
)
4475 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4476 vcpu
->arch
.access
, 0, access
)) {
4477 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4478 (gva
& (PAGE_SIZE
- 1));
4479 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4483 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4485 if (*gpa
== UNMAPPED_GVA
)
4488 /* For APIC access vmexit */
4489 if ((*gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4492 if (vcpu_match_mmio_gpa(vcpu
, *gpa
)) {
4493 trace_vcpu_match_mmio(gva
, *gpa
, write
, true);
4500 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4501 const void *val
, int bytes
)
4505 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4508 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4512 struct read_write_emulator_ops
{
4513 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4515 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4516 void *val
, int bytes
);
4517 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4518 int bytes
, void *val
);
4519 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4520 void *val
, int bytes
);
4524 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4526 if (vcpu
->mmio_read_completed
) {
4527 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4528 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4529 vcpu
->mmio_read_completed
= 0;
4536 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4537 void *val
, int bytes
)
4539 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4542 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4543 void *val
, int bytes
)
4545 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4548 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4550 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4551 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4554 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4555 void *val
, int bytes
)
4557 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4558 return X86EMUL_IO_NEEDED
;
4561 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4562 void *val
, int bytes
)
4564 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4566 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4567 return X86EMUL_CONTINUE
;
4570 static const struct read_write_emulator_ops read_emultor
= {
4571 .read_write_prepare
= read_prepare
,
4572 .read_write_emulate
= read_emulate
,
4573 .read_write_mmio
= vcpu_mmio_read
,
4574 .read_write_exit_mmio
= read_exit_mmio
,
4577 static const struct read_write_emulator_ops write_emultor
= {
4578 .read_write_emulate
= write_emulate
,
4579 .read_write_mmio
= write_mmio
,
4580 .read_write_exit_mmio
= write_exit_mmio
,
4584 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4586 struct x86_exception
*exception
,
4587 struct kvm_vcpu
*vcpu
,
4588 const struct read_write_emulator_ops
*ops
)
4592 bool write
= ops
->write
;
4593 struct kvm_mmio_fragment
*frag
;
4595 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4598 return X86EMUL_PROPAGATE_FAULT
;
4600 /* For APIC access vmexit */
4604 if (ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4605 return X86EMUL_CONTINUE
;
4609 * Is this MMIO handled locally?
4611 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4612 if (handled
== bytes
)
4613 return X86EMUL_CONTINUE
;
4619 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4620 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4624 return X86EMUL_CONTINUE
;
4627 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4629 void *val
, unsigned int bytes
,
4630 struct x86_exception
*exception
,
4631 const struct read_write_emulator_ops
*ops
)
4633 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4637 if (ops
->read_write_prepare
&&
4638 ops
->read_write_prepare(vcpu
, val
, bytes
))
4639 return X86EMUL_CONTINUE
;
4641 vcpu
->mmio_nr_fragments
= 0;
4643 /* Crossing a page boundary? */
4644 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4647 now
= -addr
& ~PAGE_MASK
;
4648 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4651 if (rc
!= X86EMUL_CONTINUE
)
4654 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4660 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4662 if (rc
!= X86EMUL_CONTINUE
)
4665 if (!vcpu
->mmio_nr_fragments
)
4668 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4670 vcpu
->mmio_needed
= 1;
4671 vcpu
->mmio_cur_fragment
= 0;
4673 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4674 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4675 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4676 vcpu
->run
->mmio
.phys_addr
= gpa
;
4678 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4681 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4685 struct x86_exception
*exception
)
4687 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4688 exception
, &read_emultor
);
4691 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4695 struct x86_exception
*exception
)
4697 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4698 exception
, &write_emultor
);
4701 #define CMPXCHG_TYPE(t, ptr, old, new) \
4702 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4704 #ifdef CONFIG_X86_64
4705 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4707 # define CMPXCHG64(ptr, old, new) \
4708 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4711 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4716 struct x86_exception
*exception
)
4718 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4724 /* guests cmpxchg8b have to be emulated atomically */
4725 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4728 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4730 if (gpa
== UNMAPPED_GVA
||
4731 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4734 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4737 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4738 if (is_error_page(page
))
4741 kaddr
= kmap_atomic(page
);
4742 kaddr
+= offset_in_page(gpa
);
4745 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4748 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4751 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4754 exchanged
= CMPXCHG64(kaddr
, old
, new);
4759 kunmap_atomic(kaddr
);
4760 kvm_release_page_dirty(page
);
4763 return X86EMUL_CMPXCHG_FAILED
;
4765 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4766 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4768 return X86EMUL_CONTINUE
;
4771 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4773 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4776 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4778 /* TODO: String I/O for in kernel device */
4781 if (vcpu
->arch
.pio
.in
)
4782 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4783 vcpu
->arch
.pio
.size
, pd
);
4785 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4786 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4791 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4792 unsigned short port
, void *val
,
4793 unsigned int count
, bool in
)
4795 vcpu
->arch
.pio
.port
= port
;
4796 vcpu
->arch
.pio
.in
= in
;
4797 vcpu
->arch
.pio
.count
= count
;
4798 vcpu
->arch
.pio
.size
= size
;
4800 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4801 vcpu
->arch
.pio
.count
= 0;
4805 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4806 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4807 vcpu
->run
->io
.size
= size
;
4808 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4809 vcpu
->run
->io
.count
= count
;
4810 vcpu
->run
->io
.port
= port
;
4815 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4816 int size
, unsigned short port
, void *val
,
4819 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4822 if (vcpu
->arch
.pio
.count
)
4825 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4828 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4829 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4830 vcpu
->arch
.pio
.count
= 0;
4837 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4838 int size
, unsigned short port
,
4839 const void *val
, unsigned int count
)
4841 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4843 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4844 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4845 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4848 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4850 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4853 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4855 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4858 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4860 if (!need_emulate_wbinvd(vcpu
))
4861 return X86EMUL_CONTINUE
;
4863 if (kvm_x86_ops
->has_wbinvd_exit()) {
4864 int cpu
= get_cpu();
4866 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4867 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4868 wbinvd_ipi
, NULL
, 1);
4870 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4873 return X86EMUL_CONTINUE
;
4876 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4878 kvm_emulate_wbinvd_noskip(vcpu
);
4879 return kvm_skip_emulated_instruction(vcpu
);
4881 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4885 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4887 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4890 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4891 unsigned long *dest
)
4893 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4896 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4897 unsigned long value
)
4900 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4903 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4905 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4908 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4910 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4911 unsigned long value
;
4915 value
= kvm_read_cr0(vcpu
);
4918 value
= vcpu
->arch
.cr2
;
4921 value
= kvm_read_cr3(vcpu
);
4924 value
= kvm_read_cr4(vcpu
);
4927 value
= kvm_get_cr8(vcpu
);
4930 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4937 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
4939 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4944 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
4947 vcpu
->arch
.cr2
= val
;
4950 res
= kvm_set_cr3(vcpu
, val
);
4953 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
4956 res
= kvm_set_cr8(vcpu
, val
);
4959 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
4966 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
4968 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
4971 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4973 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
4976 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4978 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
4981 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4983 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
4986 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
4988 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
4991 static unsigned long emulator_get_cached_segment_base(
4992 struct x86_emulate_ctxt
*ctxt
, int seg
)
4994 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
4997 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
4998 struct desc_struct
*desc
, u32
*base3
,
5001 struct kvm_segment var
;
5003 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5004 *selector
= var
.selector
;
5007 memset(desc
, 0, sizeof(*desc
));
5013 set_desc_limit(desc
, var
.limit
);
5014 set_desc_base(desc
, (unsigned long)var
.base
);
5015 #ifdef CONFIG_X86_64
5017 *base3
= var
.base
>> 32;
5019 desc
->type
= var
.type
;
5021 desc
->dpl
= var
.dpl
;
5022 desc
->p
= var
.present
;
5023 desc
->avl
= var
.avl
;
5031 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5032 struct desc_struct
*desc
, u32 base3
,
5035 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5036 struct kvm_segment var
;
5038 var
.selector
= selector
;
5039 var
.base
= get_desc_base(desc
);
5040 #ifdef CONFIG_X86_64
5041 var
.base
|= ((u64
)base3
) << 32;
5043 var
.limit
= get_desc_limit(desc
);
5045 var
.limit
= (var
.limit
<< 12) | 0xfff;
5046 var
.type
= desc
->type
;
5047 var
.dpl
= desc
->dpl
;
5052 var
.avl
= desc
->avl
;
5053 var
.present
= desc
->p
;
5054 var
.unusable
= !var
.present
;
5057 kvm_set_segment(vcpu
, &var
, seg
);
5061 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5062 u32 msr_index
, u64
*pdata
)
5064 struct msr_data msr
;
5067 msr
.index
= msr_index
;
5068 msr
.host_initiated
= false;
5069 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5077 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5078 u32 msr_index
, u64 data
)
5080 struct msr_data msr
;
5083 msr
.index
= msr_index
;
5084 msr
.host_initiated
= false;
5085 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5088 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5090 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5092 return vcpu
->arch
.smbase
;
5095 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5097 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5099 vcpu
->arch
.smbase
= smbase
;
5102 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5105 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5108 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5109 u32 pmc
, u64
*pdata
)
5111 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5114 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5116 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5119 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5122 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5125 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5130 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5131 struct x86_instruction_info
*info
,
5132 enum x86_intercept_stage stage
)
5134 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5137 static void emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5138 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
)
5140 kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
);
5143 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5145 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5148 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5150 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5153 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5155 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5158 static const struct x86_emulate_ops emulate_ops
= {
5159 .read_gpr
= emulator_read_gpr
,
5160 .write_gpr
= emulator_write_gpr
,
5161 .read_std
= kvm_read_guest_virt_system
,
5162 .write_std
= kvm_write_guest_virt_system
,
5163 .read_phys
= kvm_read_guest_phys_system
,
5164 .fetch
= kvm_fetch_guest_virt
,
5165 .read_emulated
= emulator_read_emulated
,
5166 .write_emulated
= emulator_write_emulated
,
5167 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5168 .invlpg
= emulator_invlpg
,
5169 .pio_in_emulated
= emulator_pio_in_emulated
,
5170 .pio_out_emulated
= emulator_pio_out_emulated
,
5171 .get_segment
= emulator_get_segment
,
5172 .set_segment
= emulator_set_segment
,
5173 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5174 .get_gdt
= emulator_get_gdt
,
5175 .get_idt
= emulator_get_idt
,
5176 .set_gdt
= emulator_set_gdt
,
5177 .set_idt
= emulator_set_idt
,
5178 .get_cr
= emulator_get_cr
,
5179 .set_cr
= emulator_set_cr
,
5180 .cpl
= emulator_get_cpl
,
5181 .get_dr
= emulator_get_dr
,
5182 .set_dr
= emulator_set_dr
,
5183 .get_smbase
= emulator_get_smbase
,
5184 .set_smbase
= emulator_set_smbase
,
5185 .set_msr
= emulator_set_msr
,
5186 .get_msr
= emulator_get_msr
,
5187 .check_pmc
= emulator_check_pmc
,
5188 .read_pmc
= emulator_read_pmc
,
5189 .halt
= emulator_halt
,
5190 .wbinvd
= emulator_wbinvd
,
5191 .fix_hypercall
= emulator_fix_hypercall
,
5192 .get_fpu
= emulator_get_fpu
,
5193 .put_fpu
= emulator_put_fpu
,
5194 .intercept
= emulator_intercept
,
5195 .get_cpuid
= emulator_get_cpuid
,
5196 .set_nmi_mask
= emulator_set_nmi_mask
,
5199 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5201 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5203 * an sti; sti; sequence only disable interrupts for the first
5204 * instruction. So, if the last instruction, be it emulated or
5205 * not, left the system with the INT_STI flag enabled, it
5206 * means that the last instruction is an sti. We should not
5207 * leave the flag on in this case. The same goes for mov ss
5209 if (int_shadow
& mask
)
5211 if (unlikely(int_shadow
|| mask
)) {
5212 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5214 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5218 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5220 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5221 if (ctxt
->exception
.vector
== PF_VECTOR
)
5222 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5224 if (ctxt
->exception
.error_code_valid
)
5225 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5226 ctxt
->exception
.error_code
);
5228 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5232 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5234 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5237 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5239 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5240 ctxt
->eip
= kvm_rip_read(vcpu
);
5241 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5242 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5243 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5244 cs_db
? X86EMUL_MODE_PROT32
:
5245 X86EMUL_MODE_PROT16
;
5246 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5247 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5248 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5249 ctxt
->emul_flags
= vcpu
->arch
.hflags
;
5251 init_decode_cache(ctxt
);
5252 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5255 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5257 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5260 init_emulate_ctxt(vcpu
);
5264 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5265 ret
= emulate_int_real(ctxt
, irq
);
5267 if (ret
!= X86EMUL_CONTINUE
)
5268 return EMULATE_FAIL
;
5270 ctxt
->eip
= ctxt
->_eip
;
5271 kvm_rip_write(vcpu
, ctxt
->eip
);
5272 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5274 if (irq
== NMI_VECTOR
)
5275 vcpu
->arch
.nmi_pending
= 0;
5277 vcpu
->arch
.interrupt
.pending
= false;
5279 return EMULATE_DONE
;
5281 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5283 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5285 int r
= EMULATE_DONE
;
5287 ++vcpu
->stat
.insn_emulation_fail
;
5288 trace_kvm_emulate_insn_failed(vcpu
);
5289 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5290 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5291 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5292 vcpu
->run
->internal
.ndata
= 0;
5295 kvm_queue_exception(vcpu
, UD_VECTOR
);
5300 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5301 bool write_fault_to_shadow_pgtable
,
5307 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5310 if (!vcpu
->arch
.mmu
.direct_map
) {
5312 * Write permission should be allowed since only
5313 * write access need to be emulated.
5315 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5318 * If the mapping is invalid in guest, let cpu retry
5319 * it to generate fault.
5321 if (gpa
== UNMAPPED_GVA
)
5326 * Do not retry the unhandleable instruction if it faults on the
5327 * readonly host memory, otherwise it will goto a infinite loop:
5328 * retry instruction -> write #PF -> emulation fail -> retry
5329 * instruction -> ...
5331 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5334 * If the instruction failed on the error pfn, it can not be fixed,
5335 * report the error to userspace.
5337 if (is_error_noslot_pfn(pfn
))
5340 kvm_release_pfn_clean(pfn
);
5342 /* The instructions are well-emulated on direct mmu. */
5343 if (vcpu
->arch
.mmu
.direct_map
) {
5344 unsigned int indirect_shadow_pages
;
5346 spin_lock(&vcpu
->kvm
->mmu_lock
);
5347 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5348 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5350 if (indirect_shadow_pages
)
5351 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5357 * if emulation was due to access to shadowed page table
5358 * and it failed try to unshadow page and re-enter the
5359 * guest to let CPU execute the instruction.
5361 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5364 * If the access faults on its page table, it can not
5365 * be fixed by unprotecting shadow page and it should
5366 * be reported to userspace.
5368 return !write_fault_to_shadow_pgtable
;
5371 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5372 unsigned long cr2
, int emulation_type
)
5374 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5375 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5377 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5378 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5381 * If the emulation is caused by #PF and it is non-page_table
5382 * writing instruction, it means the VM-EXIT is caused by shadow
5383 * page protected, we can zap the shadow page and retry this
5384 * instruction directly.
5386 * Note: if the guest uses a non-page-table modifying instruction
5387 * on the PDE that points to the instruction, then we will unmap
5388 * the instruction and go to an infinite loop. So, we cache the
5389 * last retried eip and the last fault address, if we meet the eip
5390 * and the address again, we can break out of the potential infinite
5393 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5395 if (!(emulation_type
& EMULTYPE_RETRY
))
5398 if (x86_page_table_writing_insn(ctxt
))
5401 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5404 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5405 vcpu
->arch
.last_retry_addr
= cr2
;
5407 if (!vcpu
->arch
.mmu
.direct_map
)
5408 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5410 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5415 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5416 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5418 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5420 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5421 /* This is a good place to trace that we are exiting SMM. */
5422 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5424 /* Process a latched INIT or SMI, if any. */
5425 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5428 kvm_mmu_reset_context(vcpu
);
5431 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5433 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5435 vcpu
->arch
.hflags
= emul_flags
;
5437 if (changed
& HF_SMM_MASK
)
5438 kvm_smm_changed(vcpu
);
5441 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5450 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5451 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5456 static void kvm_vcpu_check_singlestep(struct kvm_vcpu
*vcpu
, unsigned long rflags
, int *r
)
5458 struct kvm_run
*kvm_run
= vcpu
->run
;
5461 * rflags is the old, "raw" value of the flags. The new value has
5462 * not been saved yet.
5464 * This is correct even for TF set by the guest, because "the
5465 * processor will not generate this exception after the instruction
5466 * that sets the TF flag".
5468 if (unlikely(rflags
& X86_EFLAGS_TF
)) {
5469 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5470 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
|
5472 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5473 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5474 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5475 *r
= EMULATE_USER_EXIT
;
5478 * "Certain debug exceptions may clear bit 0-3. The
5479 * remaining contents of the DR6 register are never
5480 * cleared by the processor".
5482 vcpu
->arch
.dr6
&= ~15;
5483 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5484 kvm_queue_exception(vcpu
, DB_VECTOR
);
5489 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5491 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5492 int r
= EMULATE_DONE
;
5494 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5495 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5496 return r
== EMULATE_DONE
;
5498 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5500 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5502 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5503 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5504 struct kvm_run
*kvm_run
= vcpu
->run
;
5505 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5506 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5507 vcpu
->arch
.guest_debug_dr7
,
5511 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5512 kvm_run
->debug
.arch
.pc
= eip
;
5513 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5514 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5515 *r
= EMULATE_USER_EXIT
;
5520 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5521 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5522 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5523 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5528 vcpu
->arch
.dr6
&= ~15;
5529 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5530 kvm_queue_exception(vcpu
, DB_VECTOR
);
5539 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5546 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5547 bool writeback
= true;
5548 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5551 * Clear write_fault_to_shadow_pgtable here to ensure it is
5554 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5555 kvm_clear_exception_queue(vcpu
);
5557 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5558 init_emulate_ctxt(vcpu
);
5561 * We will reenter on the same instruction since
5562 * we do not set complete_userspace_io. This does not
5563 * handle watchpoints yet, those would be handled in
5566 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5569 ctxt
->interruptibility
= 0;
5570 ctxt
->have_exception
= false;
5571 ctxt
->exception
.vector
= -1;
5572 ctxt
->perm_ok
= false;
5574 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5576 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5578 trace_kvm_emulate_insn_start(vcpu
);
5579 ++vcpu
->stat
.insn_emulation
;
5580 if (r
!= EMULATION_OK
) {
5581 if (emulation_type
& EMULTYPE_TRAP_UD
)
5582 return EMULATE_FAIL
;
5583 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5585 return EMULATE_DONE
;
5586 if (emulation_type
& EMULTYPE_SKIP
)
5587 return EMULATE_FAIL
;
5588 return handle_emulation_failure(vcpu
);
5592 if (emulation_type
& EMULTYPE_SKIP
) {
5593 kvm_rip_write(vcpu
, ctxt
->_eip
);
5594 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5595 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5596 return EMULATE_DONE
;
5599 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5600 return EMULATE_DONE
;
5602 /* this is needed for vmware backdoor interface to work since it
5603 changes registers values during IO operation */
5604 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5605 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5606 emulator_invalidate_register_cache(ctxt
);
5610 r
= x86_emulate_insn(ctxt
);
5612 if (r
== EMULATION_INTERCEPTED
)
5613 return EMULATE_DONE
;
5615 if (r
== EMULATION_FAILED
) {
5616 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5618 return EMULATE_DONE
;
5620 return handle_emulation_failure(vcpu
);
5623 if (ctxt
->have_exception
) {
5625 if (inject_emulated_exception(vcpu
))
5627 } else if (vcpu
->arch
.pio
.count
) {
5628 if (!vcpu
->arch
.pio
.in
) {
5629 /* FIXME: return into emulator if single-stepping. */
5630 vcpu
->arch
.pio
.count
= 0;
5633 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5635 r
= EMULATE_USER_EXIT
;
5636 } else if (vcpu
->mmio_needed
) {
5637 if (!vcpu
->mmio_is_write
)
5639 r
= EMULATE_USER_EXIT
;
5640 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5641 } else if (r
== EMULATION_RESTART
)
5647 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5648 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5649 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5650 if (vcpu
->arch
.hflags
!= ctxt
->emul_flags
)
5651 kvm_set_hflags(vcpu
, ctxt
->emul_flags
);
5652 kvm_rip_write(vcpu
, ctxt
->eip
);
5653 if (r
== EMULATE_DONE
)
5654 kvm_vcpu_check_singlestep(vcpu
, rflags
, &r
);
5655 if (!ctxt
->have_exception
||
5656 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5657 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5660 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5661 * do nothing, and it will be requested again as soon as
5662 * the shadow expires. But we still need to check here,
5663 * because POPF has no interrupt shadow.
5665 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5666 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5668 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5672 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5674 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5676 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5677 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5678 size
, port
, &val
, 1);
5679 /* do not return to emulator after return from userspace */
5680 vcpu
->arch
.pio
.count
= 0;
5683 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5685 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5689 /* We should only ever be called with arch.pio.count equal to 1 */
5690 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5692 /* For size less than 4 we merge, else we zero extend */
5693 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5697 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5698 * the copy and tracing
5700 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5701 vcpu
->arch
.pio
.port
, &val
, 1);
5702 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5707 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5712 /* For size less than 4 we merge, else we zero extend */
5713 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5715 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5718 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5722 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5726 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5728 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5730 __this_cpu_write(cpu_tsc_khz
, 0);
5734 static void tsc_khz_changed(void *data
)
5736 struct cpufreq_freqs
*freq
= data
;
5737 unsigned long khz
= 0;
5741 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5742 khz
= cpufreq_quick_get(raw_smp_processor_id());
5745 __this_cpu_write(cpu_tsc_khz
, khz
);
5748 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5751 struct cpufreq_freqs
*freq
= data
;
5753 struct kvm_vcpu
*vcpu
;
5754 int i
, send_ipi
= 0;
5757 * We allow guests to temporarily run on slowing clocks,
5758 * provided we notify them after, or to run on accelerating
5759 * clocks, provided we notify them before. Thus time never
5762 * However, we have a problem. We can't atomically update
5763 * the frequency of a given CPU from this function; it is
5764 * merely a notifier, which can be called from any CPU.
5765 * Changing the TSC frequency at arbitrary points in time
5766 * requires a recomputation of local variables related to
5767 * the TSC for each VCPU. We must flag these local variables
5768 * to be updated and be sure the update takes place with the
5769 * new frequency before any guests proceed.
5771 * Unfortunately, the combination of hotplug CPU and frequency
5772 * change creates an intractable locking scenario; the order
5773 * of when these callouts happen is undefined with respect to
5774 * CPU hotplug, and they can race with each other. As such,
5775 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5776 * undefined; you can actually have a CPU frequency change take
5777 * place in between the computation of X and the setting of the
5778 * variable. To protect against this problem, all updates of
5779 * the per_cpu tsc_khz variable are done in an interrupt
5780 * protected IPI, and all callers wishing to update the value
5781 * must wait for a synchronous IPI to complete (which is trivial
5782 * if the caller is on the CPU already). This establishes the
5783 * necessary total order on variable updates.
5785 * Note that because a guest time update may take place
5786 * anytime after the setting of the VCPU's request bit, the
5787 * correct TSC value must be set before the request. However,
5788 * to ensure the update actually makes it to any guest which
5789 * starts running in hardware virtualization between the set
5790 * and the acquisition of the spinlock, we must also ping the
5791 * CPU after setting the request bit.
5795 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5797 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5800 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5802 spin_lock(&kvm_lock
);
5803 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5804 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5805 if (vcpu
->cpu
!= freq
->cpu
)
5807 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5808 if (vcpu
->cpu
!= smp_processor_id())
5812 spin_unlock(&kvm_lock
);
5814 if (freq
->old
< freq
->new && send_ipi
) {
5816 * We upscale the frequency. Must make the guest
5817 * doesn't see old kvmclock values while running with
5818 * the new frequency, otherwise we risk the guest sees
5819 * time go backwards.
5821 * In case we update the frequency for another cpu
5822 * (which might be in guest context) send an interrupt
5823 * to kick the cpu out of guest context. Next time
5824 * guest context is entered kvmclock will be updated,
5825 * so the guest will not see stale values.
5827 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5832 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5833 .notifier_call
= kvmclock_cpufreq_notifier
5836 static int kvmclock_cpu_online(unsigned int cpu
)
5838 tsc_khz_changed(NULL
);
5842 static void kvm_timer_init(void)
5844 max_tsc_khz
= tsc_khz
;
5846 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5847 #ifdef CONFIG_CPU_FREQ
5848 struct cpufreq_policy policy
;
5851 memset(&policy
, 0, sizeof(policy
));
5853 cpufreq_get_policy(&policy
, cpu
);
5854 if (policy
.cpuinfo
.max_freq
)
5855 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5858 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5859 CPUFREQ_TRANSITION_NOTIFIER
);
5861 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5863 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5864 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5867 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5869 int kvm_is_in_guest(void)
5871 return __this_cpu_read(current_vcpu
) != NULL
;
5874 static int kvm_is_user_mode(void)
5878 if (__this_cpu_read(current_vcpu
))
5879 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5881 return user_mode
!= 0;
5884 static unsigned long kvm_get_guest_ip(void)
5886 unsigned long ip
= 0;
5888 if (__this_cpu_read(current_vcpu
))
5889 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5894 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5895 .is_in_guest
= kvm_is_in_guest
,
5896 .is_user_mode
= kvm_is_user_mode
,
5897 .get_guest_ip
= kvm_get_guest_ip
,
5900 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5902 __this_cpu_write(current_vcpu
, vcpu
);
5904 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5906 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5908 __this_cpu_write(current_vcpu
, NULL
);
5910 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5912 static void kvm_set_mmio_spte_mask(void)
5915 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
5918 * Set the reserved bits and the present bit of an paging-structure
5919 * entry to generate page fault with PFER.RSV = 1.
5921 /* Mask the reserved physical address bits. */
5922 mask
= rsvd_bits(maxphyaddr
, 51);
5924 /* Bit 62 is always reserved for 32bit host. */
5925 mask
|= 0x3ull
<< 62;
5927 /* Set the present bit. */
5930 #ifdef CONFIG_X86_64
5932 * If reserved bit is not supported, clear the present bit to disable
5935 if (maxphyaddr
== 52)
5939 kvm_mmu_set_mmio_spte_mask(mask
);
5942 #ifdef CONFIG_X86_64
5943 static void pvclock_gtod_update_fn(struct work_struct
*work
)
5947 struct kvm_vcpu
*vcpu
;
5950 spin_lock(&kvm_lock
);
5951 list_for_each_entry(kvm
, &vm_list
, vm_list
)
5952 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5953 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
5954 atomic_set(&kvm_guest_has_master_clock
, 0);
5955 spin_unlock(&kvm_lock
);
5958 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
5961 * Notification about pvclock gtod data update.
5963 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
5966 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
5967 struct timekeeper
*tk
= priv
;
5969 update_pvclock_gtod(tk
);
5971 /* disable master clock if host does not trust, or does not
5972 * use, TSC clocksource
5974 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
5975 atomic_read(&kvm_guest_has_master_clock
) != 0)
5976 queue_work(system_long_wq
, &pvclock_gtod_work
);
5981 static struct notifier_block pvclock_gtod_notifier
= {
5982 .notifier_call
= pvclock_gtod_notify
,
5986 int kvm_arch_init(void *opaque
)
5989 struct kvm_x86_ops
*ops
= opaque
;
5992 printk(KERN_ERR
"kvm: already loaded the other module\n");
5997 if (!ops
->cpu_has_kvm_support()) {
5998 printk(KERN_ERR
"kvm: no hardware support\n");
6002 if (ops
->disabled_by_bios()) {
6003 printk(KERN_ERR
"kvm: disabled by bios\n");
6009 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6011 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6015 r
= kvm_mmu_module_init();
6017 goto out_free_percpu
;
6019 kvm_set_mmio_spte_mask();
6023 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6024 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6028 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6030 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6031 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6034 #ifdef CONFIG_X86_64
6035 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6041 free_percpu(shared_msrs
);
6046 void kvm_arch_exit(void)
6048 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6050 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6051 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6052 CPUFREQ_TRANSITION_NOTIFIER
);
6053 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6054 #ifdef CONFIG_X86_64
6055 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6058 kvm_mmu_module_exit();
6059 free_percpu(shared_msrs
);
6062 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6064 ++vcpu
->stat
.halt_exits
;
6065 if (lapic_in_kernel(vcpu
)) {
6066 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6069 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6073 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6075 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6077 int ret
= kvm_skip_emulated_instruction(vcpu
);
6079 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6080 * KVM_EXIT_DEBUG here.
6082 return kvm_vcpu_halt(vcpu
) && ret
;
6084 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6087 * kvm_pv_kick_cpu_op: Kick a vcpu.
6089 * @apicid - apicid of vcpu to be kicked.
6091 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6093 struct kvm_lapic_irq lapic_irq
;
6095 lapic_irq
.shorthand
= 0;
6096 lapic_irq
.dest_mode
= 0;
6097 lapic_irq
.dest_id
= apicid
;
6098 lapic_irq
.msi_redir_hint
= false;
6100 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6101 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6104 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6106 vcpu
->arch
.apicv_active
= false;
6107 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6110 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6112 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6115 r
= kvm_skip_emulated_instruction(vcpu
);
6117 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6118 return kvm_hv_hypercall(vcpu
);
6120 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6121 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6122 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6123 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6124 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6126 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6128 op_64_bit
= is_64_bit_mode(vcpu
);
6137 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6143 case KVM_HC_VAPIC_POLL_IRQ
:
6146 case KVM_HC_KICK_CPU
:
6147 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6157 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6158 ++vcpu
->stat
.hypercalls
;
6161 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6163 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6165 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6166 char instruction
[3];
6167 unsigned long rip
= kvm_rip_read(vcpu
);
6169 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6171 return emulator_write_emulated(ctxt
, rip
, instruction
, 3, NULL
);
6174 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6176 return vcpu
->run
->request_interrupt_window
&&
6177 likely(!pic_in_kernel(vcpu
->kvm
));
6180 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6182 struct kvm_run
*kvm_run
= vcpu
->run
;
6184 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6185 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6186 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6187 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6188 kvm_run
->ready_for_interrupt_injection
=
6189 pic_in_kernel(vcpu
->kvm
) ||
6190 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6193 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6197 if (!kvm_x86_ops
->update_cr8_intercept
)
6200 if (!lapic_in_kernel(vcpu
))
6203 if (vcpu
->arch
.apicv_active
)
6206 if (!vcpu
->arch
.apic
->vapic_addr
)
6207 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6214 tpr
= kvm_lapic_get_cr8(vcpu
);
6216 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6219 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6223 /* try to reinject previous events if any */
6224 if (vcpu
->arch
.exception
.pending
) {
6225 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6226 vcpu
->arch
.exception
.has_error_code
,
6227 vcpu
->arch
.exception
.error_code
);
6229 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6230 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6233 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6234 (vcpu
->arch
.dr7
& DR7_GD
)) {
6235 vcpu
->arch
.dr7
&= ~DR7_GD
;
6236 kvm_update_dr7(vcpu
);
6239 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
6240 vcpu
->arch
.exception
.has_error_code
,
6241 vcpu
->arch
.exception
.error_code
,
6242 vcpu
->arch
.exception
.reinject
);
6246 if (vcpu
->arch
.nmi_injected
) {
6247 kvm_x86_ops
->set_nmi(vcpu
);
6251 if (vcpu
->arch
.interrupt
.pending
) {
6252 kvm_x86_ops
->set_irq(vcpu
);
6256 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6257 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6262 /* try to inject new event if pending */
6263 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6264 vcpu
->arch
.smi_pending
= false;
6266 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6267 --vcpu
->arch
.nmi_pending
;
6268 vcpu
->arch
.nmi_injected
= true;
6269 kvm_x86_ops
->set_nmi(vcpu
);
6270 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6272 * Because interrupts can be injected asynchronously, we are
6273 * calling check_nested_events again here to avoid a race condition.
6274 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6275 * proposal and current concerns. Perhaps we should be setting
6276 * KVM_REQ_EVENT only on certain events and not unconditionally?
6278 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6279 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6283 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6284 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6286 kvm_x86_ops
->set_irq(vcpu
);
6293 static void process_nmi(struct kvm_vcpu
*vcpu
)
6298 * x86 is limited to one NMI running, and one NMI pending after it.
6299 * If an NMI is already in progress, limit further NMIs to just one.
6300 * Otherwise, allow two (and we'll inject the first one immediately).
6302 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6305 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6306 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6307 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6310 #define put_smstate(type, buf, offset, val) \
6311 *(type *)((buf) + (offset) - 0x7e00) = val
6313 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6316 flags
|= seg
->g
<< 23;
6317 flags
|= seg
->db
<< 22;
6318 flags
|= seg
->l
<< 21;
6319 flags
|= seg
->avl
<< 20;
6320 flags
|= seg
->present
<< 15;
6321 flags
|= seg
->dpl
<< 13;
6322 flags
|= seg
->s
<< 12;
6323 flags
|= seg
->type
<< 8;
6327 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6329 struct kvm_segment seg
;
6332 kvm_get_segment(vcpu
, &seg
, n
);
6333 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6336 offset
= 0x7f84 + n
* 12;
6338 offset
= 0x7f2c + (n
- 3) * 12;
6340 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6341 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6342 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6345 #ifdef CONFIG_X86_64
6346 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6348 struct kvm_segment seg
;
6352 kvm_get_segment(vcpu
, &seg
, n
);
6353 offset
= 0x7e00 + n
* 16;
6355 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6356 put_smstate(u16
, buf
, offset
, seg
.selector
);
6357 put_smstate(u16
, buf
, offset
+ 2, flags
);
6358 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6359 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6363 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6366 struct kvm_segment seg
;
6370 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6371 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6372 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6373 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6375 for (i
= 0; i
< 8; i
++)
6376 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6378 kvm_get_dr(vcpu
, 6, &val
);
6379 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6380 kvm_get_dr(vcpu
, 7, &val
);
6381 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6383 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6384 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6385 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6386 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6387 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6389 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6390 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6391 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6392 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6393 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6395 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6396 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6397 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6399 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6400 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6401 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6403 for (i
= 0; i
< 6; i
++)
6404 enter_smm_save_seg_32(vcpu
, buf
, i
);
6406 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6409 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6410 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6413 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6415 #ifdef CONFIG_X86_64
6417 struct kvm_segment seg
;
6421 for (i
= 0; i
< 16; i
++)
6422 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6424 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6425 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6427 kvm_get_dr(vcpu
, 6, &val
);
6428 put_smstate(u64
, buf
, 0x7f68, val
);
6429 kvm_get_dr(vcpu
, 7, &val
);
6430 put_smstate(u64
, buf
, 0x7f60, val
);
6432 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6433 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6434 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6436 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6439 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6441 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6443 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6444 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6445 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6446 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6447 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6449 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6450 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6451 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6453 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6454 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6455 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6456 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6457 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6459 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6460 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6461 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6463 for (i
= 0; i
< 6; i
++)
6464 enter_smm_save_seg_64(vcpu
, buf
, i
);
6470 static void enter_smm(struct kvm_vcpu
*vcpu
)
6472 struct kvm_segment cs
, ds
;
6477 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6478 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6479 memset(buf
, 0, 512);
6480 if (guest_cpuid_has_longmode(vcpu
))
6481 enter_smm_save_state_64(vcpu
, buf
);
6483 enter_smm_save_state_32(vcpu
, buf
);
6485 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6487 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6488 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6490 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6492 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6493 kvm_rip_write(vcpu
, 0x8000);
6495 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6496 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6497 vcpu
->arch
.cr0
= cr0
;
6499 kvm_x86_ops
->set_cr4(vcpu
, 0);
6501 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6502 dt
.address
= dt
.size
= 0;
6503 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6505 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6507 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6508 cs
.base
= vcpu
->arch
.smbase
;
6513 cs
.limit
= ds
.limit
= 0xffffffff;
6514 cs
.type
= ds
.type
= 0x3;
6515 cs
.dpl
= ds
.dpl
= 0;
6520 cs
.avl
= ds
.avl
= 0;
6521 cs
.present
= ds
.present
= 1;
6522 cs
.unusable
= ds
.unusable
= 0;
6523 cs
.padding
= ds
.padding
= 0;
6525 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6526 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6527 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6528 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6529 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6530 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6532 if (guest_cpuid_has_longmode(vcpu
))
6533 kvm_x86_ops
->set_efer(vcpu
, 0);
6535 kvm_update_cpuid(vcpu
);
6536 kvm_mmu_reset_context(vcpu
);
6539 static void process_smi(struct kvm_vcpu
*vcpu
)
6541 vcpu
->arch
.smi_pending
= true;
6542 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6545 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6547 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6550 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6552 u64 eoi_exit_bitmap
[4];
6554 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6557 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6559 if (irqchip_split(vcpu
->kvm
))
6560 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6562 if (vcpu
->arch
.apicv_active
)
6563 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6564 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6566 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6567 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6568 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6571 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6573 ++vcpu
->stat
.tlb_flush
;
6574 kvm_x86_ops
->tlb_flush(vcpu
);
6577 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6579 struct page
*page
= NULL
;
6581 if (!lapic_in_kernel(vcpu
))
6584 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6587 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6588 if (is_error_page(page
))
6590 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6593 * Do not pin apic access page in memory, the MMU notifier
6594 * will call us again if it is migrated or swapped out.
6598 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6600 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6601 unsigned long address
)
6604 * The physical address of apic access page is stored in the VMCS.
6605 * Update it when it becomes invalid.
6607 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6608 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6612 * Returns 1 to let vcpu_run() continue the guest execution loop without
6613 * exiting to the userspace. Otherwise, the value will be returned to the
6616 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6620 dm_request_for_irq_injection(vcpu
) &&
6621 kvm_cpu_accept_dm_intr(vcpu
);
6623 bool req_immediate_exit
= false;
6625 if (vcpu
->requests
) {
6626 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6627 kvm_mmu_unload(vcpu
);
6628 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6629 __kvm_migrate_timers(vcpu
);
6630 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6631 kvm_gen_update_masterclock(vcpu
->kvm
);
6632 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6633 kvm_gen_kvmclock_update(vcpu
);
6634 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6635 r
= kvm_guest_time_update(vcpu
);
6639 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6640 kvm_mmu_sync_roots(vcpu
);
6641 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6642 kvm_vcpu_flush_tlb(vcpu
);
6643 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6644 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6648 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6649 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6653 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU
, vcpu
)) {
6654 vcpu
->fpu_active
= 0;
6655 kvm_x86_ops
->fpu_deactivate(vcpu
);
6657 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6658 /* Page is swapped out. Do synthetic halt */
6659 vcpu
->arch
.apf
.halted
= true;
6663 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6664 record_steal_time(vcpu
);
6665 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6667 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6669 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6670 kvm_pmu_handle_event(vcpu
);
6671 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6672 kvm_pmu_deliver_pmi(vcpu
);
6673 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6674 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6675 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6676 vcpu
->arch
.ioapic_handled_vectors
)) {
6677 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6678 vcpu
->run
->eoi
.vector
=
6679 vcpu
->arch
.pending_ioapic_eoi
;
6684 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6685 vcpu_scan_ioapic(vcpu
);
6686 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6687 kvm_vcpu_reload_apic_access_page(vcpu
);
6688 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6689 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6690 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6694 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6695 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6696 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6700 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6701 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6702 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6708 * KVM_REQ_HV_STIMER has to be processed after
6709 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6710 * depend on the guest clock being up-to-date
6712 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6713 kvm_hv_process_stimers(vcpu
);
6717 * KVM_REQ_EVENT is not set when posted interrupts are set by
6718 * VT-d hardware, so we have to update RVI unconditionally.
6720 if (kvm_lapic_enabled(vcpu
)) {
6722 * Update architecture specific hints for APIC
6723 * virtual interrupt delivery.
6725 if (vcpu
->arch
.apicv_active
)
6726 kvm_x86_ops
->hwapic_irr_update(vcpu
,
6727 kvm_lapic_find_highest_irr(vcpu
));
6730 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6731 kvm_apic_accept_events(vcpu
);
6732 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6737 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6738 req_immediate_exit
= true;
6740 /* Enable NMI/IRQ window open exits if needed.
6742 * SMIs have two cases: 1) they can be nested, and
6743 * then there is nothing to do here because RSM will
6744 * cause a vmexit anyway; 2) or the SMI can be pending
6745 * because inject_pending_event has completed the
6746 * injection of an IRQ or NMI from the previous vmexit,
6747 * and then we request an immediate exit to inject the SMI.
6749 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6750 req_immediate_exit
= true;
6751 if (vcpu
->arch
.nmi_pending
)
6752 kvm_x86_ops
->enable_nmi_window(vcpu
);
6753 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6754 kvm_x86_ops
->enable_irq_window(vcpu
);
6757 if (kvm_lapic_enabled(vcpu
)) {
6758 update_cr8_intercept(vcpu
);
6759 kvm_lapic_sync_to_vapic(vcpu
);
6763 r
= kvm_mmu_reload(vcpu
);
6765 goto cancel_injection
;
6770 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6771 if (vcpu
->fpu_active
)
6772 kvm_load_guest_fpu(vcpu
);
6773 vcpu
->mode
= IN_GUEST_MODE
;
6775 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6778 * We should set ->mode before check ->requests,
6779 * Please see the comment in kvm_make_all_cpus_request.
6780 * This also orders the write to mode from any reads
6781 * to the page tables done while the VCPU is running.
6782 * Please see the comment in kvm_flush_remote_tlbs.
6784 smp_mb__after_srcu_read_unlock();
6786 local_irq_disable();
6788 if (vcpu
->mode
== EXITING_GUEST_MODE
|| vcpu
->requests
6789 || need_resched() || signal_pending(current
)) {
6790 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6794 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6796 goto cancel_injection
;
6799 kvm_load_guest_xcr0(vcpu
);
6801 if (req_immediate_exit
) {
6802 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6803 smp_send_reschedule(vcpu
->cpu
);
6806 trace_kvm_entry(vcpu
->vcpu_id
);
6807 wait_lapic_expire(vcpu
);
6808 guest_enter_irqoff();
6810 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6812 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6813 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6814 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6815 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6816 set_debugreg(vcpu
->arch
.dr6
, 6);
6817 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6820 kvm_x86_ops
->run(vcpu
);
6823 * Do this here before restoring debug registers on the host. And
6824 * since we do this before handling the vmexit, a DR access vmexit
6825 * can (a) read the correct value of the debug registers, (b) set
6826 * KVM_DEBUGREG_WONT_EXIT again.
6828 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6829 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6830 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6831 kvm_update_dr0123(vcpu
);
6832 kvm_update_dr6(vcpu
);
6833 kvm_update_dr7(vcpu
);
6834 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6838 * If the guest has used debug registers, at least dr7
6839 * will be disabled while returning to the host.
6840 * If we don't have active breakpoints in the host, we don't
6841 * care about the messed up debug address registers. But if
6842 * we have some of them active, restore the old state.
6844 if (hw_breakpoint_active())
6845 hw_breakpoint_restore();
6847 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6849 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6852 kvm_put_guest_xcr0(vcpu
);
6854 kvm_x86_ops
->handle_external_intr(vcpu
);
6858 guest_exit_irqoff();
6863 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6866 * Profile KVM exit RIPs:
6868 if (unlikely(prof_on
== KVM_PROFILING
)) {
6869 unsigned long rip
= kvm_rip_read(vcpu
);
6870 profile_hit(KVM_PROFILING
, (void *)rip
);
6873 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6874 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6876 if (vcpu
->arch
.apic_attention
)
6877 kvm_lapic_sync_from_vapic(vcpu
);
6879 r
= kvm_x86_ops
->handle_exit(vcpu
);
6883 kvm_x86_ops
->cancel_injection(vcpu
);
6884 if (unlikely(vcpu
->arch
.apic_attention
))
6885 kvm_lapic_sync_from_vapic(vcpu
);
6890 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
6892 if (!kvm_arch_vcpu_runnable(vcpu
) &&
6893 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
6894 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6895 kvm_vcpu_block(vcpu
);
6896 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6898 if (kvm_x86_ops
->post_block
)
6899 kvm_x86_ops
->post_block(vcpu
);
6901 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
6905 kvm_apic_accept_events(vcpu
);
6906 switch(vcpu
->arch
.mp_state
) {
6907 case KVM_MP_STATE_HALTED
:
6908 vcpu
->arch
.pv
.pv_unhalted
= false;
6909 vcpu
->arch
.mp_state
=
6910 KVM_MP_STATE_RUNNABLE
;
6911 case KVM_MP_STATE_RUNNABLE
:
6912 vcpu
->arch
.apf
.halted
= false;
6914 case KVM_MP_STATE_INIT_RECEIVED
:
6923 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
6925 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
6926 !vcpu
->arch
.apf
.halted
);
6929 static int vcpu_run(struct kvm_vcpu
*vcpu
)
6932 struct kvm
*kvm
= vcpu
->kvm
;
6934 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6937 if (kvm_vcpu_running(vcpu
)) {
6938 r
= vcpu_enter_guest(vcpu
);
6940 r
= vcpu_block(kvm
, vcpu
);
6946 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
6947 if (kvm_cpu_has_pending_timer(vcpu
))
6948 kvm_inject_pending_timer_irqs(vcpu
);
6950 if (dm_request_for_irq_injection(vcpu
) &&
6951 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
6953 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
6954 ++vcpu
->stat
.request_irq_exits
;
6958 kvm_check_async_pf_completion(vcpu
);
6960 if (signal_pending(current
)) {
6962 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
6963 ++vcpu
->stat
.signal_exits
;
6966 if (need_resched()) {
6967 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6969 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
6973 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
6978 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
6981 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6982 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
6983 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6984 if (r
!= EMULATE_DONE
)
6989 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
6991 BUG_ON(!vcpu
->arch
.pio
.count
);
6993 return complete_emulated_io(vcpu
);
6997 * Implements the following, as a state machine:
7001 * for each mmio piece in the fragment
7009 * for each mmio piece in the fragment
7014 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7016 struct kvm_run
*run
= vcpu
->run
;
7017 struct kvm_mmio_fragment
*frag
;
7020 BUG_ON(!vcpu
->mmio_needed
);
7022 /* Complete previous fragment */
7023 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7024 len
= min(8u, frag
->len
);
7025 if (!vcpu
->mmio_is_write
)
7026 memcpy(frag
->data
, run
->mmio
.data
, len
);
7028 if (frag
->len
<= 8) {
7029 /* Switch to the next fragment. */
7031 vcpu
->mmio_cur_fragment
++;
7033 /* Go forward to the next mmio piece. */
7039 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7040 vcpu
->mmio_needed
= 0;
7042 /* FIXME: return into emulator if single-stepping. */
7043 if (vcpu
->mmio_is_write
)
7045 vcpu
->mmio_read_completed
= 1;
7046 return complete_emulated_io(vcpu
);
7049 run
->exit_reason
= KVM_EXIT_MMIO
;
7050 run
->mmio
.phys_addr
= frag
->gpa
;
7051 if (vcpu
->mmio_is_write
)
7052 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7053 run
->mmio
.len
= min(8u, frag
->len
);
7054 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7055 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7060 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7062 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7066 fpu__activate_curr(fpu
);
7068 if (vcpu
->sigset_active
)
7069 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7071 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7072 kvm_vcpu_block(vcpu
);
7073 kvm_apic_accept_events(vcpu
);
7074 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
7079 /* re-sync apic's tpr */
7080 if (!lapic_in_kernel(vcpu
)) {
7081 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7087 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7088 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7089 vcpu
->arch
.complete_userspace_io
= NULL
;
7094 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7099 post_kvm_run_save(vcpu
);
7100 if (vcpu
->sigset_active
)
7101 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7106 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7108 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7110 * We are here if userspace calls get_regs() in the middle of
7111 * instruction emulation. Registers state needs to be copied
7112 * back from emulation context to vcpu. Userspace shouldn't do
7113 * that usually, but some bad designed PV devices (vmware
7114 * backdoor interface) need this to work
7116 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7117 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7119 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7120 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7121 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7122 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7123 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7124 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7125 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7126 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7127 #ifdef CONFIG_X86_64
7128 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7129 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7130 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7131 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7132 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7133 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7134 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7135 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7138 regs
->rip
= kvm_rip_read(vcpu
);
7139 regs
->rflags
= kvm_get_rflags(vcpu
);
7144 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7146 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7147 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7149 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7150 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7151 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7152 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7153 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7154 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7155 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7156 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7157 #ifdef CONFIG_X86_64
7158 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7159 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7160 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7161 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7162 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7163 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7164 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7165 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7168 kvm_rip_write(vcpu
, regs
->rip
);
7169 kvm_set_rflags(vcpu
, regs
->rflags
);
7171 vcpu
->arch
.exception
.pending
= false;
7173 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7178 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7180 struct kvm_segment cs
;
7182 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7186 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7188 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7189 struct kvm_sregs
*sregs
)
7193 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7194 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7195 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7196 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7197 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7198 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7200 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7201 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7203 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7204 sregs
->idt
.limit
= dt
.size
;
7205 sregs
->idt
.base
= dt
.address
;
7206 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7207 sregs
->gdt
.limit
= dt
.size
;
7208 sregs
->gdt
.base
= dt
.address
;
7210 sregs
->cr0
= kvm_read_cr0(vcpu
);
7211 sregs
->cr2
= vcpu
->arch
.cr2
;
7212 sregs
->cr3
= kvm_read_cr3(vcpu
);
7213 sregs
->cr4
= kvm_read_cr4(vcpu
);
7214 sregs
->cr8
= kvm_get_cr8(vcpu
);
7215 sregs
->efer
= vcpu
->arch
.efer
;
7216 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7218 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7220 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7221 set_bit(vcpu
->arch
.interrupt
.nr
,
7222 (unsigned long *)sregs
->interrupt_bitmap
);
7227 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7228 struct kvm_mp_state
*mp_state
)
7230 kvm_apic_accept_events(vcpu
);
7231 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7232 vcpu
->arch
.pv
.pv_unhalted
)
7233 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7235 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7240 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7241 struct kvm_mp_state
*mp_state
)
7243 if (!lapic_in_kernel(vcpu
) &&
7244 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7247 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7248 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7249 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7251 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7252 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7256 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7257 int reason
, bool has_error_code
, u32 error_code
)
7259 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7262 init_emulate_ctxt(vcpu
);
7264 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7265 has_error_code
, error_code
);
7268 return EMULATE_FAIL
;
7270 kvm_rip_write(vcpu
, ctxt
->eip
);
7271 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7272 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7273 return EMULATE_DONE
;
7275 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7277 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7278 struct kvm_sregs
*sregs
)
7280 struct msr_data apic_base_msr
;
7281 int mmu_reset_needed
= 0;
7282 int pending_vec
, max_bits
, idx
;
7285 if (!guest_cpuid_has_xsave(vcpu
) && (sregs
->cr4
& X86_CR4_OSXSAVE
))
7288 dt
.size
= sregs
->idt
.limit
;
7289 dt
.address
= sregs
->idt
.base
;
7290 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7291 dt
.size
= sregs
->gdt
.limit
;
7292 dt
.address
= sregs
->gdt
.base
;
7293 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7295 vcpu
->arch
.cr2
= sregs
->cr2
;
7296 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7297 vcpu
->arch
.cr3
= sregs
->cr3
;
7298 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7300 kvm_set_cr8(vcpu
, sregs
->cr8
);
7302 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7303 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7304 apic_base_msr
.data
= sregs
->apic_base
;
7305 apic_base_msr
.host_initiated
= true;
7306 kvm_set_apic_base(vcpu
, &apic_base_msr
);
7308 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7309 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7310 vcpu
->arch
.cr0
= sregs
->cr0
;
7312 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7313 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7314 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7315 kvm_update_cpuid(vcpu
);
7317 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7318 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7319 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7320 mmu_reset_needed
= 1;
7322 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7324 if (mmu_reset_needed
)
7325 kvm_mmu_reset_context(vcpu
);
7327 max_bits
= KVM_NR_INTERRUPTS
;
7328 pending_vec
= find_first_bit(
7329 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7330 if (pending_vec
< max_bits
) {
7331 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7332 pr_debug("Set back pending irq %d\n", pending_vec
);
7335 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7336 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7337 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7338 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7339 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7340 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7342 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7343 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7345 update_cr8_intercept(vcpu
);
7347 /* Older userspace won't unhalt the vcpu on reset. */
7348 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7349 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7351 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7353 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7358 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7359 struct kvm_guest_debug
*dbg
)
7361 unsigned long rflags
;
7364 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7366 if (vcpu
->arch
.exception
.pending
)
7368 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7369 kvm_queue_exception(vcpu
, DB_VECTOR
);
7371 kvm_queue_exception(vcpu
, BP_VECTOR
);
7375 * Read rflags as long as potentially injected trace flags are still
7378 rflags
= kvm_get_rflags(vcpu
);
7380 vcpu
->guest_debug
= dbg
->control
;
7381 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7382 vcpu
->guest_debug
= 0;
7384 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7385 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7386 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7387 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7389 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7390 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7392 kvm_update_dr7(vcpu
);
7394 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7395 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7396 get_segment_base(vcpu
, VCPU_SREG_CS
);
7399 * Trigger an rflags update that will inject or remove the trace
7402 kvm_set_rflags(vcpu
, rflags
);
7404 kvm_x86_ops
->update_bp_intercept(vcpu
);
7414 * Translate a guest virtual address to a guest physical address.
7416 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7417 struct kvm_translation
*tr
)
7419 unsigned long vaddr
= tr
->linear_address
;
7423 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7424 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7425 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7426 tr
->physical_address
= gpa
;
7427 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7434 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7436 struct fxregs_state
*fxsave
=
7437 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7439 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7440 fpu
->fcw
= fxsave
->cwd
;
7441 fpu
->fsw
= fxsave
->swd
;
7442 fpu
->ftwx
= fxsave
->twd
;
7443 fpu
->last_opcode
= fxsave
->fop
;
7444 fpu
->last_ip
= fxsave
->rip
;
7445 fpu
->last_dp
= fxsave
->rdp
;
7446 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7451 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7453 struct fxregs_state
*fxsave
=
7454 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7456 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7457 fxsave
->cwd
= fpu
->fcw
;
7458 fxsave
->swd
= fpu
->fsw
;
7459 fxsave
->twd
= fpu
->ftwx
;
7460 fxsave
->fop
= fpu
->last_opcode
;
7461 fxsave
->rip
= fpu
->last_ip
;
7462 fxsave
->rdp
= fpu
->last_dp
;
7463 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7468 static void fx_init(struct kvm_vcpu
*vcpu
)
7470 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7471 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7472 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7473 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7476 * Ensure guest xcr0 is valid for loading
7478 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7480 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7483 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7485 if (vcpu
->guest_fpu_loaded
)
7489 * Restore all possible states in the guest,
7490 * and assume host would use all available bits.
7491 * Guest xcr0 would be loaded later.
7493 vcpu
->guest_fpu_loaded
= 1;
7494 __kernel_fpu_begin();
7495 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7499 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7501 if (!vcpu
->guest_fpu_loaded
)
7504 vcpu
->guest_fpu_loaded
= 0;
7505 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7507 ++vcpu
->stat
.fpu_reload
;
7511 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7513 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7515 kvmclock_reset(vcpu
);
7517 kvm_x86_ops
->vcpu_free(vcpu
);
7518 free_cpumask_var(wbinvd_dirty_mask
);
7521 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7524 struct kvm_vcpu
*vcpu
;
7526 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7527 printk_once(KERN_WARNING
7528 "kvm: SMP vm created on host with unstable TSC; "
7529 "guest TSC will not be reliable\n");
7531 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7536 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7540 kvm_vcpu_mtrr_init(vcpu
);
7541 r
= vcpu_load(vcpu
);
7544 kvm_vcpu_reset(vcpu
, false);
7545 kvm_mmu_setup(vcpu
);
7550 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7552 struct msr_data msr
;
7553 struct kvm
*kvm
= vcpu
->kvm
;
7555 if (vcpu_load(vcpu
))
7558 msr
.index
= MSR_IA32_TSC
;
7559 msr
.host_initiated
= true;
7560 kvm_write_tsc(vcpu
, &msr
);
7563 if (!kvmclock_periodic_sync
)
7566 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7567 KVMCLOCK_SYNC_PERIOD
);
7570 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7573 vcpu
->arch
.apf
.msr_val
= 0;
7575 r
= vcpu_load(vcpu
);
7577 kvm_mmu_unload(vcpu
);
7580 kvm_x86_ops
->vcpu_free(vcpu
);
7583 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7585 vcpu
->arch
.hflags
= 0;
7587 vcpu
->arch
.smi_pending
= 0;
7588 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7589 vcpu
->arch
.nmi_pending
= 0;
7590 vcpu
->arch
.nmi_injected
= false;
7591 kvm_clear_interrupt_queue(vcpu
);
7592 kvm_clear_exception_queue(vcpu
);
7594 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7595 kvm_update_dr0123(vcpu
);
7596 vcpu
->arch
.dr6
= DR6_INIT
;
7597 kvm_update_dr6(vcpu
);
7598 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7599 kvm_update_dr7(vcpu
);
7603 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7604 vcpu
->arch
.apf
.msr_val
= 0;
7605 vcpu
->arch
.st
.msr_val
= 0;
7607 kvmclock_reset(vcpu
);
7609 kvm_clear_async_pf_completion_queue(vcpu
);
7610 kvm_async_pf_hash_reset(vcpu
);
7611 vcpu
->arch
.apf
.halted
= false;
7614 kvm_pmu_reset(vcpu
);
7615 vcpu
->arch
.smbase
= 0x30000;
7618 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7619 vcpu
->arch
.regs_avail
= ~0;
7620 vcpu
->arch
.regs_dirty
= ~0;
7622 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7625 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7627 struct kvm_segment cs
;
7629 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7630 cs
.selector
= vector
<< 8;
7631 cs
.base
= vector
<< 12;
7632 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7633 kvm_rip_write(vcpu
, 0);
7636 int kvm_arch_hardware_enable(void)
7639 struct kvm_vcpu
*vcpu
;
7644 bool stable
, backwards_tsc
= false;
7646 kvm_shared_msr_cpu_online();
7647 ret
= kvm_x86_ops
->hardware_enable();
7651 local_tsc
= rdtsc();
7652 stable
= !check_tsc_unstable();
7653 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7654 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7655 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7656 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7657 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7658 backwards_tsc
= true;
7659 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7660 max_tsc
= vcpu
->arch
.last_host_tsc
;
7666 * Sometimes, even reliable TSCs go backwards. This happens on
7667 * platforms that reset TSC during suspend or hibernate actions, but
7668 * maintain synchronization. We must compensate. Fortunately, we can
7669 * detect that condition here, which happens early in CPU bringup,
7670 * before any KVM threads can be running. Unfortunately, we can't
7671 * bring the TSCs fully up to date with real time, as we aren't yet far
7672 * enough into CPU bringup that we know how much real time has actually
7673 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7674 * variables that haven't been updated yet.
7676 * So we simply find the maximum observed TSC above, then record the
7677 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7678 * the adjustment will be applied. Note that we accumulate
7679 * adjustments, in case multiple suspend cycles happen before some VCPU
7680 * gets a chance to run again. In the event that no KVM threads get a
7681 * chance to run, we will miss the entire elapsed period, as we'll have
7682 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7683 * loose cycle time. This isn't too big a deal, since the loss will be
7684 * uniform across all VCPUs (not to mention the scenario is extremely
7685 * unlikely). It is possible that a second hibernate recovery happens
7686 * much faster than a first, causing the observed TSC here to be
7687 * smaller; this would require additional padding adjustment, which is
7688 * why we set last_host_tsc to the local tsc observed here.
7690 * N.B. - this code below runs only on platforms with reliable TSC,
7691 * as that is the only way backwards_tsc is set above. Also note
7692 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7693 * have the same delta_cyc adjustment applied if backwards_tsc
7694 * is detected. Note further, this adjustment is only done once,
7695 * as we reset last_host_tsc on all VCPUs to stop this from being
7696 * called multiple times (one for each physical CPU bringup).
7698 * Platforms with unreliable TSCs don't have to deal with this, they
7699 * will be compensated by the logic in vcpu_load, which sets the TSC to
7700 * catchup mode. This will catchup all VCPUs to real time, but cannot
7701 * guarantee that they stay in perfect synchronization.
7703 if (backwards_tsc
) {
7704 u64 delta_cyc
= max_tsc
- local_tsc
;
7705 backwards_tsc_observed
= true;
7706 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7707 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7708 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7709 vcpu
->arch
.last_host_tsc
= local_tsc
;
7710 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7714 * We have to disable TSC offset matching.. if you were
7715 * booting a VM while issuing an S4 host suspend....
7716 * you may have some problem. Solving this issue is
7717 * left as an exercise to the reader.
7719 kvm
->arch
.last_tsc_nsec
= 0;
7720 kvm
->arch
.last_tsc_write
= 0;
7727 void kvm_arch_hardware_disable(void)
7729 kvm_x86_ops
->hardware_disable();
7730 drop_user_return_notifiers();
7733 int kvm_arch_hardware_setup(void)
7737 r
= kvm_x86_ops
->hardware_setup();
7741 if (kvm_has_tsc_control
) {
7743 * Make sure the user can only configure tsc_khz values that
7744 * fit into a signed integer.
7745 * A min value is not calculated needed because it will always
7746 * be 1 on all machines.
7748 u64 max
= min(0x7fffffffULL
,
7749 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7750 kvm_max_guest_tsc_khz
= max
;
7752 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7755 kvm_init_msr_list();
7759 void kvm_arch_hardware_unsetup(void)
7761 kvm_x86_ops
->hardware_unsetup();
7764 void kvm_arch_check_processor_compat(void *rtn
)
7766 kvm_x86_ops
->check_processor_compatibility(rtn
);
7769 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7771 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7773 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7775 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7777 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7780 struct static_key kvm_no_apic_vcpu __read_mostly
;
7781 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7783 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7789 BUG_ON(vcpu
->kvm
== NULL
);
7792 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7793 vcpu
->arch
.pv
.pv_unhalted
= false;
7794 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7795 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7796 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7798 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7800 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7805 vcpu
->arch
.pio_data
= page_address(page
);
7807 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7809 r
= kvm_mmu_create(vcpu
);
7811 goto fail_free_pio_data
;
7813 if (irqchip_in_kernel(kvm
)) {
7814 r
= kvm_create_lapic(vcpu
);
7816 goto fail_mmu_destroy
;
7818 static_key_slow_inc(&kvm_no_apic_vcpu
);
7820 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7822 if (!vcpu
->arch
.mce_banks
) {
7824 goto fail_free_lapic
;
7826 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7828 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7830 goto fail_free_mce_banks
;
7835 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7836 vcpu
->arch
.pv_time_enabled
= false;
7838 vcpu
->arch
.guest_supported_xcr0
= 0;
7839 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7841 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7843 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7845 kvm_async_pf_hash_reset(vcpu
);
7848 vcpu
->arch
.pending_external_vector
= -1;
7850 kvm_hv_vcpu_init(vcpu
);
7854 fail_free_mce_banks
:
7855 kfree(vcpu
->arch
.mce_banks
);
7857 kvm_free_lapic(vcpu
);
7859 kvm_mmu_destroy(vcpu
);
7861 free_page((unsigned long)vcpu
->arch
.pio_data
);
7866 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
7870 kvm_hv_vcpu_uninit(vcpu
);
7871 kvm_pmu_destroy(vcpu
);
7872 kfree(vcpu
->arch
.mce_banks
);
7873 kvm_free_lapic(vcpu
);
7874 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7875 kvm_mmu_destroy(vcpu
);
7876 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7877 free_page((unsigned long)vcpu
->arch
.pio_data
);
7878 if (!lapic_in_kernel(vcpu
))
7879 static_key_slow_dec(&kvm_no_apic_vcpu
);
7882 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
7884 kvm_x86_ops
->sched_in(vcpu
, cpu
);
7887 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
7892 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
7893 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
7894 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
7895 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
7896 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
7898 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7899 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
7900 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7901 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
7902 &kvm
->arch
.irq_sources_bitmap
);
7904 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
7905 mutex_init(&kvm
->arch
.apic_map_lock
);
7906 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
7907 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
7909 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
7910 pvclock_update_vm_gtod_copy(kvm
);
7912 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
7913 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
7915 kvm_page_track_init(kvm
);
7916 kvm_mmu_init_vm(kvm
);
7918 if (kvm_x86_ops
->vm_init
)
7919 return kvm_x86_ops
->vm_init(kvm
);
7924 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
7927 r
= vcpu_load(vcpu
);
7929 kvm_mmu_unload(vcpu
);
7933 static void kvm_free_vcpus(struct kvm
*kvm
)
7936 struct kvm_vcpu
*vcpu
;
7939 * Unpin any mmu pages first.
7941 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7942 kvm_clear_async_pf_completion_queue(vcpu
);
7943 kvm_unload_vcpu_mmu(vcpu
);
7945 kvm_for_each_vcpu(i
, vcpu
, kvm
)
7946 kvm_arch_vcpu_free(vcpu
);
7948 mutex_lock(&kvm
->lock
);
7949 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
7950 kvm
->vcpus
[i
] = NULL
;
7952 atomic_set(&kvm
->online_vcpus
, 0);
7953 mutex_unlock(&kvm
->lock
);
7956 void kvm_arch_sync_events(struct kvm
*kvm
)
7958 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
7959 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
7960 kvm_free_all_assigned_devices(kvm
);
7964 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
7968 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
7969 struct kvm_memory_slot
*slot
, old
;
7971 /* Called with kvm->slots_lock held. */
7972 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
7975 slot
= id_to_memslot(slots
, id
);
7981 * MAP_SHARED to prevent internal slot pages from being moved
7984 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
7985 MAP_SHARED
| MAP_ANONYMOUS
, 0);
7986 if (IS_ERR((void *)hva
))
7987 return PTR_ERR((void *)hva
);
7996 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
7997 struct kvm_userspace_memory_region m
;
7999 m
.slot
= id
| (i
<< 16);
8001 m
.guest_phys_addr
= gpa
;
8002 m
.userspace_addr
= hva
;
8003 m
.memory_size
= size
;
8004 r
= __kvm_set_memory_region(kvm
, &m
);
8010 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8016 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8018 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8022 mutex_lock(&kvm
->slots_lock
);
8023 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8024 mutex_unlock(&kvm
->slots_lock
);
8028 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8030 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8032 if (current
->mm
== kvm
->mm
) {
8034 * Free memory regions allocated on behalf of userspace,
8035 * unless the the memory map has changed due to process exit
8038 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8039 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8040 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8042 if (kvm_x86_ops
->vm_destroy
)
8043 kvm_x86_ops
->vm_destroy(kvm
);
8044 kvm_iommu_unmap_guest(kvm
);
8045 kfree(kvm
->arch
.vpic
);
8046 kfree(kvm
->arch
.vioapic
);
8047 kvm_free_vcpus(kvm
);
8048 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8049 kvm_mmu_uninit_vm(kvm
);
8052 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8053 struct kvm_memory_slot
*dont
)
8057 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8058 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8059 kvfree(free
->arch
.rmap
[i
]);
8060 free
->arch
.rmap
[i
] = NULL
;
8065 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8066 dont
->arch
.lpage_info
[i
- 1]) {
8067 kvfree(free
->arch
.lpage_info
[i
- 1]);
8068 free
->arch
.lpage_info
[i
- 1] = NULL
;
8072 kvm_page_track_free_memslot(free
, dont
);
8075 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8076 unsigned long npages
)
8080 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8081 struct kvm_lpage_info
*linfo
;
8086 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8087 slot
->base_gfn
, level
) + 1;
8089 slot
->arch
.rmap
[i
] =
8090 kvm_kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]));
8091 if (!slot
->arch
.rmap
[i
])
8096 linfo
= kvm_kvzalloc(lpages
* sizeof(*linfo
));
8100 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8102 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8103 linfo
[0].disallow_lpage
= 1;
8104 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8105 linfo
[lpages
- 1].disallow_lpage
= 1;
8106 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8108 * If the gfn and userspace address are not aligned wrt each
8109 * other, or if explicitly asked to, disable large page
8110 * support for this slot
8112 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8113 !kvm_largepages_enabled()) {
8116 for (j
= 0; j
< lpages
; ++j
)
8117 linfo
[j
].disallow_lpage
= 1;
8121 if (kvm_page_track_create_memslot(slot
, npages
))
8127 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8128 kvfree(slot
->arch
.rmap
[i
]);
8129 slot
->arch
.rmap
[i
] = NULL
;
8133 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8134 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8139 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8142 * memslots->generation has been incremented.
8143 * mmio generation may have reached its maximum value.
8145 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8148 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8149 struct kvm_memory_slot
*memslot
,
8150 const struct kvm_userspace_memory_region
*mem
,
8151 enum kvm_mr_change change
)
8156 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8157 struct kvm_memory_slot
*new)
8159 /* Still write protect RO slot */
8160 if (new->flags
& KVM_MEM_READONLY
) {
8161 kvm_mmu_slot_remove_write_access(kvm
, new);
8166 * Call kvm_x86_ops dirty logging hooks when they are valid.
8168 * kvm_x86_ops->slot_disable_log_dirty is called when:
8170 * - KVM_MR_CREATE with dirty logging is disabled
8171 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8173 * The reason is, in case of PML, we need to set D-bit for any slots
8174 * with dirty logging disabled in order to eliminate unnecessary GPA
8175 * logging in PML buffer (and potential PML buffer full VMEXT). This
8176 * guarantees leaving PML enabled during guest's lifetime won't have
8177 * any additonal overhead from PML when guest is running with dirty
8178 * logging disabled for memory slots.
8180 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8181 * to dirty logging mode.
8183 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8185 * In case of write protect:
8187 * Write protect all pages for dirty logging.
8189 * All the sptes including the large sptes which point to this
8190 * slot are set to readonly. We can not create any new large
8191 * spte on this slot until the end of the logging.
8193 * See the comments in fast_page_fault().
8195 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8196 if (kvm_x86_ops
->slot_enable_log_dirty
)
8197 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8199 kvm_mmu_slot_remove_write_access(kvm
, new);
8201 if (kvm_x86_ops
->slot_disable_log_dirty
)
8202 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8206 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8207 const struct kvm_userspace_memory_region
*mem
,
8208 const struct kvm_memory_slot
*old
,
8209 const struct kvm_memory_slot
*new,
8210 enum kvm_mr_change change
)
8212 int nr_mmu_pages
= 0;
8214 if (!kvm
->arch
.n_requested_mmu_pages
)
8215 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8218 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8221 * Dirty logging tracks sptes in 4k granularity, meaning that large
8222 * sptes have to be split. If live migration is successful, the guest
8223 * in the source machine will be destroyed and large sptes will be
8224 * created in the destination. However, if the guest continues to run
8225 * in the source machine (for example if live migration fails), small
8226 * sptes will remain around and cause bad performance.
8228 * Scan sptes if dirty logging has been stopped, dropping those
8229 * which can be collapsed into a single large-page spte. Later
8230 * page faults will create the large-page sptes.
8232 if ((change
!= KVM_MR_DELETE
) &&
8233 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8234 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8235 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8238 * Set up write protection and/or dirty logging for the new slot.
8240 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8241 * been zapped so no dirty logging staff is needed for old slot. For
8242 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8243 * new and it's also covered when dealing with the new slot.
8245 * FIXME: const-ify all uses of struct kvm_memory_slot.
8247 if (change
!= KVM_MR_DELETE
)
8248 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8251 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8253 kvm_mmu_invalidate_zap_all_pages(kvm
);
8256 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8257 struct kvm_memory_slot
*slot
)
8259 kvm_page_track_flush_slot(kvm
, slot
);
8262 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8264 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8267 if (kvm_apic_has_events(vcpu
))
8270 if (vcpu
->arch
.pv
.pv_unhalted
)
8273 if (atomic_read(&vcpu
->arch
.nmi_queued
))
8276 if (test_bit(KVM_REQ_SMI
, &vcpu
->requests
))
8279 if (kvm_arch_interrupt_allowed(vcpu
) &&
8280 kvm_cpu_has_interrupt(vcpu
))
8283 if (kvm_hv_has_stimer_pending(vcpu
))
8289 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8291 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8292 kvm_x86_ops
->check_nested_events(vcpu
, false);
8294 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8297 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8299 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8302 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8304 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8307 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8309 if (is_64_bit_mode(vcpu
))
8310 return kvm_rip_read(vcpu
);
8311 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8312 kvm_rip_read(vcpu
));
8314 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8316 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8318 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8320 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8322 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8324 unsigned long rflags
;
8326 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8327 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8328 rflags
&= ~X86_EFLAGS_TF
;
8331 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8333 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8335 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8336 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8337 rflags
|= X86_EFLAGS_TF
;
8338 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8341 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8343 __kvm_set_rflags(vcpu
, rflags
);
8344 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8346 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8348 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8352 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8356 r
= kvm_mmu_reload(vcpu
);
8360 if (!vcpu
->arch
.mmu
.direct_map
&&
8361 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8364 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8367 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8369 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8372 static inline u32
kvm_async_pf_next_probe(u32 key
)
8374 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8377 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8379 u32 key
= kvm_async_pf_hash_fn(gfn
);
8381 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8382 key
= kvm_async_pf_next_probe(key
);
8384 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8387 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8390 u32 key
= kvm_async_pf_hash_fn(gfn
);
8392 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8393 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8394 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8395 key
= kvm_async_pf_next_probe(key
);
8400 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8402 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8405 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8409 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8411 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8413 j
= kvm_async_pf_next_probe(j
);
8414 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8416 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8418 * k lies cyclically in ]i,j]
8420 * |....j i.k.| or |.k..j i...|
8422 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8423 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8428 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8431 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8435 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8436 struct kvm_async_pf
*work
)
8438 struct x86_exception fault
;
8440 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8441 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8443 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8444 (vcpu
->arch
.apf
.send_user_only
&&
8445 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8446 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8447 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8448 fault
.vector
= PF_VECTOR
;
8449 fault
.error_code_valid
= true;
8450 fault
.error_code
= 0;
8451 fault
.nested_page_fault
= false;
8452 fault
.address
= work
->arch
.token
;
8453 kvm_inject_page_fault(vcpu
, &fault
);
8457 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8458 struct kvm_async_pf
*work
)
8460 struct x86_exception fault
;
8462 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8463 if (work
->wakeup_all
)
8464 work
->arch
.token
= ~0; /* broadcast wakeup */
8466 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8468 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8469 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8470 fault
.vector
= PF_VECTOR
;
8471 fault
.error_code_valid
= true;
8472 fault
.error_code
= 0;
8473 fault
.nested_page_fault
= false;
8474 fault
.address
= work
->arch
.token
;
8475 kvm_inject_page_fault(vcpu
, &fault
);
8477 vcpu
->arch
.apf
.halted
= false;
8478 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8481 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8483 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8486 return !kvm_event_needs_reinjection(vcpu
) &&
8487 kvm_x86_ops
->interrupt_allowed(vcpu
);
8490 void kvm_arch_start_assignment(struct kvm
*kvm
)
8492 atomic_inc(&kvm
->arch
.assigned_device_count
);
8494 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8496 void kvm_arch_end_assignment(struct kvm
*kvm
)
8498 atomic_dec(&kvm
->arch
.assigned_device_count
);
8500 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8502 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8504 return atomic_read(&kvm
->arch
.assigned_device_count
);
8506 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8508 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8510 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8512 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8514 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8516 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8518 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8520 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8522 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8524 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8526 bool kvm_arch_has_irq_bypass(void)
8528 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8531 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8532 struct irq_bypass_producer
*prod
)
8534 struct kvm_kernel_irqfd
*irqfd
=
8535 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8537 irqfd
->producer
= prod
;
8539 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8540 prod
->irq
, irqfd
->gsi
, 1);
8543 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8544 struct irq_bypass_producer
*prod
)
8547 struct kvm_kernel_irqfd
*irqfd
=
8548 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8550 WARN_ON(irqfd
->producer
!= prod
);
8551 irqfd
->producer
= NULL
;
8554 * When producer of consumer is unregistered, we change back to
8555 * remapped mode, so we can re-use the current implementation
8556 * when the irq is masked/disabled or the consumer side (KVM
8557 * int this case doesn't want to receive the interrupts.
8559 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8561 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8562 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8565 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8566 uint32_t guest_irq
, bool set
)
8568 if (!kvm_x86_ops
->update_pi_irte
)
8571 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8574 bool kvm_vector_hashing_enabled(void)
8576 return vector_hashing
;
8578 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8585 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8586 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8587 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8588 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8589 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8590 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8591 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8592 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);