drivers/scsi/cxlflash/common.h

   1 /*
   2  * CXL Flash Device Driver
   3  *
   4  * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
   5  *             Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
   6  *
   7  * Copyright (C) 2015 IBM Corporation
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #ifndef _CXLFLASH_COMMON_H
  16 #define _CXLFLASH_COMMON_H
  17
  18 #include <linux/irq_poll.h>
  19 #include <linux/list.h>
  20 #include <linux/rwsem.h>
  21 #include <linux/types.h>
  22 #include <scsi/scsi.h>
  23 #include <scsi/scsi_cmnd.h>
  24 #include <scsi/scsi_device.h>
  25
  26 extern const struct file_operations cxlflash_cxl_fops;
  27
  28 #define MAX_CONTEXT     CXLFLASH_MAX_CONTEXT    /* num contexts per afu */
  29 #define MAX_FC_PORTS    CXLFLASH_MAX_FC_PORTS   /* max ports per AFU */
  30 #define LEGACY_FC_PORTS 2                       /* legacy ports per AFU */
  31
  32 #define CHAN2PORTBANK(_x)       ((_x) >> ilog2(CXLFLASH_NUM_FC_PORTS_PER_BANK))
  33 #define CHAN2BANKPORT(_x)       ((_x) & (CXLFLASH_NUM_FC_PORTS_PER_BANK - 1))
  34
  35 #define CHAN2PORTMASK(_x)       (1 << (_x))     /* channel to port mask */
  36 #define PORTMASK2CHAN(_x)       (ilog2((_x)))   /* port mask to channel */
  37 #define PORTNUM2CHAN(_x)        ((_x) - 1)      /* port number to channel */
  38
  39 #define CXLFLASH_BLOCK_SIZE     4096            /* 4K blocks */
  40 #define CXLFLASH_MAX_XFER_SIZE  16777216        /* 16MB transfer */
  41 #define CXLFLASH_MAX_SECTORS    (CXLFLASH_MAX_XFER_SIZE/512)    /* SCSI wants
  42                                                                  * max_sectors
  43                                                                  * in units of
  44                                                                  * 512 byte
  45                                                                  * sectors
  46                                                                  */
  47
  48 #define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))
  49
  50 /* AFU command retry limit */
  51 #define MC_RETRY_CNT    5       /* Sufficient for SCSI and certain AFU errors */
  52
  53 /* Command management definitions */
  54 #define CXLFLASH_MAX_CMDS               256
  55 #define CXLFLASH_MAX_CMDS_PER_LUN       CXLFLASH_MAX_CMDS
  56
  57 /* RRQ for master issued cmds */
  58 #define NUM_RRQ_ENTRY                   CXLFLASH_MAX_CMDS
  59
  60 /* SQ for master issued cmds */
  61 #define NUM_SQ_ENTRY                    CXLFLASH_MAX_CMDS
  62
  63 /* Hardware queue definitions */
  64 #define CXLFLASH_DEF_HWQS               1
  65 #define CXLFLASH_MAX_HWQS               8
  66 #define PRIMARY_HWQ                     0
  67
  68
  69 static inline void check_sizes(void)
  70 {
  71         BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_FC_PORTS_PER_BANK);
  72         BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_MAX_CMDS);
  73 }
  74
  75 /* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
  76 #define CMD_BUFSIZE     SIZE_4K
  77
  78 enum cxlflash_lr_state {
  79         LINK_RESET_INVALID,
  80         LINK_RESET_REQUIRED,
  81         LINK_RESET_COMPLETE
  82 };
  83
  84 enum cxlflash_init_state {
  85         INIT_STATE_NONE,
  86         INIT_STATE_PCI,
  87         INIT_STATE_AFU,
  88         INIT_STATE_SCSI
  89 };
  90
  91 enum cxlflash_state {
  92         STATE_PROBING,  /* Initial state during probe */
  93         STATE_PROBED,   /* Temporary state, probe completed but EEH occurred */
  94         STATE_NORMAL,   /* Normal running state, everything good */
  95         STATE_RESET,    /* Reset state, trying to reset/recover */
  96         STATE_FAILTERM  /* Failed/terminating state, error out users/threads */
  97 };
  98
  99 /*
 100  * Each context has its own set of resource handles that is visible
 101  * only from that context.
 102  */
 103
 104 struct cxlflash_cfg {
 105         struct afu *afu;
 106
 107         struct pci_dev *dev;
 108         struct pci_device_id *dev_id;
 109         struct Scsi_Host *host;
 110         int num_fc_ports;
 111
 112         ulong cxlflash_regs_pci;
 113
 114         struct work_struct work_q;
 115         enum cxlflash_init_state init_state;
 116         enum cxlflash_lr_state lr_state;
 117         int lr_port;
 118         atomic_t scan_host_needed;
 119
 120         struct cxl_afu *cxl_afu;
 121
 122         atomic_t recovery_threads;
 123         struct mutex ctx_recovery_mutex;
 124         struct mutex ctx_tbl_list_mutex;
 125         struct rw_semaphore ioctl_rwsem;
 126         struct ctx_info *ctx_tbl[MAX_CONTEXT];
 127         struct list_head ctx_err_recovery; /* contexts w/ recovery pending */
 128         struct file_operations cxl_fops;
 129
 130         /* Parameters that are LUN table related */
 131         int last_lun_index[MAX_FC_PORTS];
 132         int promote_lun_index;
 133         struct list_head lluns; /* list of llun_info structs */
 134
 135         wait_queue_head_t tmf_waitq;
 136         spinlock_t tmf_slock;
 137         bool tmf_active;
 138         wait_queue_head_t reset_waitq;
 139         enum cxlflash_state state;
 140 };
 141
 142 struct afu_cmd {
 143         struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */
 144         struct sisl_ioasa sa;   /* IOASA must follow IOARCB */
 145         struct afu *parent;
 146         struct scsi_cmnd *scp;
 147         struct completion cevent;
 148         struct list_head queue;
 149
 150         u8 cmd_tmf:1;
 151         u32 hwq_index;
 152
 153         /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
 154          * However for performance reasons the IOARCB/IOASA should be
 155          * cache line aligned.
 156          */
 157 } __aligned(cache_line_size());
 158
 159 static inline struct afu_cmd *sc_to_afuc(struct scsi_cmnd *sc)
 160 {
 161         return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd));
 162 }
 163
 164 static inline struct afu_cmd *sc_to_afucz(struct scsi_cmnd *sc)
 165 {
 166         struct afu_cmd *afuc = sc_to_afuc(sc);
 167
 168         memset(afuc, 0, sizeof(*afuc));
 169         return afuc;
 170 }
 171
 172 struct hwq {
 173         /* Stuff requiring alignment go first. */
 174         struct sisl_ioarcb sq[NUM_SQ_ENTRY];            /* 16K SQ */
 175         u64 rrq_entry[NUM_RRQ_ENTRY];                   /* 2K RRQ */
 176
 177         /* Beware of alignment till here. Preferably introduce new
 178          * fields after this point
 179          */
 180         struct afu *afu;
 181         struct cxl_context *ctx;
 182         struct cxl_ioctl_start_work work;
 183         struct sisl_host_map __iomem *host_map;         /* MC host map */
 184         struct sisl_ctrl_map __iomem *ctrl_map;         /* MC control map */
 185         ctx_hndl_t ctx_hndl;    /* master's context handle */
 186         u32 index;              /* Index of this hwq */
 187
 188         atomic_t hsq_credits;
 189         spinlock_t hsq_slock;
 190         struct sisl_ioarcb *hsq_start;
 191         struct sisl_ioarcb *hsq_end;
 192         struct sisl_ioarcb *hsq_curr;
 193         spinlock_t hrrq_slock;
 194         u64 *hrrq_start;
 195         u64 *hrrq_end;
 196         u64 *hrrq_curr;
 197         bool toggle;
 198
 199         s64 room;
 200         spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */
 201
 202         struct irq_poll irqpoll;
 203 } __aligned(cache_line_size());
 204
 205 struct afu {
 206         struct hwq hwqs[CXLFLASH_MAX_HWQS];
 207         int (*send_cmd)(struct afu *, struct afu_cmd *);
 208         void (*context_reset)(struct afu_cmd *);
 209
 210         /* AFU HW */
 211         struct cxlflash_afu_map __iomem *afu_map;       /* entire MMIO map */
 212
 213         atomic_t cmds_active;   /* Number of currently active AFU commands */
 214         u64 hb;
 215         u32 internal_lun;       /* User-desired LUN mode for this AFU */
 216         u32 num_hwqs;           /* Number of hardware queues */
 217         u32 desired_hwqs;       /* Desired h/w queues, effective on AFU reset */
 218
 219         char version[16];
 220         u64 interface_version;
 221
 222         u32 irqpoll_weight;
 223         struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */
 224 };
 225
 226 static inline struct hwq *get_hwq(struct afu *afu, u32 index)
 227 {
 228         WARN_ON(index >= CXLFLASH_MAX_HWQS);
 229
 230         return &afu->hwqs[index];
 231 }
 232
 233 static inline bool afu_is_irqpoll_enabled(struct afu *afu)
 234 {
 235         return !!afu->irqpoll_weight;
 236 }
 237
 238 static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode)
 239 {
 240         u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT;
 241
 242         return afu_cap & cmd_mode;
 243 }
 244
 245 static inline bool afu_is_sq_cmd_mode(struct afu *afu)
 246 {
 247         return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE);
 248 }
 249
 250 static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu)
 251 {
 252         return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE);
 253 }
 254
 255 static inline u64 lun_to_lunid(u64 lun)
 256 {
 257         __be64 lun_id;
 258
 259         int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
 260         return be64_to_cpu(lun_id);
 261 }
 262
 263 static inline struct fc_port_bank __iomem *get_fc_port_bank(
 264                                             struct cxlflash_cfg *cfg, int i)
 265 {
 266         struct afu *afu = cfg->afu;
 267
 268         return &afu->afu_map->global.bank[CHAN2PORTBANK(i)];
 269 }
 270
 271 static inline __be64 __iomem *get_fc_port_regs(struct cxlflash_cfg *cfg, int i)
 272 {
 273         struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
 274
 275         return &fcpb->fc_port_regs[CHAN2BANKPORT(i)][0];
 276 }
 277
 278 static inline __be64 __iomem *get_fc_port_luns(struct cxlflash_cfg *cfg, int i)
 279 {
 280         struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
 281
 282         return &fcpb->fc_port_luns[CHAN2BANKPORT(i)][0];
 283 }
 284
 285 int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t c, res_hndl_t r, u8 mode);
 286 void cxlflash_list_init(void);
 287 void cxlflash_term_global_luns(void);
 288 void cxlflash_free_errpage(void);
 289 int cxlflash_ioctl(struct scsi_device *sdev, int cmd, void __user *arg);
 290 void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *cfg);
 291 int cxlflash_mark_contexts_error(struct cxlflash_cfg *cfg);
 292 void cxlflash_term_local_luns(struct cxlflash_cfg *cfg);
 293 void cxlflash_restore_luntable(struct cxlflash_cfg *cfg);
 294
 295 #endif /* ifndef _CXLFLASH_COMMON_H */