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scsi: cxlflash: Track pending scsi commands in each hardware queue
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1 /*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15 #include <linux/delay.h>
16 #include <linux/list.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19
20 #include <asm/unaligned.h>
21
22 #include <misc/cxl.h>
23
24 #include <scsi/scsi_cmnd.h>
25 #include <scsi/scsi_host.h>
26 #include <uapi/scsi/cxlflash_ioctl.h>
27
28 #include "main.h"
29 #include "sislite.h"
30 #include "common.h"
31
32 MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
33 MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
34 MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
35 MODULE_LICENSE("GPL");
36
37 /**
38 * process_cmd_err() - command error handler
39 * @cmd: AFU command that experienced the error.
40 * @scp: SCSI command associated with the AFU command in error.
41 *
42 * Translates error bits from AFU command to SCSI command results.
43 */
44 static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
45 {
46 struct afu *afu = cmd->parent;
47 struct cxlflash_cfg *cfg = afu->parent;
48 struct device *dev = &cfg->dev->dev;
49 struct sisl_ioarcb *ioarcb;
50 struct sisl_ioasa *ioasa;
51 u32 resid;
52
53 if (unlikely(!cmd))
54 return;
55
56 ioarcb = &(cmd->rcb);
57 ioasa = &(cmd->sa);
58
59 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
60 resid = ioasa->resid;
61 scsi_set_resid(scp, resid);
62 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n",
63 __func__, cmd, scp, resid);
64 }
65
66 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
67 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n",
68 __func__, cmd, scp);
69 scp->result = (DID_ERROR << 16);
70 }
71
72 dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x "
73 "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__,
74 ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc,
75 ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra);
76
77 if (ioasa->rc.scsi_rc) {
78 /* We have a SCSI status */
79 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
80 memcpy(scp->sense_buffer, ioasa->sense_data,
81 SISL_SENSE_DATA_LEN);
82 scp->result = ioasa->rc.scsi_rc;
83 } else
84 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
85 }
86
87 /*
88 * We encountered an error. Set scp->result based on nature
89 * of error.
90 */
91 if (ioasa->rc.fc_rc) {
92 /* We have an FC status */
93 switch (ioasa->rc.fc_rc) {
94 case SISL_FC_RC_LINKDOWN:
95 scp->result = (DID_REQUEUE << 16);
96 break;
97 case SISL_FC_RC_RESID:
98 /* This indicates an FCP resid underrun */
99 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
100 /* If the SISL_RC_FLAGS_OVERRUN flag was set,
101 * then we will handle this error else where.
102 * If not then we must handle it here.
103 * This is probably an AFU bug.
104 */
105 scp->result = (DID_ERROR << 16);
106 }
107 break;
108 case SISL_FC_RC_RESIDERR:
109 /* Resid mismatch between adapter and device */
110 case SISL_FC_RC_TGTABORT:
111 case SISL_FC_RC_ABORTOK:
112 case SISL_FC_RC_ABORTFAIL:
113 case SISL_FC_RC_NOLOGI:
114 case SISL_FC_RC_ABORTPEND:
115 case SISL_FC_RC_WRABORTPEND:
116 case SISL_FC_RC_NOEXP:
117 case SISL_FC_RC_INUSE:
118 scp->result = (DID_ERROR << 16);
119 break;
120 }
121 }
122
123 if (ioasa->rc.afu_rc) {
124 /* We have an AFU error */
125 switch (ioasa->rc.afu_rc) {
126 case SISL_AFU_RC_NO_CHANNELS:
127 scp->result = (DID_NO_CONNECT << 16);
128 break;
129 case SISL_AFU_RC_DATA_DMA_ERR:
130 switch (ioasa->afu_extra) {
131 case SISL_AFU_DMA_ERR_PAGE_IN:
132 /* Retry */
133 scp->result = (DID_IMM_RETRY << 16);
134 break;
135 case SISL_AFU_DMA_ERR_INVALID_EA:
136 default:
137 scp->result = (DID_ERROR << 16);
138 }
139 break;
140 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
141 /* Retry */
142 scp->result = (DID_ALLOC_FAILURE << 16);
143 break;
144 default:
145 scp->result = (DID_ERROR << 16);
146 }
147 }
148 }
149
150 /**
151 * cmd_complete() - command completion handler
152 * @cmd: AFU command that has completed.
153 *
154 * Prepares and submits command that has either completed or timed out to
155 * the SCSI stack. Checks AFU command back into command pool for non-internal
156 * (cmd->scp populated) commands.
157 */
158 static void cmd_complete(struct afu_cmd *cmd)
159 {
160 struct scsi_cmnd *scp;
161 ulong lock_flags;
162 struct afu *afu = cmd->parent;
163 struct cxlflash_cfg *cfg = afu->parent;
164 struct device *dev = &cfg->dev->dev;
165 struct hwq *hwq = get_hwq(afu, cmd->hwq_index);
166 bool cmd_is_tmf;
167
168 spin_lock_irqsave(&hwq->hsq_slock, lock_flags);
169 list_del(&cmd->list);
170 spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags);
171
172 if (cmd->scp) {
173 scp = cmd->scp;
174 if (unlikely(cmd->sa.ioasc))
175 process_cmd_err(cmd, scp);
176 else
177 scp->result = (DID_OK << 16);
178
179 cmd_is_tmf = cmd->cmd_tmf;
180
181 dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n",
182 __func__, scp, scp->result, cmd->sa.ioasc);
183
184 scp->scsi_done(scp);
185
186 if (cmd_is_tmf) {
187 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
188 cfg->tmf_active = false;
189 wake_up_all_locked(&cfg->tmf_waitq);
190 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
191 }
192 } else
193 complete(&cmd->cevent);
194 }
195
196 /**
197 * context_reset() - reset context via specified register
198 * @hwq: Hardware queue owning the context to be reset.
199 * @reset_reg: MMIO register to perform reset.
200 *
201 * Return: 0 on success, -errno on failure
202 */
203 static int context_reset(struct hwq *hwq, __be64 __iomem *reset_reg)
204 {
205 struct cxlflash_cfg *cfg = hwq->afu->parent;
206 struct device *dev = &cfg->dev->dev;
207 int rc = -ETIMEDOUT;
208 int nretry = 0;
209 u64 val = 0x1;
210
211 dev_dbg(dev, "%s: hwq=%p\n", __func__, hwq);
212
213 writeq_be(val, reset_reg);
214 do {
215 val = readq_be(reset_reg);
216 if ((val & 0x1) == 0x0) {
217 rc = 0;
218 break;
219 }
220
221 /* Double delay each time */
222 udelay(1 << nretry);
223 } while (nretry++ < MC_ROOM_RETRY_CNT);
224
225 dev_dbg(dev, "%s: returning rc=%d, val=%016llx nretry=%d\n",
226 __func__, rc, val, nretry);
227 return rc;
228 }
229
230 /**
231 * context_reset_ioarrin() - reset context via IOARRIN register
232 * @hwq: Hardware queue owning the context to be reset.
233 *
234 * Return: 0 on success, -errno on failure
235 */
236 static int context_reset_ioarrin(struct hwq *hwq)
237 {
238 return context_reset(hwq, &hwq->host_map->ioarrin);
239 }
240
241 /**
242 * context_reset_sq() - reset context via SQ_CONTEXT_RESET register
243 * @hwq: Hardware queue owning the context to be reset.
244 *
245 * Return: 0 on success, -errno on failure
246 */
247 static int context_reset_sq(struct hwq *hwq)
248 {
249 return context_reset(hwq, &hwq->host_map->sq_ctx_reset);
250 }
251
252 /**
253 * send_cmd_ioarrin() - sends an AFU command via IOARRIN register
254 * @afu: AFU associated with the host.
255 * @cmd: AFU command to send.
256 *
257 * Return:
258 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
259 */
260 static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd)
261 {
262 struct cxlflash_cfg *cfg = afu->parent;
263 struct device *dev = &cfg->dev->dev;
264 struct hwq *hwq = get_hwq(afu, cmd->hwq_index);
265 int rc = 0;
266 s64 room;
267 ulong lock_flags;
268
269 /*
270 * To avoid the performance penalty of MMIO, spread the update of
271 * 'room' over multiple commands.
272 */
273 spin_lock_irqsave(&hwq->hsq_slock, lock_flags);
274 if (--hwq->room < 0) {
275 room = readq_be(&hwq->host_map->cmd_room);
276 if (room <= 0) {
277 dev_dbg_ratelimited(dev, "%s: no cmd_room to send "
278 "0x%02X, room=0x%016llX\n",
279 __func__, cmd->rcb.cdb[0], room);
280 hwq->room = 0;
281 rc = SCSI_MLQUEUE_HOST_BUSY;
282 goto out;
283 }
284 hwq->room = room - 1;
285 }
286
287 list_add(&cmd->list, &hwq->pending_cmds);
288 writeq_be((u64)&cmd->rcb, &hwq->host_map->ioarrin);
289 out:
290 spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags);
291 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__,
292 cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc);
293 return rc;
294 }
295
296 /**
297 * send_cmd_sq() - sends an AFU command via SQ ring
298 * @afu: AFU associated with the host.
299 * @cmd: AFU command to send.
300 *
301 * Return:
302 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
303 */
304 static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd)
305 {
306 struct cxlflash_cfg *cfg = afu->parent;
307 struct device *dev = &cfg->dev->dev;
308 struct hwq *hwq = get_hwq(afu, cmd->hwq_index);
309 int rc = 0;
310 int newval;
311 ulong lock_flags;
312
313 newval = atomic_dec_if_positive(&hwq->hsq_credits);
314 if (newval <= 0) {
315 rc = SCSI_MLQUEUE_HOST_BUSY;
316 goto out;
317 }
318
319 cmd->rcb.ioasa = &cmd->sa;
320
321 spin_lock_irqsave(&hwq->hsq_slock, lock_flags);
322
323 *hwq->hsq_curr = cmd->rcb;
324 if (hwq->hsq_curr < hwq->hsq_end)
325 hwq->hsq_curr++;
326 else
327 hwq->hsq_curr = hwq->hsq_start;
328
329 list_add(&cmd->list, &hwq->pending_cmds);
330 writeq_be((u64)hwq->hsq_curr, &hwq->host_map->sq_tail);
331
332 spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags);
333 out:
334 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p "
335 "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len,
336 cmd->rcb.data_ea, cmd->rcb.ioasa, rc, hwq->hsq_curr,
337 readq_be(&hwq->host_map->sq_head),
338 readq_be(&hwq->host_map->sq_tail));
339 return rc;
340 }
341
342 /**
343 * wait_resp() - polls for a response or timeout to a sent AFU command
344 * @afu: AFU associated with the host.
345 * @cmd: AFU command that was sent.
346 *
347 * Return: 0 on success, -errno on failure
348 */
349 static int wait_resp(struct afu *afu, struct afu_cmd *cmd)
350 {
351 struct cxlflash_cfg *cfg = afu->parent;
352 struct device *dev = &cfg->dev->dev;
353 int rc = 0;
354 ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000);
355
356 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
357 if (!timeout)
358 rc = -ETIMEDOUT;
359
360 if (unlikely(cmd->sa.ioasc != 0)) {
361 dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n",
362 __func__, cmd->rcb.cdb[0], cmd->sa.ioasc);
363 rc = -EIO;
364 }
365
366 return rc;
367 }
368
369 /**
370 * cmd_to_target_hwq() - selects a target hardware queue for a SCSI command
371 * @host: SCSI host associated with device.
372 * @scp: SCSI command to send.
373 * @afu: SCSI command to send.
374 *
375 * Hashes a command based upon the hardware queue mode.
376 *
377 * Return: Trusted index of target hardware queue
378 */
379 static u32 cmd_to_target_hwq(struct Scsi_Host *host, struct scsi_cmnd *scp,
380 struct afu *afu)
381 {
382 u32 tag;
383 u32 hwq = 0;
384
385 if (afu->num_hwqs == 1)
386 return 0;
387
388 switch (afu->hwq_mode) {
389 case HWQ_MODE_RR:
390 hwq = afu->hwq_rr_count++ % afu->num_hwqs;
391 break;
392 case HWQ_MODE_TAG:
393 tag = blk_mq_unique_tag(scp->request);
394 hwq = blk_mq_unique_tag_to_hwq(tag);
395 break;
396 case HWQ_MODE_CPU:
397 hwq = smp_processor_id() % afu->num_hwqs;
398 break;
399 default:
400 WARN_ON_ONCE(1);
401 }
402
403 return hwq;
404 }
405
406 /**
407 * send_tmf() - sends a Task Management Function (TMF)
408 * @afu: AFU to checkout from.
409 * @scp: SCSI command from stack.
410 * @tmfcmd: TMF command to send.
411 *
412 * Return:
413 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
414 */
415 static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
416 {
417 struct Scsi_Host *host = scp->device->host;
418 struct cxlflash_cfg *cfg = shost_priv(host);
419 struct afu_cmd *cmd = sc_to_afucz(scp);
420 struct device *dev = &cfg->dev->dev;
421 int hwq_index = cmd_to_target_hwq(host, scp, afu);
422 struct hwq *hwq = get_hwq(afu, hwq_index);
423 ulong lock_flags;
424 int rc = 0;
425 ulong to;
426
427 /* When Task Management Function is active do not send another */
428 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
429 if (cfg->tmf_active)
430 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
431 !cfg->tmf_active,
432 cfg->tmf_slock);
433 cfg->tmf_active = true;
434 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
435
436 cmd->scp = scp;
437 cmd->parent = afu;
438 cmd->cmd_tmf = true;
439 cmd->hwq_index = hwq_index;
440
441 cmd->rcb.ctx_id = hwq->ctx_hndl;
442 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
443 cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel);
444 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
445 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
446 SISL_REQ_FLAGS_SUP_UNDERRUN |
447 SISL_REQ_FLAGS_TMF_CMD);
448 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
449
450 rc = afu->send_cmd(afu, cmd);
451 if (unlikely(rc)) {
452 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
453 cfg->tmf_active = false;
454 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
455 goto out;
456 }
457
458 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
459 to = msecs_to_jiffies(5000);
460 to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq,
461 !cfg->tmf_active,
462 cfg->tmf_slock,
463 to);
464 if (!to) {
465 cfg->tmf_active = false;
466 dev_err(dev, "%s: TMF timed out\n", __func__);
467 rc = -1;
468 }
469 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
470 out:
471 return rc;
472 }
473
474 /**
475 * cxlflash_driver_info() - information handler for this host driver
476 * @host: SCSI host associated with device.
477 *
478 * Return: A string describing the device.
479 */
480 static const char *cxlflash_driver_info(struct Scsi_Host *host)
481 {
482 return CXLFLASH_ADAPTER_NAME;
483 }
484
485 /**
486 * cxlflash_queuecommand() - sends a mid-layer request
487 * @host: SCSI host associated with device.
488 * @scp: SCSI command to send.
489 *
490 * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
491 */
492 static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
493 {
494 struct cxlflash_cfg *cfg = shost_priv(host);
495 struct afu *afu = cfg->afu;
496 struct device *dev = &cfg->dev->dev;
497 struct afu_cmd *cmd = sc_to_afucz(scp);
498 struct scatterlist *sg = scsi_sglist(scp);
499 int hwq_index = cmd_to_target_hwq(host, scp, afu);
500 struct hwq *hwq = get_hwq(afu, hwq_index);
501 u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN;
502 ulong lock_flags;
503 int rc = 0;
504
505 dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu "
506 "cdb=(%08x-%08x-%08x-%08x)\n",
507 __func__, scp, host->host_no, scp->device->channel,
508 scp->device->id, scp->device->lun,
509 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
510 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
511 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
512 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
513
514 /*
515 * If a Task Management Function is active, wait for it to complete
516 * before continuing with regular commands.
517 */
518 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
519 if (cfg->tmf_active) {
520 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
521 rc = SCSI_MLQUEUE_HOST_BUSY;
522 goto out;
523 }
524 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
525
526 switch (cfg->state) {
527 case STATE_PROBING:
528 case STATE_PROBED:
529 case STATE_RESET:
530 dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__);
531 rc = SCSI_MLQUEUE_HOST_BUSY;
532 goto out;
533 case STATE_FAILTERM:
534 dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__);
535 scp->result = (DID_NO_CONNECT << 16);
536 scp->scsi_done(scp);
537 rc = 0;
538 goto out;
539 default:
540 break;
541 }
542
543 if (likely(sg)) {
544 cmd->rcb.data_len = sg->length;
545 cmd->rcb.data_ea = (uintptr_t)sg_virt(sg);
546 }
547
548 cmd->scp = scp;
549 cmd->parent = afu;
550 cmd->hwq_index = hwq_index;
551
552 cmd->rcb.ctx_id = hwq->ctx_hndl;
553 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
554 cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel);
555 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
556
557 if (scp->sc_data_direction == DMA_TO_DEVICE)
558 req_flags |= SISL_REQ_FLAGS_HOST_WRITE;
559
560 cmd->rcb.req_flags = req_flags;
561 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
562
563 rc = afu->send_cmd(afu, cmd);
564 out:
565 return rc;
566 }
567
568 /**
569 * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe
570 * @cfg: Internal structure associated with the host.
571 */
572 static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
573 {
574 struct pci_dev *pdev = cfg->dev;
575
576 if (pci_channel_offline(pdev))
577 wait_event_timeout(cfg->reset_waitq,
578 !pci_channel_offline(pdev),
579 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
580 }
581
582 /**
583 * free_mem() - free memory associated with the AFU
584 * @cfg: Internal structure associated with the host.
585 */
586 static void free_mem(struct cxlflash_cfg *cfg)
587 {
588 struct afu *afu = cfg->afu;
589
590 if (cfg->afu) {
591 free_pages((ulong)afu, get_order(sizeof(struct afu)));
592 cfg->afu = NULL;
593 }
594 }
595
596 /**
597 * cxlflash_reset_sync() - synchronizing point for asynchronous resets
598 * @cfg: Internal structure associated with the host.
599 */
600 static void cxlflash_reset_sync(struct cxlflash_cfg *cfg)
601 {
602 if (cfg->async_reset_cookie == 0)
603 return;
604
605 /* Wait until all async calls prior to this cookie have completed */
606 async_synchronize_cookie(cfg->async_reset_cookie + 1);
607 cfg->async_reset_cookie = 0;
608 }
609
610 /**
611 * stop_afu() - stops the AFU command timers and unmaps the MMIO space
612 * @cfg: Internal structure associated with the host.
613 *
614 * Safe to call with AFU in a partially allocated/initialized state.
615 *
616 * Cancels scheduled worker threads, waits for any active internal AFU
617 * commands to timeout, disables IRQ polling and then unmaps the MMIO space.
618 */
619 static void stop_afu(struct cxlflash_cfg *cfg)
620 {
621 struct afu *afu = cfg->afu;
622 struct hwq *hwq;
623 int i;
624
625 cancel_work_sync(&cfg->work_q);
626 if (!current_is_async())
627 cxlflash_reset_sync(cfg);
628
629 if (likely(afu)) {
630 while (atomic_read(&afu->cmds_active))
631 ssleep(1);
632
633 if (afu_is_irqpoll_enabled(afu)) {
634 for (i = 0; i < afu->num_hwqs; i++) {
635 hwq = get_hwq(afu, i);
636
637 irq_poll_disable(&hwq->irqpoll);
638 }
639 }
640
641 if (likely(afu->afu_map)) {
642 cxl_psa_unmap((void __iomem *)afu->afu_map);
643 afu->afu_map = NULL;
644 }
645 }
646 }
647
648 /**
649 * term_intr() - disables all AFU interrupts
650 * @cfg: Internal structure associated with the host.
651 * @level: Depth of allocation, where to begin waterfall tear down.
652 * @index: Index of the hardware queue.
653 *
654 * Safe to call with AFU/MC in partially allocated/initialized state.
655 */
656 static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level,
657 u32 index)
658 {
659 struct afu *afu = cfg->afu;
660 struct device *dev = &cfg->dev->dev;
661 struct hwq *hwq;
662
663 if (!afu) {
664 dev_err(dev, "%s: returning with NULL afu\n", __func__);
665 return;
666 }
667
668 hwq = get_hwq(afu, index);
669
670 if (!hwq->ctx) {
671 dev_err(dev, "%s: returning with NULL MC\n", __func__);
672 return;
673 }
674
675 switch (level) {
676 case UNMAP_THREE:
677 /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */
678 if (index == PRIMARY_HWQ)
679 cxl_unmap_afu_irq(hwq->ctx, 3, hwq);
680 case UNMAP_TWO:
681 cxl_unmap_afu_irq(hwq->ctx, 2, hwq);
682 case UNMAP_ONE:
683 cxl_unmap_afu_irq(hwq->ctx, 1, hwq);
684 case FREE_IRQ:
685 cxl_free_afu_irqs(hwq->ctx);
686 /* fall through */
687 case UNDO_NOOP:
688 /* No action required */
689 break;
690 }
691 }
692
693 /**
694 * term_mc() - terminates the master context
695 * @cfg: Internal structure associated with the host.
696 * @index: Index of the hardware queue.
697 *
698 * Safe to call with AFU/MC in partially allocated/initialized state.
699 */
700 static void term_mc(struct cxlflash_cfg *cfg, u32 index)
701 {
702 struct afu *afu = cfg->afu;
703 struct device *dev = &cfg->dev->dev;
704 struct hwq *hwq;
705
706 if (!afu) {
707 dev_err(dev, "%s: returning with NULL afu\n", __func__);
708 return;
709 }
710
711 hwq = get_hwq(afu, index);
712
713 if (!hwq->ctx) {
714 dev_err(dev, "%s: returning with NULL MC\n", __func__);
715 return;
716 }
717
718 WARN_ON(cxl_stop_context(hwq->ctx));
719 if (index != PRIMARY_HWQ)
720 WARN_ON(cxl_release_context(hwq->ctx));
721 hwq->ctx = NULL;
722 }
723
724 /**
725 * term_afu() - terminates the AFU
726 * @cfg: Internal structure associated with the host.
727 *
728 * Safe to call with AFU/MC in partially allocated/initialized state.
729 */
730 static void term_afu(struct cxlflash_cfg *cfg)
731 {
732 struct device *dev = &cfg->dev->dev;
733 int k;
734
735 /*
736 * Tear down is carefully orchestrated to ensure
737 * no interrupts can come in when the problem state
738 * area is unmapped.
739 *
740 * 1) Disable all AFU interrupts for each master
741 * 2) Unmap the problem state area
742 * 3) Stop each master context
743 */
744 for (k = cfg->afu->num_hwqs - 1; k >= 0; k--)
745 term_intr(cfg, UNMAP_THREE, k);
746
747 if (cfg->afu)
748 stop_afu(cfg);
749
750 for (k = cfg->afu->num_hwqs - 1; k >= 0; k--)
751 term_mc(cfg, k);
752
753 dev_dbg(dev, "%s: returning\n", __func__);
754 }
755
756 /**
757 * notify_shutdown() - notifies device of pending shutdown
758 * @cfg: Internal structure associated with the host.
759 * @wait: Whether to wait for shutdown processing to complete.
760 *
761 * This function will notify the AFU that the adapter is being shutdown
762 * and will wait for shutdown processing to complete if wait is true.
763 * This notification should flush pending I/Os to the device and halt
764 * further I/Os until the next AFU reset is issued and device restarted.
765 */
766 static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait)
767 {
768 struct afu *afu = cfg->afu;
769 struct device *dev = &cfg->dev->dev;
770 struct dev_dependent_vals *ddv;
771 __be64 __iomem *fc_port_regs;
772 u64 reg, status;
773 int i, retry_cnt = 0;
774
775 ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data;
776 if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN))
777 return;
778
779 if (!afu || !afu->afu_map) {
780 dev_dbg(dev, "%s: Problem state area not mapped\n", __func__);
781 return;
782 }
783
784 /* Notify AFU */
785 for (i = 0; i < cfg->num_fc_ports; i++) {
786 fc_port_regs = get_fc_port_regs(cfg, i);
787
788 reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]);
789 reg |= SISL_FC_SHUTDOWN_NORMAL;
790 writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]);
791 }
792
793 if (!wait)
794 return;
795
796 /* Wait up to 1.5 seconds for shutdown processing to complete */
797 for (i = 0; i < cfg->num_fc_ports; i++) {
798 fc_port_regs = get_fc_port_regs(cfg, i);
799 retry_cnt = 0;
800
801 while (true) {
802 status = readq_be(&fc_port_regs[FC_STATUS / 8]);
803 if (status & SISL_STATUS_SHUTDOWN_COMPLETE)
804 break;
805 if (++retry_cnt >= MC_RETRY_CNT) {
806 dev_dbg(dev, "%s: port %d shutdown processing "
807 "not yet completed\n", __func__, i);
808 break;
809 }
810 msleep(100 * retry_cnt);
811 }
812 }
813 }
814
815 /**
816 * cxlflash_remove() - PCI entry point to tear down host
817 * @pdev: PCI device associated with the host.
818 *
819 * Safe to use as a cleanup in partially allocated/initialized state. Note that
820 * the reset_waitq is flushed as part of the stop/termination of user contexts.
821 */
822 static void cxlflash_remove(struct pci_dev *pdev)
823 {
824 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
825 struct device *dev = &pdev->dev;
826 ulong lock_flags;
827
828 if (!pci_is_enabled(pdev)) {
829 dev_dbg(dev, "%s: Device is disabled\n", __func__);
830 return;
831 }
832
833 /* If a Task Management Function is active, wait for it to complete
834 * before continuing with remove.
835 */
836 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
837 if (cfg->tmf_active)
838 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
839 !cfg->tmf_active,
840 cfg->tmf_slock);
841 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
842
843 /* Notify AFU and wait for shutdown processing to complete */
844 notify_shutdown(cfg, true);
845
846 cfg->state = STATE_FAILTERM;
847 cxlflash_stop_term_user_contexts(cfg);
848
849 switch (cfg->init_state) {
850 case INIT_STATE_SCSI:
851 cxlflash_term_local_luns(cfg);
852 scsi_remove_host(cfg->host);
853 case INIT_STATE_AFU:
854 term_afu(cfg);
855 case INIT_STATE_PCI:
856 pci_disable_device(pdev);
857 case INIT_STATE_NONE:
858 free_mem(cfg);
859 scsi_host_put(cfg->host);
860 break;
861 }
862
863 dev_dbg(dev, "%s: returning\n", __func__);
864 }
865
866 /**
867 * alloc_mem() - allocates the AFU and its command pool
868 * @cfg: Internal structure associated with the host.
869 *
870 * A partially allocated state remains on failure.
871 *
872 * Return:
873 * 0 on success
874 * -ENOMEM on failure to allocate memory
875 */
876 static int alloc_mem(struct cxlflash_cfg *cfg)
877 {
878 int rc = 0;
879 struct device *dev = &cfg->dev->dev;
880
881 /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */
882 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
883 get_order(sizeof(struct afu)));
884 if (unlikely(!cfg->afu)) {
885 dev_err(dev, "%s: cannot get %d free pages\n",
886 __func__, get_order(sizeof(struct afu)));
887 rc = -ENOMEM;
888 goto out;
889 }
890 cfg->afu->parent = cfg;
891 cfg->afu->desired_hwqs = CXLFLASH_DEF_HWQS;
892 cfg->afu->afu_map = NULL;
893 out:
894 return rc;
895 }
896
897 /**
898 * init_pci() - initializes the host as a PCI device
899 * @cfg: Internal structure associated with the host.
900 *
901 * Return: 0 on success, -errno on failure
902 */
903 static int init_pci(struct cxlflash_cfg *cfg)
904 {
905 struct pci_dev *pdev = cfg->dev;
906 struct device *dev = &cfg->dev->dev;
907 int rc = 0;
908
909 rc = pci_enable_device(pdev);
910 if (rc || pci_channel_offline(pdev)) {
911 if (pci_channel_offline(pdev)) {
912 cxlflash_wait_for_pci_err_recovery(cfg);
913 rc = pci_enable_device(pdev);
914 }
915
916 if (rc) {
917 dev_err(dev, "%s: Cannot enable adapter\n", __func__);
918 cxlflash_wait_for_pci_err_recovery(cfg);
919 goto out;
920 }
921 }
922
923 out:
924 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
925 return rc;
926 }
927
928 /**
929 * init_scsi() - adds the host to the SCSI stack and kicks off host scan
930 * @cfg: Internal structure associated with the host.
931 *
932 * Return: 0 on success, -errno on failure
933 */
934 static int init_scsi(struct cxlflash_cfg *cfg)
935 {
936 struct pci_dev *pdev = cfg->dev;
937 struct device *dev = &cfg->dev->dev;
938 int rc = 0;
939
940 rc = scsi_add_host(cfg->host, &pdev->dev);
941 if (rc) {
942 dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc);
943 goto out;
944 }
945
946 scsi_scan_host(cfg->host);
947
948 out:
949 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
950 return rc;
951 }
952
953 /**
954 * set_port_online() - transitions the specified host FC port to online state
955 * @fc_regs: Top of MMIO region defined for specified port.
956 *
957 * The provided MMIO region must be mapped prior to call. Online state means
958 * that the FC link layer has synced, completed the handshaking process, and
959 * is ready for login to start.
960 */
961 static void set_port_online(__be64 __iomem *fc_regs)
962 {
963 u64 cmdcfg;
964
965 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
966 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */
967 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */
968 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
969 }
970
971 /**
972 * set_port_offline() - transitions the specified host FC port to offline state
973 * @fc_regs: Top of MMIO region defined for specified port.
974 *
975 * The provided MMIO region must be mapped prior to call.
976 */
977 static void set_port_offline(__be64 __iomem *fc_regs)
978 {
979 u64 cmdcfg;
980
981 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
982 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */
983 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */
984 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
985 }
986
987 /**
988 * wait_port_online() - waits for the specified host FC port come online
989 * @fc_regs: Top of MMIO region defined for specified port.
990 * @delay_us: Number of microseconds to delay between reading port status.
991 * @nretry: Number of cycles to retry reading port status.
992 *
993 * The provided MMIO region must be mapped prior to call. This will timeout
994 * when the cable is not plugged in.
995 *
996 * Return:
997 * TRUE (1) when the specified port is online
998 * FALSE (0) when the specified port fails to come online after timeout
999 */
1000 static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
1001 {
1002 u64 status;
1003
1004 WARN_ON(delay_us < 1000);
1005
1006 do {
1007 msleep(delay_us / 1000);
1008 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1009 if (status == U64_MAX)
1010 nretry /= 2;
1011 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
1012 nretry--);
1013
1014 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
1015 }
1016
1017 /**
1018 * wait_port_offline() - waits for the specified host FC port go offline
1019 * @fc_regs: Top of MMIO region defined for specified port.
1020 * @delay_us: Number of microseconds to delay between reading port status.
1021 * @nretry: Number of cycles to retry reading port status.
1022 *
1023 * The provided MMIO region must be mapped prior to call.
1024 *
1025 * Return:
1026 * TRUE (1) when the specified port is offline
1027 * FALSE (0) when the specified port fails to go offline after timeout
1028 */
1029 static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
1030 {
1031 u64 status;
1032
1033 WARN_ON(delay_us < 1000);
1034
1035 do {
1036 msleep(delay_us / 1000);
1037 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1038 if (status == U64_MAX)
1039 nretry /= 2;
1040 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
1041 nretry--);
1042
1043 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
1044 }
1045
1046 /**
1047 * afu_set_wwpn() - configures the WWPN for the specified host FC port
1048 * @afu: AFU associated with the host that owns the specified FC port.
1049 * @port: Port number being configured.
1050 * @fc_regs: Top of MMIO region defined for specified port.
1051 * @wwpn: The world-wide-port-number previously discovered for port.
1052 *
1053 * The provided MMIO region must be mapped prior to call. As part of the
1054 * sequence to configure the WWPN, the port is toggled offline and then back
1055 * online. This toggling action can cause this routine to delay up to a few
1056 * seconds. When configured to use the internal LUN feature of the AFU, a
1057 * failure to come online is overridden.
1058 */
1059 static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs,
1060 u64 wwpn)
1061 {
1062 struct cxlflash_cfg *cfg = afu->parent;
1063 struct device *dev = &cfg->dev->dev;
1064
1065 set_port_offline(fc_regs);
1066 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1067 FC_PORT_STATUS_RETRY_CNT)) {
1068 dev_dbg(dev, "%s: wait on port %d to go offline timed out\n",
1069 __func__, port);
1070 }
1071
1072 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
1073
1074 set_port_online(fc_regs);
1075 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1076 FC_PORT_STATUS_RETRY_CNT)) {
1077 dev_dbg(dev, "%s: wait on port %d to go online timed out\n",
1078 __func__, port);
1079 }
1080 }
1081
1082 /**
1083 * afu_link_reset() - resets the specified host FC port
1084 * @afu: AFU associated with the host that owns the specified FC port.
1085 * @port: Port number being configured.
1086 * @fc_regs: Top of MMIO region defined for specified port.
1087 *
1088 * The provided MMIO region must be mapped prior to call. The sequence to
1089 * reset the port involves toggling it offline and then back online. This
1090 * action can cause this routine to delay up to a few seconds. An effort
1091 * is made to maintain link with the device by switching to host to use
1092 * the alternate port exclusively while the reset takes place.
1093 * failure to come online is overridden.
1094 */
1095 static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs)
1096 {
1097 struct cxlflash_cfg *cfg = afu->parent;
1098 struct device *dev = &cfg->dev->dev;
1099 u64 port_sel;
1100
1101 /* first switch the AFU to the other links, if any */
1102 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1103 port_sel &= ~(1ULL << port);
1104 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1105 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1106
1107 set_port_offline(fc_regs);
1108 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1109 FC_PORT_STATUS_RETRY_CNT))
1110 dev_err(dev, "%s: wait on port %d to go offline timed out\n",
1111 __func__, port);
1112
1113 set_port_online(fc_regs);
1114 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1115 FC_PORT_STATUS_RETRY_CNT))
1116 dev_err(dev, "%s: wait on port %d to go online timed out\n",
1117 __func__, port);
1118
1119 /* switch back to include this port */
1120 port_sel |= (1ULL << port);
1121 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1122 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1123
1124 dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel);
1125 }
1126
1127 /**
1128 * afu_err_intr_init() - clears and initializes the AFU for error interrupts
1129 * @afu: AFU associated with the host.
1130 */
1131 static void afu_err_intr_init(struct afu *afu)
1132 {
1133 struct cxlflash_cfg *cfg = afu->parent;
1134 __be64 __iomem *fc_port_regs;
1135 int i;
1136 struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ);
1137 u64 reg;
1138
1139 /* global async interrupts: AFU clears afu_ctrl on context exit
1140 * if async interrupts were sent to that context. This prevents
1141 * the AFU form sending further async interrupts when
1142 * there is
1143 * nobody to receive them.
1144 */
1145
1146 /* mask all */
1147 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1148 /* set LISN# to send and point to primary master context */
1149 reg = ((u64) (((hwq->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1150
1151 if (afu->internal_lun)
1152 reg |= 1; /* Bit 63 indicates local lun */
1153 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1154 /* clear all */
1155 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1156 /* unmask bits that are of interest */
1157 /* note: afu can send an interrupt after this step */
1158 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1159 /* clear again in case a bit came on after previous clear but before */
1160 /* unmask */
1161 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1162
1163 /* Clear/Set internal lun bits */
1164 fc_port_regs = get_fc_port_regs(cfg, 0);
1165 reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]);
1166 reg &= SISL_FC_INTERNAL_MASK;
1167 if (afu->internal_lun)
1168 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
1169 writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]);
1170
1171 /* now clear FC errors */
1172 for (i = 0; i < cfg->num_fc_ports; i++) {
1173 fc_port_regs = get_fc_port_regs(cfg, i);
1174
1175 writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]);
1176 writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]);
1177 }
1178
1179 /* sync interrupts for master's IOARRIN write */
1180 /* note that unlike asyncs, there can be no pending sync interrupts */
1181 /* at this time (this is a fresh context and master has not written */
1182 /* IOARRIN yet), so there is nothing to clear. */
1183
1184 /* set LISN#, it is always sent to the context that wrote IOARRIN */
1185 for (i = 0; i < afu->num_hwqs; i++) {
1186 hwq = get_hwq(afu, i);
1187
1188 writeq_be(SISL_MSI_SYNC_ERROR, &hwq->host_map->ctx_ctrl);
1189 writeq_be(SISL_ISTATUS_MASK, &hwq->host_map->intr_mask);
1190 }
1191 }
1192
1193 /**
1194 * cxlflash_sync_err_irq() - interrupt handler for synchronous errors
1195 * @irq: Interrupt number.
1196 * @data: Private data provided at interrupt registration, the AFU.
1197 *
1198 * Return: Always return IRQ_HANDLED.
1199 */
1200 static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1201 {
1202 struct hwq *hwq = (struct hwq *)data;
1203 struct cxlflash_cfg *cfg = hwq->afu->parent;
1204 struct device *dev = &cfg->dev->dev;
1205 u64 reg;
1206 u64 reg_unmasked;
1207
1208 reg = readq_be(&hwq->host_map->intr_status);
1209 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1210
1211 if (reg_unmasked == 0UL) {
1212 dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n",
1213 __func__, reg);
1214 goto cxlflash_sync_err_irq_exit;
1215 }
1216
1217 dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n",
1218 __func__, reg);
1219
1220 writeq_be(reg_unmasked, &hwq->host_map->intr_clear);
1221
1222 cxlflash_sync_err_irq_exit:
1223 return IRQ_HANDLED;
1224 }
1225
1226 /**
1227 * process_hrrq() - process the read-response queue
1228 * @afu: AFU associated with the host.
1229 * @doneq: Queue of commands harvested from the RRQ.
1230 * @budget: Threshold of RRQ entries to process.
1231 *
1232 * This routine must be called holding the disabled RRQ spin lock.
1233 *
1234 * Return: The number of entries processed.
1235 */
1236 static int process_hrrq(struct hwq *hwq, struct list_head *doneq, int budget)
1237 {
1238 struct afu *afu = hwq->afu;
1239 struct afu_cmd *cmd;
1240 struct sisl_ioasa *ioasa;
1241 struct sisl_ioarcb *ioarcb;
1242 bool toggle = hwq->toggle;
1243 int num_hrrq = 0;
1244 u64 entry,
1245 *hrrq_start = hwq->hrrq_start,
1246 *hrrq_end = hwq->hrrq_end,
1247 *hrrq_curr = hwq->hrrq_curr;
1248
1249 /* Process ready RRQ entries up to the specified budget (if any) */
1250 while (true) {
1251 entry = *hrrq_curr;
1252
1253 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1254 break;
1255
1256 entry &= ~SISL_RESP_HANDLE_T_BIT;
1257
1258 if (afu_is_sq_cmd_mode(afu)) {
1259 ioasa = (struct sisl_ioasa *)entry;
1260 cmd = container_of(ioasa, struct afu_cmd, sa);
1261 } else {
1262 ioarcb = (struct sisl_ioarcb *)entry;
1263 cmd = container_of(ioarcb, struct afu_cmd, rcb);
1264 }
1265
1266 list_add_tail(&cmd->queue, doneq);
1267
1268 /* Advance to next entry or wrap and flip the toggle bit */
1269 if (hrrq_curr < hrrq_end)
1270 hrrq_curr++;
1271 else {
1272 hrrq_curr = hrrq_start;
1273 toggle ^= SISL_RESP_HANDLE_T_BIT;
1274 }
1275
1276 atomic_inc(&hwq->hsq_credits);
1277 num_hrrq++;
1278
1279 if (budget > 0 && num_hrrq >= budget)
1280 break;
1281 }
1282
1283 hwq->hrrq_curr = hrrq_curr;
1284 hwq->toggle = toggle;
1285
1286 return num_hrrq;
1287 }
1288
1289 /**
1290 * process_cmd_doneq() - process a queue of harvested RRQ commands
1291 * @doneq: Queue of completed commands.
1292 *
1293 * Note that upon return the queue can no longer be trusted.
1294 */
1295 static void process_cmd_doneq(struct list_head *doneq)
1296 {
1297 struct afu_cmd *cmd, *tmp;
1298
1299 WARN_ON(list_empty(doneq));
1300
1301 list_for_each_entry_safe(cmd, tmp, doneq, queue)
1302 cmd_complete(cmd);
1303 }
1304
1305 /**
1306 * cxlflash_irqpoll() - process a queue of harvested RRQ commands
1307 * @irqpoll: IRQ poll structure associated with queue to poll.
1308 * @budget: Threshold of RRQ entries to process per poll.
1309 *
1310 * Return: The number of entries processed.
1311 */
1312 static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget)
1313 {
1314 struct hwq *hwq = container_of(irqpoll, struct hwq, irqpoll);
1315 unsigned long hrrq_flags;
1316 LIST_HEAD(doneq);
1317 int num_entries = 0;
1318
1319 spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags);
1320
1321 num_entries = process_hrrq(hwq, &doneq, budget);
1322 if (num_entries < budget)
1323 irq_poll_complete(irqpoll);
1324
1325 spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags);
1326
1327 process_cmd_doneq(&doneq);
1328 return num_entries;
1329 }
1330
1331 /**
1332 * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path)
1333 * @irq: Interrupt number.
1334 * @data: Private data provided at interrupt registration, the AFU.
1335 *
1336 * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found.
1337 */
1338 static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1339 {
1340 struct hwq *hwq = (struct hwq *)data;
1341 struct afu *afu = hwq->afu;
1342 unsigned long hrrq_flags;
1343 LIST_HEAD(doneq);
1344 int num_entries = 0;
1345
1346 spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags);
1347
1348 if (afu_is_irqpoll_enabled(afu)) {
1349 irq_poll_sched(&hwq->irqpoll);
1350 spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags);
1351 return IRQ_HANDLED;
1352 }
1353
1354 num_entries = process_hrrq(hwq, &doneq, -1);
1355 spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags);
1356
1357 if (num_entries == 0)
1358 return IRQ_NONE;
1359
1360 process_cmd_doneq(&doneq);
1361 return IRQ_HANDLED;
1362 }
1363
1364 /*
1365 * Asynchronous interrupt information table
1366 *
1367 * NOTE:
1368 * - Order matters here as this array is indexed by bit position.
1369 *
1370 * - The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro
1371 * as complex and complains due to a lack of parentheses/braces.
1372 */
1373 #define ASTATUS_FC(_a, _b, _c, _d) \
1374 { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) }
1375
1376 #define BUILD_SISL_ASTATUS_FC_PORT(_a) \
1377 ASTATUS_FC(_a, LINK_UP, "link up", 0), \
1378 ASTATUS_FC(_a, LINK_DN, "link down", 0), \
1379 ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \
1380 ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \
1381 ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \
1382 ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \
1383 ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \
1384 ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET)
1385
1386 static const struct asyc_intr_info ainfo[] = {
1387 BUILD_SISL_ASTATUS_FC_PORT(1),
1388 BUILD_SISL_ASTATUS_FC_PORT(0),
1389 BUILD_SISL_ASTATUS_FC_PORT(3),
1390 BUILD_SISL_ASTATUS_FC_PORT(2)
1391 };
1392
1393 /**
1394 * cxlflash_async_err_irq() - interrupt handler for asynchronous errors
1395 * @irq: Interrupt number.
1396 * @data: Private data provided at interrupt registration, the AFU.
1397 *
1398 * Return: Always return IRQ_HANDLED.
1399 */
1400 static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1401 {
1402 struct hwq *hwq = (struct hwq *)data;
1403 struct afu *afu = hwq->afu;
1404 struct cxlflash_cfg *cfg = afu->parent;
1405 struct device *dev = &cfg->dev->dev;
1406 const struct asyc_intr_info *info;
1407 struct sisl_global_map __iomem *global = &afu->afu_map->global;
1408 __be64 __iomem *fc_port_regs;
1409 u64 reg_unmasked;
1410 u64 reg;
1411 u64 bit;
1412 u8 port;
1413
1414 reg = readq_be(&global->regs.aintr_status);
1415 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1416
1417 if (unlikely(reg_unmasked == 0)) {
1418 dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n",
1419 __func__, reg);
1420 goto out;
1421 }
1422
1423 /* FYI, it is 'okay' to clear AFU status before FC_ERROR */
1424 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1425
1426 /* Check each bit that is on */
1427 for_each_set_bit(bit, (ulong *)&reg_unmasked, BITS_PER_LONG) {
1428 if (unlikely(bit >= ARRAY_SIZE(ainfo))) {
1429 WARN_ON_ONCE(1);
1430 continue;
1431 }
1432
1433 info = &ainfo[bit];
1434 if (unlikely(info->status != 1ULL << bit)) {
1435 WARN_ON_ONCE(1);
1436 continue;
1437 }
1438
1439 port = info->port;
1440 fc_port_regs = get_fc_port_regs(cfg, port);
1441
1442 dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n",
1443 __func__, port, info->desc,
1444 readq_be(&fc_port_regs[FC_STATUS / 8]));
1445
1446 /*
1447 * Do link reset first, some OTHER errors will set FC_ERROR
1448 * again if cleared before or w/o a reset
1449 */
1450 if (info->action & LINK_RESET) {
1451 dev_err(dev, "%s: FC Port %d: resetting link\n",
1452 __func__, port);
1453 cfg->lr_state = LINK_RESET_REQUIRED;
1454 cfg->lr_port = port;
1455 schedule_work(&cfg->work_q);
1456 }
1457
1458 if (info->action & CLR_FC_ERROR) {
1459 reg = readq_be(&fc_port_regs[FC_ERROR / 8]);
1460
1461 /*
1462 * Since all errors are unmasked, FC_ERROR and FC_ERRCAP
1463 * should be the same and tracing one is sufficient.
1464 */
1465
1466 dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n",
1467 __func__, port, reg);
1468
1469 writeq_be(reg, &fc_port_regs[FC_ERROR / 8]);
1470 writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]);
1471 }
1472
1473 if (info->action & SCAN_HOST) {
1474 atomic_inc(&cfg->scan_host_needed);
1475 schedule_work(&cfg->work_q);
1476 }
1477 }
1478
1479 out:
1480 return IRQ_HANDLED;
1481 }
1482
1483 /**
1484 * start_context() - starts the master context
1485 * @cfg: Internal structure associated with the host.
1486 * @index: Index of the hardware queue.
1487 *
1488 * Return: A success or failure value from CXL services.
1489 */
1490 static int start_context(struct cxlflash_cfg *cfg, u32 index)
1491 {
1492 struct device *dev = &cfg->dev->dev;
1493 struct hwq *hwq = get_hwq(cfg->afu, index);
1494 int rc = 0;
1495
1496 rc = cxl_start_context(hwq->ctx,
1497 hwq->work.work_element_descriptor,
1498 NULL);
1499
1500 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1501 return rc;
1502 }
1503
1504 /**
1505 * read_vpd() - obtains the WWPNs from VPD
1506 * @cfg: Internal structure associated with the host.
1507 * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs
1508 *
1509 * Return: 0 on success, -errno on failure
1510 */
1511 static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1512 {
1513 struct device *dev = &cfg->dev->dev;
1514 struct pci_dev *pdev = cfg->dev;
1515 int rc = 0;
1516 int ro_start, ro_size, i, j, k;
1517 ssize_t vpd_size;
1518 char vpd_data[CXLFLASH_VPD_LEN];
1519 char tmp_buf[WWPN_BUF_LEN] = { 0 };
1520 char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" };
1521
1522 /* Get the VPD data from the device */
1523 vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data));
1524 if (unlikely(vpd_size <= 0)) {
1525 dev_err(dev, "%s: Unable to read VPD (size = %ld)\n",
1526 __func__, vpd_size);
1527 rc = -ENODEV;
1528 goto out;
1529 }
1530
1531 /* Get the read only section offset */
1532 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1533 PCI_VPD_LRDT_RO_DATA);
1534 if (unlikely(ro_start < 0)) {
1535 dev_err(dev, "%s: VPD Read-only data not found\n", __func__);
1536 rc = -ENODEV;
1537 goto out;
1538 }
1539
1540 /* Get the read only section size, cap when extends beyond read VPD */
1541 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1542 j = ro_size;
1543 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1544 if (unlikely((i + j) > vpd_size)) {
1545 dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n",
1546 __func__, (i + j), vpd_size);
1547 ro_size = vpd_size - i;
1548 }
1549
1550 /*
1551 * Find the offset of the WWPN tag within the read only
1552 * VPD data and validate the found field (partials are
1553 * no good to us). Convert the ASCII data to an integer
1554 * value. Note that we must copy to a temporary buffer
1555 * because the conversion service requires that the ASCII
1556 * string be terminated.
1557 */
1558 for (k = 0; k < cfg->num_fc_ports; k++) {
1559 j = ro_size;
1560 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1561
1562 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1563 if (unlikely(i < 0)) {
1564 dev_err(dev, "%s: Port %d WWPN not found in VPD\n",
1565 __func__, k);
1566 rc = -ENODEV;
1567 goto out;
1568 }
1569
1570 j = pci_vpd_info_field_size(&vpd_data[i]);
1571 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1572 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
1573 dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n",
1574 __func__, k);
1575 rc = -ENODEV;
1576 goto out;
1577 }
1578
1579 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1580 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1581 if (unlikely(rc)) {
1582 dev_err(dev, "%s: WWPN conversion failed for port %d\n",
1583 __func__, k);
1584 rc = -ENODEV;
1585 goto out;
1586 }
1587
1588 dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]);
1589 }
1590
1591 out:
1592 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1593 return rc;
1594 }
1595
1596 /**
1597 * init_pcr() - initialize the provisioning and control registers
1598 * @cfg: Internal structure associated with the host.
1599 *
1600 * Also sets up fast access to the mapped registers and initializes AFU
1601 * command fields that never change.
1602 */
1603 static void init_pcr(struct cxlflash_cfg *cfg)
1604 {
1605 struct afu *afu = cfg->afu;
1606 struct sisl_ctrl_map __iomem *ctrl_map;
1607 struct hwq *hwq;
1608 int i;
1609
1610 for (i = 0; i < MAX_CONTEXT; i++) {
1611 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
1612 /* Disrupt any clients that could be running */
1613 /* e.g. clients that survived a master restart */
1614 writeq_be(0, &ctrl_map->rht_start);
1615 writeq_be(0, &ctrl_map->rht_cnt_id);
1616 writeq_be(0, &ctrl_map->ctx_cap);
1617 }
1618
1619 /* Copy frequently used fields into hwq */
1620 for (i = 0; i < afu->num_hwqs; i++) {
1621 hwq = get_hwq(afu, i);
1622
1623 hwq->ctx_hndl = (u16) cxl_process_element(hwq->ctx);
1624 hwq->host_map = &afu->afu_map->hosts[hwq->ctx_hndl].host;
1625 hwq->ctrl_map = &afu->afu_map->ctrls[hwq->ctx_hndl].ctrl;
1626
1627 /* Program the Endian Control for the master context */
1628 writeq_be(SISL_ENDIAN_CTRL, &hwq->host_map->endian_ctrl);
1629 }
1630 }
1631
1632 /**
1633 * init_global() - initialize AFU global registers
1634 * @cfg: Internal structure associated with the host.
1635 */
1636 static int init_global(struct cxlflash_cfg *cfg)
1637 {
1638 struct afu *afu = cfg->afu;
1639 struct device *dev = &cfg->dev->dev;
1640 struct hwq *hwq;
1641 struct sisl_host_map __iomem *hmap;
1642 __be64 __iomem *fc_port_regs;
1643 u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */
1644 int i = 0, num_ports = 0;
1645 int rc = 0;
1646 u64 reg;
1647
1648 rc = read_vpd(cfg, &wwpn[0]);
1649 if (rc) {
1650 dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc);
1651 goto out;
1652 }
1653
1654 /* Set up RRQ and SQ in HWQ for master issued cmds */
1655 for (i = 0; i < afu->num_hwqs; i++) {
1656 hwq = get_hwq(afu, i);
1657 hmap = hwq->host_map;
1658
1659 writeq_be((u64) hwq->hrrq_start, &hmap->rrq_start);
1660 writeq_be((u64) hwq->hrrq_end, &hmap->rrq_end);
1661
1662 if (afu_is_sq_cmd_mode(afu)) {
1663 writeq_be((u64)hwq->hsq_start, &hmap->sq_start);
1664 writeq_be((u64)hwq->hsq_end, &hmap->sq_end);
1665 }
1666 }
1667
1668 /* AFU configuration */
1669 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1670 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1671 /* enable all auto retry options and control endianness */
1672 /* leave others at default: */
1673 /* CTX_CAP write protected, mbox_r does not clear on read and */
1674 /* checker on if dual afu */
1675 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1676
1677 /* Global port select: select either port */
1678 if (afu->internal_lun) {
1679 /* Only use port 0 */
1680 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
1681 num_ports = 0;
1682 } else {
1683 writeq_be(PORT_MASK(cfg->num_fc_ports),
1684 &afu->afu_map->global.regs.afu_port_sel);
1685 num_ports = cfg->num_fc_ports;
1686 }
1687
1688 for (i = 0; i < num_ports; i++) {
1689 fc_port_regs = get_fc_port_regs(cfg, i);
1690
1691 /* Unmask all errors (but they are still masked at AFU) */
1692 writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]);
1693 /* Clear CRC error cnt & set a threshold */
1694 (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]);
1695 writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]);
1696
1697 /* Set WWPNs. If already programmed, wwpn[i] is 0 */
1698 if (wwpn[i] != 0)
1699 afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]);
1700 /* Programming WWPN back to back causes additional
1701 * offline/online transitions and a PLOGI
1702 */
1703 msleep(100);
1704 }
1705
1706 /* Set up master's own CTX_CAP to allow real mode, host translation */
1707 /* tables, afu cmds and read/write GSCSI cmds. */
1708 /* First, unlock ctx_cap write by reading mbox */
1709 for (i = 0; i < afu->num_hwqs; i++) {
1710 hwq = get_hwq(afu, i);
1711
1712 (void)readq_be(&hwq->ctrl_map->mbox_r); /* unlock ctx_cap */
1713 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1714 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1715 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1716 &hwq->ctrl_map->ctx_cap);
1717 }
1718 /* Initialize heartbeat */
1719 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
1720 out:
1721 return rc;
1722 }
1723
1724 /**
1725 * start_afu() - initializes and starts the AFU
1726 * @cfg: Internal structure associated with the host.
1727 */
1728 static int start_afu(struct cxlflash_cfg *cfg)
1729 {
1730 struct afu *afu = cfg->afu;
1731 struct device *dev = &cfg->dev->dev;
1732 struct hwq *hwq;
1733 int rc = 0;
1734 int i;
1735
1736 init_pcr(cfg);
1737
1738 /* Initialize each HWQ */
1739 for (i = 0; i < afu->num_hwqs; i++) {
1740 hwq = get_hwq(afu, i);
1741
1742 /* After an AFU reset, RRQ entries are stale, clear them */
1743 memset(&hwq->rrq_entry, 0, sizeof(hwq->rrq_entry));
1744
1745 /* Initialize RRQ pointers */
1746 hwq->hrrq_start = &hwq->rrq_entry[0];
1747 hwq->hrrq_end = &hwq->rrq_entry[NUM_RRQ_ENTRY - 1];
1748 hwq->hrrq_curr = hwq->hrrq_start;
1749 hwq->toggle = 1;
1750
1751 /* Initialize spin locks */
1752 spin_lock_init(&hwq->hrrq_slock);
1753 spin_lock_init(&hwq->hsq_slock);
1754
1755 /* Initialize SQ */
1756 if (afu_is_sq_cmd_mode(afu)) {
1757 memset(&hwq->sq, 0, sizeof(hwq->sq));
1758 hwq->hsq_start = &hwq->sq[0];
1759 hwq->hsq_end = &hwq->sq[NUM_SQ_ENTRY - 1];
1760 hwq->hsq_curr = hwq->hsq_start;
1761
1762 atomic_set(&hwq->hsq_credits, NUM_SQ_ENTRY - 1);
1763 }
1764
1765 /* Initialize IRQ poll */
1766 if (afu_is_irqpoll_enabled(afu))
1767 irq_poll_init(&hwq->irqpoll, afu->irqpoll_weight,
1768 cxlflash_irqpoll);
1769
1770 }
1771
1772 rc = init_global(cfg);
1773
1774 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1775 return rc;
1776 }
1777
1778 /**
1779 * init_intr() - setup interrupt handlers for the master context
1780 * @cfg: Internal structure associated with the host.
1781 * @hwq: Hardware queue to initialize.
1782 *
1783 * Return: 0 on success, -errno on failure
1784 */
1785 static enum undo_level init_intr(struct cxlflash_cfg *cfg,
1786 struct hwq *hwq)
1787 {
1788 struct device *dev = &cfg->dev->dev;
1789 struct cxl_context *ctx = hwq->ctx;
1790 int rc = 0;
1791 enum undo_level level = UNDO_NOOP;
1792 bool is_primary_hwq = (hwq->index == PRIMARY_HWQ);
1793 int num_irqs = is_primary_hwq ? 3 : 2;
1794
1795 rc = cxl_allocate_afu_irqs(ctx, num_irqs);
1796 if (unlikely(rc)) {
1797 dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n",
1798 __func__, rc);
1799 level = UNDO_NOOP;
1800 goto out;
1801 }
1802
1803 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, hwq,
1804 "SISL_MSI_SYNC_ERROR");
1805 if (unlikely(rc <= 0)) {
1806 dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__);
1807 level = FREE_IRQ;
1808 goto out;
1809 }
1810
1811 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, hwq,
1812 "SISL_MSI_RRQ_UPDATED");
1813 if (unlikely(rc <= 0)) {
1814 dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__);
1815 level = UNMAP_ONE;
1816 goto out;
1817 }
1818
1819 /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */
1820 if (!is_primary_hwq)
1821 goto out;
1822
1823 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, hwq,
1824 "SISL_MSI_ASYNC_ERROR");
1825 if (unlikely(rc <= 0)) {
1826 dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__);
1827 level = UNMAP_TWO;
1828 goto out;
1829 }
1830 out:
1831 return level;
1832 }
1833
1834 /**
1835 * init_mc() - create and register as the master context
1836 * @cfg: Internal structure associated with the host.
1837 * index: HWQ Index of the master context.
1838 *
1839 * Return: 0 on success, -errno on failure
1840 */
1841 static int init_mc(struct cxlflash_cfg *cfg, u32 index)
1842 {
1843 struct cxl_context *ctx;
1844 struct device *dev = &cfg->dev->dev;
1845 struct hwq *hwq = get_hwq(cfg->afu, index);
1846 int rc = 0;
1847 enum undo_level level;
1848
1849 hwq->afu = cfg->afu;
1850 hwq->index = index;
1851 INIT_LIST_HEAD(&hwq->pending_cmds);
1852
1853 if (index == PRIMARY_HWQ)
1854 ctx = cxl_get_context(cfg->dev);
1855 else
1856 ctx = cxl_dev_context_init(cfg->dev);
1857 if (unlikely(!ctx)) {
1858 rc = -ENOMEM;
1859 goto err1;
1860 }
1861
1862 WARN_ON(hwq->ctx);
1863 hwq->ctx = ctx;
1864
1865 /* Set it up as a master with the CXL */
1866 cxl_set_master(ctx);
1867
1868 /* Reset AFU when initializing primary context */
1869 if (index == PRIMARY_HWQ) {
1870 rc = cxl_afu_reset(ctx);
1871 if (unlikely(rc)) {
1872 dev_err(dev, "%s: AFU reset failed rc=%d\n",
1873 __func__, rc);
1874 goto err1;
1875 }
1876 }
1877
1878 level = init_intr(cfg, hwq);
1879 if (unlikely(level)) {
1880 dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc);
1881 goto err2;
1882 }
1883
1884 /* This performs the equivalent of the CXL_IOCTL_START_WORK.
1885 * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process
1886 * element (pe) that is embedded in the context (ctx)
1887 */
1888 rc = start_context(cfg, index);
1889 if (unlikely(rc)) {
1890 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1891 level = UNMAP_THREE;
1892 goto err2;
1893 }
1894
1895 out:
1896 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
1897 return rc;
1898 err2:
1899 term_intr(cfg, level, index);
1900 if (index != PRIMARY_HWQ)
1901 cxl_release_context(ctx);
1902 err1:
1903 hwq->ctx = NULL;
1904 goto out;
1905 }
1906
1907 /**
1908 * get_num_afu_ports() - determines and configures the number of AFU ports
1909 * @cfg: Internal structure associated with the host.
1910 *
1911 * This routine determines the number of AFU ports by converting the global
1912 * port selection mask. The converted value is only valid following an AFU
1913 * reset (explicit or power-on). This routine must be invoked shortly after
1914 * mapping as other routines are dependent on the number of ports during the
1915 * initialization sequence.
1916 *
1917 * To support legacy AFUs that might not have reflected an initial global
1918 * port mask (value read is 0), default to the number of ports originally
1919 * supported by the cxlflash driver (2) before hardware with other port
1920 * offerings was introduced.
1921 */
1922 static void get_num_afu_ports(struct cxlflash_cfg *cfg)
1923 {
1924 struct afu *afu = cfg->afu;
1925 struct device *dev = &cfg->dev->dev;
1926 u64 port_mask;
1927 int num_fc_ports = LEGACY_FC_PORTS;
1928
1929 port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1930 if (port_mask != 0ULL)
1931 num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS);
1932
1933 dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n",
1934 __func__, port_mask, num_fc_ports);
1935
1936 cfg->num_fc_ports = num_fc_ports;
1937 cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports);
1938 }
1939
1940 /**
1941 * init_afu() - setup as master context and start AFU
1942 * @cfg: Internal structure associated with the host.
1943 *
1944 * This routine is a higher level of control for configuring the
1945 * AFU on probe and reset paths.
1946 *
1947 * Return: 0 on success, -errno on failure
1948 */
1949 static int init_afu(struct cxlflash_cfg *cfg)
1950 {
1951 u64 reg;
1952 int rc = 0;
1953 struct afu *afu = cfg->afu;
1954 struct device *dev = &cfg->dev->dev;
1955 struct hwq *hwq;
1956 int i;
1957
1958 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1959
1960 afu->num_hwqs = afu->desired_hwqs;
1961 for (i = 0; i < afu->num_hwqs; i++) {
1962 rc = init_mc(cfg, i);
1963 if (rc) {
1964 dev_err(dev, "%s: init_mc failed rc=%d index=%d\n",
1965 __func__, rc, i);
1966 goto err1;
1967 }
1968 }
1969
1970 /* Map the entire MMIO space of the AFU using the first context */
1971 hwq = get_hwq(afu, PRIMARY_HWQ);
1972 afu->afu_map = cxl_psa_map(hwq->ctx);
1973 if (!afu->afu_map) {
1974 dev_err(dev, "%s: cxl_psa_map failed\n", __func__);
1975 rc = -ENOMEM;
1976 goto err1;
1977 }
1978
1979 /* No byte reverse on reading afu_version or string will be backwards */
1980 reg = readq(&afu->afu_map->global.regs.afu_version);
1981 memcpy(afu->version, &reg, sizeof(reg));
1982 afu->interface_version =
1983 readq_be(&afu->afu_map->global.regs.interface_version);
1984 if ((afu->interface_version + 1) == 0) {
1985 dev_err(dev, "Back level AFU, please upgrade. AFU version %s "
1986 "interface version %016llx\n", afu->version,
1987 afu->interface_version);
1988 rc = -EINVAL;
1989 goto err1;
1990 }
1991
1992 if (afu_is_sq_cmd_mode(afu)) {
1993 afu->send_cmd = send_cmd_sq;
1994 afu->context_reset = context_reset_sq;
1995 } else {
1996 afu->send_cmd = send_cmd_ioarrin;
1997 afu->context_reset = context_reset_ioarrin;
1998 }
1999
2000 dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__,
2001 afu->version, afu->interface_version);
2002
2003 get_num_afu_ports(cfg);
2004
2005 rc = start_afu(cfg);
2006 if (rc) {
2007 dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc);
2008 goto err1;
2009 }
2010
2011 afu_err_intr_init(cfg->afu);
2012 for (i = 0; i < afu->num_hwqs; i++) {
2013 hwq = get_hwq(afu, i);
2014
2015 hwq->room = readq_be(&hwq->host_map->cmd_room);
2016 }
2017
2018 /* Restore the LUN mappings */
2019 cxlflash_restore_luntable(cfg);
2020 out:
2021 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2022 return rc;
2023
2024 err1:
2025 for (i = afu->num_hwqs - 1; i >= 0; i--) {
2026 term_intr(cfg, UNMAP_THREE, i);
2027 term_mc(cfg, i);
2028 }
2029 goto out;
2030 }
2031
2032 /**
2033 * afu_reset() - resets the AFU
2034 * @cfg: Internal structure associated with the host.
2035 *
2036 * Return: 0 on success, -errno on failure
2037 */
2038 static int afu_reset(struct cxlflash_cfg *cfg)
2039 {
2040 struct device *dev = &cfg->dev->dev;
2041 int rc = 0;
2042
2043 /* Stop the context before the reset. Since the context is
2044 * no longer available restart it after the reset is complete
2045 */
2046 term_afu(cfg);
2047
2048 rc = init_afu(cfg);
2049
2050 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2051 return rc;
2052 }
2053
2054 /**
2055 * drain_ioctls() - wait until all currently executing ioctls have completed
2056 * @cfg: Internal structure associated with the host.
2057 *
2058 * Obtain write access to read/write semaphore that wraps ioctl
2059 * handling to 'drain' ioctls currently executing.
2060 */
2061 static void drain_ioctls(struct cxlflash_cfg *cfg)
2062 {
2063 down_write(&cfg->ioctl_rwsem);
2064 up_write(&cfg->ioctl_rwsem);
2065 }
2066
2067 /**
2068 * cxlflash_async_reset_host() - asynchronous host reset handler
2069 * @data: Private data provided while scheduling reset.
2070 * @cookie: Cookie that can be used for checkpointing.
2071 */
2072 static void cxlflash_async_reset_host(void *data, async_cookie_t cookie)
2073 {
2074 struct cxlflash_cfg *cfg = data;
2075 struct device *dev = &cfg->dev->dev;
2076 int rc = 0;
2077
2078 if (cfg->state != STATE_RESET) {
2079 dev_dbg(dev, "%s: Not performing a reset, state=%d\n",
2080 __func__, cfg->state);
2081 goto out;
2082 }
2083
2084 drain_ioctls(cfg);
2085 cxlflash_mark_contexts_error(cfg);
2086 rc = afu_reset(cfg);
2087 if (rc)
2088 cfg->state = STATE_FAILTERM;
2089 else
2090 cfg->state = STATE_NORMAL;
2091 wake_up_all(&cfg->reset_waitq);
2092
2093 out:
2094 scsi_unblock_requests(cfg->host);
2095 }
2096
2097 /**
2098 * cxlflash_schedule_async_reset() - schedule an asynchronous host reset
2099 * @cfg: Internal structure associated with the host.
2100 */
2101 static void cxlflash_schedule_async_reset(struct cxlflash_cfg *cfg)
2102 {
2103 struct device *dev = &cfg->dev->dev;
2104
2105 if (cfg->state != STATE_NORMAL) {
2106 dev_dbg(dev, "%s: Not performing reset state=%d\n",
2107 __func__, cfg->state);
2108 return;
2109 }
2110
2111 cfg->state = STATE_RESET;
2112 scsi_block_requests(cfg->host);
2113 cfg->async_reset_cookie = async_schedule(cxlflash_async_reset_host,
2114 cfg);
2115 }
2116
2117 /**
2118 * cxlflash_afu_sync() - builds and sends an AFU sync command
2119 * @afu: AFU associated with the host.
2120 * @ctx_hndl_u: Identifies context requesting sync.
2121 * @res_hndl_u: Identifies resource requesting sync.
2122 * @mode: Type of sync to issue (lightweight, heavyweight, global).
2123 *
2124 * The AFU can only take 1 sync command at a time. This routine enforces this
2125 * limitation by using a mutex to provide exclusive access to the AFU during
2126 * the sync. This design point requires calling threads to not be on interrupt
2127 * context due to the possibility of sleeping during concurrent sync operations.
2128 *
2129 * AFU sync operations are only necessary and allowed when the device is
2130 * operating normally. When not operating normally, sync requests can occur as
2131 * part of cleaning up resources associated with an adapter prior to removal.
2132 * In this scenario, these requests are simply ignored (safe due to the AFU
2133 * going away).
2134 *
2135 * Return:
2136 * 0 on success, -errno on failure
2137 */
2138 int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
2139 res_hndl_t res_hndl_u, u8 mode)
2140 {
2141 struct cxlflash_cfg *cfg = afu->parent;
2142 struct device *dev = &cfg->dev->dev;
2143 struct afu_cmd *cmd = NULL;
2144 struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ);
2145 char *buf = NULL;
2146 int rc = 0;
2147 int nretry = 0;
2148 static DEFINE_MUTEX(sync_active);
2149
2150 if (cfg->state != STATE_NORMAL) {
2151 dev_dbg(dev, "%s: Sync not required state=%u\n",
2152 __func__, cfg->state);
2153 return 0;
2154 }
2155
2156 mutex_lock(&sync_active);
2157 atomic_inc(&afu->cmds_active);
2158 buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL);
2159 if (unlikely(!buf)) {
2160 dev_err(dev, "%s: no memory for command\n", __func__);
2161 rc = -ENOMEM;
2162 goto out;
2163 }
2164
2165 cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd));
2166
2167 retry:
2168 init_completion(&cmd->cevent);
2169 cmd->parent = afu;
2170 cmd->hwq_index = hwq->index;
2171
2172 dev_dbg(dev, "%s: afu=%p cmd=%p ctx=%d nretry=%d\n",
2173 __func__, afu, cmd, ctx_hndl_u, nretry);
2174
2175 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
2176 cmd->rcb.ctx_id = hwq->ctx_hndl;
2177 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
2178 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
2179
2180 cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */
2181 cmd->rcb.cdb[1] = mode;
2182
2183 /* The cdb is aligned, no unaligned accessors required */
2184 *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u);
2185 *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u);
2186
2187 rc = afu->send_cmd(afu, cmd);
2188 if (unlikely(rc)) {
2189 rc = -ENOBUFS;
2190 goto out;
2191 }
2192
2193 rc = wait_resp(afu, cmd);
2194 if (rc == -ETIMEDOUT) {
2195 rc = afu->context_reset(hwq);
2196 if (!rc && ++nretry < 2)
2197 goto retry;
2198 cxlflash_schedule_async_reset(cfg);
2199 }
2200
2201 out:
2202 atomic_dec(&afu->cmds_active);
2203 mutex_unlock(&sync_active);
2204 kfree(buf);
2205 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2206 return rc;
2207 }
2208
2209 /**
2210 * cxlflash_eh_device_reset_handler() - reset a single LUN
2211 * @scp: SCSI command to send.
2212 *
2213 * Return:
2214 * SUCCESS as defined in scsi/scsi.h
2215 * FAILED as defined in scsi/scsi.h
2216 */
2217 static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
2218 {
2219 int rc = SUCCESS;
2220 struct Scsi_Host *host = scp->device->host;
2221 struct cxlflash_cfg *cfg = shost_priv(host);
2222 struct device *dev = &cfg->dev->dev;
2223 struct afu *afu = cfg->afu;
2224 int rcr = 0;
2225
2226 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
2227 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
2228 scp->device->channel, scp->device->id, scp->device->lun,
2229 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
2230 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
2231 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
2232 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
2233
2234 retry:
2235 switch (cfg->state) {
2236 case STATE_NORMAL:
2237 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
2238 if (unlikely(rcr))
2239 rc = FAILED;
2240 break;
2241 case STATE_RESET:
2242 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2243 goto retry;
2244 default:
2245 rc = FAILED;
2246 break;
2247 }
2248
2249 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2250 return rc;
2251 }
2252
2253 /**
2254 * cxlflash_eh_host_reset_handler() - reset the host adapter
2255 * @scp: SCSI command from stack identifying host.
2256 *
2257 * Following a reset, the state is evaluated again in case an EEH occurred
2258 * during the reset. In such a scenario, the host reset will either yield
2259 * until the EEH recovery is complete or return success or failure based
2260 * upon the current device state.
2261 *
2262 * Return:
2263 * SUCCESS as defined in scsi/scsi.h
2264 * FAILED as defined in scsi/scsi.h
2265 */
2266 static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
2267 {
2268 int rc = SUCCESS;
2269 int rcr = 0;
2270 struct Scsi_Host *host = scp->device->host;
2271 struct cxlflash_cfg *cfg = shost_priv(host);
2272 struct device *dev = &cfg->dev->dev;
2273
2274 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
2275 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
2276 scp->device->channel, scp->device->id, scp->device->lun,
2277 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
2278 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
2279 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
2280 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
2281
2282 switch (cfg->state) {
2283 case STATE_NORMAL:
2284 cfg->state = STATE_RESET;
2285 drain_ioctls(cfg);
2286 cxlflash_mark_contexts_error(cfg);
2287 rcr = afu_reset(cfg);
2288 if (rcr) {
2289 rc = FAILED;
2290 cfg->state = STATE_FAILTERM;
2291 } else
2292 cfg->state = STATE_NORMAL;
2293 wake_up_all(&cfg->reset_waitq);
2294 ssleep(1);
2295 /* fall through */
2296 case STATE_RESET:
2297 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2298 if (cfg->state == STATE_NORMAL)
2299 break;
2300 /* fall through */
2301 default:
2302 rc = FAILED;
2303 break;
2304 }
2305
2306 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
2307 return rc;
2308 }
2309
2310 /**
2311 * cxlflash_change_queue_depth() - change the queue depth for the device
2312 * @sdev: SCSI device destined for queue depth change.
2313 * @qdepth: Requested queue depth value to set.
2314 *
2315 * The requested queue depth is capped to the maximum supported value.
2316 *
2317 * Return: The actual queue depth set.
2318 */
2319 static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
2320 {
2321
2322 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
2323 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
2324
2325 scsi_change_queue_depth(sdev, qdepth);
2326 return sdev->queue_depth;
2327 }
2328
2329 /**
2330 * cxlflash_show_port_status() - queries and presents the current port status
2331 * @port: Desired port for status reporting.
2332 * @cfg: Internal structure associated with the host.
2333 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2334 *
2335 * Return: The size of the ASCII string returned in @buf or -EINVAL.
2336 */
2337 static ssize_t cxlflash_show_port_status(u32 port,
2338 struct cxlflash_cfg *cfg,
2339 char *buf)
2340 {
2341 struct device *dev = &cfg->dev->dev;
2342 char *disp_status;
2343 u64 status;
2344 __be64 __iomem *fc_port_regs;
2345
2346 WARN_ON(port >= MAX_FC_PORTS);
2347
2348 if (port >= cfg->num_fc_ports) {
2349 dev_info(dev, "%s: Port %d not supported on this card.\n",
2350 __func__, port);
2351 return -EINVAL;
2352 }
2353
2354 fc_port_regs = get_fc_port_regs(cfg, port);
2355 status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]);
2356 status &= FC_MTIP_STATUS_MASK;
2357
2358 if (status == FC_MTIP_STATUS_ONLINE)
2359 disp_status = "online";
2360 else if (status == FC_MTIP_STATUS_OFFLINE)
2361 disp_status = "offline";
2362 else
2363 disp_status = "unknown";
2364
2365 return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status);
2366 }
2367
2368 /**
2369 * port0_show() - queries and presents the current status of port 0
2370 * @dev: Generic device associated with the host owning the port.
2371 * @attr: Device attribute representing the port.
2372 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2373 *
2374 * Return: The size of the ASCII string returned in @buf.
2375 */
2376 static ssize_t port0_show(struct device *dev,
2377 struct device_attribute *attr,
2378 char *buf)
2379 {
2380 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2381
2382 return cxlflash_show_port_status(0, cfg, buf);
2383 }
2384
2385 /**
2386 * port1_show() - queries and presents the current status of port 1
2387 * @dev: Generic device associated with the host owning the port.
2388 * @attr: Device attribute representing the port.
2389 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2390 *
2391 * Return: The size of the ASCII string returned in @buf.
2392 */
2393 static ssize_t port1_show(struct device *dev,
2394 struct device_attribute *attr,
2395 char *buf)
2396 {
2397 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2398
2399 return cxlflash_show_port_status(1, cfg, buf);
2400 }
2401
2402 /**
2403 * port2_show() - queries and presents the current status of port 2
2404 * @dev: Generic device associated with the host owning the port.
2405 * @attr: Device attribute representing the port.
2406 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2407 *
2408 * Return: The size of the ASCII string returned in @buf.
2409 */
2410 static ssize_t port2_show(struct device *dev,
2411 struct device_attribute *attr,
2412 char *buf)
2413 {
2414 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2415
2416 return cxlflash_show_port_status(2, cfg, buf);
2417 }
2418
2419 /**
2420 * port3_show() - queries and presents the current status of port 3
2421 * @dev: Generic device associated with the host owning the port.
2422 * @attr: Device attribute representing the port.
2423 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2424 *
2425 * Return: The size of the ASCII string returned in @buf.
2426 */
2427 static ssize_t port3_show(struct device *dev,
2428 struct device_attribute *attr,
2429 char *buf)
2430 {
2431 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2432
2433 return cxlflash_show_port_status(3, cfg, buf);
2434 }
2435
2436 /**
2437 * lun_mode_show() - presents the current LUN mode of the host
2438 * @dev: Generic device associated with the host.
2439 * @attr: Device attribute representing the LUN mode.
2440 * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII.
2441 *
2442 * Return: The size of the ASCII string returned in @buf.
2443 */
2444 static ssize_t lun_mode_show(struct device *dev,
2445 struct device_attribute *attr, char *buf)
2446 {
2447 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2448 struct afu *afu = cfg->afu;
2449
2450 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
2451 }
2452
2453 /**
2454 * lun_mode_store() - sets the LUN mode of the host
2455 * @dev: Generic device associated with the host.
2456 * @attr: Device attribute representing the LUN mode.
2457 * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII.
2458 * @count: Length of data resizing in @buf.
2459 *
2460 * The CXL Flash AFU supports a dummy LUN mode where the external
2461 * links and storage are not required. Space on the FPGA is used
2462 * to create 1 or 2 small LUNs which are presented to the system
2463 * as if they were a normal storage device. This feature is useful
2464 * during development and also provides manufacturing with a way
2465 * to test the AFU without an actual device.
2466 *
2467 * 0 = external LUN[s] (default)
2468 * 1 = internal LUN (1 x 64K, 512B blocks, id 0)
2469 * 2 = internal LUN (1 x 64K, 4K blocks, id 0)
2470 * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1)
2471 * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1)
2472 *
2473 * Return: The size of the ASCII string returned in @buf.
2474 */
2475 static ssize_t lun_mode_store(struct device *dev,
2476 struct device_attribute *attr,
2477 const char *buf, size_t count)
2478 {
2479 struct Scsi_Host *shost = class_to_shost(dev);
2480 struct cxlflash_cfg *cfg = shost_priv(shost);
2481 struct afu *afu = cfg->afu;
2482 int rc;
2483 u32 lun_mode;
2484
2485 rc = kstrtouint(buf, 10, &lun_mode);
2486 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
2487 afu->internal_lun = lun_mode;
2488
2489 /*
2490 * When configured for internal LUN, there is only one channel,
2491 * channel number 0, else there will be one less than the number
2492 * of fc ports for this card.
2493 */
2494 if (afu->internal_lun)
2495 shost->max_channel = 0;
2496 else
2497 shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports);
2498
2499 afu_reset(cfg);
2500 scsi_scan_host(cfg->host);
2501 }
2502
2503 return count;
2504 }
2505
2506 /**
2507 * ioctl_version_show() - presents the current ioctl version of the host
2508 * @dev: Generic device associated with the host.
2509 * @attr: Device attribute representing the ioctl version.
2510 * @buf: Buffer of length PAGE_SIZE to report back the ioctl version.
2511 *
2512 * Return: The size of the ASCII string returned in @buf.
2513 */
2514 static ssize_t ioctl_version_show(struct device *dev,
2515 struct device_attribute *attr, char *buf)
2516 {
2517 return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0);
2518 }
2519
2520 /**
2521 * cxlflash_show_port_lun_table() - queries and presents the port LUN table
2522 * @port: Desired port for status reporting.
2523 * @cfg: Internal structure associated with the host.
2524 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2525 *
2526 * Return: The size of the ASCII string returned in @buf or -EINVAL.
2527 */
2528 static ssize_t cxlflash_show_port_lun_table(u32 port,
2529 struct cxlflash_cfg *cfg,
2530 char *buf)
2531 {
2532 struct device *dev = &cfg->dev->dev;
2533 __be64 __iomem *fc_port_luns;
2534 int i;
2535 ssize_t bytes = 0;
2536
2537 WARN_ON(port >= MAX_FC_PORTS);
2538
2539 if (port >= cfg->num_fc_ports) {
2540 dev_info(dev, "%s: Port %d not supported on this card.\n",
2541 __func__, port);
2542 return -EINVAL;
2543 }
2544
2545 fc_port_luns = get_fc_port_luns(cfg, port);
2546
2547 for (i = 0; i < CXLFLASH_NUM_VLUNS; i++)
2548 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
2549 "%03d: %016llx\n",
2550 i, readq_be(&fc_port_luns[i]));
2551 return bytes;
2552 }
2553
2554 /**
2555 * port0_lun_table_show() - presents the current LUN table of port 0
2556 * @dev: Generic device associated with the host owning the port.
2557 * @attr: Device attribute representing the port.
2558 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2559 *
2560 * Return: The size of the ASCII string returned in @buf.
2561 */
2562 static ssize_t port0_lun_table_show(struct device *dev,
2563 struct device_attribute *attr,
2564 char *buf)
2565 {
2566 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2567
2568 return cxlflash_show_port_lun_table(0, cfg, buf);
2569 }
2570
2571 /**
2572 * port1_lun_table_show() - presents the current LUN table of port 1
2573 * @dev: Generic device associated with the host owning the port.
2574 * @attr: Device attribute representing the port.
2575 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2576 *
2577 * Return: The size of the ASCII string returned in @buf.
2578 */
2579 static ssize_t port1_lun_table_show(struct device *dev,
2580 struct device_attribute *attr,
2581 char *buf)
2582 {
2583 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2584
2585 return cxlflash_show_port_lun_table(1, cfg, buf);
2586 }
2587
2588 /**
2589 * port2_lun_table_show() - presents the current LUN table of port 2
2590 * @dev: Generic device associated with the host owning the port.
2591 * @attr: Device attribute representing the port.
2592 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2593 *
2594 * Return: The size of the ASCII string returned in @buf.
2595 */
2596 static ssize_t port2_lun_table_show(struct device *dev,
2597 struct device_attribute *attr,
2598 char *buf)
2599 {
2600 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2601
2602 return cxlflash_show_port_lun_table(2, cfg, buf);
2603 }
2604
2605 /**
2606 * port3_lun_table_show() - presents the current LUN table of port 3
2607 * @dev: Generic device associated with the host owning the port.
2608 * @attr: Device attribute representing the port.
2609 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2610 *
2611 * Return: The size of the ASCII string returned in @buf.
2612 */
2613 static ssize_t port3_lun_table_show(struct device *dev,
2614 struct device_attribute *attr,
2615 char *buf)
2616 {
2617 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2618
2619 return cxlflash_show_port_lun_table(3, cfg, buf);
2620 }
2621
2622 /**
2623 * irqpoll_weight_show() - presents the current IRQ poll weight for the host
2624 * @dev: Generic device associated with the host.
2625 * @attr: Device attribute representing the IRQ poll weight.
2626 * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll
2627 * weight in ASCII.
2628 *
2629 * An IRQ poll weight of 0 indicates polling is disabled.
2630 *
2631 * Return: The size of the ASCII string returned in @buf.
2632 */
2633 static ssize_t irqpoll_weight_show(struct device *dev,
2634 struct device_attribute *attr, char *buf)
2635 {
2636 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2637 struct afu *afu = cfg->afu;
2638
2639 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight);
2640 }
2641
2642 /**
2643 * irqpoll_weight_store() - sets the current IRQ poll weight for the host
2644 * @dev: Generic device associated with the host.
2645 * @attr: Device attribute representing the IRQ poll weight.
2646 * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll
2647 * weight in ASCII.
2648 * @count: Length of data resizing in @buf.
2649 *
2650 * An IRQ poll weight of 0 indicates polling is disabled.
2651 *
2652 * Return: The size of the ASCII string returned in @buf.
2653 */
2654 static ssize_t irqpoll_weight_store(struct device *dev,
2655 struct device_attribute *attr,
2656 const char *buf, size_t count)
2657 {
2658 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2659 struct device *cfgdev = &cfg->dev->dev;
2660 struct afu *afu = cfg->afu;
2661 struct hwq *hwq;
2662 u32 weight;
2663 int rc, i;
2664
2665 rc = kstrtouint(buf, 10, &weight);
2666 if (rc)
2667 return -EINVAL;
2668
2669 if (weight > 256) {
2670 dev_info(cfgdev,
2671 "Invalid IRQ poll weight. It must be 256 or less.\n");
2672 return -EINVAL;
2673 }
2674
2675 if (weight == afu->irqpoll_weight) {
2676 dev_info(cfgdev,
2677 "Current IRQ poll weight has the same weight.\n");
2678 return -EINVAL;
2679 }
2680
2681 if (afu_is_irqpoll_enabled(afu)) {
2682 for (i = 0; i < afu->num_hwqs; i++) {
2683 hwq = get_hwq(afu, i);
2684
2685 irq_poll_disable(&hwq->irqpoll);
2686 }
2687 }
2688
2689 afu->irqpoll_weight = weight;
2690
2691 if (weight > 0) {
2692 for (i = 0; i < afu->num_hwqs; i++) {
2693 hwq = get_hwq(afu, i);
2694
2695 irq_poll_init(&hwq->irqpoll, weight, cxlflash_irqpoll);
2696 }
2697 }
2698
2699 return count;
2700 }
2701
2702 /**
2703 * num_hwqs_show() - presents the number of hardware queues for the host
2704 * @dev: Generic device associated with the host.
2705 * @attr: Device attribute representing the number of hardware queues.
2706 * @buf: Buffer of length PAGE_SIZE to report back the number of hardware
2707 * queues in ASCII.
2708 *
2709 * Return: The size of the ASCII string returned in @buf.
2710 */
2711 static ssize_t num_hwqs_show(struct device *dev,
2712 struct device_attribute *attr, char *buf)
2713 {
2714 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2715 struct afu *afu = cfg->afu;
2716
2717 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->num_hwqs);
2718 }
2719
2720 /**
2721 * num_hwqs_store() - sets the number of hardware queues for the host
2722 * @dev: Generic device associated with the host.
2723 * @attr: Device attribute representing the number of hardware queues.
2724 * @buf: Buffer of length PAGE_SIZE containing the number of hardware
2725 * queues in ASCII.
2726 * @count: Length of data resizing in @buf.
2727 *
2728 * n > 0: num_hwqs = n
2729 * n = 0: num_hwqs = num_online_cpus()
2730 * n < 0: num_online_cpus() / abs(n)
2731 *
2732 * Return: The size of the ASCII string returned in @buf.
2733 */
2734 static ssize_t num_hwqs_store(struct device *dev,
2735 struct device_attribute *attr,
2736 const char *buf, size_t count)
2737 {
2738 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2739 struct afu *afu = cfg->afu;
2740 int rc;
2741 int nhwqs, num_hwqs;
2742
2743 rc = kstrtoint(buf, 10, &nhwqs);
2744 if (rc)
2745 return -EINVAL;
2746
2747 if (nhwqs >= 1)
2748 num_hwqs = nhwqs;
2749 else if (nhwqs == 0)
2750 num_hwqs = num_online_cpus();
2751 else
2752 num_hwqs = num_online_cpus() / abs(nhwqs);
2753
2754 afu->desired_hwqs = min(num_hwqs, CXLFLASH_MAX_HWQS);
2755 WARN_ON_ONCE(afu->desired_hwqs == 0);
2756
2757 retry:
2758 switch (cfg->state) {
2759 case STATE_NORMAL:
2760 cfg->state = STATE_RESET;
2761 drain_ioctls(cfg);
2762 cxlflash_mark_contexts_error(cfg);
2763 rc = afu_reset(cfg);
2764 if (rc)
2765 cfg->state = STATE_FAILTERM;
2766 else
2767 cfg->state = STATE_NORMAL;
2768 wake_up_all(&cfg->reset_waitq);
2769 break;
2770 case STATE_RESET:
2771 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2772 if (cfg->state == STATE_NORMAL)
2773 goto retry;
2774 default:
2775 /* Ideally should not happen */
2776 dev_err(dev, "%s: Device is not ready, state=%d\n",
2777 __func__, cfg->state);
2778 break;
2779 }
2780
2781 return count;
2782 }
2783
2784 static const char *hwq_mode_name[MAX_HWQ_MODE] = { "rr", "tag", "cpu" };
2785
2786 /**
2787 * hwq_mode_show() - presents the HWQ steering mode for the host
2788 * @dev: Generic device associated with the host.
2789 * @attr: Device attribute representing the HWQ steering mode.
2790 * @buf: Buffer of length PAGE_SIZE to report back the HWQ steering mode
2791 * as a character string.
2792 *
2793 * Return: The size of the ASCII string returned in @buf.
2794 */
2795 static ssize_t hwq_mode_show(struct device *dev,
2796 struct device_attribute *attr, char *buf)
2797 {
2798 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2799 struct afu *afu = cfg->afu;
2800
2801 return scnprintf(buf, PAGE_SIZE, "%s\n", hwq_mode_name[afu->hwq_mode]);
2802 }
2803
2804 /**
2805 * hwq_mode_store() - sets the HWQ steering mode for the host
2806 * @dev: Generic device associated with the host.
2807 * @attr: Device attribute representing the HWQ steering mode.
2808 * @buf: Buffer of length PAGE_SIZE containing the HWQ steering mode
2809 * as a character string.
2810 * @count: Length of data resizing in @buf.
2811 *
2812 * rr = Round-Robin
2813 * tag = Block MQ Tagging
2814 * cpu = CPU Affinity
2815 *
2816 * Return: The size of the ASCII string returned in @buf.
2817 */
2818 static ssize_t hwq_mode_store(struct device *dev,
2819 struct device_attribute *attr,
2820 const char *buf, size_t count)
2821 {
2822 struct Scsi_Host *shost = class_to_shost(dev);
2823 struct cxlflash_cfg *cfg = shost_priv(shost);
2824 struct device *cfgdev = &cfg->dev->dev;
2825 struct afu *afu = cfg->afu;
2826 int i;
2827 u32 mode = MAX_HWQ_MODE;
2828
2829 for (i = 0; i < MAX_HWQ_MODE; i++) {
2830 if (!strncmp(hwq_mode_name[i], buf, strlen(hwq_mode_name[i]))) {
2831 mode = i;
2832 break;
2833 }
2834 }
2835
2836 if (mode >= MAX_HWQ_MODE) {
2837 dev_info(cfgdev, "Invalid HWQ steering mode.\n");
2838 return -EINVAL;
2839 }
2840
2841 if ((mode == HWQ_MODE_TAG) && !shost_use_blk_mq(shost)) {
2842 dev_info(cfgdev, "SCSI-MQ is not enabled, use a different "
2843 "HWQ steering mode.\n");
2844 return -EINVAL;
2845 }
2846
2847 afu->hwq_mode = mode;
2848
2849 return count;
2850 }
2851
2852 /**
2853 * mode_show() - presents the current mode of the device
2854 * @dev: Generic device associated with the device.
2855 * @attr: Device attribute representing the device mode.
2856 * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII.
2857 *
2858 * Return: The size of the ASCII string returned in @buf.
2859 */
2860 static ssize_t mode_show(struct device *dev,
2861 struct device_attribute *attr, char *buf)
2862 {
2863 struct scsi_device *sdev = to_scsi_device(dev);
2864
2865 return scnprintf(buf, PAGE_SIZE, "%s\n",
2866 sdev->hostdata ? "superpipe" : "legacy");
2867 }
2868
2869 /*
2870 * Host attributes
2871 */
2872 static DEVICE_ATTR_RO(port0);
2873 static DEVICE_ATTR_RO(port1);
2874 static DEVICE_ATTR_RO(port2);
2875 static DEVICE_ATTR_RO(port3);
2876 static DEVICE_ATTR_RW(lun_mode);
2877 static DEVICE_ATTR_RO(ioctl_version);
2878 static DEVICE_ATTR_RO(port0_lun_table);
2879 static DEVICE_ATTR_RO(port1_lun_table);
2880 static DEVICE_ATTR_RO(port2_lun_table);
2881 static DEVICE_ATTR_RO(port3_lun_table);
2882 static DEVICE_ATTR_RW(irqpoll_weight);
2883 static DEVICE_ATTR_RW(num_hwqs);
2884 static DEVICE_ATTR_RW(hwq_mode);
2885
2886 static struct device_attribute *cxlflash_host_attrs[] = {
2887 &dev_attr_port0,
2888 &dev_attr_port1,
2889 &dev_attr_port2,
2890 &dev_attr_port3,
2891 &dev_attr_lun_mode,
2892 &dev_attr_ioctl_version,
2893 &dev_attr_port0_lun_table,
2894 &dev_attr_port1_lun_table,
2895 &dev_attr_port2_lun_table,
2896 &dev_attr_port3_lun_table,
2897 &dev_attr_irqpoll_weight,
2898 &dev_attr_num_hwqs,
2899 &dev_attr_hwq_mode,
2900 NULL
2901 };
2902
2903 /*
2904 * Device attributes
2905 */
2906 static DEVICE_ATTR_RO(mode);
2907
2908 static struct device_attribute *cxlflash_dev_attrs[] = {
2909 &dev_attr_mode,
2910 NULL
2911 };
2912
2913 /*
2914 * Host template
2915 */
2916 static struct scsi_host_template driver_template = {
2917 .module = THIS_MODULE,
2918 .name = CXLFLASH_ADAPTER_NAME,
2919 .info = cxlflash_driver_info,
2920 .ioctl = cxlflash_ioctl,
2921 .proc_name = CXLFLASH_NAME,
2922 .queuecommand = cxlflash_queuecommand,
2923 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
2924 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
2925 .change_queue_depth = cxlflash_change_queue_depth,
2926 .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN,
2927 .can_queue = CXLFLASH_MAX_CMDS,
2928 .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1,
2929 .this_id = -1,
2930 .sg_tablesize = 1, /* No scatter gather support */
2931 .max_sectors = CXLFLASH_MAX_SECTORS,
2932 .use_clustering = ENABLE_CLUSTERING,
2933 .shost_attrs = cxlflash_host_attrs,
2934 .sdev_attrs = cxlflash_dev_attrs,
2935 };
2936
2937 /*
2938 * Device dependent values
2939 */
2940 static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS,
2941 0ULL };
2942 static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS,
2943 CXLFLASH_NOTIFY_SHUTDOWN };
2944 static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS,
2945 CXLFLASH_NOTIFY_SHUTDOWN };
2946
2947 /*
2948 * PCI device binding table
2949 */
2950 static struct pci_device_id cxlflash_pci_table[] = {
2951 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
2952 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
2953 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT,
2954 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals},
2955 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD,
2956 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals},
2957 {}
2958 };
2959
2960 MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
2961
2962 /**
2963 * cxlflash_worker_thread() - work thread handler for the AFU
2964 * @work: Work structure contained within cxlflash associated with host.
2965 *
2966 * Handles the following events:
2967 * - Link reset which cannot be performed on interrupt context due to
2968 * blocking up to a few seconds
2969 * - Rescan the host
2970 */
2971 static void cxlflash_worker_thread(struct work_struct *work)
2972 {
2973 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2974 work_q);
2975 struct afu *afu = cfg->afu;
2976 struct device *dev = &cfg->dev->dev;
2977 __be64 __iomem *fc_port_regs;
2978 int port;
2979 ulong lock_flags;
2980
2981 /* Avoid MMIO if the device has failed */
2982
2983 if (cfg->state != STATE_NORMAL)
2984 return;
2985
2986 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2987
2988 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2989 port = cfg->lr_port;
2990 if (port < 0)
2991 dev_err(dev, "%s: invalid port index %d\n",
2992 __func__, port);
2993 else {
2994 spin_unlock_irqrestore(cfg->host->host_lock,
2995 lock_flags);
2996
2997 /* The reset can block... */
2998 fc_port_regs = get_fc_port_regs(cfg, port);
2999 afu_link_reset(afu, port, fc_port_regs);
3000 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
3001 }
3002
3003 cfg->lr_state = LINK_RESET_COMPLETE;
3004 }
3005
3006 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
3007
3008 if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0)
3009 scsi_scan_host(cfg->host);
3010 }
3011
3012 /**
3013 * cxlflash_probe() - PCI entry point to add host
3014 * @pdev: PCI device associated with the host.
3015 * @dev_id: PCI device id associated with device.
3016 *
3017 * The device will initially start out in a 'probing' state and
3018 * transition to the 'normal' state at the end of a successful
3019 * probe. Should an EEH event occur during probe, the notification
3020 * thread (error_detected()) will wait until the probe handler
3021 * is nearly complete. At that time, the device will be moved to
3022 * a 'probed' state and the EEH thread woken up to drive the slot
3023 * reset and recovery (device moves to 'normal' state). Meanwhile,
3024 * the probe will be allowed to exit successfully.
3025 *
3026 * Return: 0 on success, -errno on failure
3027 */
3028 static int cxlflash_probe(struct pci_dev *pdev,
3029 const struct pci_device_id *dev_id)
3030 {
3031 struct Scsi_Host *host;
3032 struct cxlflash_cfg *cfg = NULL;
3033 struct device *dev = &pdev->dev;
3034 struct dev_dependent_vals *ddv;
3035 int rc = 0;
3036 int k;
3037
3038 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
3039 __func__, pdev->irq);
3040
3041 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
3042 driver_template.max_sectors = ddv->max_sectors;
3043
3044 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
3045 if (!host) {
3046 dev_err(dev, "%s: scsi_host_alloc failed\n", __func__);
3047 rc = -ENOMEM;
3048 goto out;
3049 }
3050
3051 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
3052 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
3053 host->unique_id = host->host_no;
3054 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
3055
3056 cfg = shost_priv(host);
3057 cfg->host = host;
3058 rc = alloc_mem(cfg);
3059 if (rc) {
3060 dev_err(dev, "%s: alloc_mem failed\n", __func__);
3061 rc = -ENOMEM;
3062 scsi_host_put(cfg->host);
3063 goto out;
3064 }
3065
3066 cfg->init_state = INIT_STATE_NONE;
3067 cfg->dev = pdev;
3068 cfg->cxl_fops = cxlflash_cxl_fops;
3069
3070 /*
3071 * Promoted LUNs move to the top of the LUN table. The rest stay on
3072 * the bottom half. The bottom half grows from the end (index = 255),
3073 * whereas the top half grows from the beginning (index = 0).
3074 *
3075 * Initialize the last LUN index for all possible ports.
3076 */
3077 cfg->promote_lun_index = 0;
3078
3079 for (k = 0; k < MAX_FC_PORTS; k++)
3080 cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1;
3081
3082 cfg->dev_id = (struct pci_device_id *)dev_id;
3083
3084 init_waitqueue_head(&cfg->tmf_waitq);
3085 init_waitqueue_head(&cfg->reset_waitq);
3086
3087 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
3088 cfg->lr_state = LINK_RESET_INVALID;
3089 cfg->lr_port = -1;
3090 spin_lock_init(&cfg->tmf_slock);
3091 mutex_init(&cfg->ctx_tbl_list_mutex);
3092 mutex_init(&cfg->ctx_recovery_mutex);
3093 init_rwsem(&cfg->ioctl_rwsem);
3094 INIT_LIST_HEAD(&cfg->ctx_err_recovery);
3095 INIT_LIST_HEAD(&cfg->lluns);
3096
3097 pci_set_drvdata(pdev, cfg);
3098
3099 cfg->cxl_afu = cxl_pci_to_afu(pdev);
3100
3101 rc = init_pci(cfg);
3102 if (rc) {
3103 dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc);
3104 goto out_remove;
3105 }
3106 cfg->init_state = INIT_STATE_PCI;
3107
3108 rc = init_afu(cfg);
3109 if (rc && !wq_has_sleeper(&cfg->reset_waitq)) {
3110 dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc);
3111 goto out_remove;
3112 }
3113 cfg->init_state = INIT_STATE_AFU;
3114
3115 rc = init_scsi(cfg);
3116 if (rc) {
3117 dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc);
3118 goto out_remove;
3119 }
3120 cfg->init_state = INIT_STATE_SCSI;
3121
3122 if (wq_has_sleeper(&cfg->reset_waitq)) {
3123 cfg->state = STATE_PROBED;
3124 wake_up_all(&cfg->reset_waitq);
3125 } else
3126 cfg->state = STATE_NORMAL;
3127 out:
3128 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
3129 return rc;
3130
3131 out_remove:
3132 cxlflash_remove(pdev);
3133 goto out;
3134 }
3135
3136 /**
3137 * cxlflash_pci_error_detected() - called when a PCI error is detected
3138 * @pdev: PCI device struct.
3139 * @state: PCI channel state.
3140 *
3141 * When an EEH occurs during an active reset, wait until the reset is
3142 * complete and then take action based upon the device state.
3143 *
3144 * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
3145 */
3146 static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
3147 pci_channel_state_t state)
3148 {
3149 int rc = 0;
3150 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
3151 struct device *dev = &cfg->dev->dev;
3152
3153 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
3154
3155 switch (state) {
3156 case pci_channel_io_frozen:
3157 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET &&
3158 cfg->state != STATE_PROBING);
3159 if (cfg->state == STATE_FAILTERM)
3160 return PCI_ERS_RESULT_DISCONNECT;
3161
3162 cfg->state = STATE_RESET;
3163 scsi_block_requests(cfg->host);
3164 drain_ioctls(cfg);
3165 rc = cxlflash_mark_contexts_error(cfg);
3166 if (unlikely(rc))
3167 dev_err(dev, "%s: Failed to mark user contexts rc=%d\n",
3168 __func__, rc);
3169 term_afu(cfg);
3170 return PCI_ERS_RESULT_NEED_RESET;
3171 case pci_channel_io_perm_failure:
3172 cfg->state = STATE_FAILTERM;
3173 wake_up_all(&cfg->reset_waitq);
3174 scsi_unblock_requests(cfg->host);
3175 return PCI_ERS_RESULT_DISCONNECT;
3176 default:
3177 break;
3178 }
3179 return PCI_ERS_RESULT_NEED_RESET;
3180 }
3181
3182 /**
3183 * cxlflash_pci_slot_reset() - called when PCI slot has been reset
3184 * @pdev: PCI device struct.
3185 *
3186 * This routine is called by the pci error recovery code after the PCI
3187 * slot has been reset, just before we should resume normal operations.
3188 *
3189 * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT
3190 */
3191 static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
3192 {
3193 int rc = 0;
3194 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
3195 struct device *dev = &cfg->dev->dev;
3196
3197 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
3198
3199 rc = init_afu(cfg);
3200 if (unlikely(rc)) {
3201 dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc);
3202 return PCI_ERS_RESULT_DISCONNECT;
3203 }
3204
3205 return PCI_ERS_RESULT_RECOVERED;
3206 }
3207
3208 /**
3209 * cxlflash_pci_resume() - called when normal operation can resume
3210 * @pdev: PCI device struct
3211 */
3212 static void cxlflash_pci_resume(struct pci_dev *pdev)
3213 {
3214 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
3215 struct device *dev = &cfg->dev->dev;
3216
3217 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
3218
3219 cfg->state = STATE_NORMAL;
3220 wake_up_all(&cfg->reset_waitq);
3221 scsi_unblock_requests(cfg->host);
3222 }
3223
3224 static const struct pci_error_handlers cxlflash_err_handler = {
3225 .error_detected = cxlflash_pci_error_detected,
3226 .slot_reset = cxlflash_pci_slot_reset,
3227 .resume = cxlflash_pci_resume,
3228 };
3229
3230 /*
3231 * PCI device structure
3232 */
3233 static struct pci_driver cxlflash_driver = {
3234 .name = CXLFLASH_NAME,
3235 .id_table = cxlflash_pci_table,
3236 .probe = cxlflash_probe,
3237 .remove = cxlflash_remove,
3238 .shutdown = cxlflash_remove,
3239 .err_handler = &cxlflash_err_handler,
3240 };
3241
3242 /**
3243 * init_cxlflash() - module entry point
3244 *
3245 * Return: 0 on success, -errno on failure
3246 */
3247 static int __init init_cxlflash(void)
3248 {
3249 check_sizes();
3250 cxlflash_list_init();
3251
3252 return pci_register_driver(&cxlflash_driver);
3253 }
3254
3255 /**
3256 * exit_cxlflash() - module exit point
3257 */
3258 static void __exit exit_cxlflash(void)
3259 {
3260 cxlflash_term_global_luns();
3261 cxlflash_free_errpage();
3262
3263 pci_unregister_driver(&cxlflash_driver);
3264 }
3265
3266 module_init(init_cxlflash);
3267 module_exit(exit_cxlflash);