powerpc/powernv: Use OPAL call for TCE kill on NVLink2

BugLink: http://bugs.launchpad.net/bugs/1667081
Add detection of NPU2 PHBs. NPU2/NVLink2 has a different register
layout for the TCE kill register therefore TCE invalidation should be
done via the OPAL call rather than using the register directly as it
is for PHB3 and NVLink1. This changes TCE invalidation to use the OPAL
call in the case of a NPU2 PHB model.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
(cherry picked from commit 616badd2fb499320d3ac3b54462f55dededd0e0f)
Signed-off-by: Seth Forshee <seth.forshee@canonical.com>

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index b07680cd251820c6b38a41a878d7598d2a02b05b..d36e46aed1cb19ec59f22f0f31877256e9624c84 100644 (file)
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1950,7 +1950,12 @@ static void pnv_pci_ioda2_tce_invalidate(struct iommu_table *tbl,
                struct pnv_phb *phb = pe->phb;
                unsigned int shift = tbl->it_page_shift;
 
-               if (phb->type == PNV_PHB_NPU) {
+               /*
+                * NVLink1 can use the TCE kill register directly as
+                * it's the same as PHB3. NVLink2 is different and
+                * should go via the OPAL call.
+                */
+               if (phb->model == PNV_PHB_MODEL_NPU) {
                        /*
                         * The NVLink hardware does not support TCE kill
                         * per TCE entry so we have to invalidate
@@ -3671,6 +3676,8 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,
                phb->model = PNV_PHB_MODEL_PHB3;
        else if (of_device_is_compatible(np, "ibm,power8-npu-pciex"))
                phb->model = PNV_PHB_MODEL_NPU;
+       else if (of_device_is_compatible(np, "ibm,power9-npu-pciex"))
+               phb->model = PNV_PHB_MODEL_NPU2;
        else
                phb->model = PNV_PHB_MODEL_UNKNOWN;
 

diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index c6d554fe585c65601965f775c9720ae6f6b406e5..eb835e977e33a046a9f99b6960dfd03ba46298b9 100644 (file)
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -940,6 +940,13 @@ void __init pnv_pci_init(void)
        for_each_compatible_node(np, NULL, "ibm,ioda2-npu-phb")
                pnv_pci_init_npu_phb(np);
 
+       /*
+        * Look for NPU2 PHBs which we treat mostly as NPU PHBs with
+        * the exception of TCE kill which requires an OPAL call.
+        */
+       for_each_compatible_node(np, NULL, "ibm,ioda2-npu2-phb")
+               pnv_pci_init_npu_phb(np);
+
        /* Configure IOMMU DMA hooks */
        set_pci_dma_ops(&dma_iommu_ops);
 }

diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h
index e64df7894d6effe6acf29b9cc13cfae25ed8f8de..e1d3e5526b548fae3bf67f7843159c780b351cef 100644 (file)
--- a/arch/powerpc/platforms/powernv/pci.h
+++ b/arch/powerpc/platforms/powernv/pci.h
@@ -19,6 +19,7 @@ enum pnv_phb_model {
        PNV_PHB_MODEL_P7IOC,
        PNV_PHB_MODEL_PHB3,
        PNV_PHB_MODEL_NPU,
+       PNV_PHB_MODEL_NPU2,
 };
 
 #define PNV_PCI_DIAG_BUF_SIZE  8192