KVM: arm64: Enable GICv3 common sysreg trapping via command-line

BugLink: https://bugs.launchpad.net/bugs/1673564
Now that we're able to safely handle common sysreg access, let's
give the user the opportunity to enable it by passing a specific
command-line option (vgic_v3.common_trap).

Tested-by: Alexander Graf <agraf@suse.de>
Acked-by: David Daney <david.daney@cavium.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
(cherry picked from commit ff89511ef29b794d6a9c6b62f5ea76fc013cdae7)
Signed-off-by: dann frazier <dann.frazier@canonical.com>
Acked-by: Stefan Bader <stefan.bader@canonical.com>
Acked-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 092fd8c3154e9c0ad2bb60922b5b349ce63bddae..bf51cceede3ef75de4bf6d7a77e98d0fff08d8ce 100644 (file)
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -1808,6 +1808,10 @@
                        [KVM,ARM] Trap guest accesses to GICv3 group-1
                        system registers
 
+       kvm-arm.vgic_v3_common_trap=
+                       [KVM,ARM] Trap guest accesses to GICv3 common
+                       system registers
+
        kvm-intel.ept=  [KVM,Intel] Disable extended page tables
                        (virtualized MMU) support on capable Intel chips.
                        Default is 1 (enabled)

diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 6c3406dc1187c6424fce41990014454972faff38..52f11236ac5c8cf2004327a6bc17d3d9c8562389 100644 (file)
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -404,6 +404,7 @@
 
 #define ICH_HCR_EN                     (1 << 0)
 #define ICH_HCR_UIE                    (1 << 1)
+#define ICH_HCR_TC                     (1 << 10)
 #define ICH_HCR_TALL0                  (1 << 11)
 #define ICH_HCR_TALL1                  (1 << 12)
 #define ICH_HCR_EOIcount_SHIFT         27

diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
index 41ff3775018f8a8604037c8f4515db523daec354..1dfd5a19a43c5a929c15c338c3b2f38cbf692898 100644 (file)
--- a/virt/kvm/arm/vgic/vgic-v3.c
+++ b/virt/kvm/arm/vgic/vgic-v3.c
@@ -62,6 +62,7 @@ void vgic_v3_process_maintenance(struct kvm_vcpu *vcpu)
 
 static bool group0_trap;
 static bool group1_trap;
+static bool common_trap;
 
 void vgic_v3_set_underflow(struct kvm_vcpu *vcpu)
 {
@@ -233,6 +234,8 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu)
                vgic_v3->vgic_hcr |= ICH_HCR_TALL0;
        if (group1_trap)
                vgic_v3->vgic_hcr |= ICH_HCR_TALL1;
+       if (common_trap)
+               vgic_v3->vgic_hcr |= ICH_HCR_TC;
 }
 
 /* check for overlapping regions and for regions crossing the end of memory */
@@ -326,6 +329,12 @@ static int __init early_group1_trap_cfg(char *buf)
 }
 early_param("kvm-arm.vgic_v3_group1_trap", early_group1_trap_cfg);
 
+static int __init early_common_trap_cfg(char *buf)
+{
+       return strtobool(buf, &common_trap);
+}
+early_param("kvm-arm.vgic_v3_common_trap", early_common_trap_cfg);
+
 /**
  * vgic_v3_probe - probe for a GICv3 compatible interrupt controller in DT
  * @node:      pointer to the DT node
@@ -383,7 +392,7 @@ int vgic_v3_probe(const struct gic_kvm_info *info)
        }
 #endif
 
-       if (group0_trap || group1_trap) {
+       if (group0_trap || group1_trap || common_trap) {
                kvm_info("GICv3 sysreg trapping enabled (reduced performance)\n");
                static_branch_enable(&vgic_v3_cpuif_trap);
        }