]> git.proxmox.com Git - pve-kernel.git/blob - patches/kernel/0155-x86-entry-64-Use-a-per-CPU-trampoline-stack-for-IDT-.patch
bfea36ce9905228420438e02eafc11a016011f85
[pve-kernel.git] / patches / kernel / 0155-x86-entry-64-Use-a-per-CPU-trampoline-stack-for-IDT-.patch
1 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
2 From: Andy Lutomirski <luto@kernel.org>
3 Date: Mon, 4 Dec 2017 15:07:23 +0100
4 Subject: [PATCH] x86/entry/64: Use a per-CPU trampoline stack for IDT entries
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 CVE-2017-5754
10
11 Historically, IDT entries from usermode have always gone directly
12 to the running task's kernel stack. Rearrange it so that we enter on
13 a per-CPU trampoline stack and then manually switch to the task's stack.
14 This touches a couple of extra cachelines, but it gives us a chance
15 to run some code before we touch the kernel stack.
16
17 The asm isn't exactly beautiful, but I think that fully refactoring
18 it can wait.
19
20 Signed-off-by: Andy Lutomirski <luto@kernel.org>
21 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
22 Reviewed-by: Borislav Petkov <bp@suse.de>
23 Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
24 Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
25 Cc: Borislav Petkov <bp@alien8.de>
26 Cc: Borislav Petkov <bpetkov@suse.de>
27 Cc: Brian Gerst <brgerst@gmail.com>
28 Cc: Dave Hansen <dave.hansen@intel.com>
29 Cc: Dave Hansen <dave.hansen@linux.intel.com>
30 Cc: David Laight <David.Laight@aculab.com>
31 Cc: Denys Vlasenko <dvlasenk@redhat.com>
32 Cc: Eduardo Valentin <eduval@amazon.com>
33 Cc: Greg KH <gregkh@linuxfoundation.org>
34 Cc: H. Peter Anvin <hpa@zytor.com>
35 Cc: Josh Poimboeuf <jpoimboe@redhat.com>
36 Cc: Juergen Gross <jgross@suse.com>
37 Cc: Linus Torvalds <torvalds@linux-foundation.org>
38 Cc: Peter Zijlstra <peterz@infradead.org>
39 Cc: Rik van Riel <riel@redhat.com>
40 Cc: Will Deacon <will.deacon@arm.com>
41 Cc: aliguori@amazon.com
42 Cc: daniel.gruss@iaik.tugraz.at
43 Cc: hughd@google.com
44 Cc: keescook@google.com
45 Link: https://lkml.kernel.org/r/20171204150606.225330557@linutronix.de
46 Signed-off-by: Ingo Molnar <mingo@kernel.org>
47 (cherry picked from commit 7f2590a110b837af5679d08fc25c6227c5a8c497)
48 Signed-off-by: Andy Whitcroft <apw@canonical.com>
49 Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
50 (cherry picked from commit bfb2d0ede023853fb8c24d3dae8974cb2f7117c3)
51 Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
52 ---
53 arch/x86/include/asm/switch_to.h | 4 ++-
54 arch/x86/include/asm/traps.h | 1 -
55 arch/x86/kernel/cpu/common.c | 6 ++--
56 arch/x86/kernel/traps.c | 21 +++++++------
57 arch/x86/entry/entry_64.S | 67 ++++++++++++++++++++++++++++++----------
58 arch/x86/entry/entry_64_compat.S | 5 ++-
59 6 files changed, 72 insertions(+), 32 deletions(-)
60
61 diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
62 index 010cd6e4eafc..ca2fc84ad278 100644
63 --- a/arch/x86/include/asm/switch_to.h
64 +++ b/arch/x86/include/asm/switch_to.h
65 @@ -89,10 +89,12 @@ static inline void refresh_sysenter_cs(struct thread_struct *thread)
66 /* This is used when switching tasks or entering/exiting vm86 mode. */
67 static inline void update_sp0(struct task_struct *task)
68 {
69 + /* On x86_64, sp0 always points to the entry trampoline stack, which is constant: */
70 #ifdef CONFIG_X86_32
71 load_sp0(task->thread.sp0);
72 #else
73 - load_sp0(task_top_of_stack(task));
74 + if (static_cpu_has(X86_FEATURE_XENPV))
75 + load_sp0(task_top_of_stack(task));
76 #endif
77 }
78
79 diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
80 index b052a7621ca1..c3b652672d6f 100644
81 --- a/arch/x86/include/asm/traps.h
82 +++ b/arch/x86/include/asm/traps.h
83 @@ -92,7 +92,6 @@ dotraplinkage void do_segment_not_present(struct pt_regs *, long);
84 dotraplinkage void do_stack_segment(struct pt_regs *, long);
85 #ifdef CONFIG_X86_64
86 dotraplinkage void do_double_fault(struct pt_regs *, long);
87 -asmlinkage struct pt_regs *sync_regs(struct pt_regs *);
88 #endif
89 dotraplinkage void do_general_protection(struct pt_regs *, long);
90 dotraplinkage void do_page_fault(struct pt_regs *, unsigned long);
91 diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
92 index 4a38de4c6ede..404e4b75db6e 100644
93 --- a/arch/x86/kernel/cpu/common.c
94 +++ b/arch/x86/kernel/cpu/common.c
95 @@ -1623,11 +1623,13 @@ void cpu_init(void)
96 setup_cpu_entry_area(cpu);
97
98 /*
99 - * Initialize the TSS. Don't bother initializing sp0, as the initial
100 - * task never enters user mode.
101 + * Initialize the TSS. sp0 points to the entry trampoline stack
102 + * regardless of what task is running.
103 */
104 set_tss_desc(cpu, &get_cpu_entry_area(cpu)->tss.x86_tss);
105 load_TR_desc();
106 + load_sp0((unsigned long)&get_cpu_entry_area(cpu)->tss +
107 + offsetofend(struct tss_struct, SYSENTER_stack));
108
109 load_mm_ldt(&init_mm);
110
111 diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
112 index b69db1ee8733..d9debdafe7a6 100644
113 --- a/arch/x86/kernel/traps.c
114 +++ b/arch/x86/kernel/traps.c
115 @@ -631,14 +631,15 @@ NOKPROBE_SYMBOL(do_int3);
116
117 #ifdef CONFIG_X86_64
118 /*
119 - * Help handler running on IST stack to switch off the IST stack if the
120 - * interrupted code was in user mode. The actual stack switch is done in
121 - * entry_64.S
122 + * Help handler running on a per-cpu (IST or entry trampoline) stack
123 + * to switch to the normal thread stack if the interrupted code was in
124 + * user mode. The actual stack switch is done in entry_64.S
125 */
126 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
127 {
128 - struct pt_regs *regs = task_pt_regs(current);
129 - *regs = *eregs;
130 + struct pt_regs *regs = (struct pt_regs *)this_cpu_read(cpu_current_top_of_stack) - 1;
131 + if (regs != eregs)
132 + *regs = *eregs;
133 return regs;
134 }
135 NOKPROBE_SYMBOL(sync_regs);
136 @@ -654,13 +655,13 @@ struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
137 /*
138 * This is called from entry_64.S early in handling a fault
139 * caused by a bad iret to user mode. To handle the fault
140 - * correctly, we want move our stack frame to task_pt_regs
141 - * and we want to pretend that the exception came from the
142 - * iret target.
143 + * correctly, we want to move our stack frame to where it would
144 + * be had we entered directly on the entry stack (rather than
145 + * just below the IRET frame) and we want to pretend that the
146 + * exception came from the IRET target.
147 */
148 struct bad_iret_stack *new_stack =
149 - container_of(task_pt_regs(current),
150 - struct bad_iret_stack, regs);
151 + (struct bad_iret_stack *)this_cpu_read(cpu_tss.x86_tss.sp0) - 1;
152
153 /* Copy the IRET target to the new stack. */
154 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
155 diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
156 index 6c73e96daf78..f70fedc58bac 100644
157 --- a/arch/x86/entry/entry_64.S
158 +++ b/arch/x86/entry/entry_64.S
159 @@ -559,6 +559,13 @@ END(irq_entries_start)
160 /* 0(%rsp): ~(interrupt number) */
161 .macro interrupt func
162 cld
163 +
164 + testb $3, CS-ORIG_RAX(%rsp)
165 + jz 1f
166 + SWAPGS
167 + call switch_to_thread_stack
168 +1:
169 +
170 ALLOC_PT_GPREGS_ON_STACK
171 SAVE_C_REGS
172 SAVE_EXTRA_REGS
173 @@ -568,12 +575,8 @@ END(irq_entries_start)
174 jz 1f
175
176 /*
177 - * IRQ from user mode. Switch to kernel gsbase and inform context
178 - * tracking that we're in kernel mode.
179 - */
180 - SWAPGS
181 -
182 - /*
183 + * IRQ from user mode.
184 + *
185 * We need to tell lockdep that IRQs are off. We can't do this until
186 * we fix gsbase, and we should do it before enter_from_user_mode
187 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
188 @@ -840,6 +843,32 @@ apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
189 */
190 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
191
192 +/*
193 + * Switch to the thread stack. This is called with the IRET frame and
194 + * orig_ax on the stack. (That is, RDI..R12 are not on the stack and
195 + * space has not been allocated for them.)
196 + */
197 +ENTRY(switch_to_thread_stack)
198 + UNWIND_HINT_FUNC
199 +
200 + pushq %rdi
201 + movq %rsp, %rdi
202 + movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
203 + UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
204 +
205 + pushq 7*8(%rdi) /* regs->ss */
206 + pushq 6*8(%rdi) /* regs->rsp */
207 + pushq 5*8(%rdi) /* regs->eflags */
208 + pushq 4*8(%rdi) /* regs->cs */
209 + pushq 3*8(%rdi) /* regs->ip */
210 + pushq 2*8(%rdi) /* regs->orig_ax */
211 + pushq 8(%rdi) /* return address */
212 + UNWIND_HINT_FUNC
213 +
214 + movq (%rdi), %rdi
215 + ret
216 +END(switch_to_thread_stack)
217 +
218 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
219 ENTRY(\sym)
220 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
221 @@ -857,11 +886,12 @@ ENTRY(\sym)
222
223 ALLOC_PT_GPREGS_ON_STACK
224
225 - .if \paranoid
226 - .if \paranoid == 1
227 + .if \paranoid < 2
228 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
229 - jnz 1f
230 + jnz .Lfrom_usermode_switch_stack_\@
231 .endif
232 +
233 + .if \paranoid
234 call paranoid_entry
235 .else
236 call error_entry
237 @@ -903,20 +933,15 @@ ENTRY(\sym)
238 jmp error_exit
239 .endif
240
241 - .if \paranoid == 1
242 + .if \paranoid < 2
243 /*
244 - * Paranoid entry from userspace. Switch stacks and treat it
245 + * Entry from userspace. Switch stacks and treat it
246 * as a normal entry. This means that paranoid handlers
247 * run in real process context if user_mode(regs).
248 */
249 -1:
250 +.Lfrom_usermode_switch_stack_\@:
251 call error_entry
252
253 -
254 - movq %rsp, %rdi /* pt_regs pointer */
255 - call sync_regs
256 - movq %rax, %rsp /* switch stack */
257 -
258 movq %rsp, %rdi /* pt_regs pointer */
259
260 .if \has_error_code
261 @@ -1177,6 +1202,14 @@ ENTRY(error_entry)
262 SWAPGS
263
264 .Lerror_entry_from_usermode_after_swapgs:
265 + /* Put us onto the real thread stack. */
266 + popq %r12 /* save return addr in %12 */
267 + movq %rsp, %rdi /* arg0 = pt_regs pointer */
268 + call sync_regs
269 + movq %rax, %rsp /* switch stack */
270 + ENCODE_FRAME_POINTER
271 + pushq %r12
272 +
273 /*
274 * We need to tell lockdep that IRQs are off. We can't do this until
275 * we fix gsbase, and we should do it before enter_from_user_mode
276 diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S
277 index 1f76b66518ee..2270601b6218 100644
278 --- a/arch/x86/entry/entry_64_compat.S
279 +++ b/arch/x86/entry/entry_64_compat.S
280 @@ -305,8 +305,11 @@ ENTRY(entry_INT80_compat)
281 */
282 movl %eax, %eax
283
284 - /* Construct struct pt_regs on stack (iret frame is already on stack) */
285 pushq %rax /* pt_regs->orig_ax */
286 +
287 + /* switch to thread stack expects orig_ax to be pushed */
288 + call switch_to_thread_stack
289 +
290 pushq %rdi /* pt_regs->di */
291 pushq %rsi /* pt_regs->si */
292 pushq %rdx /* pt_regs->dx */
293 --
294 2.14.2
295