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[pve-kernel.git] / patches / kernel / 0208-x86-mm-Abstract-switching-CR3.patch
1 From 7cc2d98148d5b5be191f4dbf4c29d4d6da93a9f8 Mon Sep 17 00:00:00 2001
2 From: Dave Hansen <dave.hansen@linux.intel.com>
3 Date: Mon, 4 Dec 2017 15:07:58 +0100
4 Subject: [PATCH 208/233] x86/mm: Abstract switching CR3
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 CVE-2017-5754
10
11 In preparation to adding additional PCID flushing, abstract the
12 loading of a new ASID into CR3.
13
14 [ PeterZ: Split out from big combo patch ]
15
16 Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
17 Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
18 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
19 Cc: Andy Lutomirski <luto@kernel.org>
20 Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
21 Cc: Borislav Petkov <bp@alien8.de>
22 Cc: Brian Gerst <brgerst@gmail.com>
23 Cc: David Laight <David.Laight@aculab.com>
24 Cc: Denys Vlasenko <dvlasenk@redhat.com>
25 Cc: Eduardo Valentin <eduval@amazon.com>
26 Cc: Greg KH <gregkh@linuxfoundation.org>
27 Cc: H. Peter Anvin <hpa@zytor.com>
28 Cc: Josh Poimboeuf <jpoimboe@redhat.com>
29 Cc: Juergen Gross <jgross@suse.com>
30 Cc: Linus Torvalds <torvalds@linux-foundation.org>
31 Cc: Peter Zijlstra <peterz@infradead.org>
32 Cc: Will Deacon <will.deacon@arm.com>
33 Cc: aliguori@amazon.com
34 Cc: daniel.gruss@iaik.tugraz.at
35 Cc: hughd@google.com
36 Cc: keescook@google.com
37 Signed-off-by: Ingo Molnar <mingo@kernel.org>
38 (cherry picked from commit 48e111982cda033fec832c6b0592c2acedd85d04)
39 Signed-off-by: Andy Whitcroft <apw@canonical.com>
40 Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
41 (cherry picked from commit 1e2affe2a79305b3a5f3ad65d3f61ad9d1f9e168)
42 Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
43 ---
44 arch/x86/mm/tlb.c | 22 ++++++++++++++++++++--
45 1 file changed, 20 insertions(+), 2 deletions(-)
46
47 diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
48 index ce87b69fb4e0..353f2f4e1d96 100644
49 --- a/arch/x86/mm/tlb.c
50 +++ b/arch/x86/mm/tlb.c
51 @@ -101,6 +101,24 @@ static void choose_new_asid(struct mm_struct *next, u64 next_tlb_gen,
52 *need_flush = true;
53 }
54
55 +static void load_new_mm_cr3(pgd_t *pgdir, u16 new_asid, bool need_flush)
56 +{
57 + unsigned long new_mm_cr3;
58 +
59 + if (need_flush) {
60 + new_mm_cr3 = build_cr3(pgdir, new_asid);
61 + } else {
62 + new_mm_cr3 = build_cr3_noflush(pgdir, new_asid);
63 + }
64 +
65 + /*
66 + * Caution: many callers of this function expect
67 + * that load_cr3() is serializing and orders TLB
68 + * fills with respect to the mm_cpumask writes.
69 + */
70 + write_cr3(new_mm_cr3);
71 +}
72 +
73 void leave_mm(int cpu)
74 {
75 struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
76 @@ -228,7 +246,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
77 if (need_flush) {
78 this_cpu_write(cpu_tlbstate.ctxs[new_asid].ctx_id, next->context.ctx_id);
79 this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
80 - write_cr3(build_cr3(next->pgd, new_asid));
81 + load_new_mm_cr3(next->pgd, new_asid, true);
82
83 /*
84 * NB: This gets called via leave_mm() in the idle path
85 @@ -241,7 +259,7 @@ void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
86 trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
87 } else {
88 /* The new ASID is already up to date. */
89 - write_cr3(build_cr3_noflush(next->pgd, new_asid));
90 + load_new_mm_cr3(next->pgd, new_asid, false);
91
92 /* See above wrt _rcuidle. */
93 trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, 0);
94 --
95 2.14.2
96