patches/kernel/0297-x86-svm-Add-code-to-clobber-the-RSB-on-VM-exit.patch

   1 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
   2 From: Tom Lendacky <thomas.lendacky@amd.com>
   3 Date: Wed, 20 Dec 2017 10:55:47 +0000
   4 Subject: [PATCH] x86/svm: Add code to clobber the RSB on VM exit
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 CVE-2017-5753
  10 CVE-2017-5715
  11
  12 Add code to overwrite the local CPU RSB entries from the previous less
  13 privileged mode.
  14
  15 Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
  16 Signed-off-by: Andy Whitcroft <apw@canonical.com>
  17 Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
  18 (cherry picked from commit 9392e24469b71ff665cdbc3d81db215f9383219d)
  19 Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
  20 ---
  21  arch/x86/kvm/svm.c | 2 ++
  22  1 file changed, 2 insertions(+)
  23
  24 diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
  25 index fade4869856a..e99bdfcc6b01 100644
  26 --- a/arch/x86/kvm/svm.c
  27 +++ b/arch/x86/kvm/svm.c
  28 @@ -5008,6 +5008,8 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu)
  29                         wrmsrl(MSR_IA32_SPEC_CTRL, FEATURE_ENABLE_IBRS);
  30         }
  31
  32 +       stuff_RSB();
  33 +
  34  #ifdef CONFIG_X86_64
  35         wrmsrl(MSR_GS_BASE, svm->host.gs_base);
  36  #else
  37 --
  38 2.14.2
  39