patches/kernel/0298-x86-cpu-AMD-Remove-now-unused-definition-of-MFENCE_R.patch

   1 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
   2 From: Tom Lendacky <thomas.lendacky@amd.com>
   3 Date: Wed, 20 Dec 2017 10:55:48 +0000
   4 Subject: [PATCH] x86/cpu/AMD: Remove now unused definition of MFENCE_RDTSC
   5  feature
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 CVE-2017-5753
  11 CVE-2017-5715
  12
  13 With the switch to using LFENCE_RDTSC on AMD platforms there is no longer
  14 a need for the MFENCE_RDTSC feature.  Remove it usage and definition.
  15
  16 Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
  17 Signed-off-by: Andy Whitcroft <apw@canonical.com>
  18 Signed-off-by: Kleber Sacilotto de Souza <kleber.souza@canonical.com>
  19 (cherry picked from commit 6e6c998937329e9d13d4b239233cd058e8a7730f)
  20 Signed-off-by: Fabian Grünbichler <f.gruenbichler@proxmox.com>
  21 ---
  22  arch/x86/include/asm/barrier.h | 3 +--
  23  arch/x86/include/asm/msr.h     | 3 +--
  24  arch/x86/net/bpf_jit_comp.c    | 3 ---
  25  3 files changed, 2 insertions(+), 7 deletions(-)
  26
  27 diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
  28 index aae78054cae2..d00432579444 100644
  29 --- a/arch/x86/include/asm/barrier.h
  30 +++ b/arch/x86/include/asm/barrier.h
  31 @@ -23,8 +23,7 @@
  32  #define wmb()  asm volatile("sfence" ::: "memory")
  33  #endif
  34
  35 -#define gmb() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \
  36 -                                      "lfence", X86_FEATURE_LFENCE_RDTSC);
  37 +#define gmb() alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC);
  38
  39  #ifdef CONFIG_X86_PPRO_FENCE
  40  #define dma_rmb()      rmb()
  41 diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
  42 index 898dba2e2e2c..3139098269f6 100644
  43 --- a/arch/x86/include/asm/msr.h
  44 +++ b/arch/x86/include/asm/msr.h
  45 @@ -213,8 +213,7 @@ static __always_inline unsigned long long rdtsc_ordered(void)
  46          * that some other imaginary CPU is updating continuously with a
  47          * time stamp.
  48          */
  49 -       alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC,
  50 -                         "lfence", X86_FEATURE_LFENCE_RDTSC);
  51 +       alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC);
  52         return rdtsc();
  53  }
  54
  55 diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
  56 index 879dbfefb66d..e20e304320f9 100644
  57 --- a/arch/x86/net/bpf_jit_comp.c
  58 +++ b/arch/x86/net/bpf_jit_comp.c
  59 @@ -116,9 +116,6 @@ static void emit_memory_barrier(u8 **pprog)
  60                 if (boot_cpu_has(X86_FEATURE_LFENCE_RDTSC))
  61                         /* x86 LFENCE opcode 0F AE E8 */
  62                         EMIT3(0x0f, 0xae, 0xe8);
  63 -               else if (boot_cpu_has(X86_FEATURE_MFENCE_RDTSC))
  64 -                       /* AMD MFENCE opcode 0F AE F0 */
  65 -                       EMIT3(0x0f, 0xae, 0xf0);
  66                 else
  67                         /* we should never end up here,
  68                          * but if we do, better not to emit anything*/
  69 --
  70 2.14.2
  71