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[pve-qemu.git] / debian / patches / extra / 0031-i386-Add-support-for-SPEC_CTRL-MSR.patch
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1From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
2From: Paolo Bonzini <pbonzini@redhat.com>
3Date: Tue, 9 Jan 2018 13:45:14 -0200
4Subject: [PATCH] i386: Add support for SPEC_CTRL MSR
5
6Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
7---
8 target/i386/cpu.h | 3 +++
9 target/i386/kvm.c | 15 +++++++++++++++
10 target/i386/machine.c | 20 ++++++++++++++++++++
11 3 files changed, 38 insertions(+)
12
13diff --git a/target/i386/cpu.h b/target/i386/cpu.h
14index c4602ca80d..cc322d6b39 100644
15--- a/target/i386/cpu.h
16+++ b/target/i386/cpu.h
17@@ -333,6 +333,7 @@
18 #define MSR_IA32_APICBASE_BASE (0xfffffU<<12)
19 #define MSR_IA32_FEATURE_CONTROL 0x0000003a
20 #define MSR_TSC_ADJUST 0x0000003b
21+#define MSR_IA32_SPEC_CTRL 0x48
22 #define MSR_IA32_TSCDEADLINE 0x6e0
23
24 #define FEATURE_CONTROL_LOCKED (1<<0)
25@@ -1080,6 +1081,8 @@ typedef struct CPUX86State {
26
27 uint32_t pkru;
28
29+ uint64_t spec_ctrl;
30+
31 /* End of state preserved by INIT (dummy marker). */
32 struct {} end_init_save;
33
34diff --git a/target/i386/kvm.c b/target/i386/kvm.c
35index 55865dbee0..9f83c79338 100644
36--- a/target/i386/kvm.c
37+++ b/target/i386/kvm.c
38@@ -89,6 +89,7 @@ static bool has_msr_hv_runtime;
39 static bool has_msr_hv_synic;
40 static bool has_msr_hv_stimer;
41 static bool has_msr_xss;
42+static bool has_msr_spec_ctrl;
43
44 static bool has_msr_architectural_pmu;
45 static uint32_t num_architectural_pmu_counters;
46@@ -1140,6 +1141,10 @@ static int kvm_get_supported_msrs(KVMState *s)
47 has_msr_hv_stimer = true;
48 continue;
49 }
50+ if (kvm_msr_list->indices[i] == MSR_IA32_SPEC_CTRL) {
51+ has_msr_spec_ctrl = true;
52+ continue;
53+ }
54 }
55 }
56
57@@ -1667,6 +1672,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
58 if (has_msr_xss) {
59 kvm_msr_entry_add(cpu, MSR_IA32_XSS, env->xss);
60 }
61+ if (has_msr_spec_ctrl) {
62+ kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl);
63+ }
64 #ifdef TARGET_X86_64
65 if (lm_capable_kernel) {
66 kvm_msr_entry_add(cpu, MSR_CSTAR, env->cstar);
67@@ -1675,6 +1683,7 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
68 kvm_msr_entry_add(cpu, MSR_LSTAR, env->lstar);
69 }
70 #endif
71+
72 /*
73 * The following MSRs have side effects on the guest or are too heavy
74 * for normal writeback. Limit them to reset or full state updates.
75@@ -2081,6 +2090,9 @@ static int kvm_get_msrs(X86CPU *cpu)
76 if (has_msr_xss) {
77 kvm_msr_entry_add(cpu, MSR_IA32_XSS, 0);
78 }
79+ if (has_msr_spec_ctrl) {
80+ kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0);
81+ }
82
83
84 if (!env->tsc_valid) {
85@@ -2430,6 +2442,9 @@ static int kvm_get_msrs(X86CPU *cpu)
86 env->mtrr_var[MSR_MTRRphysIndex(index)].base = msrs[i].data;
87 }
88 break;
89+ case MSR_IA32_SPEC_CTRL:
90+ env->spec_ctrl = msrs[i].data;
91+ break;
92 }
93 }
94
95diff --git a/target/i386/machine.c b/target/i386/machine.c
96index 78ae2f986b..8c0d5437fa 100644
97--- a/target/i386/machine.c
98+++ b/target/i386/machine.c
99@@ -927,6 +927,25 @@ static const VMStateDescription vmstate_mcg_ext_ctl = {
100 }
101 };
102
103+static bool spec_ctrl_needed(void *opaque)
104+{
105+ X86CPU *cpu = opaque;
106+ CPUX86State *env = &cpu->env;
107+
108+ return env->spec_ctrl != 0;
109+}
110+
111+static const VMStateDescription vmstate_spec_ctrl = {
112+ .name = "cpu/spec_ctrl",
113+ .version_id = 1,
114+ .minimum_version_id = 1,
115+ .needed = spec_ctrl_needed,
116+ .fields = (VMStateField[]){
117+ VMSTATE_UINT64(env.spec_ctrl, X86CPU),
118+ VMSTATE_END_OF_LIST()
119+ }
120+};
121+
122 VMStateDescription vmstate_x86_cpu = {
123 .name = "cpu",
124 .version_id = 12,
125@@ -1053,6 +1072,7 @@ VMStateDescription vmstate_x86_cpu = {
126 #ifdef TARGET_X86_64
127 &vmstate_pkru,
128 #endif
129+ &vmstate_spec_ctrl,
130 &vmstate_mcg_ext_ctl,
131 NULL
132 }
133--
1342.11.0
135