]> git.proxmox.com Git - pve-qemu.git/blob - debian/patches/extra/0034-i386-Add-new-IBRS-versions-of-Intel-CPU-models.patch
54e28350020859cafa5deea689ba2fd66464688f
[pve-qemu.git] / debian / patches / extra / 0034-i386-Add-new-IBRS-versions-of-Intel-CPU-models.patch
1 From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
2 From: Eduardo Habkost <ehabkost@redhat.com>
3 Date: Tue, 9 Jan 2018 13:45:17 -0200
4 Subject: [PATCH] i386: Add new -IBRS versions of Intel CPU models
5
6 The new MSR IA32_SPEC_CTRL MSR was introduced by a recent Intel
7 microcode updated and can be used by OSes to mitigate
8 CVE-2017-5715. Unfortunately we can't change the existing CPU
9 models without breaking existing setups, so users need to
10 explicitly update their VM configuration to use the new *-IBRS
11 CPU model if they want to expose IBRS to guests.
12
13 The new CPU models are simple copies of the existing CPU models,
14 with just CPUID_7_0_EDX_SPEC_CTRL added and model_id updated.
15
16 Cc: Jiri Denemark <jdenemar@redhat.com>
17 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
18 ---
19 target/i386/cpu.c | 427 +++++++++++++++++++++++++++++++++++++++++++++++++++++-
20 1 file changed, 426 insertions(+), 1 deletion(-)
21
22 diff --git a/target/i386/cpu.c b/target/i386/cpu.c
23 index eee365b78d..e4a2d5a012 100644
24 --- a/target/i386/cpu.c
25 +++ b/target/i386/cpu.c
26 @@ -1085,6 +1085,31 @@ static X86CPUDefinition builtin_x86_defs[] = {
27 .model_id = "Intel Core i7 9xx (Nehalem Class Core i7)",
28 },
29 {
30 + .name = "Nehalem-IBRS",
31 + .level = 11,
32 + .vendor = CPUID_VENDOR_INTEL,
33 + .family = 6,
34 + .model = 26,
35 + .stepping = 3,
36 + .features[FEAT_1_EDX] =
37 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
38 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
39 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
40 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
41 + CPUID_DE | CPUID_FP87,
42 + .features[FEAT_1_ECX] =
43 + CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
44 + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3,
45 + .features[FEAT_7_0_EDX] =
46 + CPUID_7_0_EDX_SPEC_CTRL,
47 + .features[FEAT_8000_0001_EDX] =
48 + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
49 + .features[FEAT_8000_0001_ECX] =
50 + CPUID_EXT3_LAHF_LM,
51 + .xlevel = 0x80000008,
52 + .model_id = "Intel Core i7 9xx (Nehalem Core i7, IBRS update)",
53 + },
54 + {
55 .name = "Westmere",
56 .level = 11,
57 .vendor = CPUID_VENDOR_INTEL,
58 @@ -1111,6 +1136,34 @@ static X86CPUDefinition builtin_x86_defs[] = {
59 .model_id = "Westmere E56xx/L56xx/X56xx (Nehalem-C)",
60 },
61 {
62 + .name = "Westmere-IBRS",
63 + .level = 11,
64 + .vendor = CPUID_VENDOR_INTEL,
65 + .family = 6,
66 + .model = 44,
67 + .stepping = 1,
68 + .features[FEAT_1_EDX] =
69 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
70 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
71 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
72 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
73 + CPUID_DE | CPUID_FP87,
74 + .features[FEAT_1_ECX] =
75 + CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 |
76 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
77 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3,
78 + .features[FEAT_8000_0001_EDX] =
79 + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
80 + .features[FEAT_8000_0001_ECX] =
81 + CPUID_EXT3_LAHF_LM,
82 + .features[FEAT_7_0_EDX] =
83 + CPUID_7_0_EDX_SPEC_CTRL,
84 + .features[FEAT_6_EAX] =
85 + CPUID_6_EAX_ARAT,
86 + .xlevel = 0x80000008,
87 + .model_id = "Westmere E56xx/L56xx/X56xx (IBRS update)",
88 + },
89 + {
90 .name = "SandyBridge",
91 .level = 0xd,
92 .vendor = CPUID_VENDOR_INTEL,
93 @@ -1142,6 +1195,39 @@ static X86CPUDefinition builtin_x86_defs[] = {
94 .model_id = "Intel Xeon E312xx (Sandy Bridge)",
95 },
96 {
97 + .name = "SandyBridge-IBRS",
98 + .level = 0xd,
99 + .vendor = CPUID_VENDOR_INTEL,
100 + .family = 6,
101 + .model = 42,
102 + .stepping = 1,
103 + .features[FEAT_1_EDX] =
104 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
105 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
106 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
107 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
108 + CPUID_DE | CPUID_FP87,
109 + .features[FEAT_1_ECX] =
110 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
111 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
112 + CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
113 + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
114 + CPUID_EXT_SSE3,
115 + .features[FEAT_8000_0001_EDX] =
116 + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
117 + CPUID_EXT2_SYSCALL,
118 + .features[FEAT_8000_0001_ECX] =
119 + CPUID_EXT3_LAHF_LM,
120 + .features[FEAT_7_0_EDX] =
121 + CPUID_7_0_EDX_SPEC_CTRL,
122 + .features[FEAT_XSAVE] =
123 + CPUID_XSAVE_XSAVEOPT,
124 + .features[FEAT_6_EAX] =
125 + CPUID_6_EAX_ARAT,
126 + .xlevel = 0x80000008,
127 + .model_id = "Intel Xeon E312xx (Sandy Bridge, IBRS update)",
128 + },
129 + {
130 .name = "IvyBridge",
131 .level = 0xd,
132 .vendor = CPUID_VENDOR_INTEL,
133 @@ -1176,6 +1262,42 @@ static X86CPUDefinition builtin_x86_defs[] = {
134 .model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge)",
135 },
136 {
137 + .name = "IvyBridge-IBRS",
138 + .level = 0xd,
139 + .vendor = CPUID_VENDOR_INTEL,
140 + .family = 6,
141 + .model = 58,
142 + .stepping = 9,
143 + .features[FEAT_1_EDX] =
144 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
145 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
146 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
147 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
148 + CPUID_DE | CPUID_FP87,
149 + .features[FEAT_1_ECX] =
150 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
151 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT |
152 + CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 |
153 + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ |
154 + CPUID_EXT_SSE3 | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
155 + .features[FEAT_7_0_EBX] =
156 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP |
157 + CPUID_7_0_EBX_ERMS,
158 + .features[FEAT_8000_0001_EDX] =
159 + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
160 + CPUID_EXT2_SYSCALL,
161 + .features[FEAT_8000_0001_ECX] =
162 + CPUID_EXT3_LAHF_LM,
163 + .features[FEAT_7_0_EDX] =
164 + CPUID_7_0_EDX_SPEC_CTRL,
165 + .features[FEAT_XSAVE] =
166 + CPUID_XSAVE_XSAVEOPT,
167 + .features[FEAT_6_EAX] =
168 + CPUID_6_EAX_ARAT,
169 + .xlevel = 0x80000008,
170 + .model_id = "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)",
171 + },
172 + {
173 .name = "Haswell-noTSX",
174 .level = 0xd,
175 .vendor = CPUID_VENDOR_INTEL,
176 @@ -1210,7 +1332,46 @@ static X86CPUDefinition builtin_x86_defs[] = {
177 CPUID_6_EAX_ARAT,
178 .xlevel = 0x80000008,
179 .model_id = "Intel Core Processor (Haswell, no TSX)",
180 - }, {
181 + },
182 + {
183 + .name = "Haswell-noTSX-IBRS",
184 + .level = 0xd,
185 + .vendor = CPUID_VENDOR_INTEL,
186 + .family = 6,
187 + .model = 60,
188 + .stepping = 1,
189 + .features[FEAT_1_EDX] =
190 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
191 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
192 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
193 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
194 + CPUID_DE | CPUID_FP87,
195 + .features[FEAT_1_ECX] =
196 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
197 + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
198 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
199 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
200 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
201 + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
202 + .features[FEAT_8000_0001_EDX] =
203 + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
204 + CPUID_EXT2_SYSCALL,
205 + .features[FEAT_8000_0001_ECX] =
206 + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
207 + .features[FEAT_7_0_EDX] =
208 + CPUID_7_0_EDX_SPEC_CTRL,
209 + .features[FEAT_7_0_EBX] =
210 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
211 + CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
212 + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID,
213 + .features[FEAT_XSAVE] =
214 + CPUID_XSAVE_XSAVEOPT,
215 + .features[FEAT_6_EAX] =
216 + CPUID_6_EAX_ARAT,
217 + .xlevel = 0x80000008,
218 + .model_id = "Intel Core Processor (Haswell, no TSX, IBRS)",
219 + },
220 + {
221 .name = "Haswell",
222 .level = 0xd,
223 .vendor = CPUID_VENDOR_INTEL,
224 @@ -1248,6 +1409,45 @@ static X86CPUDefinition builtin_x86_defs[] = {
225 .model_id = "Intel Core Processor (Haswell)",
226 },
227 {
228 + .name = "Haswell-IBRS",
229 + .level = 0xd,
230 + .vendor = CPUID_VENDOR_INTEL,
231 + .family = 6,
232 + .model = 60,
233 + .stepping = 4,
234 + .features[FEAT_1_EDX] =
235 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
236 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
237 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
238 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
239 + CPUID_DE | CPUID_FP87,
240 + .features[FEAT_1_ECX] =
241 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
242 + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
243 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
244 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
245 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
246 + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
247 + .features[FEAT_8000_0001_EDX] =
248 + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
249 + CPUID_EXT2_SYSCALL,
250 + .features[FEAT_8000_0001_ECX] =
251 + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM,
252 + .features[FEAT_7_0_EDX] =
253 + CPUID_7_0_EDX_SPEC_CTRL,
254 + .features[FEAT_7_0_EBX] =
255 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
256 + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
257 + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
258 + CPUID_7_0_EBX_RTM,
259 + .features[FEAT_XSAVE] =
260 + CPUID_XSAVE_XSAVEOPT,
261 + .features[FEAT_6_EAX] =
262 + CPUID_6_EAX_ARAT,
263 + .xlevel = 0x80000008,
264 + .model_id = "Intel Core Processor (Haswell, IBRS)",
265 + },
266 + {
267 .name = "Broadwell-noTSX",
268 .level = 0xd,
269 .vendor = CPUID_VENDOR_INTEL,
270 @@ -1286,6 +1486,46 @@ static X86CPUDefinition builtin_x86_defs[] = {
271 .model_id = "Intel Core Processor (Broadwell, no TSX)",
272 },
273 {
274 + .name = "Broadwell-noTSX-IBRS",
275 + .level = 0xd,
276 + .vendor = CPUID_VENDOR_INTEL,
277 + .family = 6,
278 + .model = 61,
279 + .stepping = 2,
280 + .features[FEAT_1_EDX] =
281 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
282 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
283 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
284 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
285 + CPUID_DE | CPUID_FP87,
286 + .features[FEAT_1_ECX] =
287 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
288 + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
289 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
290 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
291 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
292 + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
293 + .features[FEAT_8000_0001_EDX] =
294 + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
295 + CPUID_EXT2_SYSCALL,
296 + .features[FEAT_8000_0001_ECX] =
297 + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
298 + .features[FEAT_7_0_EDX] =
299 + CPUID_7_0_EDX_SPEC_CTRL,
300 + .features[FEAT_7_0_EBX] =
301 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
302 + CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
303 + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
304 + CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
305 + CPUID_7_0_EBX_SMAP,
306 + .features[FEAT_XSAVE] =
307 + CPUID_XSAVE_XSAVEOPT,
308 + .features[FEAT_6_EAX] =
309 + CPUID_6_EAX_ARAT,
310 + .xlevel = 0x80000008,
311 + .model_id = "Intel Core Processor (Broadwell, no TSX, IBRS)",
312 + },
313 + {
314 .name = "Broadwell",
315 .level = 0xd,
316 .vendor = CPUID_VENDOR_INTEL,
317 @@ -1324,6 +1564,46 @@ static X86CPUDefinition builtin_x86_defs[] = {
318 .model_id = "Intel Core Processor (Broadwell)",
319 },
320 {
321 + .name = "Broadwell-IBRS",
322 + .level = 0xd,
323 + .vendor = CPUID_VENDOR_INTEL,
324 + .family = 6,
325 + .model = 61,
326 + .stepping = 2,
327 + .features[FEAT_1_EDX] =
328 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
329 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
330 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
331 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
332 + CPUID_DE | CPUID_FP87,
333 + .features[FEAT_1_ECX] =
334 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
335 + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
336 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
337 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
338 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
339 + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
340 + .features[FEAT_8000_0001_EDX] =
341 + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
342 + CPUID_EXT2_SYSCALL,
343 + .features[FEAT_8000_0001_ECX] =
344 + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
345 + .features[FEAT_7_0_EDX] =
346 + CPUID_7_0_EDX_SPEC_CTRL,
347 + .features[FEAT_7_0_EBX] =
348 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
349 + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
350 + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
351 + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
352 + CPUID_7_0_EBX_SMAP,
353 + .features[FEAT_XSAVE] =
354 + CPUID_XSAVE_XSAVEOPT,
355 + .features[FEAT_6_EAX] =
356 + CPUID_6_EAX_ARAT,
357 + .xlevel = 0x80000008,
358 + .model_id = "Intel Core Processor (Broadwell, IBRS)",
359 + },
360 + {
361 .name = "Skylake-Client",
362 .level = 0xd,
363 .vendor = CPUID_VENDOR_INTEL,
364 @@ -1369,6 +1649,151 @@ static X86CPUDefinition builtin_x86_defs[] = {
365 .model_id = "Intel Core Processor (Skylake)",
366 },
367 {
368 + .name = "Skylake-Client-IBRS",
369 + .level = 0xd,
370 + .vendor = CPUID_VENDOR_INTEL,
371 + .family = 6,
372 + .model = 94,
373 + .stepping = 3,
374 + .features[FEAT_1_EDX] =
375 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
376 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
377 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
378 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
379 + CPUID_DE | CPUID_FP87,
380 + .features[FEAT_1_ECX] =
381 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
382 + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
383 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
384 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
385 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
386 + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
387 + .features[FEAT_8000_0001_EDX] =
388 + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX |
389 + CPUID_EXT2_SYSCALL,
390 + .features[FEAT_8000_0001_ECX] =
391 + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
392 + .features[FEAT_7_0_EDX] =
393 + CPUID_7_0_EDX_SPEC_CTRL,
394 + .features[FEAT_7_0_EBX] =
395 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
396 + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
397 + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
398 + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
399 + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX,
400 + /* Missing: XSAVES (not supported by some Linux versions,
401 + * including v4.1 to v4.12).
402 + * KVM doesn't yet expose any XSAVES state save component,
403 + * and the only one defined in Skylake (processor tracing)
404 + * probably will block migration anyway.
405 + */
406 + .features[FEAT_XSAVE] =
407 + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
408 + CPUID_XSAVE_XGETBV1,
409 + .features[FEAT_6_EAX] =
410 + CPUID_6_EAX_ARAT,
411 + .xlevel = 0x80000008,
412 + .model_id = "Intel Core Processor (Skylake, IBRS)",
413 + },
414 + {
415 + .name = "Skylake-Server",
416 + .level = 0xd,
417 + .vendor = CPUID_VENDOR_INTEL,
418 + .family = 6,
419 + .model = 85,
420 + .stepping = 4,
421 + .features[FEAT_1_EDX] =
422 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
423 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
424 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
425 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
426 + CPUID_DE | CPUID_FP87,
427 + .features[FEAT_1_ECX] =
428 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
429 + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
430 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
431 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
432 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
433 + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
434 + .features[FEAT_8000_0001_EDX] =
435 + CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
436 + CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
437 + .features[FEAT_8000_0001_ECX] =
438 + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
439 + .features[FEAT_7_0_EBX] =
440 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
441 + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
442 + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
443 + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
444 + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB |
445 + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
446 + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
447 + CPUID_7_0_EBX_AVX512VL,
448 + /* Missing: XSAVES (not supported by some Linux versions,
449 + * including v4.1 to v4.12).
450 + * KVM doesn't yet expose any XSAVES state save component,
451 + * and the only one defined in Skylake (processor tracing)
452 + * probably will block migration anyway.
453 + */
454 + .features[FEAT_XSAVE] =
455 + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
456 + CPUID_XSAVE_XGETBV1,
457 + .features[FEAT_6_EAX] =
458 + CPUID_6_EAX_ARAT,
459 + .xlevel = 0x80000008,
460 + .model_id = "Intel Xeon Processor (Skylake)",
461 + },
462 + {
463 + .name = "Skylake-Server-IBRS",
464 + .level = 0xd,
465 + .vendor = CPUID_VENDOR_INTEL,
466 + .family = 6,
467 + .model = 85,
468 + .stepping = 4,
469 + .features[FEAT_1_EDX] =
470 + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX |
471 + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA |
472 + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 |
473 + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE |
474 + CPUID_DE | CPUID_FP87,
475 + .features[FEAT_1_ECX] =
476 + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES |
477 + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 |
478 + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 |
479 + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 |
480 + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE |
481 + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND,
482 + .features[FEAT_8000_0001_EDX] =
483 + CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP |
484 + CPUID_EXT2_NX | CPUID_EXT2_SYSCALL,
485 + .features[FEAT_8000_0001_ECX] =
486 + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
487 + .features[FEAT_7_0_EDX] =
488 + CPUID_7_0_EDX_SPEC_CTRL,
489 + .features[FEAT_7_0_EBX] =
490 + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
491 + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
492 + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
493 + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
494 + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB |
495 + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ |
496 + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD |
497 + CPUID_7_0_EBX_AVX512VL,
498 + /* Missing: XSAVES (not supported by some Linux versions,
499 + * including v4.1 to v4.12).
500 + * KVM doesn't yet expose any XSAVES state save component,
501 + * and the only one defined in Skylake (processor tracing)
502 + * probably will block migration anyway.
503 + */
504 + .features[FEAT_XSAVE] =
505 + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC |
506 + CPUID_XSAVE_XGETBV1,
507 + .features[FEAT_6_EAX] =
508 + CPUID_6_EAX_ARAT,
509 + .xlevel = 0x80000008,
510 + .model_id = "Intel Xeon Processor (Skylake, IBRS)",
511 + },
512 + {
513 .name = "Opteron_G1",
514 .level = 5,
515 .vendor = CPUID_VENDOR_AMD,
516 --
517 2.11.0
518