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1/*
2 * defines common to all virtual CPUs
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef CPU_ALL_H
21#define CPU_ALL_H
22
23/* all CPU memory access use these macros */
24static inline int ldub(void *ptr)
25{
26 return *(uint8_t *)ptr;
27}
28
29static inline int ldsb(void *ptr)
30{
31 return *(int8_t *)ptr;
32}
33
34static inline void stb(void *ptr, int v)
35{
36 *(uint8_t *)ptr = v;
37}
38
39/* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
40 kernel handles unaligned load/stores may give better results, but
41 it is a system wide setting : bad */
42#if defined(WORDS_BIGENDIAN) || defined(__arm__)
43
44/* conservative code for little endian unaligned accesses */
45static inline int lduw(void *ptr)
46{
47#ifdef __powerpc__
48 int val;
49 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
50 return val;
51#else
52 uint8_t *p = ptr;
53 return p[0] | (p[1] << 8);
54#endif
55}
56
57static inline int ldsw(void *ptr)
58{
59#ifdef __powerpc__
60 int val;
61 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr));
62 return (int16_t)val;
63#else
64 uint8_t *p = ptr;
65 return (int16_t)(p[0] | (p[1] << 8));
66#endif
67}
68
69static inline int ldl(void *ptr)
70{
71#ifdef __powerpc__
72 int val;
73 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr));
74 return val;
75#else
76 uint8_t *p = ptr;
77 return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24);
78#endif
79}
80
81static inline uint64_t ldq(void *ptr)
82{
83 uint8_t *p = ptr;
84 uint32_t v1, v2;
85 v1 = ldl(p);
86 v2 = ldl(p + 4);
87 return v1 | ((uint64_t)v2 << 32);
88}
89
90static inline void stw(void *ptr, int v)
91{
92#ifdef __powerpc__
93 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr));
94#else
95 uint8_t *p = ptr;
96 p[0] = v;
97 p[1] = v >> 8;
98#endif
99}
100
101static inline void stl(void *ptr, int v)
102{
103#ifdef __powerpc__
104 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr));
105#else
106 uint8_t *p = ptr;
107 p[0] = v;
108 p[1] = v >> 8;
109 p[2] = v >> 16;
110 p[3] = v >> 24;
111#endif
112}
113
114static inline void stq(void *ptr, uint64_t v)
115{
116 uint8_t *p = ptr;
117 stl(p, (uint32_t)v);
118 stl(p + 4, v >> 32);
119}
120
121/* float access */
122
123static inline float ldfl(void *ptr)
124{
125 union {
126 float f;
127 uint32_t i;
128 } u;
129 u.i = ldl(ptr);
130 return u.f;
131}
132
133static inline void stfl(void *ptr, float v)
134{
135 union {
136 float f;
137 uint32_t i;
138 } u;
139 u.f = v;
140 stl(ptr, u.i);
141}
142
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144#if defined(__arm__) && !defined(WORDS_BIGENDIAN)
145
146/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
147static inline double ldfq(void *ptr)
148{
149 union {
150 double d;
151 uint32_t tab[2];
152 } u;
153 u.tab[1] = ldl(ptr);
154 u.tab[0] = ldl(ptr + 4);
155 return u.d;
156}
157
158static inline void stfq(void *ptr, double v)
159{
160 union {
161 double d;
162 uint32_t tab[2];
163 } u;
164 u.d = v;
165 stl(ptr, u.tab[1]);
166 stl(ptr + 4, u.tab[0]);
167}
168
169#else
170static inline double ldfq(void *ptr)
171{
172 union {
173 double d;
174 uint64_t i;
175 } u;
176 u.i = ldq(ptr);
177 return u.d;
178}
179
180static inline void stfq(void *ptr, double v)
181{
182 union {
183 double d;
184 uint64_t i;
185 } u;
186 u.d = v;
187 stq(ptr, u.i);
188}
189#endif
190
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191#elif defined(TARGET_WORDS_BIGENDIAN) && !defined(WORDS_BIGENDIAN)
192
193static inline int lduw(void *ptr)
194{
195 uint8_t *b = (uint8_t *) ptr;
196 return (b[0]<<8|b[1]);
197}
198
199static inline int ldsw(void *ptr)
200{
201 int8_t *b = (int8_t *) ptr;
202 return (b[0]<<8|b[1]);
203}
204
205static inline int ldl(void *ptr)
206{
207 uint8_t *b = (uint8_t *) ptr;
208 return (b[0]<<24|b[1]<<16|b[2]<<8|b[3]);
209}
210
211static inline uint64_t ldq(void *ptr)
212{
213 uint32_t a,b;
214 a = ldl (ptr);
215 b = ldl (ptr+4);
216 return (((uint64_t)a<<32)|b);
217}
218
219static inline void stw(void *ptr, int v)
220{
221 uint8_t *d = (uint8_t *) ptr;
222 d[0] = v >> 8;
223 d[1] = v;
224}
225
226static inline void stl(void *ptr, int v)
227{
228 uint8_t *d = (uint8_t *) ptr;
229 d[0] = v >> 24;
230 d[1] = v >> 16;
231 d[2] = v >> 8;
232 d[3] = v;
233}
234
235static inline void stq(void *ptr, uint64_t v)
236{
237 stl (ptr, v);
238 stl (ptr+4, v >> 32);
239}
240
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241#else
242
243static inline int lduw(void *ptr)
244{
245 return *(uint16_t *)ptr;
246}
247
248static inline int ldsw(void *ptr)
249{
250 return *(int16_t *)ptr;
251}
252
253static inline int ldl(void *ptr)
254{
255 return *(uint32_t *)ptr;
256}
257
258static inline uint64_t ldq(void *ptr)
259{
260 return *(uint64_t *)ptr;
261}
262
263static inline void stw(void *ptr, int v)
264{
265 *(uint16_t *)ptr = v;
266}
267
268static inline void stl(void *ptr, int v)
269{
270 *(uint32_t *)ptr = v;
271}
272
273static inline void stq(void *ptr, uint64_t v)
274{
275 *(uint64_t *)ptr = v;
276}
277
278/* float access */
279
280static inline float ldfl(void *ptr)
281{
282 return *(float *)ptr;
283}
284
285static inline double ldfq(void *ptr)
286{
287 return *(double *)ptr;
288}
289
290static inline void stfl(void *ptr, float v)
291{
292 *(float *)ptr = v;
293}
294
295static inline void stfq(void *ptr, double v)
296{
297 *(double *)ptr = v;
298}
299#endif
300
301/* page related stuff */
302
303#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS)
304#define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1)
305#define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK)
306
307extern unsigned long real_host_page_size;
308extern unsigned long host_page_bits;
309extern unsigned long host_page_size;
310extern unsigned long host_page_mask;
311
312#define HOST_PAGE_ALIGN(addr) (((addr) + host_page_size - 1) & host_page_mask)
313
314/* same as PROT_xxx */
315#define PAGE_READ 0x0001
316#define PAGE_WRITE 0x0002
317#define PAGE_EXEC 0x0004
318#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
319#define PAGE_VALID 0x0008
320/* original state of the write flag (used when tracking self-modifying
321 code */
322#define PAGE_WRITE_ORG 0x0010
323
324void page_dump(FILE *f);
325int page_get_flags(unsigned long address);
326void page_set_flags(unsigned long start, unsigned long end, int flags);
327void page_unprotect_range(uint8_t *data, unsigned long data_size);
328
329#define SINGLE_CPU_DEFINES
330#ifdef SINGLE_CPU_DEFINES
331
332#if defined(TARGET_I386)
333
334#define CPUState CPUX86State
335#define cpu_init cpu_x86_init
336#define cpu_exec cpu_x86_exec
337#define cpu_gen_code cpu_x86_gen_code
338#define cpu_interrupt cpu_x86_interrupt
339#define cpu_signal_handler cpu_x86_signal_handler
340
341#elif defined(TARGET_ARM)
342
343#define CPUState CPUARMState
344#define cpu_init cpu_arm_init
345#define cpu_exec cpu_arm_exec
346#define cpu_gen_code cpu_arm_gen_code
347#define cpu_interrupt cpu_arm_interrupt
348#define cpu_signal_handler cpu_arm_signal_handler
349
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350#elif defined(TARGET_SPARC)
351
352#define CPUState CPUSPARCState
353#define cpu_init cpu_sparc_init
354#define cpu_exec cpu_sparc_exec
355#define cpu_gen_code cpu_sparc_gen_code
356#define cpu_interrupt cpu_sparc_interrupt
357#define cpu_signal_handler cpu_sparc_signal_handler
358
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359#else
360
361#error unsupported target CPU
362
363#endif
364
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365#endif /* SINGLE_CPU_DEFINES */
366
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367#define DEFAULT_GDBSTUB_PORT 1234
368
972ddf78 369void cpu_abort(CPUState *env, const char *fmt, ...);
e2f22898 370extern CPUState *cpu_single_env;
5a9fdfec 371
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372#define CPU_INTERRUPT_EXIT 0x01 /* wants exit from main loop */
373#define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */
4690764b 374void cpu_interrupt(CPUState *s, int mask);
68a79315 375
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376int cpu_breakpoint_insert(CPUState *env, uint32_t pc);
377int cpu_breakpoint_remove(CPUState *env, uint32_t pc);
c33a346e 378void cpu_single_step(CPUState *env, int enabled);
4c3a88a2 379
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380#define CPU_LOG_ALL 1
381void cpu_set_log(int log_flags);
382void cpu_set_log_filename(const char *filename);
383
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384/* memory API */
385
386typedef void CPUWriteMemoryFunc(uint32_t addr, uint32_t value);
387typedef uint32_t CPUReadMemoryFunc(uint32_t addr);
388
389void cpu_register_physical_memory(unsigned long start_addr, unsigned long size,
390 long phys_offset);
391int cpu_register_io_memory(int io_index,
392 CPUReadMemoryFunc **mem_read,
393 CPUWriteMemoryFunc **mem_write);
394
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395/* gdb stub API */
396extern int gdbstub_fd;
397CPUState *cpu_gdbstub_get_env(void *opaque);
4c3a88a2 398int cpu_gdbstub(void *opaque, int (*main_loop)(void *opaque), int port);
3b0dca51 399
5a9fdfec 400#endif /* CPU_ALL_H */