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296af7c9 BS |
1 | /* |
2 | * QEMU System Emulator | |
3 | * | |
4 | * Copyright (c) 2003-2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
25 | /* Needed early for CONFIG_BSD etc. */ | |
26 | #include "config-host.h" | |
27 | ||
28 | #include "monitor.h" | |
29 | #include "sysemu.h" | |
30 | #include "gdbstub.h" | |
31 | #include "dma.h" | |
32 | #include "kvm.h" | |
de0b36b6 | 33 | #include "qmp-commands.h" |
296af7c9 | 34 | |
96284e89 | 35 | #include "qemu-thread.h" |
296af7c9 | 36 | #include "cpus.h" |
8156be56 | 37 | #include "qtest.h" |
44a9b356 | 38 | #include "main-loop.h" |
ee785fed | 39 | #include "bitmap.h" |
0ff0fc19 JK |
40 | |
41 | #ifndef _WIN32 | |
a8486bc9 | 42 | #include "compatfd.h" |
0ff0fc19 | 43 | #endif |
296af7c9 | 44 | |
6d9cb73c JK |
45 | #ifdef CONFIG_LINUX |
46 | ||
47 | #include <sys/prctl.h> | |
48 | ||
c0532a76 MT |
49 | #ifndef PR_MCE_KILL |
50 | #define PR_MCE_KILL 33 | |
51 | #endif | |
52 | ||
6d9cb73c JK |
53 | #ifndef PR_MCE_KILL_SET |
54 | #define PR_MCE_KILL_SET 1 | |
55 | #endif | |
56 | ||
57 | #ifndef PR_MCE_KILL_EARLY | |
58 | #define PR_MCE_KILL_EARLY 1 | |
59 | #endif | |
60 | ||
61 | #endif /* CONFIG_LINUX */ | |
62 | ||
9349b4f9 | 63 | static CPUArchState *next_cpu; |
296af7c9 | 64 | |
ac873f1e PM |
65 | static bool cpu_thread_is_idle(CPUArchState *env) |
66 | { | |
67 | if (env->stop || env->queued_work_first) { | |
68 | return false; | |
69 | } | |
70 | if (env->stopped || !runstate_is_running()) { | |
71 | return true; | |
72 | } | |
7ae26bd4 PM |
73 | if (!env->halted || qemu_cpu_has_work(env) || |
74 | kvm_async_interrupts_enabled()) { | |
ac873f1e PM |
75 | return false; |
76 | } | |
77 | return true; | |
78 | } | |
79 | ||
80 | static bool all_cpu_threads_idle(void) | |
81 | { | |
82 | CPUArchState *env; | |
83 | ||
84 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
85 | if (!cpu_thread_is_idle(env)) { | |
86 | return false; | |
87 | } | |
88 | } | |
89 | return true; | |
90 | } | |
91 | ||
946fb27c PB |
92 | /***********************************************************/ |
93 | /* guest cycle counter */ | |
94 | ||
95 | /* Conversion factor from emulated instructions to virtual clock ticks. */ | |
96 | static int icount_time_shift; | |
97 | /* Arbitrarily pick 1MIPS as the minimum allowable speed. */ | |
98 | #define MAX_ICOUNT_SHIFT 10 | |
99 | /* Compensate for varying guest execution speed. */ | |
100 | static int64_t qemu_icount_bias; | |
101 | static QEMUTimer *icount_rt_timer; | |
102 | static QEMUTimer *icount_vm_timer; | |
103 | static QEMUTimer *icount_warp_timer; | |
104 | static int64_t vm_clock_warp_start; | |
105 | static int64_t qemu_icount; | |
106 | ||
107 | typedef struct TimersState { | |
108 | int64_t cpu_ticks_prev; | |
109 | int64_t cpu_ticks_offset; | |
110 | int64_t cpu_clock_offset; | |
111 | int32_t cpu_ticks_enabled; | |
112 | int64_t dummy; | |
113 | } TimersState; | |
114 | ||
115 | TimersState timers_state; | |
116 | ||
117 | /* Return the virtual CPU time, based on the instruction counter. */ | |
118 | int64_t cpu_get_icount(void) | |
119 | { | |
120 | int64_t icount; | |
9349b4f9 | 121 | CPUArchState *env = cpu_single_env; |
946fb27c PB |
122 | |
123 | icount = qemu_icount; | |
124 | if (env) { | |
125 | if (!can_do_io(env)) { | |
126 | fprintf(stderr, "Bad clock read\n"); | |
127 | } | |
128 | icount -= (env->icount_decr.u16.low + env->icount_extra); | |
129 | } | |
130 | return qemu_icount_bias + (icount << icount_time_shift); | |
131 | } | |
132 | ||
133 | /* return the host CPU cycle counter and handle stop/restart */ | |
134 | int64_t cpu_get_ticks(void) | |
135 | { | |
136 | if (use_icount) { | |
137 | return cpu_get_icount(); | |
138 | } | |
139 | if (!timers_state.cpu_ticks_enabled) { | |
140 | return timers_state.cpu_ticks_offset; | |
141 | } else { | |
142 | int64_t ticks; | |
143 | ticks = cpu_get_real_ticks(); | |
144 | if (timers_state.cpu_ticks_prev > ticks) { | |
145 | /* Note: non increasing ticks may happen if the host uses | |
146 | software suspend */ | |
147 | timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks; | |
148 | } | |
149 | timers_state.cpu_ticks_prev = ticks; | |
150 | return ticks + timers_state.cpu_ticks_offset; | |
151 | } | |
152 | } | |
153 | ||
154 | /* return the host CPU monotonic timer and handle stop/restart */ | |
155 | int64_t cpu_get_clock(void) | |
156 | { | |
157 | int64_t ti; | |
158 | if (!timers_state.cpu_ticks_enabled) { | |
159 | return timers_state.cpu_clock_offset; | |
160 | } else { | |
161 | ti = get_clock(); | |
162 | return ti + timers_state.cpu_clock_offset; | |
163 | } | |
164 | } | |
165 | ||
166 | /* enable cpu_get_ticks() */ | |
167 | void cpu_enable_ticks(void) | |
168 | { | |
169 | if (!timers_state.cpu_ticks_enabled) { | |
170 | timers_state.cpu_ticks_offset -= cpu_get_real_ticks(); | |
171 | timers_state.cpu_clock_offset -= get_clock(); | |
172 | timers_state.cpu_ticks_enabled = 1; | |
173 | } | |
174 | } | |
175 | ||
176 | /* disable cpu_get_ticks() : the clock is stopped. You must not call | |
177 | cpu_get_ticks() after that. */ | |
178 | void cpu_disable_ticks(void) | |
179 | { | |
180 | if (timers_state.cpu_ticks_enabled) { | |
181 | timers_state.cpu_ticks_offset = cpu_get_ticks(); | |
182 | timers_state.cpu_clock_offset = cpu_get_clock(); | |
183 | timers_state.cpu_ticks_enabled = 0; | |
184 | } | |
185 | } | |
186 | ||
187 | /* Correlation between real and virtual time is always going to be | |
188 | fairly approximate, so ignore small variation. | |
189 | When the guest is idle real and virtual time will be aligned in | |
190 | the IO wait loop. */ | |
191 | #define ICOUNT_WOBBLE (get_ticks_per_sec() / 10) | |
192 | ||
193 | static void icount_adjust(void) | |
194 | { | |
195 | int64_t cur_time; | |
196 | int64_t cur_icount; | |
197 | int64_t delta; | |
198 | static int64_t last_delta; | |
199 | /* If the VM is not running, then do nothing. */ | |
200 | if (!runstate_is_running()) { | |
201 | return; | |
202 | } | |
203 | cur_time = cpu_get_clock(); | |
204 | cur_icount = qemu_get_clock_ns(vm_clock); | |
205 | delta = cur_icount - cur_time; | |
206 | /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */ | |
207 | if (delta > 0 | |
208 | && last_delta + ICOUNT_WOBBLE < delta * 2 | |
209 | && icount_time_shift > 0) { | |
210 | /* The guest is getting too far ahead. Slow time down. */ | |
211 | icount_time_shift--; | |
212 | } | |
213 | if (delta < 0 | |
214 | && last_delta - ICOUNT_WOBBLE > delta * 2 | |
215 | && icount_time_shift < MAX_ICOUNT_SHIFT) { | |
216 | /* The guest is getting too far behind. Speed time up. */ | |
217 | icount_time_shift++; | |
218 | } | |
219 | last_delta = delta; | |
220 | qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift); | |
221 | } | |
222 | ||
223 | static void icount_adjust_rt(void *opaque) | |
224 | { | |
225 | qemu_mod_timer(icount_rt_timer, | |
226 | qemu_get_clock_ms(rt_clock) + 1000); | |
227 | icount_adjust(); | |
228 | } | |
229 | ||
230 | static void icount_adjust_vm(void *opaque) | |
231 | { | |
232 | qemu_mod_timer(icount_vm_timer, | |
233 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
234 | icount_adjust(); | |
235 | } | |
236 | ||
237 | static int64_t qemu_icount_round(int64_t count) | |
238 | { | |
239 | return (count + (1 << icount_time_shift) - 1) >> icount_time_shift; | |
240 | } | |
241 | ||
242 | static void icount_warp_rt(void *opaque) | |
243 | { | |
244 | if (vm_clock_warp_start == -1) { | |
245 | return; | |
246 | } | |
247 | ||
248 | if (runstate_is_running()) { | |
249 | int64_t clock = qemu_get_clock_ns(rt_clock); | |
250 | int64_t warp_delta = clock - vm_clock_warp_start; | |
251 | if (use_icount == 1) { | |
252 | qemu_icount_bias += warp_delta; | |
253 | } else { | |
254 | /* | |
255 | * In adaptive mode, do not let the vm_clock run too | |
256 | * far ahead of real time. | |
257 | */ | |
258 | int64_t cur_time = cpu_get_clock(); | |
259 | int64_t cur_icount = qemu_get_clock_ns(vm_clock); | |
260 | int64_t delta = cur_time - cur_icount; | |
261 | qemu_icount_bias += MIN(warp_delta, delta); | |
262 | } | |
263 | if (qemu_clock_expired(vm_clock)) { | |
264 | qemu_notify_event(); | |
265 | } | |
266 | } | |
267 | vm_clock_warp_start = -1; | |
268 | } | |
269 | ||
8156be56 PB |
270 | void qtest_clock_warp(int64_t dest) |
271 | { | |
272 | int64_t clock = qemu_get_clock_ns(vm_clock); | |
273 | assert(qtest_enabled()); | |
274 | while (clock < dest) { | |
275 | int64_t deadline = qemu_clock_deadline(vm_clock); | |
276 | int64_t warp = MIN(dest - clock, deadline); | |
277 | qemu_icount_bias += warp; | |
278 | qemu_run_timers(vm_clock); | |
279 | clock = qemu_get_clock_ns(vm_clock); | |
280 | } | |
281 | qemu_notify_event(); | |
282 | } | |
283 | ||
946fb27c PB |
284 | void qemu_clock_warp(QEMUClock *clock) |
285 | { | |
286 | int64_t deadline; | |
287 | ||
288 | /* | |
289 | * There are too many global variables to make the "warp" behavior | |
290 | * applicable to other clocks. But a clock argument removes the | |
291 | * need for if statements all over the place. | |
292 | */ | |
293 | if (clock != vm_clock || !use_icount) { | |
294 | return; | |
295 | } | |
296 | ||
297 | /* | |
298 | * If the CPUs have been sleeping, advance the vm_clock timer now. This | |
299 | * ensures that the deadline for the timer is computed correctly below. | |
300 | * This also makes sure that the insn counter is synchronized before the | |
301 | * CPU starts running, in case the CPU is woken by an event other than | |
302 | * the earliest vm_clock timer. | |
303 | */ | |
304 | icount_warp_rt(NULL); | |
305 | if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) { | |
306 | qemu_del_timer(icount_warp_timer); | |
307 | return; | |
308 | } | |
309 | ||
8156be56 PB |
310 | if (qtest_enabled()) { |
311 | /* When testing, qtest commands advance icount. */ | |
312 | return; | |
313 | } | |
314 | ||
946fb27c PB |
315 | vm_clock_warp_start = qemu_get_clock_ns(rt_clock); |
316 | deadline = qemu_clock_deadline(vm_clock); | |
317 | if (deadline > 0) { | |
318 | /* | |
319 | * Ensure the vm_clock proceeds even when the virtual CPU goes to | |
320 | * sleep. Otherwise, the CPU might be waiting for a future timer | |
321 | * interrupt to wake it up, but the interrupt never comes because | |
322 | * the vCPU isn't running any insns and thus doesn't advance the | |
323 | * vm_clock. | |
324 | * | |
325 | * An extreme solution for this problem would be to never let VCPUs | |
326 | * sleep in icount mode if there is a pending vm_clock timer; rather | |
327 | * time could just advance to the next vm_clock event. Instead, we | |
328 | * do stop VCPUs and only advance vm_clock after some "real" time, | |
329 | * (related to the time left until the next event) has passed. This | |
330 | * rt_clock timer will do this. This avoids that the warps are too | |
331 | * visible externally---for example, you will not be sending network | |
07f35073 | 332 | * packets continuously instead of every 100ms. |
946fb27c PB |
333 | */ |
334 | qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline); | |
335 | } else { | |
336 | qemu_notify_event(); | |
337 | } | |
338 | } | |
339 | ||
340 | static const VMStateDescription vmstate_timers = { | |
341 | .name = "timer", | |
342 | .version_id = 2, | |
343 | .minimum_version_id = 1, | |
344 | .minimum_version_id_old = 1, | |
345 | .fields = (VMStateField[]) { | |
346 | VMSTATE_INT64(cpu_ticks_offset, TimersState), | |
347 | VMSTATE_INT64(dummy, TimersState), | |
348 | VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2), | |
349 | VMSTATE_END_OF_LIST() | |
350 | } | |
351 | }; | |
352 | ||
353 | void configure_icount(const char *option) | |
354 | { | |
355 | vmstate_register(NULL, 0, &vmstate_timers, &timers_state); | |
356 | if (!option) { | |
357 | return; | |
358 | } | |
359 | ||
360 | icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL); | |
361 | if (strcmp(option, "auto") != 0) { | |
362 | icount_time_shift = strtol(option, NULL, 0); | |
363 | use_icount = 1; | |
364 | return; | |
365 | } | |
366 | ||
367 | use_icount = 2; | |
368 | ||
369 | /* 125MIPS seems a reasonable initial guess at the guest speed. | |
370 | It will be corrected fairly quickly anyway. */ | |
371 | icount_time_shift = 3; | |
372 | ||
373 | /* Have both realtime and virtual time triggers for speed adjustment. | |
374 | The realtime trigger catches emulated time passing too slowly, | |
375 | the virtual time trigger catches emulated time passing too fast. | |
376 | Realtime triggers occur even when idle, so use them less frequently | |
377 | than VM triggers. */ | |
378 | icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL); | |
379 | qemu_mod_timer(icount_rt_timer, | |
380 | qemu_get_clock_ms(rt_clock) + 1000); | |
381 | icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL); | |
382 | qemu_mod_timer(icount_vm_timer, | |
383 | qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10); | |
384 | } | |
385 | ||
296af7c9 BS |
386 | /***********************************************************/ |
387 | void hw_error(const char *fmt, ...) | |
388 | { | |
389 | va_list ap; | |
9349b4f9 | 390 | CPUArchState *env; |
296af7c9 BS |
391 | |
392 | va_start(ap, fmt); | |
393 | fprintf(stderr, "qemu: hardware error: "); | |
394 | vfprintf(stderr, fmt, ap); | |
395 | fprintf(stderr, "\n"); | |
396 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
397 | fprintf(stderr, "CPU #%d:\n", env->cpu_index); | |
6fd2a026 | 398 | cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU); |
296af7c9 BS |
399 | } |
400 | va_end(ap); | |
401 | abort(); | |
402 | } | |
403 | ||
404 | void cpu_synchronize_all_states(void) | |
405 | { | |
9349b4f9 | 406 | CPUArchState *cpu; |
296af7c9 BS |
407 | |
408 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
409 | cpu_synchronize_state(cpu); | |
410 | } | |
411 | } | |
412 | ||
413 | void cpu_synchronize_all_post_reset(void) | |
414 | { | |
9349b4f9 | 415 | CPUArchState *cpu; |
296af7c9 BS |
416 | |
417 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
418 | cpu_synchronize_post_reset(cpu); | |
419 | } | |
420 | } | |
421 | ||
422 | void cpu_synchronize_all_post_init(void) | |
423 | { | |
9349b4f9 | 424 | CPUArchState *cpu; |
296af7c9 BS |
425 | |
426 | for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) { | |
427 | cpu_synchronize_post_init(cpu); | |
428 | } | |
429 | } | |
430 | ||
9349b4f9 | 431 | int cpu_is_stopped(CPUArchState *env) |
3ae9501c | 432 | { |
1354869c | 433 | return !runstate_is_running() || env->stopped; |
3ae9501c MT |
434 | } |
435 | ||
1dfb4dd9 | 436 | static void do_vm_stop(RunState state) |
296af7c9 | 437 | { |
1354869c | 438 | if (runstate_is_running()) { |
296af7c9 | 439 | cpu_disable_ticks(); |
296af7c9 | 440 | pause_all_vcpus(); |
f5bbfba1 | 441 | runstate_set(state); |
1dfb4dd9 | 442 | vm_state_notify(0, state); |
922453bc | 443 | bdrv_drain_all(); |
55df6f33 | 444 | bdrv_flush_all(); |
296af7c9 BS |
445 | monitor_protocol_event(QEVENT_STOP, NULL); |
446 | } | |
447 | } | |
448 | ||
9349b4f9 | 449 | static int cpu_can_run(CPUArchState *env) |
296af7c9 | 450 | { |
0ab07c62 | 451 | if (env->stop) { |
296af7c9 | 452 | return 0; |
0ab07c62 | 453 | } |
1354869c | 454 | if (env->stopped || !runstate_is_running()) { |
296af7c9 | 455 | return 0; |
0ab07c62 | 456 | } |
296af7c9 BS |
457 | return 1; |
458 | } | |
459 | ||
9349b4f9 | 460 | static void cpu_handle_guest_debug(CPUArchState *env) |
83f338f7 | 461 | { |
3c638d06 | 462 | gdb_set_stop_cpu(env); |
8cf71710 | 463 | qemu_system_debug_request(); |
83f338f7 | 464 | env->stopped = 1; |
3c638d06 JK |
465 | } |
466 | ||
714bd040 PB |
467 | static void cpu_signal(int sig) |
468 | { | |
469 | if (cpu_single_env) { | |
470 | cpu_exit(cpu_single_env); | |
471 | } | |
472 | exit_request = 1; | |
473 | } | |
714bd040 | 474 | |
6d9cb73c JK |
475 | #ifdef CONFIG_LINUX |
476 | static void sigbus_reraise(void) | |
477 | { | |
478 | sigset_t set; | |
479 | struct sigaction action; | |
480 | ||
481 | memset(&action, 0, sizeof(action)); | |
482 | action.sa_handler = SIG_DFL; | |
483 | if (!sigaction(SIGBUS, &action, NULL)) { | |
484 | raise(SIGBUS); | |
485 | sigemptyset(&set); | |
486 | sigaddset(&set, SIGBUS); | |
487 | sigprocmask(SIG_UNBLOCK, &set, NULL); | |
488 | } | |
489 | perror("Failed to re-raise SIGBUS!\n"); | |
490 | abort(); | |
491 | } | |
492 | ||
493 | static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo, | |
494 | void *ctx) | |
495 | { | |
496 | if (kvm_on_sigbus(siginfo->ssi_code, | |
497 | (void *)(intptr_t)siginfo->ssi_addr)) { | |
498 | sigbus_reraise(); | |
499 | } | |
500 | } | |
501 | ||
502 | static void qemu_init_sigbus(void) | |
503 | { | |
504 | struct sigaction action; | |
505 | ||
506 | memset(&action, 0, sizeof(action)); | |
507 | action.sa_flags = SA_SIGINFO; | |
508 | action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler; | |
509 | sigaction(SIGBUS, &action, NULL); | |
510 | ||
511 | prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0); | |
512 | } | |
513 | ||
9349b4f9 | 514 | static void qemu_kvm_eat_signals(CPUArchState *env) |
1ab3c6c0 JK |
515 | { |
516 | struct timespec ts = { 0, 0 }; | |
517 | siginfo_t siginfo; | |
518 | sigset_t waitset; | |
519 | sigset_t chkset; | |
520 | int r; | |
521 | ||
522 | sigemptyset(&waitset); | |
523 | sigaddset(&waitset, SIG_IPI); | |
524 | sigaddset(&waitset, SIGBUS); | |
525 | ||
526 | do { | |
527 | r = sigtimedwait(&waitset, &siginfo, &ts); | |
528 | if (r == -1 && !(errno == EAGAIN || errno == EINTR)) { | |
529 | perror("sigtimedwait"); | |
530 | exit(1); | |
531 | } | |
532 | ||
533 | switch (r) { | |
534 | case SIGBUS: | |
535 | if (kvm_on_sigbus_vcpu(env, siginfo.si_code, siginfo.si_addr)) { | |
536 | sigbus_reraise(); | |
537 | } | |
538 | break; | |
539 | default: | |
540 | break; | |
541 | } | |
542 | ||
543 | r = sigpending(&chkset); | |
544 | if (r == -1) { | |
545 | perror("sigpending"); | |
546 | exit(1); | |
547 | } | |
548 | } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS)); | |
1ab3c6c0 JK |
549 | } |
550 | ||
6d9cb73c JK |
551 | #else /* !CONFIG_LINUX */ |
552 | ||
553 | static void qemu_init_sigbus(void) | |
554 | { | |
555 | } | |
1ab3c6c0 | 556 | |
9349b4f9 | 557 | static void qemu_kvm_eat_signals(CPUArchState *env) |
1ab3c6c0 JK |
558 | { |
559 | } | |
6d9cb73c JK |
560 | #endif /* !CONFIG_LINUX */ |
561 | ||
296af7c9 | 562 | #ifndef _WIN32 |
55f8d6ac JK |
563 | static void dummy_signal(int sig) |
564 | { | |
565 | } | |
55f8d6ac | 566 | |
9349b4f9 | 567 | static void qemu_kvm_init_cpu_signals(CPUArchState *env) |
714bd040 PB |
568 | { |
569 | int r; | |
570 | sigset_t set; | |
571 | struct sigaction sigact; | |
572 | ||
573 | memset(&sigact, 0, sizeof(sigact)); | |
574 | sigact.sa_handler = dummy_signal; | |
575 | sigaction(SIG_IPI, &sigact, NULL); | |
576 | ||
714bd040 PB |
577 | pthread_sigmask(SIG_BLOCK, NULL, &set); |
578 | sigdelset(&set, SIG_IPI); | |
714bd040 PB |
579 | sigdelset(&set, SIGBUS); |
580 | r = kvm_set_signal_mask(env, &set); | |
581 | if (r) { | |
582 | fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r)); | |
583 | exit(1); | |
584 | } | |
585 | } | |
586 | ||
587 | static void qemu_tcg_init_cpu_signals(void) | |
588 | { | |
714bd040 PB |
589 | sigset_t set; |
590 | struct sigaction sigact; | |
591 | ||
592 | memset(&sigact, 0, sizeof(sigact)); | |
593 | sigact.sa_handler = cpu_signal; | |
594 | sigaction(SIG_IPI, &sigact, NULL); | |
595 | ||
596 | sigemptyset(&set); | |
597 | sigaddset(&set, SIG_IPI); | |
598 | pthread_sigmask(SIG_UNBLOCK, &set, NULL); | |
714bd040 PB |
599 | } |
600 | ||
55f8d6ac | 601 | #else /* _WIN32 */ |
9349b4f9 | 602 | static void qemu_kvm_init_cpu_signals(CPUArchState *env) |
ff48eb5f | 603 | { |
714bd040 PB |
604 | abort(); |
605 | } | |
ff48eb5f | 606 | |
714bd040 PB |
607 | static void qemu_tcg_init_cpu_signals(void) |
608 | { | |
ff48eb5f | 609 | } |
714bd040 | 610 | #endif /* _WIN32 */ |
ff48eb5f | 611 | |
b2532d88 | 612 | static QemuMutex qemu_global_mutex; |
46daff13 PB |
613 | static QemuCond qemu_io_proceeded_cond; |
614 | static bool iothread_requesting_mutex; | |
296af7c9 BS |
615 | |
616 | static QemuThread io_thread; | |
617 | ||
618 | static QemuThread *tcg_cpu_thread; | |
619 | static QemuCond *tcg_halt_cond; | |
620 | ||
296af7c9 BS |
621 | /* cpu creation */ |
622 | static QemuCond qemu_cpu_cond; | |
623 | /* system init */ | |
296af7c9 | 624 | static QemuCond qemu_pause_cond; |
e82bcec2 | 625 | static QemuCond qemu_work_cond; |
296af7c9 | 626 | |
d3b12f5d | 627 | void qemu_init_cpu_loop(void) |
296af7c9 | 628 | { |
6d9cb73c | 629 | qemu_init_sigbus(); |
ed94592b | 630 | qemu_cond_init(&qemu_cpu_cond); |
ed94592b AL |
631 | qemu_cond_init(&qemu_pause_cond); |
632 | qemu_cond_init(&qemu_work_cond); | |
46daff13 | 633 | qemu_cond_init(&qemu_io_proceeded_cond); |
296af7c9 | 634 | qemu_mutex_init(&qemu_global_mutex); |
296af7c9 | 635 | |
b7680cb6 | 636 | qemu_thread_get_self(&io_thread); |
296af7c9 BS |
637 | } |
638 | ||
9349b4f9 | 639 | void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data) |
e82bcec2 | 640 | { |
60e82579 | 641 | CPUState *cpu = ENV_GET_CPU(env); |
e82bcec2 MT |
642 | struct qemu_work_item wi; |
643 | ||
60e82579 | 644 | if (qemu_cpu_is_self(cpu)) { |
e82bcec2 MT |
645 | func(data); |
646 | return; | |
647 | } | |
648 | ||
649 | wi.func = func; | |
650 | wi.data = data; | |
0ab07c62 | 651 | if (!env->queued_work_first) { |
e82bcec2 | 652 | env->queued_work_first = &wi; |
0ab07c62 | 653 | } else { |
e82bcec2 | 654 | env->queued_work_last->next = &wi; |
0ab07c62 | 655 | } |
e82bcec2 MT |
656 | env->queued_work_last = &wi; |
657 | wi.next = NULL; | |
658 | wi.done = false; | |
659 | ||
660 | qemu_cpu_kick(env); | |
661 | while (!wi.done) { | |
9349b4f9 | 662 | CPUArchState *self_env = cpu_single_env; |
e82bcec2 MT |
663 | |
664 | qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex); | |
665 | cpu_single_env = self_env; | |
666 | } | |
667 | } | |
668 | ||
9349b4f9 | 669 | static void flush_queued_work(CPUArchState *env) |
e82bcec2 MT |
670 | { |
671 | struct qemu_work_item *wi; | |
672 | ||
0ab07c62 | 673 | if (!env->queued_work_first) { |
e82bcec2 | 674 | return; |
0ab07c62 | 675 | } |
e82bcec2 MT |
676 | |
677 | while ((wi = env->queued_work_first)) { | |
678 | env->queued_work_first = wi->next; | |
679 | wi->func(wi->data); | |
680 | wi->done = true; | |
681 | } | |
682 | env->queued_work_last = NULL; | |
683 | qemu_cond_broadcast(&qemu_work_cond); | |
684 | } | |
685 | ||
9349b4f9 | 686 | static void qemu_wait_io_event_common(CPUArchState *env) |
296af7c9 | 687 | { |
216fc9a4 AF |
688 | CPUState *cpu = ENV_GET_CPU(env); |
689 | ||
296af7c9 BS |
690 | if (env->stop) { |
691 | env->stop = 0; | |
692 | env->stopped = 1; | |
693 | qemu_cond_signal(&qemu_pause_cond); | |
694 | } | |
e82bcec2 | 695 | flush_queued_work(env); |
216fc9a4 | 696 | cpu->thread_kicked = false; |
296af7c9 BS |
697 | } |
698 | ||
6cabe1f3 | 699 | static void qemu_tcg_wait_io_event(void) |
296af7c9 | 700 | { |
9349b4f9 | 701 | CPUArchState *env; |
6cabe1f3 | 702 | |
16400322 | 703 | while (all_cpu_threads_idle()) { |
ab33fcda PB |
704 | /* Start accounting real time to the virtual clock if the CPUs |
705 | are idle. */ | |
706 | qemu_clock_warp(vm_clock); | |
9705fbb5 | 707 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); |
16400322 | 708 | } |
296af7c9 | 709 | |
46daff13 PB |
710 | while (iothread_requesting_mutex) { |
711 | qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex); | |
712 | } | |
6cabe1f3 JK |
713 | |
714 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
715 | qemu_wait_io_event_common(env); | |
716 | } | |
296af7c9 BS |
717 | } |
718 | ||
9349b4f9 | 719 | static void qemu_kvm_wait_io_event(CPUArchState *env) |
296af7c9 | 720 | { |
16400322 | 721 | while (cpu_thread_is_idle(env)) { |
9705fbb5 | 722 | qemu_cond_wait(env->halt_cond, &qemu_global_mutex); |
16400322 | 723 | } |
296af7c9 | 724 | |
5db5bdac | 725 | qemu_kvm_eat_signals(env); |
296af7c9 BS |
726 | qemu_wait_io_event_common(env); |
727 | } | |
728 | ||
7e97cd88 | 729 | static void *qemu_kvm_cpu_thread_fn(void *arg) |
296af7c9 | 730 | { |
9349b4f9 | 731 | CPUArchState *env = arg; |
814e612e | 732 | CPUState *cpu = ENV_GET_CPU(env); |
84b4915d | 733 | int r; |
296af7c9 | 734 | |
6164e6d6 | 735 | qemu_mutex_lock(&qemu_global_mutex); |
814e612e | 736 | qemu_thread_get_self(cpu->thread); |
dc7a09cf | 737 | env->thread_id = qemu_get_thread_id(); |
e479c207 | 738 | cpu_single_env = env; |
296af7c9 | 739 | |
84b4915d JK |
740 | r = kvm_init_vcpu(env); |
741 | if (r < 0) { | |
742 | fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r)); | |
743 | exit(1); | |
744 | } | |
296af7c9 | 745 | |
55f8d6ac | 746 | qemu_kvm_init_cpu_signals(env); |
296af7c9 BS |
747 | |
748 | /* signal CPU creation */ | |
61a46217 | 749 | cpu->created = true; |
296af7c9 BS |
750 | qemu_cond_signal(&qemu_cpu_cond); |
751 | ||
296af7c9 | 752 | while (1) { |
0ab07c62 | 753 | if (cpu_can_run(env)) { |
6792a57b | 754 | r = kvm_cpu_exec(env); |
83f338f7 | 755 | if (r == EXCP_DEBUG) { |
1009d2ed | 756 | cpu_handle_guest_debug(env); |
83f338f7 | 757 | } |
0ab07c62 | 758 | } |
296af7c9 BS |
759 | qemu_kvm_wait_io_event(env); |
760 | } | |
761 | ||
762 | return NULL; | |
763 | } | |
764 | ||
c7f0f3b1 AL |
765 | static void *qemu_dummy_cpu_thread_fn(void *arg) |
766 | { | |
767 | #ifdef _WIN32 | |
768 | fprintf(stderr, "qtest is not supported under Windows\n"); | |
769 | exit(1); | |
770 | #else | |
771 | CPUArchState *env = arg; | |
814e612e | 772 | CPUState *cpu = ENV_GET_CPU(env); |
c7f0f3b1 AL |
773 | sigset_t waitset; |
774 | int r; | |
775 | ||
776 | qemu_mutex_lock_iothread(); | |
814e612e | 777 | qemu_thread_get_self(cpu->thread); |
c7f0f3b1 AL |
778 | env->thread_id = qemu_get_thread_id(); |
779 | ||
780 | sigemptyset(&waitset); | |
781 | sigaddset(&waitset, SIG_IPI); | |
782 | ||
783 | /* signal CPU creation */ | |
61a46217 | 784 | cpu->created = true; |
c7f0f3b1 AL |
785 | qemu_cond_signal(&qemu_cpu_cond); |
786 | ||
787 | cpu_single_env = env; | |
788 | while (1) { | |
789 | cpu_single_env = NULL; | |
790 | qemu_mutex_unlock_iothread(); | |
791 | do { | |
792 | int sig; | |
793 | r = sigwait(&waitset, &sig); | |
794 | } while (r == -1 && (errno == EAGAIN || errno == EINTR)); | |
795 | if (r == -1) { | |
796 | perror("sigwait"); | |
797 | exit(1); | |
798 | } | |
799 | qemu_mutex_lock_iothread(); | |
800 | cpu_single_env = env; | |
801 | qemu_wait_io_event_common(env); | |
802 | } | |
803 | ||
804 | return NULL; | |
805 | #endif | |
806 | } | |
807 | ||
bdb7ca67 JK |
808 | static void tcg_exec_all(void); |
809 | ||
7e97cd88 | 810 | static void *qemu_tcg_cpu_thread_fn(void *arg) |
296af7c9 | 811 | { |
9349b4f9 | 812 | CPUArchState *env = arg; |
814e612e | 813 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 | 814 | |
55f8d6ac | 815 | qemu_tcg_init_cpu_signals(); |
814e612e | 816 | qemu_thread_get_self(cpu->thread); |
296af7c9 BS |
817 | |
818 | /* signal CPU creation */ | |
819 | qemu_mutex_lock(&qemu_global_mutex); | |
0ab07c62 | 820 | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
61a46217 | 821 | cpu = ENV_GET_CPU(env); |
dc7a09cf | 822 | env->thread_id = qemu_get_thread_id(); |
61a46217 | 823 | cpu->created = true; |
0ab07c62 | 824 | } |
296af7c9 BS |
825 | qemu_cond_signal(&qemu_cpu_cond); |
826 | ||
fa7d1867 JK |
827 | /* wait for initial kick-off after machine start */ |
828 | while (first_cpu->stopped) { | |
829 | qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex); | |
8e564b4e JK |
830 | |
831 | /* process any pending work */ | |
832 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
833 | qemu_wait_io_event_common(env); | |
834 | } | |
0ab07c62 | 835 | } |
296af7c9 BS |
836 | |
837 | while (1) { | |
bdb7ca67 | 838 | tcg_exec_all(); |
946fb27c | 839 | if (use_icount && qemu_clock_deadline(vm_clock) <= 0) { |
3b2319a3 PB |
840 | qemu_notify_event(); |
841 | } | |
6cabe1f3 | 842 | qemu_tcg_wait_io_event(); |
296af7c9 BS |
843 | } |
844 | ||
845 | return NULL; | |
846 | } | |
847 | ||
2ff09a40 | 848 | static void qemu_cpu_kick_thread(CPUState *cpu) |
cc015e9a PB |
849 | { |
850 | #ifndef _WIN32 | |
851 | int err; | |
852 | ||
814e612e | 853 | err = pthread_kill(cpu->thread->thread, SIG_IPI); |
cc015e9a PB |
854 | if (err) { |
855 | fprintf(stderr, "qemu:%s: %s", __func__, strerror(err)); | |
856 | exit(1); | |
857 | } | |
858 | #else /* _WIN32 */ | |
60e82579 | 859 | if (!qemu_cpu_is_self(cpu)) { |
bcba2a72 | 860 | SuspendThread(cpu->hThread); |
cc015e9a | 861 | cpu_signal(0); |
bcba2a72 | 862 | ResumeThread(cpu->hThread); |
cc015e9a PB |
863 | } |
864 | #endif | |
865 | } | |
866 | ||
296af7c9 BS |
867 | void qemu_cpu_kick(void *_env) |
868 | { | |
9349b4f9 | 869 | CPUArchState *env = _env; |
216fc9a4 | 870 | CPUState *cpu = ENV_GET_CPU(env); |
296af7c9 | 871 | |
296af7c9 | 872 | qemu_cond_broadcast(env->halt_cond); |
216fc9a4 | 873 | if (!tcg_enabled() && !cpu->thread_kicked) { |
2ff09a40 | 874 | qemu_cpu_kick_thread(cpu); |
216fc9a4 | 875 | cpu->thread_kicked = true; |
aa2c364b | 876 | } |
296af7c9 BS |
877 | } |
878 | ||
46d62fac | 879 | void qemu_cpu_kick_self(void) |
296af7c9 | 880 | { |
b55c22c6 | 881 | #ifndef _WIN32 |
46d62fac | 882 | assert(cpu_single_env); |
216fc9a4 | 883 | CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env); |
296af7c9 | 884 | |
216fc9a4 | 885 | if (!cpu_single_cpu->thread_kicked) { |
2ff09a40 | 886 | qemu_cpu_kick_thread(cpu_single_cpu); |
216fc9a4 | 887 | cpu_single_cpu->thread_kicked = true; |
296af7c9 | 888 | } |
b55c22c6 PB |
889 | #else |
890 | abort(); | |
891 | #endif | |
296af7c9 BS |
892 | } |
893 | ||
60e82579 | 894 | bool qemu_cpu_is_self(CPUState *cpu) |
296af7c9 | 895 | { |
814e612e | 896 | return qemu_thread_is_self(cpu->thread); |
296af7c9 BS |
897 | } |
898 | ||
aa723c23 JQ |
899 | static bool qemu_in_vcpu_thread(void) |
900 | { | |
60e82579 | 901 | return cpu_single_env && qemu_cpu_is_self(ENV_GET_CPU(cpu_single_env)); |
aa723c23 JQ |
902 | } |
903 | ||
296af7c9 BS |
904 | void qemu_mutex_lock_iothread(void) |
905 | { | |
c7f0f3b1 | 906 | if (!tcg_enabled()) { |
296af7c9 | 907 | qemu_mutex_lock(&qemu_global_mutex); |
1a28cac3 | 908 | } else { |
46daff13 | 909 | iothread_requesting_mutex = true; |
1a28cac3 | 910 | if (qemu_mutex_trylock(&qemu_global_mutex)) { |
2ff09a40 | 911 | qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu)); |
1a28cac3 MT |
912 | qemu_mutex_lock(&qemu_global_mutex); |
913 | } | |
46daff13 PB |
914 | iothread_requesting_mutex = false; |
915 | qemu_cond_broadcast(&qemu_io_proceeded_cond); | |
1a28cac3 | 916 | } |
296af7c9 BS |
917 | } |
918 | ||
919 | void qemu_mutex_unlock_iothread(void) | |
920 | { | |
921 | qemu_mutex_unlock(&qemu_global_mutex); | |
922 | } | |
923 | ||
924 | static int all_vcpus_paused(void) | |
925 | { | |
9349b4f9 | 926 | CPUArchState *penv = first_cpu; |
296af7c9 BS |
927 | |
928 | while (penv) { | |
0ab07c62 | 929 | if (!penv->stopped) { |
296af7c9 | 930 | return 0; |
0ab07c62 | 931 | } |
5207a5e0 | 932 | penv = penv->next_cpu; |
296af7c9 BS |
933 | } |
934 | ||
935 | return 1; | |
936 | } | |
937 | ||
938 | void pause_all_vcpus(void) | |
939 | { | |
9349b4f9 | 940 | CPUArchState *penv = first_cpu; |
296af7c9 | 941 | |
a5c57d64 | 942 | qemu_clock_enable(vm_clock, false); |
296af7c9 BS |
943 | while (penv) { |
944 | penv->stop = 1; | |
296af7c9 | 945 | qemu_cpu_kick(penv); |
5207a5e0 | 946 | penv = penv->next_cpu; |
296af7c9 BS |
947 | } |
948 | ||
aa723c23 | 949 | if (qemu_in_vcpu_thread()) { |
d798e974 JK |
950 | cpu_stop_current(); |
951 | if (!kvm_enabled()) { | |
952 | while (penv) { | |
953 | penv->stop = 0; | |
954 | penv->stopped = 1; | |
955 | penv = penv->next_cpu; | |
956 | } | |
957 | return; | |
958 | } | |
959 | } | |
960 | ||
296af7c9 | 961 | while (!all_vcpus_paused()) { |
be7d6c57 | 962 | qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex); |
296af7c9 BS |
963 | penv = first_cpu; |
964 | while (penv) { | |
1fbb22e5 | 965 | qemu_cpu_kick(penv); |
5207a5e0 | 966 | penv = penv->next_cpu; |
296af7c9 BS |
967 | } |
968 | } | |
969 | } | |
970 | ||
971 | void resume_all_vcpus(void) | |
972 | { | |
9349b4f9 | 973 | CPUArchState *penv = first_cpu; |
296af7c9 | 974 | |
47113ab6 | 975 | qemu_clock_enable(vm_clock, true); |
296af7c9 BS |
976 | while (penv) { |
977 | penv->stop = 0; | |
978 | penv->stopped = 0; | |
296af7c9 | 979 | qemu_cpu_kick(penv); |
5207a5e0 | 980 | penv = penv->next_cpu; |
296af7c9 BS |
981 | } |
982 | } | |
983 | ||
7e97cd88 | 984 | static void qemu_tcg_init_vcpu(void *_env) |
296af7c9 | 985 | { |
9349b4f9 | 986 | CPUArchState *env = _env; |
bcba2a72 | 987 | CPUState *cpu = ENV_GET_CPU(env); |
0ab07c62 | 988 | |
296af7c9 BS |
989 | /* share a single thread for all cpus with TCG */ |
990 | if (!tcg_cpu_thread) { | |
814e612e | 991 | cpu->thread = g_malloc0(sizeof(QemuThread)); |
7267c094 | 992 | env->halt_cond = g_malloc0(sizeof(QemuCond)); |
296af7c9 | 993 | qemu_cond_init(env->halt_cond); |
fa7d1867 | 994 | tcg_halt_cond = env->halt_cond; |
814e612e | 995 | qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, env, |
1ecf47bf PB |
996 | QEMU_THREAD_JOINABLE); |
997 | #ifdef _WIN32 | |
814e612e | 998 | cpu->hThread = qemu_thread_get_handle(cpu->thread); |
1ecf47bf | 999 | #endif |
61a46217 | 1000 | while (!cpu->created) { |
18a85728 | 1001 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1002 | } |
814e612e | 1003 | tcg_cpu_thread = cpu->thread; |
296af7c9 | 1004 | } else { |
814e612e | 1005 | cpu->thread = tcg_cpu_thread; |
296af7c9 BS |
1006 | env->halt_cond = tcg_halt_cond; |
1007 | } | |
1008 | } | |
1009 | ||
9349b4f9 | 1010 | static void qemu_kvm_start_vcpu(CPUArchState *env) |
296af7c9 | 1011 | { |
814e612e AF |
1012 | CPUState *cpu = ENV_GET_CPU(env); |
1013 | ||
1014 | cpu->thread = g_malloc0(sizeof(QemuThread)); | |
7267c094 | 1015 | env->halt_cond = g_malloc0(sizeof(QemuCond)); |
296af7c9 | 1016 | qemu_cond_init(env->halt_cond); |
814e612e | 1017 | qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env, |
1ecf47bf | 1018 | QEMU_THREAD_JOINABLE); |
61a46217 | 1019 | while (!cpu->created) { |
18a85728 | 1020 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
0ab07c62 | 1021 | } |
296af7c9 BS |
1022 | } |
1023 | ||
c7f0f3b1 AL |
1024 | static void qemu_dummy_start_vcpu(CPUArchState *env) |
1025 | { | |
814e612e AF |
1026 | CPUState *cpu = ENV_GET_CPU(env); |
1027 | ||
1028 | cpu->thread = g_malloc0(sizeof(QemuThread)); | |
c7f0f3b1 AL |
1029 | env->halt_cond = g_malloc0(sizeof(QemuCond)); |
1030 | qemu_cond_init(env->halt_cond); | |
814e612e | 1031 | qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env, |
c7f0f3b1 | 1032 | QEMU_THREAD_JOINABLE); |
61a46217 | 1033 | while (!cpu->created) { |
c7f0f3b1 AL |
1034 | qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex); |
1035 | } | |
1036 | } | |
1037 | ||
296af7c9 BS |
1038 | void qemu_init_vcpu(void *_env) |
1039 | { | |
9349b4f9 | 1040 | CPUArchState *env = _env; |
296af7c9 BS |
1041 | |
1042 | env->nr_cores = smp_cores; | |
1043 | env->nr_threads = smp_threads; | |
fa7d1867 | 1044 | env->stopped = 1; |
0ab07c62 | 1045 | if (kvm_enabled()) { |
7e97cd88 | 1046 | qemu_kvm_start_vcpu(env); |
c7f0f3b1 | 1047 | } else if (tcg_enabled()) { |
7e97cd88 | 1048 | qemu_tcg_init_vcpu(env); |
c7f0f3b1 AL |
1049 | } else { |
1050 | qemu_dummy_start_vcpu(env); | |
0ab07c62 | 1051 | } |
296af7c9 BS |
1052 | } |
1053 | ||
b4a3d965 | 1054 | void cpu_stop_current(void) |
296af7c9 | 1055 | { |
b4a3d965 | 1056 | if (cpu_single_env) { |
67bb172f | 1057 | cpu_single_env->stop = 0; |
b4a3d965 JK |
1058 | cpu_single_env->stopped = 1; |
1059 | cpu_exit(cpu_single_env); | |
67bb172f | 1060 | qemu_cond_signal(&qemu_pause_cond); |
b4a3d965 | 1061 | } |
296af7c9 BS |
1062 | } |
1063 | ||
1dfb4dd9 | 1064 | void vm_stop(RunState state) |
296af7c9 | 1065 | { |
aa723c23 | 1066 | if (qemu_in_vcpu_thread()) { |
1dfb4dd9 | 1067 | qemu_system_vmstop_request(state); |
296af7c9 BS |
1068 | /* |
1069 | * FIXME: should not return to device code in case | |
1070 | * vm_stop() has been requested. | |
1071 | */ | |
b4a3d965 | 1072 | cpu_stop_current(); |
296af7c9 BS |
1073 | return; |
1074 | } | |
1dfb4dd9 | 1075 | do_vm_stop(state); |
296af7c9 BS |
1076 | } |
1077 | ||
8a9236f1 LC |
1078 | /* does a state transition even if the VM is already stopped, |
1079 | current state is forgotten forever */ | |
1080 | void vm_stop_force_state(RunState state) | |
1081 | { | |
1082 | if (runstate_is_running()) { | |
1083 | vm_stop(state); | |
1084 | } else { | |
1085 | runstate_set(state); | |
1086 | } | |
1087 | } | |
1088 | ||
9349b4f9 | 1089 | static int tcg_cpu_exec(CPUArchState *env) |
296af7c9 BS |
1090 | { |
1091 | int ret; | |
1092 | #ifdef CONFIG_PROFILER | |
1093 | int64_t ti; | |
1094 | #endif | |
1095 | ||
1096 | #ifdef CONFIG_PROFILER | |
1097 | ti = profile_getclock(); | |
1098 | #endif | |
1099 | if (use_icount) { | |
1100 | int64_t count; | |
1101 | int decr; | |
1102 | qemu_icount -= (env->icount_decr.u16.low + env->icount_extra); | |
1103 | env->icount_decr.u16.low = 0; | |
1104 | env->icount_extra = 0; | |
946fb27c | 1105 | count = qemu_icount_round(qemu_clock_deadline(vm_clock)); |
296af7c9 BS |
1106 | qemu_icount += count; |
1107 | decr = (count > 0xffff) ? 0xffff : count; | |
1108 | count -= decr; | |
1109 | env->icount_decr.u16.low = decr; | |
1110 | env->icount_extra = count; | |
1111 | } | |
1112 | ret = cpu_exec(env); | |
1113 | #ifdef CONFIG_PROFILER | |
1114 | qemu_time += profile_getclock() - ti; | |
1115 | #endif | |
1116 | if (use_icount) { | |
1117 | /* Fold pending instructions back into the | |
1118 | instruction counter, and clear the interrupt flag. */ | |
1119 | qemu_icount -= (env->icount_decr.u16.low | |
1120 | + env->icount_extra); | |
1121 | env->icount_decr.u32 = 0; | |
1122 | env->icount_extra = 0; | |
1123 | } | |
1124 | return ret; | |
1125 | } | |
1126 | ||
bdb7ca67 | 1127 | static void tcg_exec_all(void) |
296af7c9 | 1128 | { |
9a36085b JK |
1129 | int r; |
1130 | ||
ab33fcda PB |
1131 | /* Account partial waits to the vm_clock. */ |
1132 | qemu_clock_warp(vm_clock); | |
1133 | ||
0ab07c62 | 1134 | if (next_cpu == NULL) { |
296af7c9 | 1135 | next_cpu = first_cpu; |
0ab07c62 | 1136 | } |
c629a4bc | 1137 | for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) { |
9349b4f9 | 1138 | CPUArchState *env = next_cpu; |
296af7c9 BS |
1139 | |
1140 | qemu_clock_enable(vm_clock, | |
345f4426 | 1141 | (env->singlestep_enabled & SSTEP_NOTIMER) == 0); |
296af7c9 | 1142 | |
3c638d06 | 1143 | if (cpu_can_run(env)) { |
bdb7ca67 | 1144 | r = tcg_cpu_exec(env); |
9a36085b | 1145 | if (r == EXCP_DEBUG) { |
1009d2ed | 1146 | cpu_handle_guest_debug(env); |
3c638d06 JK |
1147 | break; |
1148 | } | |
df646dfd | 1149 | } else if (env->stop || env->stopped) { |
296af7c9 BS |
1150 | break; |
1151 | } | |
1152 | } | |
c629a4bc | 1153 | exit_request = 0; |
296af7c9 BS |
1154 | } |
1155 | ||
1156 | void set_numa_modes(void) | |
1157 | { | |
9349b4f9 | 1158 | CPUArchState *env; |
296af7c9 BS |
1159 | int i; |
1160 | ||
1161 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
1162 | for (i = 0; i < nb_numa_nodes; i++) { | |
ee785fed | 1163 | if (test_bit(env->cpu_index, node_cpumask[i])) { |
296af7c9 BS |
1164 | env->numa_node = i; |
1165 | } | |
1166 | } | |
1167 | } | |
1168 | } | |
1169 | ||
1170 | void set_cpu_log(const char *optarg) | |
1171 | { | |
1172 | int mask; | |
1173 | const CPULogItem *item; | |
1174 | ||
1175 | mask = cpu_str_to_log_mask(optarg); | |
1176 | if (!mask) { | |
1177 | printf("Log items (comma separated):\n"); | |
1178 | for (item = cpu_log_items; item->mask != 0; item++) { | |
1179 | printf("%-10s %s\n", item->name, item->help); | |
1180 | } | |
1181 | exit(1); | |
1182 | } | |
1183 | cpu_set_log(mask); | |
1184 | } | |
29e922b6 | 1185 | |
c235d738 MF |
1186 | void set_cpu_log_filename(const char *optarg) |
1187 | { | |
1188 | cpu_set_log_filename(optarg); | |
1189 | } | |
1190 | ||
9a78eead | 1191 | void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg) |
262353cb BS |
1192 | { |
1193 | /* XXX: implement xxx_cpu_list for targets that still miss it */ | |
e916cbf8 PM |
1194 | #if defined(cpu_list) |
1195 | cpu_list(f, cpu_fprintf); | |
262353cb BS |
1196 | #endif |
1197 | } | |
de0b36b6 LC |
1198 | |
1199 | CpuInfoList *qmp_query_cpus(Error **errp) | |
1200 | { | |
1201 | CpuInfoList *head = NULL, *cur_item = NULL; | |
9349b4f9 | 1202 | CPUArchState *env; |
de0b36b6 LC |
1203 | |
1204 | for(env = first_cpu; env != NULL; env = env->next_cpu) { | |
1205 | CpuInfoList *info; | |
1206 | ||
1207 | cpu_synchronize_state(env); | |
1208 | ||
1209 | info = g_malloc0(sizeof(*info)); | |
1210 | info->value = g_malloc0(sizeof(*info->value)); | |
1211 | info->value->CPU = env->cpu_index; | |
1212 | info->value->current = (env == first_cpu); | |
1213 | info->value->halted = env->halted; | |
1214 | info->value->thread_id = env->thread_id; | |
1215 | #if defined(TARGET_I386) | |
1216 | info->value->has_pc = true; | |
1217 | info->value->pc = env->eip + env->segs[R_CS].base; | |
1218 | #elif defined(TARGET_PPC) | |
1219 | info->value->has_nip = true; | |
1220 | info->value->nip = env->nip; | |
1221 | #elif defined(TARGET_SPARC) | |
1222 | info->value->has_pc = true; | |
1223 | info->value->pc = env->pc; | |
1224 | info->value->has_npc = true; | |
1225 | info->value->npc = env->npc; | |
1226 | #elif defined(TARGET_MIPS) | |
1227 | info->value->has_PC = true; | |
1228 | info->value->PC = env->active_tc.PC; | |
1229 | #endif | |
1230 | ||
1231 | /* XXX: waiting for the qapi to support GSList */ | |
1232 | if (!cur_item) { | |
1233 | head = cur_item = info; | |
1234 | } else { | |
1235 | cur_item->next = info; | |
1236 | cur_item = info; | |
1237 | } | |
1238 | } | |
1239 | ||
1240 | return head; | |
1241 | } | |
0cfd6a9a LC |
1242 | |
1243 | void qmp_memsave(int64_t addr, int64_t size, const char *filename, | |
1244 | bool has_cpu, int64_t cpu_index, Error **errp) | |
1245 | { | |
1246 | FILE *f; | |
1247 | uint32_t l; | |
9349b4f9 | 1248 | CPUArchState *env; |
0cfd6a9a LC |
1249 | uint8_t buf[1024]; |
1250 | ||
1251 | if (!has_cpu) { | |
1252 | cpu_index = 0; | |
1253 | } | |
1254 | ||
1255 | for (env = first_cpu; env; env = env->next_cpu) { | |
1256 | if (cpu_index == env->cpu_index) { | |
1257 | break; | |
1258 | } | |
1259 | } | |
1260 | ||
1261 | if (env == NULL) { | |
1262 | error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", | |
1263 | "a CPU number"); | |
1264 | return; | |
1265 | } | |
1266 | ||
1267 | f = fopen(filename, "wb"); | |
1268 | if (!f) { | |
1269 | error_set(errp, QERR_OPEN_FILE_FAILED, filename); | |
1270 | return; | |
1271 | } | |
1272 | ||
1273 | while (size != 0) { | |
1274 | l = sizeof(buf); | |
1275 | if (l > size) | |
1276 | l = size; | |
1277 | cpu_memory_rw_debug(env, addr, buf, l, 0); | |
1278 | if (fwrite(buf, 1, l, f) != l) { | |
1279 | error_set(errp, QERR_IO_ERROR); | |
1280 | goto exit; | |
1281 | } | |
1282 | addr += l; | |
1283 | size -= l; | |
1284 | } | |
1285 | ||
1286 | exit: | |
1287 | fclose(f); | |
1288 | } | |
6d3962bf LC |
1289 | |
1290 | void qmp_pmemsave(int64_t addr, int64_t size, const char *filename, | |
1291 | Error **errp) | |
1292 | { | |
1293 | FILE *f; | |
1294 | uint32_t l; | |
1295 | uint8_t buf[1024]; | |
1296 | ||
1297 | f = fopen(filename, "wb"); | |
1298 | if (!f) { | |
1299 | error_set(errp, QERR_OPEN_FILE_FAILED, filename); | |
1300 | return; | |
1301 | } | |
1302 | ||
1303 | while (size != 0) { | |
1304 | l = sizeof(buf); | |
1305 | if (l > size) | |
1306 | l = size; | |
1307 | cpu_physical_memory_rw(addr, buf, l, 0); | |
1308 | if (fwrite(buf, 1, l, f) != l) { | |
1309 | error_set(errp, QERR_IO_ERROR); | |
1310 | goto exit; | |
1311 | } | |
1312 | addr += l; | |
1313 | size -= l; | |
1314 | } | |
1315 | ||
1316 | exit: | |
1317 | fclose(f); | |
1318 | } | |
ab49ab5c LC |
1319 | |
1320 | void qmp_inject_nmi(Error **errp) | |
1321 | { | |
1322 | #if defined(TARGET_I386) | |
9349b4f9 | 1323 | CPUArchState *env; |
ab49ab5c LC |
1324 | |
1325 | for (env = first_cpu; env != NULL; env = env->next_cpu) { | |
02c09195 JK |
1326 | if (!env->apic_state) { |
1327 | cpu_interrupt(env, CPU_INTERRUPT_NMI); | |
1328 | } else { | |
1329 | apic_deliver_nmi(env->apic_state); | |
1330 | } | |
ab49ab5c LC |
1331 | } |
1332 | #else | |
1333 | error_set(errp, QERR_UNSUPPORTED); | |
1334 | #endif | |
1335 | } |