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1/* Interface between the opcode library and its callers.
2 Written by Cygnus Support, 1993.
3
4 The opcode library (libopcodes.a) provides instruction decoders for
5 a large variety of instruction sets, callable with an identical
6 interface, for making instruction-processing programs more independent
7 of the instruction set being processed. */
8
9#ifndef DIS_ASM_H
10#define DIS_ASM_H
11
12#include <stdio.h>
04369ff2 13#include <string.h>
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14#include <inttypes.h>
15
16#define PARAMS(x) x
17typedef void *PTR;
18typedef uint64_t bfd_vma;
19typedef uint8_t bfd_byte;
20
21enum bfd_flavour {
22 bfd_target_unknown_flavour,
23 bfd_target_aout_flavour,
24 bfd_target_coff_flavour,
25 bfd_target_ecoff_flavour,
26 bfd_target_elf_flavour,
27 bfd_target_ieee_flavour,
28 bfd_target_nlm_flavour,
29 bfd_target_oasys_flavour,
30 bfd_target_tekhex_flavour,
31 bfd_target_srec_flavour,
32 bfd_target_ihex_flavour,
33 bfd_target_som_flavour,
34 bfd_target_os9k_flavour,
35 bfd_target_versados_flavour,
36 bfd_target_msdos_flavour,
37 bfd_target_evax_flavour
38};
39
40enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
41
42enum bfd_architecture
43{
44 bfd_arch_unknown, /* File arch not known */
45 bfd_arch_obscure, /* Arch known, not one of these */
46 bfd_arch_m68k, /* Motorola 68xxx */
47#define bfd_mach_m68000 1
48#define bfd_mach_m68008 2
49#define bfd_mach_m68010 3
50#define bfd_mach_m68020 4
51#define bfd_mach_m68030 5
52#define bfd_mach_m68040 6
53#define bfd_mach_m68060 7
54 bfd_arch_vax, /* DEC Vax */
55 bfd_arch_i960, /* Intel 960 */
56 /* The order of the following is important.
57 lower number indicates a machine type that
58 only accepts a subset of the instructions
59 available to machines with higher numbers.
60 The exception is the "ca", which is
61 incompatible with all other machines except
62 "core". */
63
64#define bfd_mach_i960_core 1
65#define bfd_mach_i960_ka_sa 2
66#define bfd_mach_i960_kb_sb 3
67#define bfd_mach_i960_mc 4
68#define bfd_mach_i960_xa 5
69#define bfd_mach_i960_ca 6
70#define bfd_mach_i960_jx 7
71#define bfd_mach_i960_hx 8
72
73 bfd_arch_a29k, /* AMD 29000 */
74 bfd_arch_sparc, /* SPARC */
75#define bfd_mach_sparc 1
aa0aa4fa 76/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */
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77#define bfd_mach_sparc_sparclet 2
78#define bfd_mach_sparc_sparclite 3
79#define bfd_mach_sparc_v8plus 4
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80#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */
81#define bfd_mach_sparc_sparclite_le 6
82#define bfd_mach_sparc_v9 7
83#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */
84#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */
85#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */
86/* Nonzero if MACH has the v9 instruction set. */
43d4145a 87#define bfd_mach_sparc_v9_p(mach) \
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88 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
89 && (mach) != bfd_mach_sparc_sparclite_le)
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90 bfd_arch_mips, /* MIPS Rxxxx */
91#define bfd_mach_mips3000 3000
92#define bfd_mach_mips3900 3900
93#define bfd_mach_mips4000 4000
94#define bfd_mach_mips4010 4010
95#define bfd_mach_mips4100 4100
96#define bfd_mach_mips4300 4300
97#define bfd_mach_mips4400 4400
98#define bfd_mach_mips4600 4600
99#define bfd_mach_mips4650 4650
100#define bfd_mach_mips5000 5000
101#define bfd_mach_mips6000 6000
102#define bfd_mach_mips8000 8000
103#define bfd_mach_mips10000 10000
104#define bfd_mach_mips16 16
105 bfd_arch_i386, /* Intel 386 */
106#define bfd_mach_i386_i386 0
107#define bfd_mach_i386_i8086 1
108 bfd_arch_we32k, /* AT&T WE32xxx */
109 bfd_arch_tahoe, /* CCI/Harris Tahoe */
110 bfd_arch_i860, /* Intel 860 */
111 bfd_arch_romp, /* IBM ROMP PC/RT */
112 bfd_arch_alliant, /* Alliant */
113 bfd_arch_convex, /* Convex */
114 bfd_arch_m88k, /* Motorola 88xxx */
115 bfd_arch_pyramid, /* Pyramid Technology */
116 bfd_arch_h8300, /* Hitachi H8/300 */
117#define bfd_mach_h8300 1
118#define bfd_mach_h8300h 2
119#define bfd_mach_h8300s 3
120 bfd_arch_powerpc, /* PowerPC */
121 bfd_arch_rs6000, /* IBM RS/6000 */
122 bfd_arch_hppa, /* HP PA RISC */
123 bfd_arch_d10v, /* Mitsubishi D10V */
124 bfd_arch_z8k, /* Zilog Z8000 */
125#define bfd_mach_z8001 1
126#define bfd_mach_z8002 2
127 bfd_arch_h8500, /* Hitachi H8/500 */
128 bfd_arch_sh, /* Hitachi SH */
129#define bfd_mach_sh 0
130#define bfd_mach_sh3 0x30
131#define bfd_mach_sh3e 0x3e
132#define bfd_mach_sh4 0x40
133 bfd_arch_alpha, /* Dec Alpha */
134 bfd_arch_arm, /* Advanced Risc Machines ARM */
135#define bfd_mach_arm_2 1
136#define bfd_mach_arm_2a 2
137#define bfd_mach_arm_3 3
138#define bfd_mach_arm_3M 4
139#define bfd_mach_arm_4 5
140#define bfd_mach_arm_4T 6
141 bfd_arch_ns32k, /* National Semiconductors ns32000 */
142 bfd_arch_w65, /* WDC 65816 */
143 bfd_arch_tic30, /* Texas Instruments TMS320C30 */
144 bfd_arch_v850, /* NEC V850 */
145#define bfd_mach_v850 0
146 bfd_arch_arc, /* Argonaut RISC Core */
147#define bfd_mach_arc_base 0
148 bfd_arch_m32r, /* Mitsubishi M32R/D */
149#define bfd_mach_m32r 0 /* backwards compatibility */
150 bfd_arch_mn10200, /* Matsushita MN10200 */
151 bfd_arch_mn10300, /* Matsushita MN10300 */
152 bfd_arch_last
153 };
154
155typedef struct symbol_cache_entry
156{
157 const char *name;
158 union
159 {
160 PTR p;
161 bfd_vma i;
162 } udata;
163} asymbol;
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164
165typedef int (*fprintf_ftype) PARAMS((FILE*, const char*, ...));
166
167enum dis_insn_type {
168 dis_noninsn, /* Not a valid instruction */
169 dis_nonbranch, /* Not a branch instruction */
170 dis_branch, /* Unconditional branch */
171 dis_condbranch, /* Conditional branch */
172 dis_jsr, /* Jump to subroutine */
173 dis_condjsr, /* Conditional jump to subroutine */
174 dis_dref, /* Data reference instruction */
175 dis_dref2 /* Two data references in instruction */
176};
177
178/* This struct is passed into the instruction decoding routine,
179 and is passed back out into each callback. The various fields are used
180 for conveying information from your main routine into your callbacks,
181 for passing information into the instruction decoders (such as the
182 addresses of the callback functions), or for passing information
183 back from the instruction decoders to their callers.
184
185 It must be initialized before it is first passed; this can be done
186 by hand, or using one of the initialization macros below. */
187
188typedef struct disassemble_info {
189 fprintf_ftype fprintf_func;
190 FILE *stream;
191 PTR application_data;
192
193 /* Target description. We could replace this with a pointer to the bfd,
194 but that would require one. There currently isn't any such requirement
195 so to avoid introducing one we record these explicitly. */
196 /* The bfd_flavour. This can be bfd_target_unknown_flavour. */
197 enum bfd_flavour flavour;
198 /* The bfd_arch value. */
199 enum bfd_architecture arch;
200 /* The bfd_mach value. */
201 unsigned long mach;
202 /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
203 enum bfd_endian endian;
204
205 /* An array of pointers to symbols either at the location being disassembled
206 or at the start of the function being disassembled. The array is sorted
207 so that the first symbol is intended to be the one used. The others are
208 present for any misc. purposes. This is not set reliably, but if it is
209 not NULL, it is correct. */
210 asymbol **symbols;
211 /* Number of symbols in array. */
212 int num_symbols;
213
214 /* For use by the disassembler.
215 The top 16 bits are reserved for public use (and are documented here).
216 The bottom 16 bits are for the internal use of the disassembler. */
217 unsigned long flags;
218#define INSN_HAS_RELOC 0x80000000
219 PTR private_data;
220
221 /* Function used to get bytes to disassemble. MEMADDR is the
222 address of the stuff to be disassembled, MYADDR is the address to
223 put the bytes in, and LENGTH is the number of bytes to read.
224 INFO is a pointer to this struct.
225 Returns an errno value or 0 for success. */
226 int (*read_memory_func)
227 PARAMS ((bfd_vma memaddr, bfd_byte *myaddr, int length,
228 struct disassemble_info *info));
229
230 /* Function which should be called if we get an error that we can't
231 recover from. STATUS is the errno value from read_memory_func and
232 MEMADDR is the address that we were trying to read. INFO is a
233 pointer to this struct. */
234 void (*memory_error_func)
235 PARAMS ((int status, bfd_vma memaddr, struct disassemble_info *info));
236
237 /* Function called to print ADDR. */
238 void (*print_address_func)
239 PARAMS ((bfd_vma addr, struct disassemble_info *info));
240
241 /* Function called to determine if there is a symbol at the given ADDR.
242 If there is, the function returns 1, otherwise it returns 0.
243 This is used by ports which support an overlay manager where
244 the overlay number is held in the top part of an address. In
245 some circumstances we want to include the overlay number in the
246 address, (normally because there is a symbol associated with
247 that address), but sometimes we want to mask out the overlay bits. */
248 int (* symbol_at_address_func)
249 PARAMS ((bfd_vma addr, struct disassemble_info * info));
250
251 /* These are for buffer_read_memory. */
252 bfd_byte *buffer;
253 bfd_vma buffer_vma;
254 int buffer_length;
255
256 /* This variable may be set by the instruction decoder. It suggests
257 the number of bytes objdump should display on a single line. If
258 the instruction decoder sets this, it should always set it to
259 the same value in order to get reasonable looking output. */
260 int bytes_per_line;
261
262 /* the next two variables control the way objdump displays the raw data */
263 /* For example, if bytes_per_line is 8 and bytes_per_chunk is 4, the */
264 /* output will look like this:
265 00: 00000000 00000000
266 with the chunks displayed according to "display_endian". */
267 int bytes_per_chunk;
268 enum bfd_endian display_endian;
269
270 /* Results from instruction decoders. Not all decoders yet support
271 this information. This info is set each time an instruction is
272 decoded, and is only valid for the last such instruction.
273
274 To determine whether this decoder supports this information, set
275 insn_info_valid to 0, decode an instruction, then check it. */
276
277 char insn_info_valid; /* Branch info has been set. */
278 char branch_delay_insns; /* How many sequential insn's will run before
279 a branch takes effect. (0 = normal) */
280 char data_size; /* Size of data reference in insn, in bytes */
281 enum dis_insn_type insn_type; /* Type of instruction */
282 bfd_vma target; /* Target address of branch or dref, if known;
283 zero if unknown. */
284 bfd_vma target2; /* Second target address for dref2 */
285
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286 /* Command line options specific to the target disassembler. */
287 char * disassembler_options;
288
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289} disassemble_info;
290
291\f
292/* Standard disassemblers. Disassemble one instruction at the given
293 target address. Return number of bytes processed. */
294typedef int (*disassembler_ftype)
295 PARAMS((bfd_vma, disassemble_info *));
296
297extern int print_insn_big_mips PARAMS ((bfd_vma, disassemble_info*));
298extern int print_insn_little_mips PARAMS ((bfd_vma, disassemble_info*));
299extern int print_insn_i386 PARAMS ((bfd_vma, disassemble_info*));
300extern int print_insn_m68k PARAMS ((bfd_vma, disassemble_info*));
301extern int print_insn_z8001 PARAMS ((bfd_vma, disassemble_info*));
302extern int print_insn_z8002 PARAMS ((bfd_vma, disassemble_info*));
303extern int print_insn_h8300 PARAMS ((bfd_vma, disassemble_info*));
304extern int print_insn_h8300h PARAMS ((bfd_vma, disassemble_info*));
305extern int print_insn_h8300s PARAMS ((bfd_vma, disassemble_info*));
306extern int print_insn_h8500 PARAMS ((bfd_vma, disassemble_info*));
307extern int print_insn_alpha PARAMS ((bfd_vma, disassemble_info*));
308extern disassembler_ftype arc_get_disassembler PARAMS ((int, int));
aa0aa4fa 309extern int print_insn_arm PARAMS ((bfd_vma, disassemble_info*));
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310extern int print_insn_sparc PARAMS ((bfd_vma, disassemble_info*));
311extern int print_insn_big_a29k PARAMS ((bfd_vma, disassemble_info*));
312extern int print_insn_little_a29k PARAMS ((bfd_vma, disassemble_info*));
313extern int print_insn_i960 PARAMS ((bfd_vma, disassemble_info*));
314extern int print_insn_sh PARAMS ((bfd_vma, disassemble_info*));
315extern int print_insn_shl PARAMS ((bfd_vma, disassemble_info*));
316extern int print_insn_hppa PARAMS ((bfd_vma, disassemble_info*));
317extern int print_insn_m32r PARAMS ((bfd_vma, disassemble_info*));
318extern int print_insn_m88k PARAMS ((bfd_vma, disassemble_info*));
319extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*));
320extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*));
321extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*));
322extern int print_insn_big_powerpc PARAMS ((bfd_vma, disassemble_info*));
323extern int print_insn_little_powerpc PARAMS ((bfd_vma, disassemble_info*));
324extern int print_insn_rs6000 PARAMS ((bfd_vma, disassemble_info*));
325extern int print_insn_w65 PARAMS ((bfd_vma, disassemble_info*));
326extern int print_insn_d10v PARAMS ((bfd_vma, disassemble_info*));
327extern int print_insn_v850 PARAMS ((bfd_vma, disassemble_info*));
328extern int print_insn_tic30 PARAMS ((bfd_vma, disassemble_info*));
b9adb4a6 329extern int print_insn_ppc PARAMS ((bfd_vma, disassemble_info*));
dc99065b 330
43d4145a 331#if 0
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332/* Fetch the disassembler for a given BFD, if that support is available. */
333extern disassembler_ftype disassembler PARAMS ((bfd *));
43d4145a 334#endif
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335
336\f
337/* This block of definitions is for particular callers who read instructions
338 into a buffer before calling the instruction decoder. */
339
340/* Here is a function which callers may wish to use for read_memory_func.
341 It gets bytes from a buffer. */
342extern int buffer_read_memory
343 PARAMS ((bfd_vma, bfd_byte *, int, struct disassemble_info *));
344
345/* This function goes with buffer_read_memory.
346 It prints a message using info->fprintf_func and info->stream. */
347extern void perror_memory PARAMS ((int, bfd_vma, struct disassemble_info *));
348
349
350/* Just print the address in hex. This is included for completeness even
351 though both GDB and objdump provide their own (to print symbolic
352 addresses). */
353extern void generic_print_address
354 PARAMS ((bfd_vma, struct disassemble_info *));
355
356/* Always true. */
357extern int generic_symbol_at_address
358 PARAMS ((bfd_vma, struct disassemble_info *));
359
360/* Macro to initialize a disassemble_info struct. This should be called
361 by all applications creating such a struct. */
362#define INIT_DISASSEMBLE_INFO(INFO, STREAM, FPRINTF_FUNC) \
363 (INFO).flavour = bfd_target_unknown_flavour, \
364 (INFO).arch = bfd_arch_unknown, \
365 (INFO).mach = 0, \
366 (INFO).endian = BFD_ENDIAN_UNKNOWN, \
367 INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC)
368
369/* Call this macro to initialize only the internal variables for the
370 disassembler. Architecture dependent things such as byte order, or machine
371 variant are not touched by this macro. This makes things much easier for
372 GDB which must initialize these things seperatly. */
373
374#define INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) \
375 (INFO).fprintf_func = (FPRINTF_FUNC), \
376 (INFO).stream = (STREAM), \
377 (INFO).symbols = NULL, \
378 (INFO).num_symbols = 0, \
379 (INFO).buffer = NULL, \
380 (INFO).buffer_vma = 0, \
381 (INFO).buffer_length = 0, \
382 (INFO).read_memory_func = buffer_read_memory, \
383 (INFO).memory_error_func = perror_memory, \
384 (INFO).print_address_func = generic_print_address, \
385 (INFO).symbol_at_address_func = generic_symbol_at_address, \
386 (INFO).flags = 0, \
387 (INFO).bytes_per_line = 0, \
388 (INFO).bytes_per_chunk = 0, \
389 (INFO).display_endian = BFD_ENDIAN_UNKNOWN, \
aa0aa4fa 390 (INFO).disassembler_options = NULL, \
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391 (INFO).insn_info_valid = 0
392
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393#define _(x) x
394
395/* from libbfd */
396
397bfd_vma bfd_getl32 (const bfd_byte *addr);
398bfd_vma bfd_getb32 (const bfd_byte *addr);
399typedef enum bfd_boolean {false, true} boolean;
400
dc99065b 401#endif /* ! defined (DIS_ASM_H) */