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b9adb4a6 1/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299 2#include "config.h"
b9adb4a6 3#include "dis-asm.h"
b9adb4a6 4#include "elf.h"
aa0aa4fa 5#include <errno.h>
b9adb4a6 6
c6105c0a
FB
7#include "cpu.h"
8#include "exec-all.h"
9307c4c1 9#include "disas.h"
c6105c0a 10
b9adb4a6 11/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc 12struct syminfo *syminfos = NULL;
b9adb4a6 13
aa0aa4fa
FB
14/* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16int
3a742b76
PB
17buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
18 struct disassemble_info *info)
aa0aa4fa 19{
c6105c0a
FB
20 if (memaddr < info->buffer_vma
21 || memaddr + length > info->buffer_vma + info->buffer_length)
22 /* Out of bounds. Use EIO because GDB uses it. */
23 return EIO;
24 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
25 return 0;
aa0aa4fa
FB
26}
27
c6105c0a
FB
28/* Get LENGTH bytes from info's buffer, at target address memaddr.
29 Transfer them to myaddr. */
30static int
c27004ec
FB
31target_read_memory (bfd_vma memaddr,
32 bfd_byte *myaddr,
33 int length,
34 struct disassemble_info *info)
c6105c0a 35{
e612a1f7 36 cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
c6105c0a
FB
37 return 0;
38}
c6105c0a 39
aa0aa4fa
FB
40/* Print an error message. We can assume that this is in response to
41 an error return from buffer_read_memory. */
42void
3a742b76 43perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa
FB
44{
45 if (status != EIO)
46 /* Can't happen. */
47 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
48 else
49 /* Actually, address between memaddr and memaddr + len was
50 out of bounds. */
51 (*info->fprintf_func) (info->stream,
26a76461 52 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa
FB
53}
54
55/* This could be in a separate file, to save miniscule amounts of space
56 in statically linked executables. */
57
58/* Just print the address is hex. This is included for completeness even
59 though both GDB and objdump provide their own (to print symbolic
60 addresses). */
61
62void
3a742b76 63generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa 64{
26a76461 65 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa
FB
66}
67
68/* Just return the given address. */
69
70int
3a742b76 71generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa
FB
72{
73 return 1;
74}
75
76bfd_vma bfd_getl32 (const bfd_byte *addr)
77{
78 unsigned long v;
79
80 v = (unsigned long) addr[0];
81 v |= (unsigned long) addr[1] << 8;
82 v |= (unsigned long) addr[2] << 16;
83 v |= (unsigned long) addr[3] << 24;
84 return (bfd_vma) v;
85}
86
87bfd_vma bfd_getb32 (const bfd_byte *addr)
88{
89 unsigned long v;
90
91 v = (unsigned long) addr[0] << 24;
92 v |= (unsigned long) addr[1] << 16;
93 v |= (unsigned long) addr[2] << 8;
94 v |= (unsigned long) addr[3];
95 return (bfd_vma) v;
96}
97
6af0bf9c
FB
98bfd_vma bfd_getl16 (const bfd_byte *addr)
99{
100 unsigned long v;
101
102 v = (unsigned long) addr[0];
103 v |= (unsigned long) addr[1] << 8;
104 return (bfd_vma) v;
105}
106
107bfd_vma bfd_getb16 (const bfd_byte *addr)
108{
109 unsigned long v;
110
111 v = (unsigned long) addr[0] << 24;
112 v |= (unsigned long) addr[1] << 16;
113 return (bfd_vma) v;
114}
115
c2d551ff
FB
116#ifdef TARGET_ARM
117static int
118print_insn_thumb1(bfd_vma pc, disassemble_info *info)
119{
120 return print_insn_arm(pc | 1, info);
121}
122#endif
123
e91c8a77 124/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff
FB
125 values:
126 i386 - nonzero means 16 bit code
5fafdf24 127 arm - nonzero means thumb code
6a00d601 128 ppc - nonzero means little endian
c2d551ff
FB
129 other targets - unused
130 */
83b34f8b 131void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6 132{
c27004ec 133 target_ulong pc;
b9adb4a6
FB
134 int count;
135 struct disassemble_info disasm_info;
136 int (*print_insn)(bfd_vma pc, disassemble_info *info);
137
138 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
139
c27004ec
FB
140 disasm_info.read_memory_func = target_read_memory;
141 disasm_info.buffer_vma = code;
142 disasm_info.buffer_length = size;
143
144#ifdef TARGET_WORDS_BIGENDIAN
145 disasm_info.endian = BFD_ENDIAN_BIG;
146#else
147 disasm_info.endian = BFD_ENDIAN_LITTLE;
148#endif
149#if defined(TARGET_I386)
150 if (flags == 2)
151 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 152 else if (flags == 1)
c27004ec
FB
153 disasm_info.mach = bfd_mach_i386_i8086;
154 else
155 disasm_info.mach = bfd_mach_i386_i386;
156 print_insn = print_insn_i386;
157#elif defined(TARGET_ARM)
c2d551ff
FB
158 if (flags)
159 print_insn = print_insn_thumb1;
160 else
161 print_insn = print_insn_arm;
c27004ec
FB
162#elif defined(TARGET_SPARC)
163 print_insn = print_insn_sparc;
3475187d
FB
164#ifdef TARGET_SPARC64
165 disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624 166#endif
c27004ec 167#elif defined(TARGET_PPC)
237c0af0 168 if (flags >> 16)
111bfab3 169 disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0
JM
170 if (flags & 0xFFFF) {
171 /* If we have a precise definitions of the instructions set, use it */
172 disasm_info.mach = flags & 0xFFFF;
173 } else {
a2458627 174#ifdef TARGET_PPC64
237c0af0 175 disasm_info.mach = bfd_mach_ppc64;
a2458627 176#else
237c0af0 177 disasm_info.mach = bfd_mach_ppc;
a2458627 178#endif
237c0af0 179 }
c27004ec 180 print_insn = print_insn_ppc;
e6e5906b
PB
181#elif defined(TARGET_M68K)
182 print_insn = print_insn_m68k;
6af0bf9c 183#elif defined(TARGET_MIPS)
76b3030c 184#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 185 print_insn = print_insn_big_mips;
76b3030c
FB
186#else
187 print_insn = print_insn_little_mips;
188#endif
fdf9b3e8
FB
189#elif defined(TARGET_SH4)
190 disasm_info.mach = bfd_mach_sh4;
191 print_insn = print_insn_sh;
eddf68a6
JM
192#elif defined(TARGET_ALPHA)
193 disasm_info.mach = bfd_mach_alpha;
194 print_insn = print_insn_alpha;
a25fd137
TS
195#elif defined(TARGET_CRIS)
196 disasm_info.mach = bfd_mach_cris_v32;
197 print_insn = print_insn_crisv32;
e90e390c
EI
198#elif defined(TARGET_MICROBLAZE)
199 disasm_info.mach = bfd_arch_microblaze;
200 print_insn = print_insn_microblaze;
c27004ec 201#else
b8076a74
FB
202 fprintf(out, "0x" TARGET_FMT_lx
203 ": Asm output not supported on this arch\n", code);
c27004ec 204 return;
c6105c0a
FB
205#endif
206
7e000c2e 207 for (pc = code; size > 0; pc += count, size -= count) {
fa15e030 208 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec
FB
209 count = print_insn(pc, &disasm_info);
210#if 0
211 {
212 int i;
213 uint8_t b;
214 fprintf(out, " {");
215 for(i = 0; i < count; i++) {
216 target_read_memory(pc + i, &b, 1, &disasm_info);
217 fprintf(out, " %02x", b);
218 }
219 fprintf(out, " }");
220 }
221#endif
222 fprintf(out, "\n");
223 if (count < 0)
224 break;
754d00ae 225 if (size < count) {
226 fprintf(out,
227 "Disassembler disagrees with translator over instruction "
228 "decoding\n"
229 "Please report this to qemu-devel@nongnu.org\n");
230 break;
231 }
c27004ec
FB
232 }
233}
234
235/* Disassemble this for me please... (debugging). */
236void disas(FILE *out, void *code, unsigned long size)
237{
238 unsigned long pc;
239 int count;
240 struct disassemble_info disasm_info;
241 int (*print_insn)(bfd_vma pc, disassemble_info *info);
242
243 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
244
b9adb4a6
FB
245 disasm_info.buffer = code;
246 disasm_info.buffer_vma = (unsigned long)code;
247 disasm_info.buffer_length = size;
248
e2542fe2 249#ifdef HOST_WORDS_BIGENDIAN
c27004ec 250 disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6 251#else
c27004ec 252 disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6 253#endif
bc51c5c9 254#if defined(__i386__)
c27004ec
FB
255 disasm_info.mach = bfd_mach_i386_i386;
256 print_insn = print_insn_i386;
bc51c5c9 257#elif defined(__x86_64__)
c27004ec
FB
258 disasm_info.mach = bfd_mach_x86_64;
259 print_insn = print_insn_i386;
e58ffeb3 260#elif defined(_ARCH_PPC)
c27004ec 261 print_insn = print_insn_ppc;
a993ba85 262#elif defined(__alpha__)
c27004ec 263 print_insn = print_insn_alpha;
aa0aa4fa 264#elif defined(__sparc__)
c27004ec 265 print_insn = print_insn_sparc;
6ecd4534
BS
266#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
267 disasm_info.mach = bfd_mach_sparc_v9b;
268#endif
5fafdf24 269#elif defined(__arm__)
c27004ec 270 print_insn = print_insn_arm;
6af0bf9c
FB
271#elif defined(__MIPSEB__)
272 print_insn = print_insn_big_mips;
273#elif defined(__MIPSEL__)
274 print_insn = print_insn_little_mips;
48024e4a
FB
275#elif defined(__m68k__)
276 print_insn = print_insn_m68k;
8f860bb8
TS
277#elif defined(__s390__)
278 print_insn = print_insn_s390;
f54b3f92
AJ
279#elif defined(__hppa__)
280 print_insn = print_insn_hppa;
b9adb4a6 281#else
b8076a74
FB
282 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
283 (long) code);
c27004ec 284 return;
b9adb4a6 285#endif
7e000c2e 286 for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
c27004ec 287 fprintf(out, "0x%08lx: ", pc);
aa0aa4fa 288#ifdef __arm__
46152182 289 /* since data is included in the code, it is better to
aa0aa4fa 290 display code data too */
46152182 291 fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
aa0aa4fa 292#endif
c27004ec 293 count = print_insn(pc, &disasm_info);
b9adb4a6
FB
294 fprintf(out, "\n");
295 if (count < 0)
296 break;
297 }
298}
299
300/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec 301const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6 302{
49918a75 303 const char *symbol = "";
e80cfcfc 304 struct syminfo *s;
3b46e624 305
e80cfcfc 306 for (s = syminfos; s; s = s->next) {
49918a75
PB
307 symbol = s->lookup_symbol(s, orig_addr);
308 if (symbol[0] != '\0') {
309 break;
310 }
b9adb4a6 311 }
49918a75
PB
312
313 return symbol;
b9adb4a6 314}
9307c4c1
FB
315
316#if !defined(CONFIG_USER_ONLY)
317
376253ec 318#include "monitor.h"
3d2cfdf1 319
9307c4c1 320static int monitor_disas_is_physical;
6a00d601 321static CPUState *monitor_disas_env;
9307c4c1
FB
322
323static int
a5f1b965
BS
324monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
325 struct disassemble_info *info)
9307c4c1
FB
326{
327 if (monitor_disas_is_physical) {
328 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
329 } else {
6a00d601 330 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1
FB
331 }
332 return 0;
333}
334
3d2cfdf1
FB
335static int monitor_fprintf(FILE *stream, const char *fmt, ...)
336{
337 va_list ap;
338 va_start(ap, fmt);
376253ec 339 monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1
FB
340 va_end(ap);
341 return 0;
342}
343
376253ec 344void monitor_disas(Monitor *mon, CPUState *env,
6a00d601 345 target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1 346{
9307c4c1
FB
347 int count, i;
348 struct disassemble_info disasm_info;
349 int (*print_insn)(bfd_vma pc, disassemble_info *info);
350
376253ec 351 INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
9307c4c1 352
6a00d601 353 monitor_disas_env = env;
9307c4c1
FB
354 monitor_disas_is_physical = is_physical;
355 disasm_info.read_memory_func = monitor_read_memory;
356
357 disasm_info.buffer_vma = pc;
358
359#ifdef TARGET_WORDS_BIGENDIAN
360 disasm_info.endian = BFD_ENDIAN_BIG;
361#else
362 disasm_info.endian = BFD_ENDIAN_LITTLE;
363#endif
364#if defined(TARGET_I386)
fa15e030
FB
365 if (flags == 2)
366 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 367 else if (flags == 1)
9307c4c1 368 disasm_info.mach = bfd_mach_i386_i8086;
fa15e030
FB
369 else
370 disasm_info.mach = bfd_mach_i386_i386;
9307c4c1
FB
371 print_insn = print_insn_i386;
372#elif defined(TARGET_ARM)
373 print_insn = print_insn_arm;
cbd669da
TS
374#elif defined(TARGET_ALPHA)
375 print_insn = print_insn_alpha;
9307c4c1
FB
376#elif defined(TARGET_SPARC)
377 print_insn = print_insn_sparc;
682c4f15
BS
378#ifdef TARGET_SPARC64
379 disasm_info.mach = bfd_mach_sparc_v9b;
380#endif
9307c4c1 381#elif defined(TARGET_PPC)
a2458627
FB
382#ifdef TARGET_PPC64
383 disasm_info.mach = bfd_mach_ppc64;
384#else
385 disasm_info.mach = bfd_mach_ppc;
386#endif
9307c4c1 387 print_insn = print_insn_ppc;
e6e5906b
PB
388#elif defined(TARGET_M68K)
389 print_insn = print_insn_m68k;
6af0bf9c 390#elif defined(TARGET_MIPS)
76b3030c 391#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 392 print_insn = print_insn_big_mips;
76b3030c
FB
393#else
394 print_insn = print_insn_little_mips;
395#endif
b4e1f077
MD
396#elif defined(TARGET_SH4)
397 disasm_info.mach = bfd_mach_sh4;
398 print_insn = print_insn_sh;
9307c4c1 399#else
376253ec
AL
400 monitor_printf(mon, "0x" TARGET_FMT_lx
401 ": Asm output not supported on this arch\n", pc);
9307c4c1
FB
402 return;
403#endif
404
405 for(i = 0; i < nb_insn; i++) {
376253ec 406 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
9307c4c1 407 count = print_insn(pc, &disasm_info);
376253ec 408 monitor_printf(mon, "\n");
9307c4c1
FB
409 if (count < 0)
410 break;
411 pc += count;
412 }
413}
414#endif