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Commit | Line | Data |
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244ab90e AL |
1 | /* |
2 | * DMA helper functions | |
3 | * | |
4 | * Copyright (c) 2009 Red Hat | |
5 | * | |
6 | * This work is licensed under the terms of the GNU General Public License | |
7 | * (GNU GPL), version 2 or later. | |
8 | */ | |
9 | ||
10 | #include "dma.h" | |
c57c4658 | 11 | #include "trace.h" |
244ab90e AL |
12 | |
13 | void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint) | |
14 | { | |
7267c094 | 15 | qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry)); |
244ab90e AL |
16 | qsg->nsg = 0; |
17 | qsg->nalloc = alloc_hint; | |
18 | qsg->size = 0; | |
19 | } | |
20 | ||
d3231181 | 21 | void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len) |
244ab90e AL |
22 | { |
23 | if (qsg->nsg == qsg->nalloc) { | |
24 | qsg->nalloc = 2 * qsg->nalloc + 1; | |
7267c094 | 25 | qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry)); |
244ab90e AL |
26 | } |
27 | qsg->sg[qsg->nsg].base = base; | |
28 | qsg->sg[qsg->nsg].len = len; | |
29 | qsg->size += len; | |
30 | ++qsg->nsg; | |
31 | } | |
32 | ||
33 | void qemu_sglist_destroy(QEMUSGList *qsg) | |
34 | { | |
7267c094 | 35 | g_free(qsg->sg); |
c094d3d8 | 36 | memset(qsg, 0, sizeof(*qsg)); |
244ab90e AL |
37 | } |
38 | ||
59a703eb | 39 | typedef struct { |
37b7842c | 40 | BlockDriverAIOCB common; |
59a703eb AL |
41 | BlockDriverState *bs; |
42 | BlockDriverAIOCB *acb; | |
43 | QEMUSGList *sg; | |
44 | uint64_t sector_num; | |
43cf8ae6 | 45 | DMADirection dir; |
c3adb5b9 | 46 | bool in_cancel; |
59a703eb | 47 | int sg_cur_index; |
d3231181 | 48 | dma_addr_t sg_cur_byte; |
59a703eb AL |
49 | QEMUIOVector iov; |
50 | QEMUBH *bh; | |
cb144ccb | 51 | DMAIOFunc *io_func; |
37b7842c | 52 | } DMAAIOCB; |
59a703eb AL |
53 | |
54 | static void dma_bdrv_cb(void *opaque, int ret); | |
55 | ||
56 | static void reschedule_dma(void *opaque) | |
57 | { | |
37b7842c | 58 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; |
59a703eb AL |
59 | |
60 | qemu_bh_delete(dbs->bh); | |
61 | dbs->bh = NULL; | |
c3adb5b9 | 62 | dma_bdrv_cb(dbs, 0); |
59a703eb AL |
63 | } |
64 | ||
65 | static void continue_after_map_failure(void *opaque) | |
66 | { | |
37b7842c | 67 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; |
59a703eb AL |
68 | |
69 | dbs->bh = qemu_bh_new(reschedule_dma, dbs); | |
70 | qemu_bh_schedule(dbs->bh); | |
71 | } | |
72 | ||
7403b14e | 73 | static void dma_bdrv_unmap(DMAAIOCB *dbs) |
59a703eb | 74 | { |
59a703eb AL |
75 | int i; |
76 | ||
59a703eb AL |
77 | for (i = 0; i < dbs->iov.niov; ++i) { |
78 | cpu_physical_memory_unmap(dbs->iov.iov[i].iov_base, | |
43cf8ae6 DG |
79 | dbs->iov.iov[i].iov_len, |
80 | dbs->dir != DMA_DIRECTION_TO_DEVICE, | |
59a703eb AL |
81 | dbs->iov.iov[i].iov_len); |
82 | } | |
c3adb5b9 PB |
83 | qemu_iovec_reset(&dbs->iov); |
84 | } | |
85 | ||
86 | static void dma_complete(DMAAIOCB *dbs, int ret) | |
87 | { | |
c57c4658 KW |
88 | trace_dma_complete(dbs, ret, dbs->common.cb); |
89 | ||
c3adb5b9 PB |
90 | dma_bdrv_unmap(dbs); |
91 | if (dbs->common.cb) { | |
92 | dbs->common.cb(dbs->common.opaque, ret); | |
93 | } | |
94 | qemu_iovec_destroy(&dbs->iov); | |
95 | if (dbs->bh) { | |
96 | qemu_bh_delete(dbs->bh); | |
97 | dbs->bh = NULL; | |
98 | } | |
99 | if (!dbs->in_cancel) { | |
100 | /* Requests may complete while dma_aio_cancel is in progress. In | |
101 | * this case, the AIOCB should not be released because it is still | |
102 | * referenced by dma_aio_cancel. */ | |
103 | qemu_aio_release(dbs); | |
104 | } | |
7403b14e AL |
105 | } |
106 | ||
856ae5c3 | 107 | static void dma_bdrv_cb(void *opaque, int ret) |
7403b14e AL |
108 | { |
109 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; | |
c227f099 | 110 | target_phys_addr_t cur_addr, cur_len; |
7403b14e AL |
111 | void *mem; |
112 | ||
c57c4658 KW |
113 | trace_dma_bdrv_cb(dbs, ret); |
114 | ||
7403b14e AL |
115 | dbs->acb = NULL; |
116 | dbs->sector_num += dbs->iov.size / 512; | |
117 | dma_bdrv_unmap(dbs); | |
59a703eb AL |
118 | |
119 | if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) { | |
c3adb5b9 | 120 | dma_complete(dbs, ret); |
59a703eb AL |
121 | return; |
122 | } | |
123 | ||
124 | while (dbs->sg_cur_index < dbs->sg->nsg) { | |
125 | cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte; | |
126 | cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte; | |
43cf8ae6 DG |
127 | mem = cpu_physical_memory_map(cur_addr, &cur_len, |
128 | dbs->dir != DMA_DIRECTION_TO_DEVICE); | |
59a703eb AL |
129 | if (!mem) |
130 | break; | |
131 | qemu_iovec_add(&dbs->iov, mem, cur_len); | |
132 | dbs->sg_cur_byte += cur_len; | |
133 | if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) { | |
134 | dbs->sg_cur_byte = 0; | |
135 | ++dbs->sg_cur_index; | |
136 | } | |
137 | } | |
138 | ||
139 | if (dbs->iov.size == 0) { | |
c57c4658 | 140 | trace_dma_map_wait(dbs); |
59a703eb AL |
141 | cpu_register_map_client(dbs, continue_after_map_failure); |
142 | return; | |
143 | } | |
144 | ||
cb144ccb CH |
145 | dbs->acb = dbs->io_func(dbs->bs, dbs->sector_num, &dbs->iov, |
146 | dbs->iov.size / 512, dma_bdrv_cb, dbs); | |
6bee44ea | 147 | assert(dbs->acb); |
59a703eb AL |
148 | } |
149 | ||
c16b5a2c CH |
150 | static void dma_aio_cancel(BlockDriverAIOCB *acb) |
151 | { | |
152 | DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common); | |
153 | ||
c57c4658 KW |
154 | trace_dma_aio_cancel(dbs); |
155 | ||
c16b5a2c | 156 | if (dbs->acb) { |
c3adb5b9 PB |
157 | BlockDriverAIOCB *acb = dbs->acb; |
158 | dbs->acb = NULL; | |
159 | dbs->in_cancel = true; | |
160 | bdrv_aio_cancel(acb); | |
161 | dbs->in_cancel = false; | |
c16b5a2c | 162 | } |
c3adb5b9 PB |
163 | dbs->common.cb = NULL; |
164 | dma_complete(dbs, 0); | |
c16b5a2c CH |
165 | } |
166 | ||
167 | static AIOPool dma_aio_pool = { | |
168 | .aiocb_size = sizeof(DMAAIOCB), | |
169 | .cancel = dma_aio_cancel, | |
170 | }; | |
171 | ||
cb144ccb | 172 | BlockDriverAIOCB *dma_bdrv_io( |
59a703eb | 173 | BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num, |
cb144ccb | 174 | DMAIOFunc *io_func, BlockDriverCompletionFunc *cb, |
43cf8ae6 | 175 | void *opaque, DMADirection dir) |
59a703eb | 176 | { |
cb144ccb | 177 | DMAAIOCB *dbs = qemu_aio_get(&dma_aio_pool, bs, cb, opaque); |
59a703eb | 178 | |
43cf8ae6 | 179 | trace_dma_bdrv_io(dbs, bs, sector_num, (dir == DMA_DIRECTION_TO_DEVICE)); |
c57c4658 | 180 | |
37b7842c | 181 | dbs->acb = NULL; |
59a703eb | 182 | dbs->bs = bs; |
59a703eb AL |
183 | dbs->sg = sg; |
184 | dbs->sector_num = sector_num; | |
185 | dbs->sg_cur_index = 0; | |
186 | dbs->sg_cur_byte = 0; | |
43cf8ae6 | 187 | dbs->dir = dir; |
cb144ccb | 188 | dbs->io_func = io_func; |
59a703eb AL |
189 | dbs->bh = NULL; |
190 | qemu_iovec_init(&dbs->iov, sg->nsg); | |
191 | dma_bdrv_cb(dbs, 0); | |
37b7842c | 192 | return &dbs->common; |
59a703eb AL |
193 | } |
194 | ||
195 | ||
196 | BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs, | |
197 | QEMUSGList *sg, uint64_t sector, | |
198 | void (*cb)(void *opaque, int ret), void *opaque) | |
199 | { | |
43cf8ae6 DG |
200 | return dma_bdrv_io(bs, sg, sector, bdrv_aio_readv, cb, opaque, |
201 | DMA_DIRECTION_FROM_DEVICE); | |
59a703eb AL |
202 | } |
203 | ||
204 | BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs, | |
205 | QEMUSGList *sg, uint64_t sector, | |
206 | void (*cb)(void *opaque, int ret), void *opaque) | |
207 | { | |
43cf8ae6 DG |
208 | return dma_bdrv_io(bs, sg, sector, bdrv_aio_writev, cb, opaque, |
209 | DMA_DIRECTION_TO_DEVICE); | |
59a703eb | 210 | } |
8171ee35 PB |
211 | |
212 | ||
213 | static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg, bool to_dev) | |
214 | { | |
215 | uint64_t resid; | |
216 | int sg_cur_index; | |
217 | ||
218 | resid = sg->size; | |
219 | sg_cur_index = 0; | |
220 | len = MIN(len, resid); | |
221 | while (len > 0) { | |
222 | ScatterGatherEntry entry = sg->sg[sg_cur_index++]; | |
223 | int32_t xfer = MIN(len, entry.len); | |
224 | cpu_physical_memory_rw(entry.base, ptr, xfer, !to_dev); | |
225 | ptr += xfer; | |
226 | len -= xfer; | |
227 | resid -= xfer; | |
228 | } | |
229 | ||
230 | return resid; | |
231 | } | |
232 | ||
233 | uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg) | |
234 | { | |
235 | return dma_buf_rw(ptr, len, sg, 0); | |
236 | } | |
237 | ||
238 | uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg) | |
239 | { | |
240 | return dma_buf_rw(ptr, len, sg, 1); | |
241 | } | |
84a69356 PB |
242 | |
243 | void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie, | |
244 | QEMUSGList *sg, enum BlockAcctType type) | |
245 | { | |
246 | bdrv_acct_start(bs, cookie, sg->size, type); | |
247 | } |