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spitz: fix compilation failure due to pty.h namespace pollution
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CommitLineData
b00052e4
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1/*
2 * PXA270-based Clamshell PDA platforms.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This code is licensed under the GNU GPL v2.
6b620ca3
PB
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
b00052e4
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11 */
12
83c9f4ca 13#include "hw/hw.h"
0d09e41a 14#include "hw/arm/pxa.h"
bd2be150 15#include "hw/arm/arm.h"
9c17d615 16#include "sysemu/sysemu.h"
83c9f4ca 17#include "hw/pcmcia.h"
0d09e41a 18#include "hw/i2c/i2c.h"
83c9f4ca 19#include "hw/ssi.h"
0d09e41a 20#include "hw/block/flash.h"
1de7afc9 21#include "qemu/timer.h"
bd2be150 22#include "hw/devices.h"
0d09e41a 23#include "hw/arm/sharpsl.h"
28ecbaee 24#include "ui/console.h"
737e150e 25#include "block/block.h"
87ecb68b 26#include "audio/audio.h"
83c9f4ca 27#include "hw/boards.h"
9c17d615 28#include "sysemu/blockdev.h"
83c9f4ca 29#include "hw/sysbus.h"
022c62cb 30#include "exec/address-spaces.h"
b00052e4 31
b00052e4
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32#undef REG_FMT
33#define REG_FMT "0x%02lx"
34
35/* Spitz Flash */
36#define FLASH_BASE 0x0c000000
37#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
38#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
39#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
40#define FLASH_ECCCNTR 0x0c /* ECC byte counter */
41#define FLASH_ECCCLRR 0x10 /* Clear ECC */
42#define FLASH_FLASHIO 0x14 /* Flash I/O */
43#define FLASH_FLASHCTL 0x18 /* Flash Control */
44
45#define FLASHCTL_CE0 (1 << 0)
46#define FLASHCTL_CLE (1 << 1)
47#define FLASHCTL_ALE (1 << 2)
48#define FLASHCTL_WP (1 << 3)
49#define FLASHCTL_CE1 (1 << 4)
50#define FLASHCTL_RYBY (1 << 5)
51#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
52
bc24a225 53typedef struct {
34f9f0b5 54 SysBusDevice busdev;
7cc09e6c 55 MemoryRegion iomem;
d4220389 56 DeviceState *nand;
b00052e4 57 uint8_t ctl;
34f9f0b5
DES
58 uint8_t manf_id;
59 uint8_t chip_id;
bc24a225
PB
60 ECCState ecc;
61} SLNANDState;
b00052e4 62
a8170e5e 63static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
b00052e4 64{
bc24a225 65 SLNANDState *s = (SLNANDState *) opaque;
b00052e4 66 int ryby;
b00052e4
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67
68 switch (addr) {
69#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
70 case FLASH_ECCLPLB:
71 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
72 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
73
74#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
75 case FLASH_ECCLPUB:
76 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
77 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
78
79 case FLASH_ECCCP:
80 return s->ecc.cp;
81
82 case FLASH_ECCCNTR:
83 return s->ecc.count & 0xff;
84
85 case FLASH_FLASHCTL:
86 nand_getpins(s->nand, &ryby);
87 if (ryby)
88 return s->ctl | FLASHCTL_RYBY;
89 else
90 return s->ctl;
91
92 case FLASH_FLASHIO:
7cc09e6c
AK
93 if (size == 4) {
94 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
95 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
96 }
b00052e4
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97 return ecc_digest(&s->ecc, nand_getio(s->nand));
98
99 default:
a8b7063b 100 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
b00052e4
AZ
101 }
102 return 0;
103}
104
a8170e5e 105static void sl_write(void *opaque, hwaddr addr,
7cc09e6c 106 uint64_t value, unsigned size)
b00052e4 107{
bc24a225 108 SLNANDState *s = (SLNANDState *) opaque;
b00052e4
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109
110 switch (addr) {
111 case FLASH_ECCCLRR:
112 /* Value is ignored. */
113 ecc_reset(&s->ecc);
114 break;
115
116 case FLASH_FLASHCTL:
117 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
118 nand_setpins(s->nand,
119 s->ctl & FLASHCTL_CLE,
120 s->ctl & FLASHCTL_ALE,
121 s->ctl & FLASHCTL_NCE,
122 s->ctl & FLASHCTL_WP,
123 0);
124 break;
125
126 case FLASH_FLASHIO:
127 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
128 break;
129
130 default:
a8b7063b 131 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
b00052e4
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132 }
133}
134
135enum {
136 FLASH_128M,
137 FLASH_1024M,
138};
139
7cc09e6c
AK
140static const MemoryRegionOps sl_ops = {
141 .read = sl_read,
142 .write = sl_write,
143 .endianness = DEVICE_NATIVE_ENDIAN,
34f9f0b5
DES
144};
145
bc24a225 146static void sl_flash_register(PXA2xxState *cpu, int size)
b00052e4 147{
34f9f0b5
DES
148 DeviceState *dev;
149
150 dev = qdev_create(NULL, "sl-nand");
151
152 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
153 if (size == FLASH_128M)
154 qdev_prop_set_uint8(dev, "chip_id", 0x73);
155 else if (size == FLASH_1024M)
156 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
157
158 qdev_init_nofail(dev);
1356b98d 159 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
34f9f0b5
DES
160}
161
162static int sl_nand_init(SysBusDevice *dev) {
bc24a225 163 SLNANDState *s;
522f253c 164 DriveInfo *nand;
34f9f0b5
DES
165
166 s = FROM_SYSBUS(SLNANDState, dev);
167
b00052e4 168 s->ctl = 0;
522f253c
PM
169 nand = drive_get(IF_MTD, 0, 0);
170 s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
b00052e4 171
7cc09e6c 172 memory_region_init_io(&s->iomem, &sl_ops, s, "sl", 0x40);
750ecd44 173 sysbus_init_mmio(dev, &s->iomem);
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DES
174
175 return 0;
b00052e4
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176}
177
178/* Spitz Keyboard */
179
180#define SPITZ_KEY_STROBE_NUM 11
181#define SPITZ_KEY_SENSE_NUM 7
182
183static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
184 12, 17, 91, 34, 36, 38, 39
185};
186
187static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
188 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
189};
190
191/* Eighth additional row maps the special keys */
192static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
193 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
194 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
195 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
196 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
197 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
2b76bdc9
AZ
198 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
199 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
b00052e4
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200 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
201};
202
203#define SPITZ_GPIO_AK_INT 13 /* Remote control */
204#define SPITZ_GPIO_SYNC 16 /* Sync button */
205#define SPITZ_GPIO_ON_KEY 95 /* Power button */
206#define SPITZ_GPIO_SWA 97 /* Lid */
207#define SPITZ_GPIO_SWB 96 /* Tablet mode */
208
209/* The special buttons are mapped to unused keys */
210static const int spitz_gpiomap[5] = {
211 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
212 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
213};
b00052e4 214
bc24a225 215typedef struct {
7ef4227b 216 SysBusDevice busdev;
38641a52 217 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
38641a52 218 qemu_irq gpiomap[5];
b00052e4
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219 int keymap[0x80];
220 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
221 uint16_t strobe_state;
222 uint16_t sense_state;
223
224 uint16_t pre_map[0x100];
225 uint16_t modifiers;
226 uint16_t imodifiers;
227 uint8_t fifo[16];
228 int fifopos, fifolen;
229 QEMUTimer *kbdtimer;
bc24a225 230} SpitzKeyboardState;
b00052e4 231
bc24a225 232static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
b00052e4
AZ
233{
234 int i;
235 uint16_t strobe, sense = 0;
236 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
237 strobe = s->keyrow[i] & s->strobe_state;
238 if (strobe) {
239 sense |= 1 << i;
240 if (!(s->sense_state & (1 << i)))
38641a52 241 qemu_irq_raise(s->sense[i]);
b00052e4 242 } else if (s->sense_state & (1 << i))
38641a52 243 qemu_irq_lower(s->sense[i]);
b00052e4
AZ
244 }
245
246 s->sense_state = sense;
247}
248
38641a52 249static void spitz_keyboard_strobe(void *opaque, int line, int level)
b00052e4 250{
bc24a225 251 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
38641a52
AZ
252
253 if (level)
254 s->strobe_state |= 1 << line;
255 else
256 s->strobe_state &= ~(1 << line);
257 spitz_keyboard_sense_update(s);
b00052e4
AZ
258}
259
bc24a225 260static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
b00052e4
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261{
262 int spitz_keycode = s->keymap[keycode & 0x7f];
263 if (spitz_keycode == -1)
264 return;
265
266 /* Handle the additional keys */
267 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
7ef4227b 268 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
b00052e4
AZ
269 return;
270 }
271
272 if (keycode & 0x80)
273 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
274 else
275 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
276
277 spitz_keyboard_sense_update(s);
278}
279
d8e846e1
PB
280#define MOD_SHIFT (1 << 7)
281#define MOD_CTRL (1 << 8)
282#define MOD_FN (1 << 9)
b00052e4
AZ
283
284#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
285
7ef4227b 286static void spitz_keyboard_handler(void *opaque, int keycode)
b00052e4 287{
7ef4227b 288 SpitzKeyboardState *s = opaque;
b00052e4
AZ
289 uint16_t code;
290 int mapcode;
291 switch (keycode) {
292 case 0x2a: /* Left Shift */
293 s->modifiers |= 1;
294 break;
295 case 0xaa:
296 s->modifiers &= ~1;
297 break;
298 case 0x36: /* Right Shift */
299 s->modifiers |= 2;
300 break;
301 case 0xb6:
302 s->modifiers &= ~2;
303 break;
304 case 0x1d: /* Control */
305 s->modifiers |= 4;
306 break;
307 case 0x9d:
308 s->modifiers &= ~4;
309 break;
310 case 0x38: /* Alt */
311 s->modifiers |= 8;
312 break;
313 case 0xb8:
314 s->modifiers &= ~8;
315 break;
316 }
317
318 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
d8e846e1
PB
319 (keycode | MOD_SHIFT) :
320 (keycode & ~MOD_SHIFT))];
b00052e4
AZ
321
322 if (code != mapcode) {
323#if 0
d8e846e1 324 if ((code & MOD_SHIFT) && !(s->modifiers & 1))
b00052e4 325 QUEUE_KEY(0x2a | (keycode & 0x80));
d8e846e1 326 if ((code & MOD_CTRL ) && !(s->modifiers & 4))
b00052e4 327 QUEUE_KEY(0x1d | (keycode & 0x80));
d8e846e1 328 if ((code & MOD_FN ) && !(s->modifiers & 8))
b00052e4 329 QUEUE_KEY(0x38 | (keycode & 0x80));
d8e846e1 330 if ((code & MOD_FN ) && (s->modifiers & 1))
b00052e4 331 QUEUE_KEY(0x2a | (~keycode & 0x80));
d8e846e1 332 if ((code & MOD_FN ) && (s->modifiers & 2))
b00052e4
AZ
333 QUEUE_KEY(0x36 | (~keycode & 0x80));
334#else
335 if (keycode & 0x80) {
336 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
337 QUEUE_KEY(0x2a | 0x80);
338 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
339 QUEUE_KEY(0x1d | 0x80);
340 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
341 QUEUE_KEY(0x38 | 0x80);
342 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
343 QUEUE_KEY(0x2a);
344 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
345 QUEUE_KEY(0x36);
346 s->imodifiers = 0;
347 } else {
d8e846e1 348 if ((code & MOD_SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
b00052e4
AZ
349 QUEUE_KEY(0x2a);
350 s->imodifiers |= 1;
351 }
d8e846e1 352 if ((code & MOD_CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
b00052e4
AZ
353 QUEUE_KEY(0x1d);
354 s->imodifiers |= 4;
355 }
d8e846e1 356 if ((code & MOD_FN ) && !((s->modifiers | s->imodifiers) & 8)) {
b00052e4
AZ
357 QUEUE_KEY(0x38);
358 s->imodifiers |= 8;
359 }
d8e846e1 360 if ((code & MOD_FN ) && (s->modifiers & 1) &&
b00052e4
AZ
361 !(s->imodifiers & 0x10)) {
362 QUEUE_KEY(0x2a | 0x80);
363 s->imodifiers |= 0x10;
364 }
d8e846e1 365 if ((code & MOD_FN ) && (s->modifiers & 2) &&
b00052e4
AZ
366 !(s->imodifiers & 0x20)) {
367 QUEUE_KEY(0x36 | 0x80);
368 s->imodifiers |= 0x20;
369 }
370 }
371#endif
372 }
373
374 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
375}
376
377static void spitz_keyboard_tick(void *opaque)
378{
bc24a225 379 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
b00052e4
AZ
380
381 if (s->fifolen) {
382 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
383 s->fifolen --;
384 if (s->fifopos >= 16)
385 s->fifopos = 0;
386 }
387
74475455 388 qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock) +
6ee093c9 389 get_ticks_per_sec() / 32);
b00052e4
AZ
390}
391
bc24a225 392static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
b00052e4
AZ
393{
394 int i;
395 for (i = 0; i < 0x100; i ++)
396 s->pre_map[i] = i;
d8e846e1
PB
397 s->pre_map[0x02 | MOD_SHIFT ] = 0x02 | MOD_SHIFT; /* exclam */
398 s->pre_map[0x28 | MOD_SHIFT ] = 0x03 | MOD_SHIFT; /* quotedbl */
399 s->pre_map[0x04 | MOD_SHIFT ] = 0x04 | MOD_SHIFT; /* numbersign */
400 s->pre_map[0x05 | MOD_SHIFT ] = 0x05 | MOD_SHIFT; /* dollar */
401 s->pre_map[0x06 | MOD_SHIFT ] = 0x06 | MOD_SHIFT; /* percent */
402 s->pre_map[0x08 | MOD_SHIFT ] = 0x07 | MOD_SHIFT; /* ampersand */
403 s->pre_map[0x28 ] = 0x08 | MOD_SHIFT; /* apostrophe */
404 s->pre_map[0x0a | MOD_SHIFT ] = 0x09 | MOD_SHIFT; /* parenleft */
405 s->pre_map[0x0b | MOD_SHIFT ] = 0x0a | MOD_SHIFT; /* parenright */
406 s->pre_map[0x29 | MOD_SHIFT ] = 0x0b | MOD_SHIFT; /* asciitilde */
407 s->pre_map[0x03 | MOD_SHIFT ] = 0x0c | MOD_SHIFT; /* at */
408 s->pre_map[0xd3 ] = 0x0e | MOD_FN; /* Delete */
409 s->pre_map[0x3a ] = 0x0f | MOD_FN; /* Caps_Lock */
410 s->pre_map[0x07 | MOD_SHIFT ] = 0x11 | MOD_FN; /* asciicircum */
411 s->pre_map[0x0d ] = 0x12 | MOD_FN; /* equal */
412 s->pre_map[0x0d | MOD_SHIFT ] = 0x13 | MOD_FN; /* plus */
413 s->pre_map[0x1a ] = 0x14 | MOD_FN; /* bracketleft */
414 s->pre_map[0x1b ] = 0x15 | MOD_FN; /* bracketright */
415 s->pre_map[0x1a | MOD_SHIFT ] = 0x16 | MOD_FN; /* braceleft */
416 s->pre_map[0x1b | MOD_SHIFT ] = 0x17 | MOD_FN; /* braceright */
417 s->pre_map[0x27 ] = 0x22 | MOD_FN; /* semicolon */
418 s->pre_map[0x27 | MOD_SHIFT ] = 0x23 | MOD_FN; /* colon */
419 s->pre_map[0x09 | MOD_SHIFT ] = 0x24 | MOD_FN; /* asterisk */
420 s->pre_map[0x2b ] = 0x25 | MOD_FN; /* backslash */
421 s->pre_map[0x2b | MOD_SHIFT ] = 0x26 | MOD_FN; /* bar */
422 s->pre_map[0x0c | MOD_SHIFT ] = 0x30 | MOD_FN; /* underscore */
423 s->pre_map[0x33 | MOD_SHIFT ] = 0x33 | MOD_FN; /* less */
424 s->pre_map[0x35 ] = 0x33 | MOD_SHIFT; /* slash */
425 s->pre_map[0x34 | MOD_SHIFT ] = 0x34 | MOD_FN; /* greater */
426 s->pre_map[0x35 | MOD_SHIFT ] = 0x34 | MOD_SHIFT; /* question */
427 s->pre_map[0x49 ] = 0x48 | MOD_FN; /* Page_Up */
428 s->pre_map[0x51 ] = 0x50 | MOD_FN; /* Page_Down */
b00052e4
AZ
429
430 s->modifiers = 0;
431 s->imodifiers = 0;
432 s->fifopos = 0;
433 s->fifolen = 0;
b00052e4
AZ
434}
435
d8e846e1
PB
436#undef MOD_SHIFT
437#undef MOD_CTRL
438#undef MOD_FN
b00052e4 439
7ef4227b 440static int spitz_keyboard_post_load(void *opaque, int version_id)
aa941b94 441{
bc24a225 442 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
aa941b94
AZ
443
444 /* Release all pressed keys */
445 memset(s->keyrow, 0, sizeof(s->keyrow));
446 spitz_keyboard_sense_update(s);
447 s->modifiers = 0;
448 s->imodifiers = 0;
449 s->fifopos = 0;
450 s->fifolen = 0;
451
452 return 0;
453}
454
bc24a225 455static void spitz_keyboard_register(PXA2xxState *cpu)
b00052e4 456{
7ef4227b
DES
457 int i;
458 DeviceState *dev;
bc24a225 459 SpitzKeyboardState *s;
b00052e4 460
7ef4227b 461 dev = sysbus_create_simple("spitz-keyboard", -1, NULL);
1356b98d 462 s = FROM_SYSBUS(SpitzKeyboardState, SYS_BUS_DEVICE(dev));
b00052e4 463
38641a52 464 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
0bb53337 465 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
38641a52
AZ
466
467 for (i = 0; i < 5; i ++)
0bb53337 468 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
38641a52 469
7ef4227b
DES
470 if (!graphic_rotate)
471 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
472
473 for (i = 0; i < 5; i++)
474 qemu_set_irq(s->gpiomap[i], 0);
475
b00052e4 476 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
0bb53337 477 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
7ef4227b
DES
478 qdev_get_gpio_in(dev, i));
479
74475455 480 qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock));
7ef4227b
DES
481
482 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
483}
484
485static int spitz_keyboard_init(SysBusDevice *dev)
486{
487 SpitzKeyboardState *s;
488 int i, j;
489
490 s = FROM_SYSBUS(SpitzKeyboardState, dev);
491
492 for (i = 0; i < 0x80; i ++)
493 s->keymap[i] = -1;
494 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
495 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
496 if (spitz_keymap[i][j] != -1)
497 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
b00052e4
AZ
498
499 spitz_keyboard_pre_map(s);
aa941b94 500
74475455 501 s->kbdtimer = qemu_new_timer_ns(vm_clock, spitz_keyboard_tick, s);
7ef4227b
DES
502 qdev_init_gpio_in(&dev->qdev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
503 qdev_init_gpio_out(&dev->qdev, s->sense, SPITZ_KEY_SENSE_NUM);
504
505 return 0;
b00052e4
AZ
506}
507
b00052e4
AZ
508/* LCD backlight controller */
509
510#define LCDTG_RESCTL 0x00
511#define LCDTG_PHACTRL 0x01
512#define LCDTG_DUTYCTRL 0x02
513#define LCDTG_POWERREG0 0x03
514#define LCDTG_POWERREG1 0x04
515#define LCDTG_GPOR3 0x05
516#define LCDTG_PICTRL 0x06
517#define LCDTG_POLCTRL 0x07
518
a984a69e
PB
519typedef struct {
520 SSISlave ssidev;
43842120
DES
521 uint32_t bl_intensity;
522 uint32_t bl_power;
a984a69e 523} SpitzLCDTG;
b00052e4 524
a984a69e 525static void spitz_bl_update(SpitzLCDTG *s)
b00052e4 526{
a984a69e
PB
527 if (s->bl_power && s->bl_intensity)
528 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
b00052e4 529 else
89cdb6af 530 zaurus_printf("LCD Backlight now off\n");
b00052e4
AZ
531}
532
a984a69e
PB
533/* FIXME: Implement GPIO properly and remove this hack. */
534static SpitzLCDTG *spitz_lcdtg;
535
38641a52 536static inline void spitz_bl_bit5(void *opaque, int line, int level)
b00052e4 537{
a984a69e
PB
538 SpitzLCDTG *s = spitz_lcdtg;
539 int prev = s->bl_intensity;
b00052e4
AZ
540
541 if (level)
a984a69e 542 s->bl_intensity &= ~0x20;
b00052e4 543 else
a984a69e 544 s->bl_intensity |= 0x20;
b00052e4 545
a984a69e
PB
546 if (s->bl_power && prev != s->bl_intensity)
547 spitz_bl_update(s);
b00052e4
AZ
548}
549
38641a52 550static inline void spitz_bl_power(void *opaque, int line, int level)
b00052e4 551{
a984a69e
PB
552 SpitzLCDTG *s = spitz_lcdtg;
553 s->bl_power = !!level;
554 spitz_bl_update(s);
b00052e4
AZ
555}
556
a984a69e 557static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
b00052e4 558{
a984a69e
PB
559 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
560 int addr;
561 addr = value >> 5;
562 value &= 0x1f;
b00052e4
AZ
563
564 switch (addr) {
565 case LCDTG_RESCTL:
566 if (value)
89cdb6af 567 zaurus_printf("LCD in QVGA mode\n");
b00052e4 568 else
89cdb6af 569 zaurus_printf("LCD in VGA mode\n");
b00052e4
AZ
570 break;
571
572 case LCDTG_DUTYCTRL:
a984a69e
PB
573 s->bl_intensity &= ~0x1f;
574 s->bl_intensity |= value;
575 if (s->bl_power)
576 spitz_bl_update(s);
b00052e4
AZ
577 break;
578
579 case LCDTG_POWERREG0:
580 /* Set common voltage to M62332FP */
581 break;
582 }
a984a69e
PB
583 return 0;
584}
585
81a322d4 586static int spitz_lcdtg_init(SSISlave *dev)
a984a69e
PB
587{
588 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
589
590 spitz_lcdtg = s;
591 s->bl_power = 0;
592 s->bl_intensity = 0x20;
593
81a322d4 594 return 0;
b00052e4
AZ
595}
596
597/* SSP devices */
598
599#define CORGI_SSP_PORT 2
600
601#define SPITZ_GPIO_LCDCON_CS 53
602#define SPITZ_GPIO_ADS7846_CS 14
603#define SPITZ_GPIO_MAX1111_CS 20
604#define SPITZ_GPIO_TP_INT 11
605
a984a69e 606static DeviceState *max1111;
b00052e4
AZ
607
608/* "Demux" the signal based on current chipselect */
a984a69e
PB
609typedef struct {
610 SSISlave ssidev;
611 SSIBus *bus[3];
43842120 612 uint32_t enable[3];
a984a69e 613} CorgiSSPState;
b00052e4 614
a984a69e 615static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
b00052e4 616{
a984a69e
PB
617 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
618 int i;
619
620 for (i = 0; i < 3; i++) {
621 if (s->enable[i]) {
622 return ssi_transfer(s->bus[i], value);
623 }
624 }
625 return 0;
b00052e4
AZ
626}
627
38641a52 628static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
b00052e4 629{
a984a69e
PB
630 CorgiSSPState *s = (CorgiSSPState *)opaque;
631 assert(line >= 0 && line < 3);
632 s->enable[line] = !level;
b00052e4
AZ
633}
634
635#define MAX1111_BATT_VOLT 1
636#define MAX1111_BATT_TEMP 2
637#define MAX1111_ACIN_VOLT 3
638
639#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
640#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
641#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
642
38641a52 643static void spitz_adc_temp_on(void *opaque, int line, int level)
b00052e4
AZ
644{
645 if (!max1111)
646 return;
647
648 if (level)
649 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
650 else
651 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
652}
653
81a322d4 654static int corgi_ssp_init(SSISlave *dev)
a984a69e
PB
655{
656 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
657
658 qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
02e2da45
PB
659 s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0");
660 s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
661 s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
a984a69e 662
81a322d4 663 return 0;
a984a69e
PB
664}
665
bc24a225 666static void spitz_ssp_attach(PXA2xxState *cpu)
b00052e4 667{
a984a69e
PB
668 DeviceState *mux;
669 DeviceState *dev;
670 void *bus;
671
672 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
38641a52 673
a984a69e 674 bus = qdev_get_child_bus(mux, "ssi0");
22ed1d34 675 ssi_create_slave(bus, "spitz-lcdtg");
b00052e4 676
a984a69e
PB
677 bus = qdev_get_child_bus(mux, "ssi1");
678 dev = ssi_create_slave(bus, "ads7846");
679 qdev_connect_gpio_out(dev, 0,
0bb53337 680 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
b00052e4 681
a984a69e
PB
682 bus = qdev_get_child_bus(mux, "ssi2");
683 max1111 = ssi_create_slave(bus, "max1111");
b00052e4
AZ
684 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
685 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
686 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
687
0bb53337 688 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
a984a69e 689 qdev_get_gpio_in(mux, 0));
0bb53337 690 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
a984a69e 691 qdev_get_gpio_in(mux, 1));
0bb53337 692 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
a984a69e 693 qdev_get_gpio_in(mux, 2));
b00052e4
AZ
694}
695
696/* CF Microdrive */
697
bc24a225 698static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
b00052e4 699{
bc24a225 700 PCMCIACardState *md;
751c6a17 701 DriveInfo *dinfo;
b00052e4 702
751c6a17 703 dinfo = drive_get(IF_IDE, 0, 0);
124386cc 704 if (!dinfo || dinfo->media_cd)
e4bcb14c 705 return;
124386cc
MA
706 md = dscm1xxxx_init(dinfo);
707 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
b00052e4
AZ
708}
709
adb86c37
AZ
710/* Wm8750 and Max7310 on I2C */
711
712#define AKITA_MAX_ADDR 0x18
611d7189
AZ
713#define SPITZ_WM_ADDRL 0x1b
714#define SPITZ_WM_ADDRH 0x1a
adb86c37
AZ
715
716#define SPITZ_GPIO_WM 5
717
38641a52 718static void spitz_wm8750_addr(void *opaque, int line, int level)
adb86c37 719{
9e07bdf8 720 I2CSlave *wm = (I2CSlave *) opaque;
adb86c37
AZ
721 if (level)
722 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
723 else
724 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
725}
adb86c37 726
bc24a225 727static void spitz_i2c_setup(PXA2xxState *cpu)
adb86c37
AZ
728{
729 /* Attach the CPU on one end of our I2C bus. */
730 i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
731
cdbe40ca 732 DeviceState *wm;
adb86c37 733
adb86c37 734 /* Attach a WM8750 to the bus */
cdbe40ca 735 wm = i2c_create_slave(bus, "wm8750", 0);
adb86c37 736
38641a52 737 spitz_wm8750_addr(wm, 0, 0);
0bb53337 738 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
38641a52 739 qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
adb86c37
AZ
740 /* .. and to the sound interface. */
741 cpu->i2s->opaque = wm;
742 cpu->i2s->codec_out = wm8750_dac_dat;
743 cpu->i2s->codec_in = wm8750_adc_dat;
744 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
adb86c37
AZ
745}
746
bc24a225 747static void spitz_akita_i2c_setup(PXA2xxState *cpu)
adb86c37
AZ
748{
749 /* Attach a Max7310 to Akita I2C bus. */
6c0bd6bd
PB
750 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
751 AKITA_MAX_ADDR);
adb86c37
AZ
752}
753
b00052e4
AZ
754/* Other peripherals */
755
38641a52 756static void spitz_out_switch(void *opaque, int line, int level)
b00052e4 757{
38641a52
AZ
758 switch (line) {
759 case 0:
89cdb6af 760 zaurus_printf("Charging %s.\n", level ? "off" : "on");
38641a52
AZ
761 break;
762 case 1:
89cdb6af 763 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
38641a52
AZ
764 break;
765 case 2:
89cdb6af 766 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
38641a52
AZ
767 break;
768 case 3:
89cdb6af 769 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
38641a52
AZ
770 break;
771 case 4:
772 spitz_bl_bit5(opaque, line, level);
773 break;
774 case 5:
775 spitz_bl_power(opaque, line, level);
776 break;
777 case 6:
778 spitz_adc_temp_on(opaque, line, level);
779 break;
780 }
b00052e4
AZ
781}
782
783#define SPITZ_SCP_LED_GREEN 1
784#define SPITZ_SCP_JK_B 2
785#define SPITZ_SCP_CHRG_ON 3
786#define SPITZ_SCP_MUTE_L 4
787#define SPITZ_SCP_MUTE_R 5
788#define SPITZ_SCP_CF_POWER 6
789#define SPITZ_SCP_LED_ORANGE 7
790#define SPITZ_SCP_JK_A 8
791#define SPITZ_SCP_ADC_TEMP_ON 9
792#define SPITZ_SCP2_IR_ON 1
793#define SPITZ_SCP2_AKIN_PULLUP 2
794#define SPITZ_SCP2_BACKLIGHT_CONT 7
795#define SPITZ_SCP2_BACKLIGHT_ON 8
796#define SPITZ_SCP2_MIC_BIAS 9
797
bc24a225 798static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
383d01c6 799 DeviceState *scp0, DeviceState *scp1)
b00052e4 800{
38641a52
AZ
801 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
802
383d01c6
DES
803 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
804 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
805 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
806 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
b00052e4 807
e33d8cdb 808 if (scp1) {
383d01c6
DES
809 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
810 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
b00052e4
AZ
811 }
812
383d01c6 813 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
b00052e4
AZ
814}
815
816#define SPITZ_GPIO_HSYNC 22
817#define SPITZ_GPIO_SD_DETECT 9
818#define SPITZ_GPIO_SD_WP 81
819#define SPITZ_GPIO_ON_RESET 89
820#define SPITZ_GPIO_BAT_COVER 90
821#define SPITZ_GPIO_CF1_IRQ 105
822#define SPITZ_GPIO_CF1_CD 94
823#define SPITZ_GPIO_CF2_IRQ 106
824#define SPITZ_GPIO_CF2_CD 93
825
38641a52 826static int spitz_hsync;
b00052e4 827
38641a52 828static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
b00052e4 829{
bc24a225 830 PXA2xxState *cpu = (PXA2xxState *) opaque;
0bb53337 831 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
b00052e4
AZ
832 spitz_hsync ^= 1;
833}
834
bc24a225 835static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
b00052e4 836{
38641a52 837 qemu_irq lcd_hsync;
b00052e4
AZ
838 /*
839 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
840 * read to satisfy broken guests that poll-wait for hsync.
841 * Simulating a real hsync event would be less practical and
842 * wouldn't guarantee that a guest ever exits the loop.
843 */
844 spitz_hsync = 0;
38641a52
AZ
845 lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
846 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
847 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
b00052e4
AZ
848
849 /* MMC/SD host */
02ce600c 850 pxa2xx_mmci_handlers(cpu->mmc,
0bb53337
DES
851 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
852 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
b00052e4
AZ
853
854 /* Battery lock always closed */
0bb53337 855 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
b00052e4
AZ
856
857 /* Handle reset */
0bb53337 858 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
b00052e4
AZ
859
860 /* PCMCIA signals: card's IRQ and Card-Detect */
b00052e4 861 if (slots >= 1)
38641a52 862 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
0bb53337
DES
863 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
864 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
b00052e4 865 if (slots >= 2)
38641a52 866 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
0bb53337
DES
867 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
868 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
b00052e4
AZ
869}
870
b00052e4
AZ
871/* Board init. */
872enum spitz_model_e { spitz, akita, borzoi, terrier };
873
7fb4fdcf
AZ
874#define SPITZ_RAM 0x04000000
875#define SPITZ_ROM 0x00800000
876
f93eb9ff
AZ
877static struct arm_boot_info spitz_binfo = {
878 .loader_start = PXA2XX_SDRAM_BASE,
879 .ram_size = 0x04000000,
880};
881
72a9f5b7
PM
882static void spitz_common_init(QEMUMachineInitArgs *args,
883 enum spitz_model_e model, int arm_id)
b00052e4 884{
2e7ad760 885 PXA2xxState *mpu;
383d01c6 886 DeviceState *scp0, *scp1 = NULL;
a6dc4c2d 887 MemoryRegion *address_space_mem = get_system_memory();
7cc09e6c 888 MemoryRegion *rom = g_new(MemoryRegion, 1);
72a9f5b7 889 const char *cpu_model = args->cpu_model;
b00052e4 890
4207117c
AZ
891 if (!cpu_model)
892 cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
b00052e4 893
d95b2f8d 894 /* Setup CPU & memory */
2e7ad760 895 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
b00052e4 896
2e7ad760 897 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
b00052e4 898
c5705a77
AK
899 memory_region_init_ram(rom, "spitz.rom", SPITZ_ROM);
900 vmstate_register_ram_global(rom);
7cc09e6c
AK
901 memory_region_set_readonly(rom, true);
902 memory_region_add_subregion(address_space_mem, 0, rom);
b00052e4
AZ
903
904 /* Setup peripherals */
2e7ad760 905 spitz_keyboard_register(mpu);
b00052e4 906
2e7ad760 907 spitz_ssp_attach(mpu);
b00052e4 908
383d01c6 909 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
e33d8cdb 910 if (model != akita) {
383d01c6 911 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
e33d8cdb 912 }
b00052e4 913
2e7ad760 914 spitz_scoop_gpio_setup(mpu, scp0, scp1);
b00052e4 915
2e7ad760 916 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
b00052e4 917
2e7ad760 918 spitz_i2c_setup(mpu);
adb86c37
AZ
919
920 if (model == akita)
2e7ad760 921 spitz_akita_i2c_setup(mpu);
adb86c37 922
b00052e4 923 if (model == terrier)
bf5ee248 924 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
2e7ad760 925 spitz_microdrive_attach(mpu, 1);
b00052e4 926 else if (model != akita)
15b18ec2 927 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
2e7ad760 928 spitz_microdrive_attach(mpu, 0);
b00052e4 929
72a9f5b7
PM
930 spitz_binfo.kernel_filename = args->kernel_filename;
931 spitz_binfo.kernel_cmdline = args->kernel_cmdline;
932 spitz_binfo.initrd_filename = args->initrd_filename;
f93eb9ff 933 spitz_binfo.board_id = arm_id;
3aaa8dfa 934 arm_load_kernel(mpu->cpu, &spitz_binfo);
f78630ab 935 sl_bootparam_write(SL_PXA_PARAM_BASE);
b00052e4
AZ
936}
937
5f072e1f 938static void spitz_init(QEMUMachineInitArgs *args)
b00052e4 939{
72a9f5b7 940 spitz_common_init(args, spitz, 0x2c9);
b00052e4
AZ
941}
942
5f072e1f 943static void borzoi_init(QEMUMachineInitArgs *args)
b00052e4 944{
72a9f5b7 945 spitz_common_init(args, borzoi, 0x33f);
b00052e4
AZ
946}
947
5f072e1f 948static void akita_init(QEMUMachineInitArgs *args)
b00052e4 949{
72a9f5b7 950 spitz_common_init(args, akita, 0x2e8);
b00052e4
AZ
951}
952
5f072e1f 953static void terrier_init(QEMUMachineInitArgs *args)
b00052e4 954{
72a9f5b7 955 spitz_common_init(args, terrier, 0x33f);
b00052e4
AZ
956}
957
11be4b3e 958static QEMUMachine akitapda_machine = {
4b32e168
AL
959 .name = "akita",
960 .desc = "Akita PDA (PXA270)",
961 .init = akita_init,
e4ada29e 962 DEFAULT_MACHINE_OPTIONS,
b00052e4
AZ
963};
964
f80f9ec9 965static QEMUMachine spitzpda_machine = {
4b32e168
AL
966 .name = "spitz",
967 .desc = "Spitz PDA (PXA270)",
968 .init = spitz_init,
e4ada29e 969 DEFAULT_MACHINE_OPTIONS,
b00052e4
AZ
970};
971
f80f9ec9 972static QEMUMachine borzoipda_machine = {
4b32e168
AL
973 .name = "borzoi",
974 .desc = "Borzoi PDA (PXA270)",
975 .init = borzoi_init,
e4ada29e 976 DEFAULT_MACHINE_OPTIONS,
b00052e4
AZ
977};
978
f80f9ec9 979static QEMUMachine terrierpda_machine = {
4b32e168
AL
980 .name = "terrier",
981 .desc = "Terrier PDA (PXA270)",
982 .init = terrier_init,
e4ada29e 983 DEFAULT_MACHINE_OPTIONS,
b00052e4 984};
a984a69e 985
f80f9ec9
AL
986static void spitz_machine_init(void)
987{
988 qemu_register_machine(&akitapda_machine);
989 qemu_register_machine(&spitzpda_machine);
990 qemu_register_machine(&borzoipda_machine);
991 qemu_register_machine(&terrierpda_machine);
992}
993
994machine_init(spitz_machine_init);
995
7ef4227b
DES
996static bool is_version_0(void *opaque, int version_id)
997{
998 return version_id == 0;
999}
1000
34f9f0b5
DES
1001static VMStateDescription vmstate_sl_nand_info = {
1002 .name = "sl-nand",
1003 .version_id = 0,
1004 .minimum_version_id = 0,
1005 .minimum_version_id_old = 0,
1006 .fields = (VMStateField []) {
1007 VMSTATE_UINT8(ctl, SLNANDState),
1008 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1009 VMSTATE_END_OF_LIST(),
1010 },
1011};
1012
999e12bb
AL
1013static Property sl_nand_properties[] = {
1014 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1015 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1016 DEFINE_PROP_END_OF_LIST(),
1017};
1018
1019static void sl_nand_class_init(ObjectClass *klass, void *data)
1020{
39bffca2 1021 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
1022 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1023
1024 k->init = sl_nand_init;
39bffca2
AL
1025 dc->vmsd = &vmstate_sl_nand_info;
1026 dc->props = sl_nand_properties;
999e12bb
AL
1027}
1028
8c43a6f0 1029static const TypeInfo sl_nand_info = {
39bffca2
AL
1030 .name = "sl-nand",
1031 .parent = TYPE_SYS_BUS_DEVICE,
1032 .instance_size = sizeof(SLNANDState),
1033 .class_init = sl_nand_class_init,
34f9f0b5
DES
1034};
1035
7ef4227b
DES
1036static VMStateDescription vmstate_spitz_kbd = {
1037 .name = "spitz-keyboard",
1038 .version_id = 1,
1039 .minimum_version_id = 0,
1040 .minimum_version_id_old = 0,
1041 .post_load = spitz_keyboard_post_load,
1042 .fields = (VMStateField []) {
1043 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1044 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1045 VMSTATE_UNUSED_TEST(is_version_0, 5),
1046 VMSTATE_END_OF_LIST(),
1047 },
1048};
1049
999e12bb
AL
1050static Property spitz_keyboard_properties[] = {
1051 DEFINE_PROP_END_OF_LIST(),
1052};
1053
1054static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1055{
39bffca2 1056 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
1057 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1058
1059 k->init = spitz_keyboard_init;
39bffca2
AL
1060 dc->vmsd = &vmstate_spitz_kbd;
1061 dc->props = spitz_keyboard_properties;
999e12bb
AL
1062}
1063
8c43a6f0 1064static const TypeInfo spitz_keyboard_info = {
39bffca2
AL
1065 .name = "spitz-keyboard",
1066 .parent = TYPE_SYS_BUS_DEVICE,
1067 .instance_size = sizeof(SpitzKeyboardState),
1068 .class_init = spitz_keyboard_class_init,
7ef4227b
DES
1069};
1070
43842120
DES
1071static const VMStateDescription vmstate_corgi_ssp_regs = {
1072 .name = "corgi-ssp",
66530953
PC
1073 .version_id = 2,
1074 .minimum_version_id = 2,
1075 .minimum_version_id_old = 2,
43842120 1076 .fields = (VMStateField []) {
66530953 1077 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
43842120
DES
1078 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1079 VMSTATE_END_OF_LIST(),
1080 }
1081};
1082
cd6c4cf2
AL
1083static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1084{
39bffca2 1085 DeviceClass *dc = DEVICE_CLASS(klass);
cd6c4cf2
AL
1086 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1087
1088 k->init = corgi_ssp_init;
1089 k->transfer = corgi_ssp_transfer;
39bffca2 1090 dc->vmsd = &vmstate_corgi_ssp_regs;
cd6c4cf2
AL
1091}
1092
8c43a6f0 1093static const TypeInfo corgi_ssp_info = {
39bffca2
AL
1094 .name = "corgi-ssp",
1095 .parent = TYPE_SSI_SLAVE,
1096 .instance_size = sizeof(CorgiSSPState),
1097 .class_init = corgi_ssp_class_init,
a984a69e
PB
1098};
1099
43842120
DES
1100static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1101 .name = "spitz-lcdtg",
1102 .version_id = 1,
1103 .minimum_version_id = 1,
1104 .minimum_version_id_old = 1,
1105 .fields = (VMStateField []) {
66530953 1106 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
43842120
DES
1107 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1108 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1109 VMSTATE_END_OF_LIST(),
1110 }
1111};
1112
cd6c4cf2
AL
1113static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1114{
39bffca2 1115 DeviceClass *dc = DEVICE_CLASS(klass);
cd6c4cf2
AL
1116 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1117
1118 k->init = spitz_lcdtg_init;
1119 k->transfer = spitz_lcdtg_transfer;
39bffca2 1120 dc->vmsd = &vmstate_spitz_lcdtg_regs;
cd6c4cf2
AL
1121}
1122
8c43a6f0 1123static const TypeInfo spitz_lcdtg_info = {
39bffca2
AL
1124 .name = "spitz-lcdtg",
1125 .parent = TYPE_SSI_SLAVE,
1126 .instance_size = sizeof(SpitzLCDTG),
1127 .class_init = spitz_lcdtg_class_init,
a984a69e
PB
1128};
1129
83f7d43a 1130static void spitz_register_types(void)
a984a69e 1131{
39bffca2
AL
1132 type_register_static(&corgi_ssp_info);
1133 type_register_static(&spitz_lcdtg_info);
1134 type_register_static(&spitz_keyboard_info);
1135 type_register_static(&sl_nand_info);
a984a69e
PB
1136}
1137
83f7d43a 1138type_init(spitz_register_types)