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502a5395 1/*
3cbee15b 2 * QEMU Grackle PCI host (heathrow OldWorld PowerMac)
502a5395 3 *
3cbee15b
JM
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
5fafdf24 6 *
502a5395
PB
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
83c9f4ca
PB
26#include "hw/pci/pci_host.h"
27#include "hw/ppc/mac.h"
28#include "hw/pci/pci.h"
87ecb68b 29
ea026b2f
BS
30/* debug Grackle */
31//#define DEBUG_GRACKLE
32
33#ifdef DEBUG_GRACKLE
001faf32
BS
34#define GRACKLE_DPRINTF(fmt, ...) \
35 do { printf("GRACKLE: " fmt , ## __VA_ARGS__); } while (0)
ea026b2f 36#else
001faf32 37#define GRACKLE_DPRINTF(fmt, ...)
ea026b2f
BS
38#endif
39
0e655047
AF
40#define GRACKLE_PCI_HOST_BRIDGE(obj) \
41 OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE)
42
426f17bb 43typedef struct GrackleState {
67c332fd 44 PCIHostState parent_obj;
0e655047 45
46f3069c
BS
46 MemoryRegion pci_mmio;
47 MemoryRegion pci_hole;
426f17bb 48} GrackleState;
502a5395 49
d2b59317
PB
50/* Don't know if this matches real hardware, but it agrees with OHW. */
51static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
502a5395 52{
d2b59317
PB
53 return (irq_num + (pci_dev->devfn >> 3)) & 3;
54}
55
5d4e84c8 56static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
d2b59317 57{
5d4e84c8
JQ
58 qemu_irq *pic = opaque;
59
ea026b2f 60 GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level);
3cbee15b 61 qemu_set_irq(pic[irq_num + 0x15], level);
502a5395
PB
62}
63
1e39101c 64PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
aee97b84
AK
65 MemoryRegion *address_space_mem,
66 MemoryRegion *address_space_io)
426f17bb
BS
67{
68 DeviceState *dev;
69 SysBusDevice *s;
0e655047 70 PCIHostState *phb;
426f17bb
BS
71 GrackleState *d;
72
0e655047 73 dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
e23a1b33 74 qdev_init_nofail(dev);
0e655047 75 s = SYS_BUS_DEVICE(dev);
8558d942 76 phb = PCI_HOST_BRIDGE(dev);
0e655047 77 d = GRACKLE_PCI_HOST_BRIDGE(dev);
46f3069c
BS
78
79 memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
80 memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
81 0x80000000ULL, 0x7e000000ULL);
82 memory_region_add_subregion(address_space_mem, 0x80000000ULL,
83 &d->pci_hole);
84
0e655047
AF
85 phb->bus = pci_register_bus(dev, "pci",
86 pci_grackle_set_irq,
87 pci_grackle_map_irq,
88 pic,
89 &d->pci_mmio,
90 address_space_io,
60a0e443 91 0, 4, TYPE_PCI_BUS);
426f17bb 92
0e655047 93 pci_create_simple(phb->bus, 0, "grackle");
426f17bb
BS
94
95 sysbus_mmio_map(s, 0, base);
96 sysbus_mmio_map(s, 1, base + 0x00200000);
97
0e655047 98 return phb->bus;
426f17bb
BS
99}
100
81a322d4 101static int pci_grackle_init_device(SysBusDevice *dev)
426f17bb 102{
0e655047 103 PCIHostState *phb;
426f17bb 104
8558d942 105 phb = PCI_HOST_BRIDGE(dev);
426f17bb 106
0e655047
AF
107 memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,
108 dev, "pci-conf-idx", 0x1000);
109 memory_region_init_io(&phb->data_mem, &pci_host_data_le_ops,
110 dev, "pci-data-idx", 0x1000);
111 sysbus_init_mmio(dev, &phb->conf_mem);
112 sysbus_init_mmio(dev, &phb->data_mem);
426f17bb 113
81a322d4 114 return 0;
426f17bb
BS
115}
116
81a322d4 117static int grackle_pci_host_init(PCIDevice *d)
426f17bb 118{
502a5395 119 d->config[0x09] = 0x01;
81a322d4 120 return 0;
426f17bb 121}
502a5395 122
40021f08
AL
123static void grackle_pci_class_init(ObjectClass *klass, void *data)
124{
125 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
39bffca2 126 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08
AL
127
128 k->init = grackle_pci_host_init;
129 k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
130 k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
131 k->revision = 0x00;
132 k->class_id = PCI_CLASS_BRIDGE_HOST;
39bffca2 133 dc->no_user = 1;
40021f08
AL
134}
135
4240abff 136static const TypeInfo grackle_pci_info = {
39bffca2
AL
137 .name = "grackle",
138 .parent = TYPE_PCI_DEVICE,
139 .instance_size = sizeof(PCIDevice),
40021f08 140 .class_init = grackle_pci_class_init,
426f17bb 141};
6e6b7363 142
999e12bb
AL
143static void pci_grackle_class_init(ObjectClass *klass, void *data)
144{
145 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
39bffca2 146 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
147
148 k->init = pci_grackle_init_device;
39bffca2 149 dc->no_user = 1;
999e12bb
AL
150}
151
4240abff 152static const TypeInfo grackle_pci_host_info = {
0e655047 153 .name = TYPE_GRACKLE_PCI_HOST_BRIDGE,
8558d942 154 .parent = TYPE_PCI_HOST_BRIDGE,
39bffca2
AL
155 .instance_size = sizeof(GrackleState),
156 .class_init = pci_grackle_class_init,
0ae46996
AF
157};
158
83f7d43a 159static void grackle_register_types(void)
426f17bb 160{
39bffca2
AL
161 type_register_static(&grackle_pci_info);
162 type_register_static(&grackle_pci_host_info);
502a5395 163}
426f17bb 164
83f7d43a 165type_init(grackle_register_types)