]> git.proxmox.com Git - qemu.git/blame - hw/mac_nvram.c
Use glib memory allocation and free functions
[qemu.git] / hw / mac_nvram.c
CommitLineData
3cbee15b
JM
1/*
2 * PowerMac NVRAM emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
87ecb68b 25#include "hw.h"
95efd11c
BS
26#include "firmware_abi.h"
27#include "sysemu.h"
3cbee15b
JM
28#include "ppc_mac.h"
29
ea026b2f
BS
30/* debug NVR */
31//#define DEBUG_NVR
32
33#ifdef DEBUG_NVR
001faf32
BS
34#define NVR_DPRINTF(fmt, ...) \
35 do { printf("NVR: " fmt , ## __VA_ARGS__); } while (0)
ea026b2f 36#else
001faf32 37#define NVR_DPRINTF(fmt, ...)
ea026b2f
BS
38#endif
39
3cbee15b 40struct MacIONVRAMState {
8a11f43b 41 uint32_t size;
23c5e4ca 42 MemoryRegion mem;
68af3f24 43 unsigned int it_shift;
3f7cbbbd 44 uint8_t *data;
3cbee15b
JM
45};
46
bd89f43f
AJ
47#define DEF_SYSTEM_SIZE 0xc10
48
3cbee15b
JM
49/* Direct access to NVRAM */
50uint32_t macio_nvram_read (void *opaque, uint32_t addr)
51{
52 MacIONVRAMState *s = opaque;
53 uint32_t ret;
54
3f7cbbbd 55 if (addr < s->size)
3cbee15b
JM
56 ret = s->data[addr];
57 else
58 ret = -1;
ea026b2f 59 NVR_DPRINTF("read addr %04x val %x\n", addr, ret);
3cbee15b
JM
60
61 return ret;
62}
63
64void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val)
65{
66 MacIONVRAMState *s = opaque;
67
ea026b2f 68 NVR_DPRINTF("write addr %04x val %x\n", addr, val);
3f7cbbbd 69 if (addr < s->size)
3cbee15b
JM
70 s->data[addr] = val;
71}
72
73/* macio style NVRAM device */
23c5e4ca
AK
74static void macio_nvram_writeb(void *opaque, target_phys_addr_t addr,
75 uint64_t value, unsigned size)
3cbee15b
JM
76{
77 MacIONVRAMState *s = opaque;
74e91155 78
68af3f24 79 addr = (addr >> s->it_shift) & (s->size - 1);
3cbee15b 80 s->data[addr] = value;
ea026b2f 81 NVR_DPRINTF("writeb addr %04x val %x\n", (int)addr, value);
3cbee15b
JM
82}
83
23c5e4ca
AK
84static uint64_t macio_nvram_readb(void *opaque, target_phys_addr_t addr,
85 unsigned size)
3cbee15b
JM
86{
87 MacIONVRAMState *s = opaque;
88 uint32_t value;
89
68af3f24 90 addr = (addr >> s->it_shift) & (s->size - 1);
3cbee15b 91 value = s->data[addr];
ea026b2f 92 NVR_DPRINTF("readb addr %04x val %x\n", (int)addr, value);
3cbee15b
JM
93
94 return value;
95}
96
23c5e4ca
AK
97static const MemoryRegionOps macio_nvram_ops = {
98 .read = macio_nvram_readb,
99 .write = macio_nvram_writeb,
100 .endianness = DEVICE_NATIVE_ENDIAN,
3cbee15b
JM
101};
102
8e470f8a
JQ
103static const VMStateDescription vmstate_macio_nvram = {
104 .name = "macio_nvram",
105 .version_id = 1,
106 .minimum_version_id = 1,
107 .minimum_version_id_old = 1,
108 .fields = (VMStateField[]) {
109 VMSTATE_VBUFFER_UINT32(data, MacIONVRAMState, 0, NULL, 0, size),
110 VMSTATE_END_OF_LIST()
111 }
112};
9b64997f 113
9b64997f 114
6e6b7363
BS
115static void macio_nvram_reset(void *opaque)
116{
117}
118
23c5e4ca 119MacIONVRAMState *macio_nvram_init (target_phys_addr_t size,
68af3f24 120 unsigned int it_shift)
3cbee15b
JM
121{
122 MacIONVRAMState *s;
74e91155 123
7267c094
AL
124 s = g_malloc0(sizeof(MacIONVRAMState));
125 s->data = g_malloc0(size);
74e91155 126 s->size = size;
68af3f24 127 s->it_shift = it_shift;
3f7cbbbd 128
23c5e4ca
AK
129 memory_region_init_io(&s->mem, &macio_nvram_ops, s, "macio-nvram",
130 size << it_shift);
8e470f8a 131 vmstate_register(NULL, -1, &vmstate_macio_nvram, s);
a08d4367 132 qemu_register_reset(macio_nvram_reset, s);
3cbee15b
JM
133
134 return s;
135}
136
23c5e4ca
AK
137void macio_nvram_setup_bar(MacIONVRAMState *s, MemoryRegion *bar,
138 target_phys_addr_t mem_base)
74e91155 139{
23c5e4ca 140 memory_region_add_subregion(bar, mem_base, &s->mem);
74e91155
JM
141}
142
95efd11c 143/* Set up a system OpenBIOS NVRAM partition */
3cbee15b
JM
144void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len)
145{
95efd11c
BS
146 unsigned int i;
147 uint32_t start = 0, end;
148 struct OpenBIOS_nvpart_v1 *part_header;
149
150 // OpenBIOS nvram variables
151 // Variable partition
152 part_header = (struct OpenBIOS_nvpart_v1 *)nvr->data;
153 part_header->signature = OPENBIOS_PART_SYSTEM;
154 pstrcpy(part_header->name, sizeof(part_header->name), "system");
155
156 end = start + sizeof(struct OpenBIOS_nvpart_v1);
157 for (i = 0; i < nb_prom_envs; i++)
158 end = OpenBIOS_set_var(nvr->data, end, prom_envs[i]);
159
160 // End marker
161 nvr->data[end++] = '\0';
162
163 end = start + ((end - start + 15) & ~15);
bd89f43f
AJ
164 /* XXX: OpenBIOS is not able to grow up a partition. Leave some space for
165 new variables. */
166 if (end < DEF_SYSTEM_SIZE)
167 end = DEF_SYSTEM_SIZE;
95efd11c
BS
168 OpenBIOS_finish_partition(part_header, end - start);
169
170 // free partition
171 start = end;
172 part_header = (struct OpenBIOS_nvpart_v1 *)&nvr->data[start];
173 part_header->signature = OPENBIOS_PART_FREE;
174 pstrcpy(part_header->name, sizeof(part_header->name), "free");
175
176 end = len;
177 OpenBIOS_finish_partition(part_header, end - start);
3cbee15b 178}