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1/*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20#ifndef QEMU_CPU_H
21#define QEMU_CPU_H
22
fcd7d003 23#include <signal.h>
961f8395 24#include "hw/qdev-core.h"
c658b94f 25#include "exec/hwaddr.h"
1de7afc9 26#include "qemu/thread.h"
4917cf44 27#include "qemu/tls.h"
a23bbfda 28#include "qemu/typedefs.h"
dd83b06a 29
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30typedef int (*WriteCoreDumpFunction)(void *buf, size_t size, void *opaque);
31
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32/**
33 * vaddr:
34 * Type wide enough to contain any #target_ulong virtual address.
35 */
36typedef uint64_t vaddr;
37#define VADDR_PRId PRId64
38#define VADDR_PRIu PRIu64
39#define VADDR_PRIo PRIo64
40#define VADDR_PRIx PRIx64
41#define VADDR_PRIX PRIX64
42#define VADDR_MAX UINT64_MAX
43
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44/**
45 * SECTION:cpu
46 * @section_id: QEMU-cpu
47 * @title: CPU Class
48 * @short_description: Base class for all CPUs
49 */
50
51#define TYPE_CPU "cpu"
52
53#define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
54#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
55#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
56
57typedef struct CPUState CPUState;
58
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59typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
60 bool is_write, bool is_exec, int opaque,
61 unsigned size);
62
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63struct TranslationBlock;
64
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65/**
66 * CPUClass:
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67 * @class_by_name: Callback to map -cpu command line model name to an
68 * instantiatable CPU type.
f5df5baf 69 * @reset: Callback to reset the #CPUState to its initial state.
91b1df8c 70 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
97a8ea5a 71 * @do_interrupt: Callback for interrupt handling.
c658b94f 72 * @do_unassigned_access: Callback for unassigned access handling.
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73 * @dump_state: Callback for dumping state.
74 * @dump_statistics: Callback for dumping statistics.
997395d3 75 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
444d5590 76 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
a23bbfda 77 * @get_memory_mapping: Callback for obtaining the memory mappings.
f45748f1 78 * @set_pc: Callback for setting the Program Counter register.
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79 * @synchronize_from_tb: Callback for synchronizing state from a TCG
80 * #TranslationBlock.
b170fce3 81 * @vmsd: State description for migration.
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82 *
83 * Represents a CPU family or model.
84 */
85typedef struct CPUClass {
86 /*< private >*/
961f8395 87 DeviceClass parent_class;
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88 /*< public >*/
89
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90 ObjectClass *(*class_by_name)(const char *cpu_model);
91
dd83b06a 92 void (*reset)(CPUState *cpu);
91b1df8c 93 int reset_dump_flags;
97a8ea5a 94 void (*do_interrupt)(CPUState *cpu);
c658b94f 95 CPUUnassignedAccess do_unassigned_access;
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96 void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
97 int flags);
98 void (*dump_statistics)(CPUState *cpu, FILE *f,
99 fprintf_function cpu_fprintf, int flags);
997395d3 100 int64_t (*get_arch_id)(CPUState *cpu);
444d5590 101 bool (*get_paging_enabled)(const CPUState *cpu);
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102 void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
103 Error **errp);
f45748f1 104 void (*set_pc)(CPUState *cpu, vaddr value);
bdf7ae5b 105 void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
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106
107 const struct VMStateDescription *vmsd;
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108 int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
109 int cpuid, void *opaque);
110 int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
111 void *opaque);
112 int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
113 int cpuid, void *opaque);
114 int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
115 void *opaque);
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116} CPUClass;
117
a60f24b5 118struct KVMState;
f7575c96 119struct kvm_run;
a60f24b5 120
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121/**
122 * CPUState:
55e5c285 123 * @cpu_index: CPU index (informative).
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124 * @nr_cores: Number of cores within this CPU package.
125 * @nr_threads: Number of threads within this CPU.
1b1ed8dc 126 * @numa_node: NUMA node this CPU is belonging to.
0d34282f 127 * @host_tid: Host thread ID.
0315c31c 128 * @running: #true if CPU is currently running (usermode).
61a46217 129 * @created: Indicates whether the CPU thread has been successfully created.
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130 * @interrupt_request: Indicates a pending interrupt request.
131 * @halted: Nonzero if the CPU is in suspended state.
4fdeee7c 132 * @stop: Indicates a pending stop request.
f324e766 133 * @stopped: Indicates the CPU has been artificially stopped.
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134 * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
135 * CPU and return to its top level loop.
c05efcb1 136 * @env_ptr: Pointer to subclass-specific CPUArchState field.
d77953b9 137 * @current_tb: Currently executing TB.
182735ef 138 * @next_cpu: Next CPU sharing TB cache.
8737c51c 139 * @kvm_fd: vCPU file descriptor for KVM.
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140 *
141 * State of one CPU core or thread.
142 */
143struct CPUState {
144 /*< private >*/
961f8395 145 DeviceState parent_obj;
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146 /*< public >*/
147
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148 int nr_cores;
149 int nr_threads;
1b1ed8dc 150 int numa_node;
ce3960eb 151
814e612e 152 struct QemuThread *thread;
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153#ifdef _WIN32
154 HANDLE hThread;
155#endif
9f09e18a 156 int thread_id;
0d34282f 157 uint32_t host_tid;
0315c31c 158 bool running;
f5c121b8 159 struct QemuCond *halt_cond;
c64ca814 160 struct qemu_work_item *queued_work_first, *queued_work_last;
216fc9a4 161 bool thread_kicked;
61a46217 162 bool created;
4fdeee7c 163 bool stop;
f324e766 164 bool stopped;
fcd7d003 165 volatile sig_atomic_t exit_request;
378df4b2 166 volatile sig_atomic_t tcg_exit_req;
259186a7 167 uint32_t interrupt_request;
bcba2a72 168
c05efcb1 169 void *env_ptr; /* CPUArchState */
d77953b9 170 struct TranslationBlock *current_tb;
182735ef 171 CPUState *next_cpu;
d77953b9 172
8737c51c 173 int kvm_fd;
20d695a9 174 bool kvm_vcpu_dirty;
a60f24b5 175 struct KVMState *kvm_state;
f7575c96 176 struct kvm_run *kvm_run;
8737c51c 177
f5df5baf 178 /* TODO Move common fields from CPUArchState here. */
55e5c285 179 int cpu_index; /* used by alpha TCG */
259186a7 180 uint32_t halted; /* used by alpha, cris, ppc TCG */
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181};
182
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183extern CPUState *first_cpu;
184
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185DECLARE_TLS(CPUState *, current_cpu);
186#define current_cpu tls_var(current_cpu)
187
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188/**
189 * cpu_paging_enabled:
190 * @cpu: The CPU whose state is to be inspected.
191 *
192 * Returns: %true if paging is enabled, %false otherwise.
193 */
194bool cpu_paging_enabled(const CPUState *cpu);
195
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196/**
197 * cpu_get_memory_mapping:
198 * @cpu: The CPU whose memory mappings are to be obtained.
199 * @list: Where to write the memory mappings to.
200 * @errp: Pointer for reporting an #Error.
201 */
202void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
203 Error **errp);
204
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205/**
206 * cpu_write_elf64_note:
207 * @f: pointer to a function that writes memory to a file
208 * @cpu: The CPU whose memory is to be dumped
209 * @cpuid: ID number of the CPU
210 * @opaque: pointer to the CPUState struct
211 */
212int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
213 int cpuid, void *opaque);
214
215/**
216 * cpu_write_elf64_qemunote:
217 * @f: pointer to a function that writes memory to a file
218 * @cpu: The CPU whose memory is to be dumped
219 * @cpuid: ID number of the CPU
220 * @opaque: pointer to the CPUState struct
221 */
222int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
223 void *opaque);
224
225/**
226 * cpu_write_elf32_note:
227 * @f: pointer to a function that writes memory to a file
228 * @cpu: The CPU whose memory is to be dumped
229 * @cpuid: ID number of the CPU
230 * @opaque: pointer to the CPUState struct
231 */
232int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
233 int cpuid, void *opaque);
234
235/**
236 * cpu_write_elf32_qemunote:
237 * @f: pointer to a function that writes memory to a file
238 * @cpu: The CPU whose memory is to be dumped
239 * @cpuid: ID number of the CPU
240 * @opaque: pointer to the CPUState struct
241 */
242int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
243 void *opaque);
dd83b06a 244
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245/**
246 * CPUDumpFlags:
247 * @CPU_DUMP_CODE:
248 * @CPU_DUMP_FPU: dump FPU register state, not just integer
249 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
250 */
251enum CPUDumpFlags {
252 CPU_DUMP_CODE = 0x00010000,
253 CPU_DUMP_FPU = 0x00020000,
254 CPU_DUMP_CCOP = 0x00040000,
255};
256
257/**
258 * cpu_dump_state:
259 * @cpu: The CPU whose state is to be dumped.
260 * @f: File to dump to.
261 * @cpu_fprintf: Function to dump with.
262 * @flags: Flags what to dump.
263 *
264 * Dumps CPU state.
265 */
266void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
267 int flags);
268
269/**
270 * cpu_dump_statistics:
271 * @cpu: The CPU whose state is to be dumped.
272 * @f: File to dump to.
273 * @cpu_fprintf: Function to dump with.
274 * @flags: Flags what to dump.
275 *
276 * Dumps CPU statistics.
277 */
278void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
279 int flags);
280
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281/**
282 * cpu_reset:
283 * @cpu: The CPU whose state is to be reset.
284 */
285void cpu_reset(CPUState *cpu);
286
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287/**
288 * cpu_class_by_name:
289 * @typename: The CPU base type.
290 * @cpu_model: The model string without any parameters.
291 *
292 * Looks up a CPU #ObjectClass matching name @cpu_model.
293 *
294 * Returns: A #CPUClass or %NULL if not matching class is found.
295 */
296ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
297
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298/**
299 * cpu_class_set_vmsd:
300 * @cc: CPU class
301 * @value: Value to set. Unused for %CONFIG_USER_ONLY.
302 *
303 * Sets #VMStateDescription for @cc.
304 *
305 * The @value argument is intentionally discarded for the non-softmmu targets
306 * to avoid linker errors or excessive preprocessor usage. If this behavior
76d5f029 307 * is undesired, you should assign #CPUClass.vmsd directly instead.
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308 */
309#ifndef CONFIG_USER_ONLY
310static inline void cpu_class_set_vmsd(CPUClass *cc,
311 const struct VMStateDescription *value)
312{
313 cc->vmsd = value;
314}
315#else
316#define cpu_class_set_vmsd(cc, value) ((cc)->vmsd = NULL)
317#endif
318
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319#ifndef CONFIG_USER_ONLY
320static inline void cpu_class_set_do_unassigned_access(CPUClass *cc,
321 CPUUnassignedAccess value)
322{
323 cc->do_unassigned_access = value;
324}
325#else
326#define cpu_class_set_do_unassigned_access(cc, value) \
327 ((cc)->do_unassigned_access = NULL)
328#endif
329
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330/**
331 * device_class_set_vmsd:
332 * @dc: Device class
333 * @value: Value to set. Unused for %CONFIG_USER_ONLY.
334 *
335 * Sets #VMStateDescription for @dc.
336 *
337 * The @value argument is intentionally discarded for the non-softmmu targets
338 * to avoid linker errors or excessive preprocessor usage. If this behavior
339 * is undesired, you should assign #DeviceClass.vmsd directly instead.
340 */
341#ifndef CONFIG_USER_ONLY
342static inline void device_class_set_vmsd(DeviceClass *dc,
343 const struct VMStateDescription *value)
344{
345 dc->vmsd = value;
346}
347#else
348#define device_class_set_vmsd(dc, value) ((dc)->vmsd = NULL)
349#endif
350
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351/**
352 * qemu_cpu_has_work:
353 * @cpu: The vCPU to check.
354 *
355 * Checks whether the CPU has work to do.
356 *
357 * Returns: %true if the CPU has work, %false otherwise.
358 */
359bool qemu_cpu_has_work(CPUState *cpu);
360
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361/**
362 * qemu_cpu_is_self:
363 * @cpu: The vCPU to check against.
364 *
365 * Checks whether the caller is executing on the vCPU thread.
366 *
367 * Returns: %true if called from @cpu's thread, %false otherwise.
368 */
369bool qemu_cpu_is_self(CPUState *cpu);
370
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371/**
372 * qemu_cpu_kick:
373 * @cpu: The vCPU to kick.
374 *
375 * Kicks @cpu's thread.
376 */
377void qemu_cpu_kick(CPUState *cpu);
378
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379/**
380 * cpu_is_stopped:
381 * @cpu: The CPU to check.
382 *
383 * Checks whether the CPU is stopped.
384 *
385 * Returns: %true if run state is not running or if artificially stopped;
386 * %false otherwise.
387 */
388bool cpu_is_stopped(CPUState *cpu);
389
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390/**
391 * run_on_cpu:
392 * @cpu: The vCPU to run on.
393 * @func: The function to be executed.
394 * @data: Data to pass to the function.
395 *
396 * Schedules the function @func for execution on the vCPU @cpu.
397 */
398void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
399
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400/**
401 * async_run_on_cpu:
402 * @cpu: The vCPU to run on.
403 * @func: The function to be executed.
404 * @data: Data to pass to the function.
405 *
406 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
407 */
408void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
409
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410/**
411 * qemu_for_each_cpu:
412 * @func: The function to be executed.
413 * @data: Data to pass to the function.
414 *
415 * Executes @func for each CPU.
416 */
417void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data);
418
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419/**
420 * qemu_get_cpu:
421 * @index: The CPUState@cpu_index value of the CPU to obtain.
422 *
423 * Gets a CPU matching @index.
424 *
425 * Returns: The CPU or %NULL if there is no matching CPU.
426 */
427CPUState *qemu_get_cpu(int index);
428
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429/**
430 * cpu_exists:
431 * @id: Guest-exposed CPU ID to lookup.
432 *
433 * Search for CPU with specified ID.
434 *
435 * Returns: %true - CPU is found, %false - CPU isn't found.
436 */
437bool cpu_exists(int64_t id);
438
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439#ifndef CONFIG_USER_ONLY
440
441typedef void (*CPUInterruptHandler)(CPUState *, int);
442
443extern CPUInterruptHandler cpu_interrupt_handler;
444
445/**
446 * cpu_interrupt:
447 * @cpu: The CPU to set an interrupt on.
448 * @mask: The interupts to set.
449 *
450 * Invokes the interrupt handler.
451 */
452static inline void cpu_interrupt(CPUState *cpu, int mask)
453{
454 cpu_interrupt_handler(cpu, mask);
455}
456
457#else /* USER_ONLY */
458
459void cpu_interrupt(CPUState *cpu, int mask);
460
461#endif /* USER_ONLY */
462
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463#ifndef CONFIG_USER_ONLY
464
465static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
466 bool is_write, bool is_exec,
467 int opaque, unsigned size)
468{
469 CPUClass *cc = CPU_GET_CLASS(cpu);
470
471 if (cc->do_unassigned_access) {
472 cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
473 }
474}
475
476#endif
477
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478/**
479 * cpu_reset_interrupt:
480 * @cpu: The CPU to clear the interrupt on.
481 * @mask: The interrupt mask to clear.
482 *
483 * Resets interrupts on the vCPU @cpu.
484 */
485void cpu_reset_interrupt(CPUState *cpu, int mask);
486
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487/**
488 * cpu_exit:
489 * @cpu: The CPU to exit.
490 *
491 * Requests the CPU @cpu to exit execution.
492 */
493void cpu_exit(CPUState *cpu);
494
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495/**
496 * cpu_resume:
497 * @cpu: The CPU to resume.
498 *
499 * Resumes CPU, i.e. puts CPU into runnable state.
500 */
501void cpu_resume(CPUState *cpu);
dd83b06a 502
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503/**
504 * qemu_init_vcpu:
505 * @cpu: The vCPU to initialize.
506 *
507 * Initializes a vCPU.
508 */
509void qemu_init_vcpu(CPUState *cpu);
510
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511#ifdef CONFIG_SOFTMMU
512extern const struct VMStateDescription vmstate_cpu_common;
513#else
514#define vmstate_cpu_common vmstate_dummy
515#endif
516
517#define VMSTATE_CPU() { \
518 .name = "parent_obj", \
519 .size = sizeof(CPUState), \
520 .vmsd = &vmstate_cpu_common, \
521 .flags = VMS_STRUCT, \
522 .offset = 0, \
523}
524
dd83b06a 525#endif