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31e31b8a 1/*
93ac68bc 2 * qemu user main
5fafdf24 3 *
68d0f70e 4 * Copyright (c) 2003-2008 Fabrice Bellard
31e31b8a
FB		 5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
8167ee88 17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
31e31b8a
FB		 18 */
19#include <stdlib.h>
20#include <stdio.h>
21#include <stdarg.h>
04369ff2 22#include <string.h>
31e31b8a 23#include <errno.h>
0ecfa993 24#include <unistd.h>
e441570f 25#include <sys/mman.h>
edf8e2af 26#include <sys/syscall.h>
703e0e89 27#include <sys/resource.h>
31e31b8a 28
3ef693a0 29#include "qemu.h"
ca10f867 30#include "qemu-common.h"
902b3d5c 31#include "cache-utils.h"
2b41f10e 32#include "cpu.h"
9002ec79 33#include "tcg.h"
29e922b6 34#include "qemu-timer.h"
04a6dfeb
AJ		 35#include "envlist.h"
36
3ef693a0 37#define DEBUG_LOGFILE "/tmp/qemu.log"
586314f2 38
d088d664
AJ		 39char *exec_path;
40
1b530a6d 41int singlestep;
379f6698 42unsigned long mmap_min_addr;
14f24e14 43#if defined(CONFIG_USE_GUEST_BASE)
379f6698
PB		 44unsigned long guest_base;
45int have_guest_base;
68a1c816 46unsigned long reserved_va;
379f6698 47#endif
1b530a6d 48
7ee2822c 49static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;
c5937220 50const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
586314f2 51
9de5e440
FB		 52/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
53 we allocate a bigger stack. Need a better solution, for example
54 by remapping the process stack directly at the right place */
703e0e89 55unsigned long guest_stack_size = 8 * 1024 * 1024UL;
31e31b8a
FB		 56
57void gemu_log(const char *fmt, ...)
58{
59 va_list ap;
60
61 va_start(ap, fmt);
62 vfprintf(stderr, fmt, ap);
63 va_end(ap);
64}
65
8fcd3692 66#if defined(TARGET_I386)
a541f297 67int cpu_get_pic_interrupt(CPUState *env)
92ccca6a
FB		 68{
69 return -1;
70}
8fcd3692 71#endif
92ccca6a 72
28ab0e2e
FB		 73/* timers for rdtsc */
74
1dce7c3c 75#if 0
28ab0e2e
FB		 76
77static uint64_t emu_time;
78
79int64_t cpu_get_real_ticks(void)
80{
81 return emu_time++;
82}
83
84#endif
85
2f7bb878 86#if defined(CONFIG_USE_NPTL)
d5975363
PB		 87/***********************************************************/
88/* Helper routines for implementing atomic operations. */
89
90/* To implement exclusive operations we force all cpus to syncronise.
91 We don't require a full sync, only that no cpus are executing guest code.
92 The alternative is to map target atomic ops onto host equivalents,
93 which requires quite a lot of per host/target work. */
c2764719 94static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
d5975363
PB		 95static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
96static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
97static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
98static int pending_cpus;
99
100/* Make sure everything is in a consistent state for calling fork(). */
101void fork_start(void)
102{
d5975363
PB		 103 pthread_mutex_lock(&tb_lock);
104 pthread_mutex_lock(&exclusive_lock);
d032d1b4 105 mmap_fork_start();
d5975363
PB		 106}
107
108void fork_end(int child)
109{
d032d1b4 110 mmap_fork_end(child);
d5975363
PB		 111 if (child) {
112 /* Child processes created by fork() only have a single thread.
113 Discard information about the parent threads. */
114 first_cpu = thread_env;
115 thread_env->next_cpu = NULL;
116 pending_cpus = 0;
117 pthread_mutex_init(&exclusive_lock, NULL);
c2764719 118 pthread_mutex_init(&cpu_list_mutex, NULL);
d5975363
PB		 119 pthread_cond_init(&exclusive_cond, NULL);
120 pthread_cond_init(&exclusive_resume, NULL);
121 pthread_mutex_init(&tb_lock, NULL);
2b1319c8 122 gdbserver_fork(thread_env);
d5975363
PB		 123 } else {
124 pthread_mutex_unlock(&exclusive_lock);
125 pthread_mutex_unlock(&tb_lock);
126 }
d5975363
PB		 127}
128
129/* Wait for pending exclusive operations to complete. The exclusive lock
130 must be held. */
131static inline void exclusive_idle(void)
132{
133 while (pending_cpus) {
134 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
135 }
136}
137
138/* Start an exclusive operation.
139 Must only be called from outside cpu_arm_exec. */
140static inline void start_exclusive(void)
141{
142 CPUState *other;
143 pthread_mutex_lock(&exclusive_lock);
144 exclusive_idle();
145
146 pending_cpus = 1;
147 /* Make all other cpus stop executing. */
148 for (other = first_cpu; other; other = other->next_cpu) {
149 if (other->running) {
150 pending_cpus++;
3098dba0 151 cpu_exit(other);
d5975363
PB		 152 }
153 }
154 if (pending_cpus > 1) {
155 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
156 }
157}
158
159/* Finish an exclusive operation. */
160static inline void end_exclusive(void)
161{
162 pending_cpus = 0;
163 pthread_cond_broadcast(&exclusive_resume);
164 pthread_mutex_unlock(&exclusive_lock);
165}
166
167/* Wait for exclusive ops to finish, and begin cpu execution. */
168static inline void cpu_exec_start(CPUState *env)
169{
170 pthread_mutex_lock(&exclusive_lock);
171 exclusive_idle();
172 env->running = 1;
173 pthread_mutex_unlock(&exclusive_lock);
174}
175
176/* Mark cpu as not executing, and release pending exclusive ops. */
177static inline void cpu_exec_end(CPUState *env)
178{
179 pthread_mutex_lock(&exclusive_lock);
180 env->running = 0;
181 if (pending_cpus > 1) {
182 pending_cpus--;
183 if (pending_cpus == 1) {
184 pthread_cond_signal(&exclusive_cond);
185 }
186 }
187 exclusive_idle();
188 pthread_mutex_unlock(&exclusive_lock);
189}
c2764719
PB		 190
191void cpu_list_lock(void)
192{
193 pthread_mutex_lock(&cpu_list_mutex);
194}
195
196void cpu_list_unlock(void)
197{
198 pthread_mutex_unlock(&cpu_list_mutex);
199}
2f7bb878 200#else /* if !CONFIG_USE_NPTL */
d5975363
PB		 201/* These are no-ops because we are not threadsafe. */
202static inline void cpu_exec_start(CPUState *env)
203{
204}
205
206static inline void cpu_exec_end(CPUState *env)
207{
208}
209
210static inline void start_exclusive(void)
211{
212}
213
214static inline void end_exclusive(void)
215{
216}
217
218void fork_start(void)
219{
220}
221
222void fork_end(int child)
223{
2b1319c8
AJ		 224 if (child) {
225 gdbserver_fork(thread_env);
226 }
d5975363 227}
c2764719
PB		 228
229void cpu_list_lock(void)
230{
231}
232
233void cpu_list_unlock(void)
234{
235}
d5975363
PB		 236#endif
237
238
a541f297
FB		 239#ifdef TARGET_I386
240/***********************************************************/
241/* CPUX86 core interface */
242
02a1602e
FB		 243void cpu_smm_update(CPUState *env)
244{
245}
246
28ab0e2e
FB		 247uint64_t cpu_get_tsc(CPUX86State *env)
248{
249 return cpu_get_real_ticks();
250}
251
5fafdf24 252static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
f4beb510 253 int flags)
6dbad63e 254{
f4beb510 255 unsigned int e1, e2;
53a5960a 256 uint32_t *p;
6dbad63e
FB		 257 e1 = (addr << 16) | (limit & 0xffff);
258 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
f4beb510 259 e2 |= flags;
53a5960a 260 p = ptr;
d538e8f5 261 p[0] = tswap32(e1);
262 p[1] = tswap32(e2);
f4beb510
FB		 263}
264
e441570f 265static uint64_t *idt_table;
eb38c52c 266#ifdef TARGET_X86_64
d2fd1af7
FB		 267static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
268 uint64_t addr, unsigned int sel)
f4beb510 269{
4dbc422b 270 uint32_t *p, e1, e2;
f4beb510
FB		 271 e1 = (addr & 0xffff) | (sel << 16);
272 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
53a5960a 273 p = ptr;
4dbc422b
FB		 274 p[0] = tswap32(e1);
275 p[1] = tswap32(e2);
276 p[2] = tswap32(addr >> 32);
277 p[3] = 0;
6dbad63e 278}
d2fd1af7
FB		 279/* only dpl matters as we do only user space emulation */
280static void set_idt(int n, unsigned int dpl)
281{
282 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
283}
284#else
d2fd1af7
FB		 285static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
286 uint32_t addr, unsigned int sel)
287{
4dbc422b 288 uint32_t *p, e1, e2;
d2fd1af7
FB		 289 e1 = (addr & 0xffff) | (sel << 16);
290 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
291 p = ptr;
4dbc422b
FB		 292 p[0] = tswap32(e1);
293 p[1] = tswap32(e2);
d2fd1af7
FB		 294}
295
f4beb510
FB		 296/* only dpl matters as we do only user space emulation */
297static void set_idt(int n, unsigned int dpl)
298{
299 set_gate(idt_table + n, 0, dpl, 0, 0);
300}
d2fd1af7 301#endif
31e31b8a 302
89e957e7 303void cpu_loop(CPUX86State *env)
1b6b029e 304{
bc8a22cc 305 int trapnr;
992f48a0 306 abi_ulong pc;
c227f099 307 target_siginfo_t info;
851e67a1 308
1b6b029e 309 for(;;) {
bc8a22cc 310 trapnr = cpu_x86_exec(env);
bc8a22cc 311 switch(trapnr) {
f4beb510 312 case 0x80:
d2fd1af7 313 /* linux syscall from int $0x80 */
5fafdf24
TS		 314 env->regs[R_EAX] = do_syscall(env,
315 env->regs[R_EAX],
f4beb510
FB		 316 env->regs[R_EBX],
317 env->regs[R_ECX],
318 env->regs[R_EDX],
319 env->regs[R_ESI],
320 env->regs[R_EDI],
5945cfcb
PM		 321 env->regs[R_EBP],
322 0, 0);
f4beb510 323 break;
d2fd1af7
FB		 324#ifndef TARGET_ABI32
325 case EXCP_SYSCALL:
5ba18547 326 /* linux syscall from syscall instruction */
d2fd1af7
FB		 327 env->regs[R_EAX] = do_syscall(env,
328 env->regs[R_EAX],
329 env->regs[R_EDI],
330 env->regs[R_ESI],
331 env->regs[R_EDX],
332 env->regs[10],
333 env->regs[8],
5945cfcb
PM		 334 env->regs[9],
335 0, 0);
d2fd1af7
FB		 336 env->eip = env->exception_next_eip;
337 break;
338#endif
f4beb510
FB		 339 case EXCP0B_NOSEG:
340 case EXCP0C_STACK:
341 info.si_signo = SIGBUS;
342 info.si_errno = 0;
343 info.si_code = TARGET_SI_KERNEL;
344 info._sifields._sigfault._addr = 0;
624f7979 345 queue_signal(env, info.si_signo, &info);
f4beb510 346 break;
1b6b029e 347 case EXCP0D_GPF:
d2fd1af7 348 /* XXX: potential problem if ABI32 */
84409ddb 349#ifndef TARGET_X86_64
851e67a1 350 if (env->eflags & VM_MASK) {
89e957e7 351 handle_vm86_fault(env);
84409ddb
JM		 352 } else
353#endif
354 {
f4beb510
FB		 355 info.si_signo = SIGSEGV;
356 info.si_errno = 0;
357 info.si_code = TARGET_SI_KERNEL;
358 info._sifields._sigfault._addr = 0;
624f7979 359 queue_signal(env, info.si_signo, &info);
1b6b029e
FB		 360 }
361 break;
b689bc57
FB		 362 case EXCP0E_PAGE:
363 info.si_signo = SIGSEGV;
364 info.si_errno = 0;
365 if (!(env->error_code & 1))
366 info.si_code = TARGET_SEGV_MAPERR;
367 else
368 info.si_code = TARGET_SEGV_ACCERR;
970a87a6 369 info._sifields._sigfault._addr = env->cr[2];
624f7979 370 queue_signal(env, info.si_signo, &info);
b689bc57 371 break;
9de5e440 372 case EXCP00_DIVZ:
84409ddb 373#ifndef TARGET_X86_64
bc8a22cc 374 if (env->eflags & VM_MASK) {
447db213 375 handle_vm86_trap(env, trapnr);
84409ddb
JM		 376 } else
377#endif
378 {
bc8a22cc
FB		 379 /* division by zero */
380 info.si_signo = SIGFPE;
381 info.si_errno = 0;
382 info.si_code = TARGET_FPE_INTDIV;
383 info._sifields._sigfault._addr = env->eip;
624f7979 384 queue_signal(env, info.si_signo, &info);
bc8a22cc 385 }
9de5e440 386 break;
01df040b 387 case EXCP01_DB:
447db213 388 case EXCP03_INT3:
84409ddb 389#ifndef TARGET_X86_64
447db213
FB		 390 if (env->eflags & VM_MASK) {
391 handle_vm86_trap(env, trapnr);
84409ddb
JM		 392 } else
393#endif
394 {
447db213
FB		 395 info.si_signo = SIGTRAP;
396 info.si_errno = 0;
01df040b 397 if (trapnr == EXCP01_DB) {
447db213
FB		 398 info.si_code = TARGET_TRAP_BRKPT;
399 info._sifields._sigfault._addr = env->eip;
400 } else {
401 info.si_code = TARGET_SI_KERNEL;
402 info._sifields._sigfault._addr = 0;
403 }
624f7979 404 queue_signal(env, info.si_signo, &info);
447db213
FB		 405 }
406 break;
9de5e440
FB		 407 case EXCP04_INTO:
408 case EXCP05_BOUND:
84409ddb 409#ifndef TARGET_X86_64
bc8a22cc 410 if (env->eflags & VM_MASK) {
447db213 411 handle_vm86_trap(env, trapnr);
84409ddb
JM		 412 } else
413#endif
414 {
bc8a22cc
FB		 415 info.si_signo = SIGSEGV;
416 info.si_errno = 0;
b689bc57 417 info.si_code = TARGET_SI_KERNEL;
bc8a22cc 418 info._sifields._sigfault._addr = 0;
624f7979 419 queue_signal(env, info.si_signo, &info);
bc8a22cc 420 }
9de5e440
FB		 421 break;
422 case EXCP06_ILLOP:
423 info.si_signo = SIGILL;
424 info.si_errno = 0;
425 info.si_code = TARGET_ILL_ILLOPN;
426 info._sifields._sigfault._addr = env->eip;
624f7979 427 queue_signal(env, info.si_signo, &info);
9de5e440
FB		 428 break;
429 case EXCP_INTERRUPT:
430 /* just indicate that signals should be handled asap */
431 break;
1fddef4b
FB		 432 case EXCP_DEBUG:
433 {
434 int sig;
435
436 sig = gdb_handlesig (env, TARGET_SIGTRAP);
437 if (sig)
438 {
439 info.si_signo = sig;
440 info.si_errno = 0;
441 info.si_code = TARGET_TRAP_BRKPT;
624f7979 442 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 443 }
444 }
445 break;
1b6b029e 446 default:
970a87a6 447 pc = env->segs[R_CS].base + env->eip;
5fafdf24 448 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
bc8a22cc 449 (long)pc, trapnr);
1b6b029e
FB		 450 abort();
451 }
66fb9763 452 process_pending_signals(env);
1b6b029e
FB		 453 }
454}
b346ff46
FB		 455#endif
456
457#ifdef TARGET_ARM
458
fbb4a2e3
PB		 459/* Handle a jump to the kernel code page. */
460static int
461do_kernel_trap(CPUARMState *env)
462{
463 uint32_t addr;
464 uint32_t cpsr;
465 uint32_t val;
466
467 switch (env->regs[15]) {
468 case 0xffff0fa0: /* __kernel_memory_barrier */
469 /* ??? No-op. Will need to do better for SMP. */
470 break;
471 case 0xffff0fc0: /* __kernel_cmpxchg */
d5975363
PB		 472 /* XXX: This only works between threads, not between processes.
473 It's probably possible to implement this with native host
474 operations. However things like ldrex/strex are much harder so
475 there's not much point trying. */
476 start_exclusive();
fbb4a2e3
PB		 477 cpsr = cpsr_read(env);
478 addr = env->regs[2];
479 /* FIXME: This should SEGV if the access fails. */
480 if (get_user_u32(val, addr))
481 val = ~env->regs[0];
482 if (val == env->regs[0]) {
483 val = env->regs[1];
484 /* FIXME: Check for segfaults. */
485 put_user_u32(val, addr);
486 env->regs[0] = 0;
487 cpsr |= CPSR_C;
488 } else {
489 env->regs[0] = -1;
490 cpsr &= ~CPSR_C;
491 }
492 cpsr_write(env, cpsr, CPSR_C);
d5975363 493 end_exclusive();
fbb4a2e3
PB		 494 break;
495 case 0xffff0fe0: /* __kernel_get_tls */
496 env->regs[0] = env->cp15.c13_tls2;
497 break;
498 default:
499 return 1;
500 }
501 /* Jump back to the caller. */
502 addr = env->regs[14];
503 if (addr & 1) {
504 env->thumb = 1;
505 addr &= ~1;
506 }
507 env->regs[15] = addr;
508
509 return 0;
510}
511
426f5abc
PB		 512static int do_strex(CPUARMState *env)
513{
514 uint32_t val;
515 int size;
516 int rc = 1;
517 int segv = 0;
518 uint32_t addr;
519 start_exclusive();
520 addr = env->exclusive_addr;
521 if (addr != env->exclusive_test) {
522 goto fail;
523 }
524 size = env->exclusive_info & 0xf;
525 switch (size) {
526 case 0:
527 segv = get_user_u8(val, addr);
528 break;
529 case 1:
530 segv = get_user_u16(val, addr);
531 break;
532 case 2:
533 case 3:
534 segv = get_user_u32(val, addr);
535 break;
f7001a3b
AJ		 536 default:
537 abort();
426f5abc
PB		 538 }
539 if (segv) {
540 env->cp15.c6_data = addr;
541 goto done;
542 }
543 if (val != env->exclusive_val) {
544 goto fail;
545 }
546 if (size == 3) {
547 segv = get_user_u32(val, addr + 4);
548 if (segv) {
549 env->cp15.c6_data = addr + 4;
550 goto done;
551 }
552 if (val != env->exclusive_high) {
553 goto fail;
554 }
555 }
556 val = env->regs[(env->exclusive_info >> 8) & 0xf];
557 switch (size) {
558 case 0:
559 segv = put_user_u8(val, addr);
560 break;
561 case 1:
562 segv = put_user_u16(val, addr);
563 break;
564 case 2:
565 case 3:
566 segv = put_user_u32(val, addr);
567 break;
568 }
569 if (segv) {
570 env->cp15.c6_data = addr;
571 goto done;
572 }
573 if (size == 3) {
574 val = env->regs[(env->exclusive_info >> 12) & 0xf];
2c9adbda 575 segv = put_user_u32(val, addr + 4);
426f5abc
PB		 576 if (segv) {
577 env->cp15.c6_data = addr + 4;
578 goto done;
579 }
580 }
581 rc = 0;
582fail:
725b8a69 583 env->regs[15] += 4;
426f5abc
PB		 584 env->regs[(env->exclusive_info >> 4) & 0xf] = rc;
585done:
586 end_exclusive();
587 return segv;
588}
589
b346ff46
FB		 590void cpu_loop(CPUARMState *env)
591{
592 int trapnr;
593 unsigned int n, insn;
c227f099 594 target_siginfo_t info;
b5ff1b31 595 uint32_t addr;
3b46e624 596
b346ff46 597 for(;;) {
d5975363 598 cpu_exec_start(env);
b346ff46 599 trapnr = cpu_arm_exec(env);
d5975363 600 cpu_exec_end(env);
b346ff46
FB		 601 switch(trapnr) {
602 case EXCP_UDEF:
c6981055
FB		 603 {
604 TaskState *ts = env->opaque;
605 uint32_t opcode;
6d9a42be 606 int rc;
c6981055
FB		 607
608 /* we handle the FPU emulation here, as Linux */
609 /* we get the opcode */
2f619698
FB		 610 /* FIXME - what to do if get_user() fails? */
611 get_user_u32(opcode, env->regs[15]);
3b46e624 612
6d9a42be
AJ		 613 rc = EmulateAll(opcode, &ts->fpa, env);
614 if (rc == 0) { /* illegal instruction */
c6981055
FB		 615 info.si_signo = SIGILL;
616 info.si_errno = 0;
617 info.si_code = TARGET_ILL_ILLOPN;
618 info._sifields._sigfault._addr = env->regs[15];
624f7979 619 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 620 } else if (rc < 0) { /* FP exception */
621 int arm_fpe=0;
622
623 /* translate softfloat flags to FPSR flags */
624 if (-rc & float_flag_invalid)
625 arm_fpe |= BIT_IOC;
626 if (-rc & float_flag_divbyzero)
627 arm_fpe |= BIT_DZC;
628 if (-rc & float_flag_overflow)
629 arm_fpe |= BIT_OFC;
630 if (-rc & float_flag_underflow)
631 arm_fpe |= BIT_UFC;
632 if (-rc & float_flag_inexact)
633 arm_fpe |= BIT_IXC;
634
635 FPSR fpsr = ts->fpa.fpsr;
636 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
637
638 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
639 info.si_signo = SIGFPE;
640 info.si_errno = 0;
641
642 /* ordered by priority, least first */
643 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
644 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
645 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
646 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
647 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
648
649 info._sifields._sigfault._addr = env->regs[15];
624f7979 650 queue_signal(env, info.si_signo, &info);
6d9a42be
AJ		 651 } else {
652 env->regs[15] += 4;
653 }
654
655 /* accumulate unenabled exceptions */
656 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
657 fpsr |= BIT_IXC;
658 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
659 fpsr |= BIT_UFC;
660 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
661 fpsr |= BIT_OFC;
662 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
663 fpsr |= BIT_DZC;
664 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
665 fpsr |= BIT_IOC;
666 ts->fpa.fpsr=fpsr;
667 } else { /* everything OK */
c6981055
FB		 668 /* increment PC */
669 env->regs[15] += 4;
670 }
671 }
b346ff46
FB		 672 break;
673 case EXCP_SWI:
06c949e6 674 case EXCP_BKPT:
b346ff46 675 {
ce4defa0 676 env->eabi = 1;
b346ff46 677 /* system call */
06c949e6
PB		 678 if (trapnr == EXCP_BKPT) {
679 if (env->thumb) {
2f619698
FB		 680 /* FIXME - what to do if get_user() fails? */
681 get_user_u16(insn, env->regs[15]);
06c949e6
PB		 682 n = insn & 0xff;
683 env->regs[15] += 2;
684 } else {
2f619698
FB		 685 /* FIXME - what to do if get_user() fails? */
686 get_user_u32(insn, env->regs[15]);
06c949e6
PB		 687 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
688 env->regs[15] += 4;
689 }
192c7bd9 690 } else {
06c949e6 691 if (env->thumb) {
2f619698
FB		 692 /* FIXME - what to do if get_user() fails? */
693 get_user_u16(insn, env->regs[15] - 2);
06c949e6
PB		 694 n = insn & 0xff;
695 } else {
2f619698
FB		 696 /* FIXME - what to do if get_user() fails? */
697 get_user_u32(insn, env->regs[15] - 4);
06c949e6
PB		 698 n = insn & 0xffffff;
699 }
192c7bd9
FB		 700 }
701
6f1f31c0 702 if (n == ARM_NR_cacheflush) {
dcfd14b3 703 /* nop */
a4f81979
FB		 704 } else if (n == ARM_NR_semihosting
705 || n == ARM_NR_thumb_semihosting) {
706 env->regs[0] = do_arm_semihosting (env);
ce4defa0 707 } else if (n == 0 || n >= ARM_SYSCALL_BASE
192c7bd9 708 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
b346ff46 709 /* linux syscall */
ce4defa0 710 if (env->thumb || n == 0) {
192c7bd9
FB		 711 n = env->regs[7];
712 } else {
713 n -= ARM_SYSCALL_BASE;
ce4defa0 714 env->eabi = 0;
192c7bd9 715 }
fbb4a2e3
PB		 716 if ( n > ARM_NR_BASE) {
717 switch (n) {
718 case ARM_NR_cacheflush:
dcfd14b3 719 /* nop */
fbb4a2e3
PB		 720 break;
721 case ARM_NR_set_tls:
722 cpu_set_tls(env, env->regs[0]);
723 env->regs[0] = 0;
724 break;
725 default:
726 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
727 n);
728 env->regs[0] = -TARGET_ENOSYS;
729 break;
730 }
731 } else {
732 env->regs[0] = do_syscall(env,
733 n,
734 env->regs[0],
735 env->regs[1],
736 env->regs[2],
737 env->regs[3],
738 env->regs[4],
5945cfcb
PM		 739 env->regs[5],
740 0, 0);
fbb4a2e3 741 }
b346ff46
FB		 742 } else {
743 goto error;
744 }
745 }
746 break;
43fff238
FB		 747 case EXCP_INTERRUPT:
748 /* just indicate that signals should be handled asap */
749 break;
68016c62 750 case EXCP_PREFETCH_ABORT:
eae473c1 751 addr = env->cp15.c6_insn;
b5ff1b31 752 goto do_segv;
68016c62 753 case EXCP_DATA_ABORT:
eae473c1 754 addr = env->cp15.c6_data;
b5ff1b31
FB		 755 goto do_segv;
756 do_segv:
68016c62
FB		 757 {
758 info.si_signo = SIGSEGV;
759 info.si_errno = 0;
760 /* XXX: check env->error_code */
761 info.si_code = TARGET_SEGV_MAPERR;
b5ff1b31 762 info._sifields._sigfault._addr = addr;
624f7979 763 queue_signal(env, info.si_signo, &info);
68016c62
FB		 764 }
765 break;
1fddef4b
FB		 766 case EXCP_DEBUG:
767 {
768 int sig;
769
770 sig = gdb_handlesig (env, TARGET_SIGTRAP);
771 if (sig)
772 {
773 info.si_signo = sig;
774 info.si_errno = 0;
775 info.si_code = TARGET_TRAP_BRKPT;
624f7979 776 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 777 }
778 }
779 break;
fbb4a2e3
PB		 780 case EXCP_KERNEL_TRAP:
781 if (do_kernel_trap(env))
782 goto error;
783 break;
426f5abc
PB		 784 case EXCP_STREX:
785 if (do_strex(env)) {
786 addr = env->cp15.c6_data;
787 goto do_segv;
788 }
e9273455 789 break;
b346ff46
FB		 790 default:
791 error:
5fafdf24 792 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
b346ff46 793 trapnr);
7fe48483 794 cpu_dump_state(env, stderr, fprintf, 0);
b346ff46
FB		 795 abort();
796 }
797 process_pending_signals(env);
798 }
799}
800
801#endif
1b6b029e 802
d2fbca94
GX		 803#ifdef TARGET_UNICORE32
804
805void cpu_loop(CPUState *env)
806{
807 int trapnr;
808 unsigned int n, insn;
809 target_siginfo_t info;
810
811 for (;;) {
812 cpu_exec_start(env);
813 trapnr = uc32_cpu_exec(env);
814 cpu_exec_end(env);
815 switch (trapnr) {
816 case UC32_EXCP_PRIV:
817 {
818 /* system call */
819 get_user_u32(insn, env->regs[31] - 4);
820 n = insn & 0xffffff;
821
822 if (n >= UC32_SYSCALL_BASE) {
823 /* linux syscall */
824 n -= UC32_SYSCALL_BASE;
825 if (n == UC32_SYSCALL_NR_set_tls) {
826 cpu_set_tls(env, env->regs[0]);
827 env->regs[0] = 0;
828 } else {
829 env->regs[0] = do_syscall(env,
830 n,
831 env->regs[0],
832 env->regs[1],
833 env->regs[2],
834 env->regs[3],
835 env->regs[4],
5945cfcb
PM		 836 env->regs[5],
837 0, 0);
d2fbca94
GX		 838 }
839 } else {
840 goto error;
841 }
842 }
843 break;
844 case UC32_EXCP_TRAP:
845 info.si_signo = SIGSEGV;
846 info.si_errno = 0;
847 /* XXX: check env->error_code */
848 info.si_code = TARGET_SEGV_MAPERR;
849 info._sifields._sigfault._addr = env->cp0.c4_faultaddr;
850 queue_signal(env, info.si_signo, &info);
851 break;
852 case EXCP_INTERRUPT:
853 /* just indicate that signals should be handled asap */
854 break;
855 case EXCP_DEBUG:
856 {
857 int sig;
858
859 sig = gdb_handlesig(env, TARGET_SIGTRAP);
860 if (sig) {
861 info.si_signo = sig;
862 info.si_errno = 0;
863 info.si_code = TARGET_TRAP_BRKPT;
864 queue_signal(env, info.si_signo, &info);
865 }
866 }
867 break;
868 default:
869 goto error;
870 }
871 process_pending_signals(env);
872 }
873
874error:
875 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
876 cpu_dump_state(env, stderr, fprintf, 0);
877 abort();
878}
879#endif
880
93ac68bc 881#ifdef TARGET_SPARC
ed23fbd9 882#define SPARC64_STACK_BIAS 2047
93ac68bc 883
060366c5
FB		 884//#define DEBUG_WIN
885
2623cbaf
FB		 886/* WARNING: dealing with register windows _is_ complicated. More info
887 can be found at http://www.sics.se/~psm/sparcstack.html */
060366c5
FB		 888static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
889{
1a14026e 890 index = (index + cwp * 16) % (16 * env->nwindows);
060366c5
FB		 891 /* wrap handling : if cwp is on the last window, then we use the
892 registers 'after' the end */
1a14026e
BS		 893 if (index < 8 && env->cwp == env->nwindows - 1)
894 index += 16 * env->nwindows;
060366c5
FB		 895 return index;
896}
897
2623cbaf
FB		 898/* save the register window 'cwp1' */
899static inline void save_window_offset(CPUSPARCState *env, int cwp1)
060366c5 900{
2623cbaf 901 unsigned int i;
992f48a0 902 abi_ulong sp_ptr;
3b46e624 903
53a5960a 904 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 905#ifdef TARGET_SPARC64
906 if (sp_ptr & 3)
907 sp_ptr += SPARC64_STACK_BIAS;
908#endif
060366c5 909#if defined(DEBUG_WIN)
2daf0284
BS		 910 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
911 sp_ptr, cwp1);
060366c5 912#endif
2623cbaf 913 for(i = 0; i < 16; i++) {
2f619698
FB		 914 /* FIXME - what to do if put_user() fails? */
915 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 916 sp_ptr += sizeof(abi_ulong);
2623cbaf 917 }
060366c5
FB		 918}
919
920static void save_window(CPUSPARCState *env)
921{
5ef54116 922#ifndef TARGET_SPARC64
2623cbaf 923 unsigned int new_wim;
1a14026e
BS		 924 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
925 ((1LL << env->nwindows) - 1);
926 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
2623cbaf 927 env->wim = new_wim;
5ef54116 928#else
1a14026e 929 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
5ef54116
FB		 930 env->cansave++;
931 env->canrestore--;
932#endif
060366c5
FB		 933}
934
935static void restore_window(CPUSPARCState *env)
936{
eda52953
BS		 937#ifndef TARGET_SPARC64
938 unsigned int new_wim;
939#endif
940 unsigned int i, cwp1;
992f48a0 941 abi_ulong sp_ptr;
3b46e624 942
eda52953 943#ifndef TARGET_SPARC64
1a14026e
BS		 944 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
945 ((1LL << env->nwindows) - 1);
eda52953 946#endif
3b46e624 947
060366c5 948 /* restore the invalid window */
1a14026e 949 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
53a5960a 950 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
ed23fbd9
BS		 951#ifdef TARGET_SPARC64
952 if (sp_ptr & 3)
953 sp_ptr += SPARC64_STACK_BIAS;
954#endif
060366c5 955#if defined(DEBUG_WIN)
2daf0284
BS		 956 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
957 sp_ptr, cwp1);
060366c5 958#endif
2623cbaf 959 for(i = 0; i < 16; i++) {
2f619698
FB		 960 /* FIXME - what to do if get_user() fails? */
961 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
992f48a0 962 sp_ptr += sizeof(abi_ulong);
2623cbaf 963 }
5ef54116
FB		 964#ifdef TARGET_SPARC64
965 env->canrestore++;
1a14026e
BS		 966 if (env->cleanwin < env->nwindows - 1)
967 env->cleanwin++;
5ef54116 968 env->cansave--;
eda52953
BS		 969#else
970 env->wim = new_wim;
5ef54116 971#endif
060366c5
FB		 972}
973
974static void flush_windows(CPUSPARCState *env)
975{
976 int offset, cwp1;
2623cbaf
FB		 977
978 offset = 1;
060366c5
FB		 979 for(;;) {
980 /* if restore would invoke restore_window(), then we can stop */
1a14026e 981 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
eda52953 982#ifndef TARGET_SPARC64
060366c5
FB		 983 if (env->wim & (1 << cwp1))
984 break;
eda52953
BS		 985#else
986 if (env->canrestore == 0)
987 break;
988 env->cansave++;
989 env->canrestore--;
990#endif
2623cbaf 991 save_window_offset(env, cwp1);
060366c5
FB		 992 offset++;
993 }
1a14026e 994 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
eda52953
BS		 995#ifndef TARGET_SPARC64
996 /* set wim so that restore will reload the registers */
2623cbaf 997 env->wim = 1 << cwp1;
eda52953 998#endif
2623cbaf
FB		 999#if defined(DEBUG_WIN)
1000 printf("flush_windows: nb=%d\n", offset - 1);
80a9d035 1001#endif
2623cbaf 1002}
060366c5 1003
93ac68bc
FB		 1004void cpu_loop (CPUSPARCState *env)
1005{
2cc20260
RH		 1006 int trapnr;
1007 abi_long ret;
c227f099 1008 target_siginfo_t info;
3b46e624 1009
060366c5
FB		 1010 while (1) {
1011 trapnr = cpu_sparc_exec (env);
3b46e624 1012
060366c5 1013 switch (trapnr) {
5ef54116 1014#ifndef TARGET_SPARC64
5fafdf24 1015 case 0x88:
060366c5 1016 case 0x90:
5ef54116 1017#else
cb33da57 1018 case 0x110:
5ef54116
FB		 1019 case 0x16d:
1020#endif
060366c5 1021 ret = do_syscall (env, env->gregs[1],
5fafdf24
TS		 1022 env->regwptr[0], env->regwptr[1],
1023 env->regwptr[2], env->regwptr[3],
5945cfcb
PM		 1024 env->regwptr[4], env->regwptr[5],
1025 0, 0);
2cc20260 1026 if ((abi_ulong)ret >= (abi_ulong)(-515)) {
992f48a0 1027#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1028 env->xcc |= PSR_CARRY;
1029#else
060366c5 1030 env->psr |= PSR_CARRY;
27908725 1031#endif
060366c5
FB		 1032 ret = -ret;
1033 } else {
992f48a0 1034#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
27908725
FB		 1035 env->xcc &= ~PSR_CARRY;
1036#else
060366c5 1037 env->psr &= ~PSR_CARRY;
27908725 1038#endif
060366c5
FB		 1039 }
1040 env->regwptr[0] = ret;
1041 /* next instruction */
1042 env->pc = env->npc;
1043 env->npc = env->npc + 4;
1044 break;
1045 case 0x83: /* flush windows */
992f48a0
BS		 1046#ifdef TARGET_ABI32
1047 case 0x103:
1048#endif
2623cbaf 1049 flush_windows(env);
060366c5
FB		 1050 /* next instruction */
1051 env->pc = env->npc;
1052 env->npc = env->npc + 4;
1053 break;
3475187d 1054#ifndef TARGET_SPARC64
060366c5
FB		 1055 case TT_WIN_OVF: /* window overflow */
1056 save_window(env);
1057 break;
1058 case TT_WIN_UNF: /* window underflow */
1059 restore_window(env);
1060 break;
61ff6f58
FB		 1061 case TT_TFAULT:
1062 case TT_DFAULT:
1063 {
1064 info.si_signo = SIGSEGV;
1065 info.si_errno = 0;
1066 /* XXX: check env->error_code */
1067 info.si_code = TARGET_SEGV_MAPERR;
1068 info._sifields._sigfault._addr = env->mmuregs[4];
624f7979 1069 queue_signal(env, info.si_signo, &info);
61ff6f58
FB		 1070 }
1071 break;
3475187d 1072#else
5ef54116
FB		 1073 case TT_SPILL: /* window overflow */
1074 save_window(env);
1075 break;
1076 case TT_FILL: /* window underflow */
1077 restore_window(env);
1078 break;
7f84a729
BS		 1079 case TT_TFAULT:
1080 case TT_DFAULT:
1081 {
1082 info.si_signo = SIGSEGV;
1083 info.si_errno = 0;
1084 /* XXX: check env->error_code */
1085 info.si_code = TARGET_SEGV_MAPERR;
1086 if (trapnr == TT_DFAULT)
1087 info._sifields._sigfault._addr = env->dmmuregs[4];
1088 else
8194f35a 1089 info._sifields._sigfault._addr = cpu_tsptr(env)->tpc;
624f7979 1090 queue_signal(env, info.si_signo, &info);
7f84a729
BS		 1091 }
1092 break;
27524dc3 1093#ifndef TARGET_ABI32
5bfb56b2
BS		 1094 case 0x16e:
1095 flush_windows(env);
1096 sparc64_get_context(env);
1097 break;
1098 case 0x16f:
1099 flush_windows(env);
1100 sparc64_set_context(env);
1101 break;
27524dc3 1102#endif
3475187d 1103#endif
48dc41eb
FB		 1104 case EXCP_INTERRUPT:
1105 /* just indicate that signals should be handled asap */
1106 break;
1fddef4b
FB		 1107 case EXCP_DEBUG:
1108 {
1109 int sig;
1110
1111 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1112 if (sig)
1113 {
1114 info.si_signo = sig;
1115 info.si_errno = 0;
1116 info.si_code = TARGET_TRAP_BRKPT;
624f7979 1117 queue_signal(env, info.si_signo, &info);
1fddef4b
FB		 1118 }
1119 }
1120 break;
060366c5
FB		 1121 default:
1122 printf ("Unhandled trap: 0x%x\n", trapnr);
7fe48483 1123 cpu_dump_state(env, stderr, fprintf, 0);
060366c5
FB		 1124 exit (1);
1125 }
1126 process_pending_signals (env);
1127 }
93ac68bc
FB		 1128}
1129
1130#endif
1131
67867308 1132#ifdef TARGET_PPC
9fddaa0c
FB		 1133static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1134{
1135 /* TO FIX */
1136 return 0;
1137}
3b46e624 1138
e3ea6529 1139uint64_t cpu_ppc_load_tbl (CPUState *env)
9fddaa0c 1140{
e3ea6529 1141 return cpu_ppc_get_tb(env);
9fddaa0c 1142}
3b46e624 1143
9fddaa0c
FB		 1144uint32_t cpu_ppc_load_tbu (CPUState *env)
1145{
1146 return cpu_ppc_get_tb(env) >> 32;
1147}
3b46e624 1148
b711de95 1149uint64_t cpu_ppc_load_atbl (CPUState *env)
9fddaa0c 1150{
b711de95 1151 return cpu_ppc_get_tb(env);
9fddaa0c 1152}
5fafdf24 1153
a062e36c 1154uint32_t cpu_ppc_load_atbu (CPUState *env)
9fddaa0c 1155{
a062e36c 1156 return cpu_ppc_get_tb(env) >> 32;
9fddaa0c 1157}
76a66253 1158
76a66253
JM		 1159uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1160__attribute__ (( alias ("cpu_ppc_load_tbu") ));
1161
76a66253 1162uint32_t cpu_ppc601_load_rtcl (CPUState *env)
9fddaa0c 1163{
76a66253 1164 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
9fddaa0c 1165}
76a66253 1166
a750fc0b 1167/* XXX: to be fixed */
73b01960 1168int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp)
a750fc0b
JM		 1169{
1170 return -1;
1171}
1172
73b01960 1173int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val)
a750fc0b
JM		 1174{
1175 return -1;
1176}
1177
001faf32
BS		 1178#define EXCP_DUMP(env, fmt, ...) \
1179do { \
1180 fprintf(stderr, fmt , ## __VA_ARGS__); \
1181 cpu_dump_state(env, stderr, fprintf, 0); \
1182 qemu_log(fmt, ## __VA_ARGS__); \
430c7ec7 1183 if (logfile) \
1184 log_cpu_state(env, 0); \
e1833e1f
JM		 1185} while (0)
1186
56f066bb
NF		 1187static int do_store_exclusive(CPUPPCState *env)
1188{
1189 target_ulong addr;
1190 target_ulong page_addr;
1191 target_ulong val;
1192 int flags;
1193 int segv = 0;
1194
1195 addr = env->reserve_ea;
1196 page_addr = addr & TARGET_PAGE_MASK;
1197 start_exclusive();
1198 mmap_lock();
1199 flags = page_get_flags(page_addr);
1200 if ((flags & PAGE_READ) == 0) {
1201 segv = 1;
1202 } else {
1203 int reg = env->reserve_info & 0x1f;
1204 int size = (env->reserve_info >> 5) & 0xf;
1205 int stored = 0;
1206
1207 if (addr == env->reserve_addr) {
1208 switch (size) {
1209 case 1: segv = get_user_u8(val, addr); break;
1210 case 2: segv = get_user_u16(val, addr); break;
1211 case 4: segv = get_user_u32(val, addr); break;
1212#if defined(TARGET_PPC64)
1213 case 8: segv = get_user_u64(val, addr); break;
1214#endif
1215 default: abort();
1216 }
1217 if (!segv && val == env->reserve_val) {
1218 val = env->gpr[reg];
1219 switch (size) {
1220 case 1: segv = put_user_u8(val, addr); break;
1221 case 2: segv = put_user_u16(val, addr); break;
1222 case 4: segv = put_user_u32(val, addr); break;
1223#if defined(TARGET_PPC64)
1224 case 8: segv = put_user_u64(val, addr); break;
1225#endif
1226 default: abort();
1227 }
1228 if (!segv) {
1229 stored = 1;
1230 }
1231 }
1232 }
1233 env->crf[0] = (stored << 1) | xer_so;
1234 env->reserve_addr = (target_ulong)-1;
1235 }
1236 if (!segv) {
1237 env->nip += 4;
1238 }
1239 mmap_unlock();
1240 end_exclusive();
1241 return segv;
1242}
1243
67867308
FB		 1244void cpu_loop(CPUPPCState *env)
1245{
c227f099 1246 target_siginfo_t info;
61190b14
FB		 1247 int trapnr;
1248 uint32_t ret;
3b46e624 1249
67867308 1250 for(;;) {
56f066bb 1251 cpu_exec_start(env);
67867308 1252 trapnr = cpu_ppc_exec(env);
56f066bb 1253 cpu_exec_end(env);
67867308 1254 switch(trapnr) {
e1833e1f
JM		 1255 case POWERPC_EXCP_NONE:
1256 /* Just go on */
67867308 1257 break;
e1833e1f
JM		 1258 case POWERPC_EXCP_CRITICAL: /* Critical input */
1259 cpu_abort(env, "Critical interrupt while in user mode. "
1260 "Aborting\n");
61190b14 1261 break;
e1833e1f
JM		 1262 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1263 cpu_abort(env, "Machine check exception while in user mode. "
1264 "Aborting\n");
1265 break;
1266 case POWERPC_EXCP_DSI: /* Data storage exception */
90e189ec 1267 EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n",
e1833e1f
JM		 1268 env->spr[SPR_DAR]);
1269 /* XXX: check this. Seems bugged */
2be0071f
FB		 1270 switch (env->error_code & 0xFF000000) {
1271 case 0x40000000:
61190b14
FB		 1272 info.si_signo = TARGET_SIGSEGV;
1273 info.si_errno = 0;
1274 info.si_code = TARGET_SEGV_MAPERR;
1275 break;
2be0071f 1276 case 0x04000000:
61190b14
FB		 1277 info.si_signo = TARGET_SIGILL;
1278 info.si_errno = 0;
1279 info.si_code = TARGET_ILL_ILLADR;
1280 break;
2be0071f 1281 case 0x08000000:
61190b14
FB		 1282 info.si_signo = TARGET_SIGSEGV;
1283 info.si_errno = 0;
1284 info.si_code = TARGET_SEGV_ACCERR;
1285 break;
61190b14
FB		 1286 default:
1287 /* Let's send a regular segfault... */
e1833e1f
JM		 1288 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1289 env->error_code);
61190b14
FB		 1290 info.si_signo = TARGET_SIGSEGV;
1291 info.si_errno = 0;
1292 info.si_code = TARGET_SEGV_MAPERR;
1293 break;
1294 }
67867308 1295 info._sifields._sigfault._addr = env->nip;
624f7979 1296 queue_signal(env, info.si_signo, &info);
67867308 1297 break;
e1833e1f 1298 case POWERPC_EXCP_ISI: /* Instruction storage exception */
90e189ec
BS		 1299 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1300 "\n", env->spr[SPR_SRR0]);
e1833e1f 1301 /* XXX: check this */
2be0071f
FB		 1302 switch (env->error_code & 0xFF000000) {
1303 case 0x40000000:
61190b14 1304 info.si_signo = TARGET_SIGSEGV;
67867308 1305 info.si_errno = 0;
61190b14
FB		 1306 info.si_code = TARGET_SEGV_MAPERR;
1307 break;
2be0071f
FB		 1308 case 0x10000000:
1309 case 0x08000000:
61190b14
FB		 1310 info.si_signo = TARGET_SIGSEGV;
1311 info.si_errno = 0;
1312 info.si_code = TARGET_SEGV_ACCERR;
1313 break;
1314 default:
1315 /* Let's send a regular segfault... */
e1833e1f
JM		 1316 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1317 env->error_code);
61190b14
FB		 1318 info.si_signo = TARGET_SIGSEGV;
1319 info.si_errno = 0;
1320 info.si_code = TARGET_SEGV_MAPERR;
1321 break;
1322 }
1323 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1324 queue_signal(env, info.si_signo, &info);
67867308 1325 break;
e1833e1f
JM		 1326 case POWERPC_EXCP_EXTERNAL: /* External input */
1327 cpu_abort(env, "External interrupt while in user mode. "
1328 "Aborting\n");
1329 break;
1330 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1331 EXCP_DUMP(env, "Unaligned memory access\n");
1332 /* XXX: check this */
61190b14 1333 info.si_signo = TARGET_SIGBUS;
67867308 1334 info.si_errno = 0;
61190b14
FB		 1335 info.si_code = TARGET_BUS_ADRALN;
1336 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1337 queue_signal(env, info.si_signo, &info);
67867308 1338 break;
e1833e1f
JM		 1339 case POWERPC_EXCP_PROGRAM: /* Program exception */
1340 /* XXX: check this */
61190b14 1341 switch (env->error_code & ~0xF) {
e1833e1f
JM		 1342 case POWERPC_EXCP_FP:
1343 EXCP_DUMP(env, "Floating point program exception\n");
61190b14
FB		 1344 info.si_signo = TARGET_SIGFPE;
1345 info.si_errno = 0;
1346 switch (env->error_code & 0xF) {
e1833e1f 1347 case POWERPC_EXCP_FP_OX:
61190b14
FB		 1348 info.si_code = TARGET_FPE_FLTOVF;
1349 break;
e1833e1f 1350 case POWERPC_EXCP_FP_UX:
61190b14
FB		 1351 info.si_code = TARGET_FPE_FLTUND;
1352 break;
e1833e1f
JM		 1353 case POWERPC_EXCP_FP_ZX:
1354 case POWERPC_EXCP_FP_VXZDZ:
61190b14
FB		 1355 info.si_code = TARGET_FPE_FLTDIV;
1356 break;
e1833e1f 1357 case POWERPC_EXCP_FP_XX:
61190b14
FB		 1358 info.si_code = TARGET_FPE_FLTRES;
1359 break;
e1833e1f 1360 case POWERPC_EXCP_FP_VXSOFT:
61190b14
FB		 1361 info.si_code = TARGET_FPE_FLTINV;
1362 break;
7c58044c 1363 case POWERPC_EXCP_FP_VXSNAN:
e1833e1f
JM		 1364 case POWERPC_EXCP_FP_VXISI:
1365 case POWERPC_EXCP_FP_VXIDI:
1366 case POWERPC_EXCP_FP_VXIMZ:
1367 case POWERPC_EXCP_FP_VXVC:
1368 case POWERPC_EXCP_FP_VXSQRT:
1369 case POWERPC_EXCP_FP_VXCVI:
61190b14
FB		 1370 info.si_code = TARGET_FPE_FLTSUB;
1371 break;
1372 default:
e1833e1f
JM		 1373 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1374 env->error_code);
1375 break;
61190b14 1376 }
e1833e1f
JM		 1377 break;
1378 case POWERPC_EXCP_INVAL:
1379 EXCP_DUMP(env, "Invalid instruction\n");
61190b14
FB		 1380 info.si_signo = TARGET_SIGILL;
1381 info.si_errno = 0;
1382 switch (env->error_code & 0xF) {
e1833e1f 1383 case POWERPC_EXCP_INVAL_INVAL:
61190b14
FB		 1384 info.si_code = TARGET_ILL_ILLOPC;
1385 break;
e1833e1f 1386 case POWERPC_EXCP_INVAL_LSWX:
a750fc0b 1387 info.si_code = TARGET_ILL_ILLOPN;
61190b14 1388 break;
e1833e1f 1389 case POWERPC_EXCP_INVAL_SPR:
61190b14
FB		 1390 info.si_code = TARGET_ILL_PRVREG;
1391 break;
e1833e1f 1392 case POWERPC_EXCP_INVAL_FP:
61190b14
FB		 1393 info.si_code = TARGET_ILL_COPROC;
1394 break;
1395 default:
e1833e1f
JM		 1396 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1397 env->error_code & 0xF);
61190b14
FB		 1398 info.si_code = TARGET_ILL_ILLADR;
1399 break;
1400 }
1401 break;
e1833e1f
JM		 1402 case POWERPC_EXCP_PRIV:
1403 EXCP_DUMP(env, "Privilege violation\n");
61190b14
FB		 1404 info.si_signo = TARGET_SIGILL;
1405 info.si_errno = 0;
1406 switch (env->error_code & 0xF) {
e1833e1f 1407 case POWERPC_EXCP_PRIV_OPC:
61190b14
FB		 1408 info.si_code = TARGET_ILL_PRVOPC;
1409 break;
e1833e1f 1410 case POWERPC_EXCP_PRIV_REG:
61190b14 1411 info.si_code = TARGET_ILL_PRVREG;
e1833e1f 1412 break;
61190b14 1413 default:
e1833e1f
JM		 1414 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1415 env->error_code & 0xF);
61190b14
FB		 1416 info.si_code = TARGET_ILL_PRVOPC;
1417 break;
1418 }
1419 break;
e1833e1f
JM		 1420 case POWERPC_EXCP_TRAP:
1421 cpu_abort(env, "Tried to call a TRAP\n");
1422 break;
61190b14
FB		 1423 default:
1424 /* Should not happen ! */
e1833e1f
JM		 1425 cpu_abort(env, "Unknown program exception (%02x)\n",
1426 env->error_code);
1427 break;
61190b14
FB		 1428 }
1429 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1430 queue_signal(env, info.si_signo, &info);
67867308 1431 break;
e1833e1f
JM		 1432 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1433 EXCP_DUMP(env, "No floating point allowed\n");
61190b14 1434 info.si_signo = TARGET_SIGILL;
67867308 1435 info.si_errno = 0;
61190b14
FB		 1436 info.si_code = TARGET_ILL_COPROC;
1437 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1438 queue_signal(env, info.si_signo, &info);
67867308 1439 break;
e1833e1f
JM		 1440 case POWERPC_EXCP_SYSCALL: /* System call exception */
1441 cpu_abort(env, "Syscall exception while in user mode. "
1442 "Aborting\n");
61190b14 1443 break;
e1833e1f
JM		 1444 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1445 EXCP_DUMP(env, "No APU instruction allowed\n");
1446 info.si_signo = TARGET_SIGILL;
1447 info.si_errno = 0;
1448 info.si_code = TARGET_ILL_COPROC;
1449 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1450 queue_signal(env, info.si_signo, &info);
61190b14 1451 break;
e1833e1f
JM		 1452 case POWERPC_EXCP_DECR: /* Decrementer exception */
1453 cpu_abort(env, "Decrementer interrupt while in user mode. "
1454 "Aborting\n");
61190b14 1455 break;
e1833e1f
JM		 1456 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1457 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1458 "Aborting\n");
1459 break;
1460 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1461 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1462 "Aborting\n");
1463 break;
1464 case POWERPC_EXCP_DTLB: /* Data TLB error */
1465 cpu_abort(env, "Data TLB exception while in user mode. "
1466 "Aborting\n");
1467 break;
1468 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1469 cpu_abort(env, "Instruction TLB exception while in user mode. "
1470 "Aborting\n");
1471 break;
e1833e1f
JM		 1472 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1473 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1474 info.si_signo = TARGET_SIGILL;
1475 info.si_errno = 0;
1476 info.si_code = TARGET_ILL_COPROC;
1477 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1478 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1479 break;
1480 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1481 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1482 break;
1483 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1484 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1485 break;
1486 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1487 cpu_abort(env, "Performance monitor exception not handled\n");
1488 break;
1489 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1490 cpu_abort(env, "Doorbell interrupt while in user mode. "
1491 "Aborting\n");
1492 break;
1493 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1494 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1495 "Aborting\n");
1496 break;
1497 case POWERPC_EXCP_RESET: /* System reset exception */
1498 cpu_abort(env, "Reset interrupt while in user mode. "
1499 "Aborting\n");
1500 break;
e1833e1f
JM		 1501 case POWERPC_EXCP_DSEG: /* Data segment exception */
1502 cpu_abort(env, "Data segment exception while in user mode. "
1503 "Aborting\n");
1504 break;
1505 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1506 cpu_abort(env, "Instruction segment exception "
1507 "while in user mode. Aborting\n");
1508 break;
e85e7c6e 1509 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1510 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1511 cpu_abort(env, "Hypervisor decrementer interrupt "
1512 "while in user mode. Aborting\n");
1513 break;
e1833e1f
JM		 1514 case POWERPC_EXCP_TRACE: /* Trace exception */
1515 /* Nothing to do:
1516 * we use this exception to emulate step-by-step execution mode.
1517 */
1518 break;
e85e7c6e 1519 /* PowerPC 64 with hypervisor mode support */
e1833e1f
JM		 1520 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1521 cpu_abort(env, "Hypervisor data storage exception "
1522 "while in user mode. Aborting\n");
1523 break;
1524 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1525 cpu_abort(env, "Hypervisor instruction storage exception "
1526 "while in user mode. Aborting\n");
1527 break;
1528 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1529 cpu_abort(env, "Hypervisor data segment exception "
1530 "while in user mode. Aborting\n");
1531 break;
1532 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1533 cpu_abort(env, "Hypervisor instruction segment exception "
1534 "while in user mode. Aborting\n");
1535 break;
e1833e1f
JM		 1536 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1537 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1538 info.si_signo = TARGET_SIGILL;
1539 info.si_errno = 0;
1540 info.si_code = TARGET_ILL_COPROC;
1541 info._sifields._sigfault._addr = env->nip - 4;
624f7979 1542 queue_signal(env, info.si_signo, &info);
e1833e1f
JM		 1543 break;
1544 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1545 cpu_abort(env, "Programable interval timer interrupt "
1546 "while in user mode. Aborting\n");
1547 break;
1548 case POWERPC_EXCP_IO: /* IO error exception */
1549 cpu_abort(env, "IO error exception while in user mode. "
1550 "Aborting\n");
1551 break;
1552 case POWERPC_EXCP_RUNM: /* Run mode exception */
1553 cpu_abort(env, "Run mode exception while in user mode. "
1554 "Aborting\n");
1555 break;
1556 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1557 cpu_abort(env, "Emulation trap exception not handled\n");
1558 break;
1559 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1560 cpu_abort(env, "Instruction fetch TLB exception "
1561 "while in user-mode. Aborting");
1562 break;
1563 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1564 cpu_abort(env, "Data load TLB exception while in user-mode. "
1565 "Aborting");
1566 break;
1567 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1568 cpu_abort(env, "Data store TLB exception while in user-mode. "
1569 "Aborting");
1570 break;
1571 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1572 cpu_abort(env, "Floating-point assist exception not handled\n");
1573 break;
1574 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1575 cpu_abort(env, "Instruction address breakpoint exception "
1576 "not handled\n");
1577 break;
1578 case POWERPC_EXCP_SMI: /* System management interrupt */
1579 cpu_abort(env, "System management interrupt while in user mode. "
1580 "Aborting\n");
1581 break;
1582 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1583 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1584 "Aborting\n");
1585 break;
1586 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1587 cpu_abort(env, "Performance monitor exception not handled\n");
1588 break;
1589 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1590 cpu_abort(env, "Vector assist exception not handled\n");
1591 break;
1592 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1593 cpu_abort(env, "Soft patch exception not handled\n");
1594 break;
1595 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1596 cpu_abort(env, "Maintenance exception while in user mode. "
1597 "Aborting\n");
1598 break;
1599 case POWERPC_EXCP_STOP: /* stop translation */
1600 /* We did invalidate the instruction cache. Go on */
1601 break;
1602 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1603 /* We just stopped because of a branch. Go on */
1604 break;
1605 case POWERPC_EXCP_SYSCALL_USER:
1606 /* system call in user-mode emulation */
1607 /* WARNING:
1608 * PPC ABI uses overflow flag in cr0 to signal an error
1609 * in syscalls.
1610 */
1611#if 0
1612 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1613 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1614#endif
1615 env->crf[0] &= ~0x1;
1616 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1617 env->gpr[5], env->gpr[6], env->gpr[7],
5945cfcb 1618 env->gpr[8], 0, 0);
bcd4933a
NF		 1619 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1620 /* Returning from a successful sigreturn syscall.
1621 Avoid corrupting register state. */
1622 break;
1623 }
e1833e1f
JM		 1624 if (ret > (uint32_t)(-515)) {
1625 env->crf[0] |= 0x1;
1626 ret = -ret;
61190b14 1627 }
e1833e1f
JM		 1628 env->gpr[3] = ret;
1629#if 0
1630 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1631#endif
1632 break;
56f066bb
NF		 1633 case POWERPC_EXCP_STCX:
1634 if (do_store_exclusive(env)) {
1635 info.si_signo = TARGET_SIGSEGV;
1636 info.si_errno = 0;
1637 info.si_code = TARGET_SEGV_MAPERR;
1638 info._sifields._sigfault._addr = env->nip;
1639 queue_signal(env, info.si_signo, &info);
1640 }
1641 break;
71f75756
AJ		 1642 case EXCP_DEBUG:
1643 {
1644 int sig;
1645
1646 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1647 if (sig) {
1648 info.si_signo = sig;
1649 info.si_errno = 0;
1650 info.si_code = TARGET_TRAP_BRKPT;
1651 queue_signal(env, info.si_signo, &info);
1652 }
1653 }
1654 break;
56ba31ff
JM		 1655 case EXCP_INTERRUPT:
1656 /* just indicate that signals should be handled asap */
1657 break;
e1833e1f
JM		 1658 default:
1659 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1660 break;
67867308
FB		 1661 }
1662 process_pending_signals(env);
1663 }
1664}
1665#endif
1666
048f6b4d
FB		 1667#ifdef TARGET_MIPS
1668
1669#define MIPS_SYS(name, args) args,
1670
1671static const uint8_t mips_syscall_args[] = {
1672 MIPS_SYS(sys_syscall , 0) /* 4000 */
1673 MIPS_SYS(sys_exit , 1)
1674 MIPS_SYS(sys_fork , 0)
1675 MIPS_SYS(sys_read , 3)
1676 MIPS_SYS(sys_write , 3)
1677 MIPS_SYS(sys_open , 3) /* 4005 */
1678 MIPS_SYS(sys_close , 1)
1679 MIPS_SYS(sys_waitpid , 3)
1680 MIPS_SYS(sys_creat , 2)
1681 MIPS_SYS(sys_link , 2)
1682 MIPS_SYS(sys_unlink , 1) /* 4010 */
1683 MIPS_SYS(sys_execve , 0)
1684 MIPS_SYS(sys_chdir , 1)
1685 MIPS_SYS(sys_time , 1)
1686 MIPS_SYS(sys_mknod , 3)
1687 MIPS_SYS(sys_chmod , 2) /* 4015 */
1688 MIPS_SYS(sys_lchown , 3)
1689 MIPS_SYS(sys_ni_syscall , 0)
1690 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1691 MIPS_SYS(sys_lseek , 3)
1692 MIPS_SYS(sys_getpid , 0) /* 4020 */
1693 MIPS_SYS(sys_mount , 5)
1694 MIPS_SYS(sys_oldumount , 1)
1695 MIPS_SYS(sys_setuid , 1)
1696 MIPS_SYS(sys_getuid , 0)
1697 MIPS_SYS(sys_stime , 1) /* 4025 */
1698 MIPS_SYS(sys_ptrace , 4)
1699 MIPS_SYS(sys_alarm , 1)
1700 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1701 MIPS_SYS(sys_pause , 0)
1702 MIPS_SYS(sys_utime , 2) /* 4030 */
1703 MIPS_SYS(sys_ni_syscall , 0)
1704 MIPS_SYS(sys_ni_syscall , 0)
1705 MIPS_SYS(sys_access , 2)
1706 MIPS_SYS(sys_nice , 1)
1707 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1708 MIPS_SYS(sys_sync , 0)
1709 MIPS_SYS(sys_kill , 2)
1710 MIPS_SYS(sys_rename , 2)
1711 MIPS_SYS(sys_mkdir , 2)
1712 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1713 MIPS_SYS(sys_dup , 1)
1714 MIPS_SYS(sys_pipe , 0)
1715 MIPS_SYS(sys_times , 1)
1716 MIPS_SYS(sys_ni_syscall , 0)
1717 MIPS_SYS(sys_brk , 1) /* 4045 */
1718 MIPS_SYS(sys_setgid , 1)
1719 MIPS_SYS(sys_getgid , 0)
1720 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1721 MIPS_SYS(sys_geteuid , 0)
1722 MIPS_SYS(sys_getegid , 0) /* 4050 */
1723 MIPS_SYS(sys_acct , 0)
1724 MIPS_SYS(sys_umount , 2)
1725 MIPS_SYS(sys_ni_syscall , 0)
1726 MIPS_SYS(sys_ioctl , 3)
1727 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1728 MIPS_SYS(sys_ni_syscall , 2)
1729 MIPS_SYS(sys_setpgid , 2)
1730 MIPS_SYS(sys_ni_syscall , 0)
1731 MIPS_SYS(sys_olduname , 1)
1732 MIPS_SYS(sys_umask , 1) /* 4060 */
1733 MIPS_SYS(sys_chroot , 1)
1734 MIPS_SYS(sys_ustat , 2)
1735 MIPS_SYS(sys_dup2 , 2)
1736 MIPS_SYS(sys_getppid , 0)
1737 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1738 MIPS_SYS(sys_setsid , 0)
1739 MIPS_SYS(sys_sigaction , 3)
1740 MIPS_SYS(sys_sgetmask , 0)
1741 MIPS_SYS(sys_ssetmask , 1)
1742 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1743 MIPS_SYS(sys_setregid , 2)
1744 MIPS_SYS(sys_sigsuspend , 0)
1745 MIPS_SYS(sys_sigpending , 1)
1746 MIPS_SYS(sys_sethostname , 2)
1747 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1748 MIPS_SYS(sys_getrlimit , 2)
1749 MIPS_SYS(sys_getrusage , 2)
1750 MIPS_SYS(sys_gettimeofday, 2)
1751 MIPS_SYS(sys_settimeofday, 2)
1752 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1753 MIPS_SYS(sys_setgroups , 2)
1754 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1755 MIPS_SYS(sys_symlink , 2)
1756 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1757 MIPS_SYS(sys_readlink , 3) /* 4085 */
1758 MIPS_SYS(sys_uselib , 1)
1759 MIPS_SYS(sys_swapon , 2)
1760 MIPS_SYS(sys_reboot , 3)
1761 MIPS_SYS(old_readdir , 3)
1762 MIPS_SYS(old_mmap , 6) /* 4090 */
1763 MIPS_SYS(sys_munmap , 2)
1764 MIPS_SYS(sys_truncate , 2)
1765 MIPS_SYS(sys_ftruncate , 2)
1766 MIPS_SYS(sys_fchmod , 2)
1767 MIPS_SYS(sys_fchown , 3) /* 4095 */
1768 MIPS_SYS(sys_getpriority , 2)
1769 MIPS_SYS(sys_setpriority , 3)
1770 MIPS_SYS(sys_ni_syscall , 0)
1771 MIPS_SYS(sys_statfs , 2)
1772 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1773 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1774 MIPS_SYS(sys_socketcall , 2)
1775 MIPS_SYS(sys_syslog , 3)
1776 MIPS_SYS(sys_setitimer , 3)
1777 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1778 MIPS_SYS(sys_newstat , 2)
1779 MIPS_SYS(sys_newlstat , 2)
1780 MIPS_SYS(sys_newfstat , 2)
1781 MIPS_SYS(sys_uname , 1)
1782 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1783 MIPS_SYS(sys_vhangup , 0)
1784 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1785 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1786 MIPS_SYS(sys_wait4 , 4)
1787 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1788 MIPS_SYS(sys_sysinfo , 1)
1789 MIPS_SYS(sys_ipc , 6)
1790 MIPS_SYS(sys_fsync , 1)
1791 MIPS_SYS(sys_sigreturn , 0)
18113962 1792 MIPS_SYS(sys_clone , 6) /* 4120 */
048f6b4d
FB		 1793 MIPS_SYS(sys_setdomainname, 2)
1794 MIPS_SYS(sys_newuname , 1)
1795 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1796 MIPS_SYS(sys_adjtimex , 1)
1797 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1798 MIPS_SYS(sys_sigprocmask , 3)
1799 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1800 MIPS_SYS(sys_init_module , 5)
1801 MIPS_SYS(sys_delete_module, 1)
1802 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1803 MIPS_SYS(sys_quotactl , 0)
1804 MIPS_SYS(sys_getpgid , 1)
1805 MIPS_SYS(sys_fchdir , 1)
1806 MIPS_SYS(sys_bdflush , 2)
1807 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1808 MIPS_SYS(sys_personality , 1)
1809 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1810 MIPS_SYS(sys_setfsuid , 1)
1811 MIPS_SYS(sys_setfsgid , 1)
1812 MIPS_SYS(sys_llseek , 5) /* 4140 */
1813 MIPS_SYS(sys_getdents , 3)
1814 MIPS_SYS(sys_select , 5)
1815 MIPS_SYS(sys_flock , 2)
1816 MIPS_SYS(sys_msync , 3)
1817 MIPS_SYS(sys_readv , 3) /* 4145 */
1818 MIPS_SYS(sys_writev , 3)
1819 MIPS_SYS(sys_cacheflush , 3)
1820 MIPS_SYS(sys_cachectl , 3)
1821 MIPS_SYS(sys_sysmips , 4)
1822 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1823 MIPS_SYS(sys_getsid , 1)
1824 MIPS_SYS(sys_fdatasync , 0)
1825 MIPS_SYS(sys_sysctl , 1)
1826 MIPS_SYS(sys_mlock , 2)
1827 MIPS_SYS(sys_munlock , 2) /* 4155 */
1828 MIPS_SYS(sys_mlockall , 1)
1829 MIPS_SYS(sys_munlockall , 0)
1830 MIPS_SYS(sys_sched_setparam, 2)
1831 MIPS_SYS(sys_sched_getparam, 2)
1832 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1833 MIPS_SYS(sys_sched_getscheduler, 1)
1834 MIPS_SYS(sys_sched_yield , 0)
1835 MIPS_SYS(sys_sched_get_priority_max, 1)
1836 MIPS_SYS(sys_sched_get_priority_min, 1)
1837 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1838 MIPS_SYS(sys_nanosleep, 2)
1839 MIPS_SYS(sys_mremap , 4)
1840 MIPS_SYS(sys_accept , 3)
1841 MIPS_SYS(sys_bind , 3)
1842 MIPS_SYS(sys_connect , 3) /* 4170 */
1843 MIPS_SYS(sys_getpeername , 3)
1844 MIPS_SYS(sys_getsockname , 3)
1845 MIPS_SYS(sys_getsockopt , 5)
1846 MIPS_SYS(sys_listen , 2)
1847 MIPS_SYS(sys_recv , 4) /* 4175 */
1848 MIPS_SYS(sys_recvfrom , 6)
1849 MIPS_SYS(sys_recvmsg , 3)
1850 MIPS_SYS(sys_send , 4)
1851 MIPS_SYS(sys_sendmsg , 3)
1852 MIPS_SYS(sys_sendto , 6) /* 4180 */
1853 MIPS_SYS(sys_setsockopt , 5)
1854 MIPS_SYS(sys_shutdown , 2)
1855 MIPS_SYS(sys_socket , 3)
1856 MIPS_SYS(sys_socketpair , 4)
1857 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1858 MIPS_SYS(sys_getresuid , 3)
1859 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1860 MIPS_SYS(sys_poll , 3)
1861 MIPS_SYS(sys_nfsservctl , 3)
1862 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1863 MIPS_SYS(sys_getresgid , 3)
1864 MIPS_SYS(sys_prctl , 5)
1865 MIPS_SYS(sys_rt_sigreturn, 0)
1866 MIPS_SYS(sys_rt_sigaction, 4)
1867 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1868 MIPS_SYS(sys_rt_sigpending, 2)
1869 MIPS_SYS(sys_rt_sigtimedwait, 4)
1870 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1871 MIPS_SYS(sys_rt_sigsuspend, 0)
1872 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1873 MIPS_SYS(sys_pwrite64 , 6)
1874 MIPS_SYS(sys_chown , 3)
1875 MIPS_SYS(sys_getcwd , 2)
1876 MIPS_SYS(sys_capget , 2)
1877 MIPS_SYS(sys_capset , 2) /* 4205 */
053ebb27 1878 MIPS_SYS(sys_sigaltstack , 2)
048f6b4d
FB		 1879 MIPS_SYS(sys_sendfile , 4)
1880 MIPS_SYS(sys_ni_syscall , 0)
1881 MIPS_SYS(sys_ni_syscall , 0)
1882 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1883 MIPS_SYS(sys_truncate64 , 4)
1884 MIPS_SYS(sys_ftruncate64 , 4)
1885 MIPS_SYS(sys_stat64 , 2)
1886 MIPS_SYS(sys_lstat64 , 2)
1887 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1888 MIPS_SYS(sys_pivot_root , 2)
1889 MIPS_SYS(sys_mincore , 3)
1890 MIPS_SYS(sys_madvise , 3)
1891 MIPS_SYS(sys_getdents64 , 3)
1892 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1893 MIPS_SYS(sys_ni_syscall , 0)
1894 MIPS_SYS(sys_gettid , 0)
1895 MIPS_SYS(sys_readahead , 5)
1896 MIPS_SYS(sys_setxattr , 5)
1897 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1898 MIPS_SYS(sys_fsetxattr , 5)
1899 MIPS_SYS(sys_getxattr , 4)
1900 MIPS_SYS(sys_lgetxattr , 4)
1901 MIPS_SYS(sys_fgetxattr , 4)
1902 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1903 MIPS_SYS(sys_llistxattr , 3)
1904 MIPS_SYS(sys_flistxattr , 3)
1905 MIPS_SYS(sys_removexattr , 2)
1906 MIPS_SYS(sys_lremovexattr, 2)
1907 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1908 MIPS_SYS(sys_tkill , 2)
1909 MIPS_SYS(sys_sendfile64 , 5)
1910 MIPS_SYS(sys_futex , 2)
1911 MIPS_SYS(sys_sched_setaffinity, 3)
1912 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1913 MIPS_SYS(sys_io_setup , 2)
1914 MIPS_SYS(sys_io_destroy , 1)
1915 MIPS_SYS(sys_io_getevents, 5)
1916 MIPS_SYS(sys_io_submit , 3)
1917 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1918 MIPS_SYS(sys_exit_group , 1)
1919 MIPS_SYS(sys_lookup_dcookie, 3)
1920 MIPS_SYS(sys_epoll_create, 1)
1921 MIPS_SYS(sys_epoll_ctl , 4)
1922 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1923 MIPS_SYS(sys_remap_file_pages, 5)
1924 MIPS_SYS(sys_set_tid_address, 1)
1925 MIPS_SYS(sys_restart_syscall, 0)
1926 MIPS_SYS(sys_fadvise64_64, 7)
1927 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1928 MIPS_SYS(sys_fstatfs64 , 2)
1929 MIPS_SYS(sys_timer_create, 3)
1930 MIPS_SYS(sys_timer_settime, 4)
1931 MIPS_SYS(sys_timer_gettime, 2)
1932 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1933 MIPS_SYS(sys_timer_delete, 1)
1934 MIPS_SYS(sys_clock_settime, 2)
1935 MIPS_SYS(sys_clock_gettime, 2)
1936 MIPS_SYS(sys_clock_getres, 2)
1937 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1938 MIPS_SYS(sys_tgkill , 3)
1939 MIPS_SYS(sys_utimes , 2)
1940 MIPS_SYS(sys_mbind , 4)
1941 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1942 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1943 MIPS_SYS(sys_mq_open , 4)
1944 MIPS_SYS(sys_mq_unlink , 1)
1945 MIPS_SYS(sys_mq_timedsend, 5)
1946 MIPS_SYS(sys_mq_timedreceive, 5)
1947 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1948 MIPS_SYS(sys_mq_getsetattr, 3)
1949 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1950 MIPS_SYS(sys_waitid , 4)
1951 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1952 MIPS_SYS(sys_add_key , 5)
388bb21a 1953 MIPS_SYS(sys_request_key, 4)
048f6b4d 1954 MIPS_SYS(sys_keyctl , 5)
6f5b89a0 1955 MIPS_SYS(sys_set_thread_area, 1)
388bb21a
TS		 1956 MIPS_SYS(sys_inotify_init, 0)
1957 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1958 MIPS_SYS(sys_inotify_rm_watch, 2)
1959 MIPS_SYS(sys_migrate_pages, 4)
1960 MIPS_SYS(sys_openat, 4)
1961 MIPS_SYS(sys_mkdirat, 3)
1962 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1963 MIPS_SYS(sys_fchownat, 5)
1964 MIPS_SYS(sys_futimesat, 3)
1965 MIPS_SYS(sys_fstatat64, 4)
1966 MIPS_SYS(sys_unlinkat, 3)
1967 MIPS_SYS(sys_renameat, 4) /* 4295 */
1968 MIPS_SYS(sys_linkat, 5)
1969 MIPS_SYS(sys_symlinkat, 3)
1970 MIPS_SYS(sys_readlinkat, 4)
1971 MIPS_SYS(sys_fchmodat, 3)
1972 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1973 MIPS_SYS(sys_pselect6, 6)
1974 MIPS_SYS(sys_ppoll, 5)
1975 MIPS_SYS(sys_unshare, 1)
1976 MIPS_SYS(sys_splice, 4)
1977 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1978 MIPS_SYS(sys_tee, 4)
1979 MIPS_SYS(sys_vmsplice, 4)
1980 MIPS_SYS(sys_move_pages, 6)
1981 MIPS_SYS(sys_set_robust_list, 2)
1982 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1983 MIPS_SYS(sys_kexec_load, 4)
1984 MIPS_SYS(sys_getcpu, 3)
1985 MIPS_SYS(sys_epoll_pwait, 6)
1986 MIPS_SYS(sys_ioprio_set, 3)
1987 MIPS_SYS(sys_ioprio_get, 2)
d979e8eb
PM		 1988 MIPS_SYS(sys_utimensat, 4)
1989 MIPS_SYS(sys_signalfd, 3)
1990 MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */
1991 MIPS_SYS(sys_eventfd, 1)
1992 MIPS_SYS(sys_fallocate, 6) /* 4320 */
1993 MIPS_SYS(sys_timerfd_create, 2)
1994 MIPS_SYS(sys_timerfd_gettime, 2)
1995 MIPS_SYS(sys_timerfd_settime, 4)
1996 MIPS_SYS(sys_signalfd4, 4)
1997 MIPS_SYS(sys_eventfd2, 2) /* 4325 */
1998 MIPS_SYS(sys_epoll_create1, 1)
1999 MIPS_SYS(sys_dup3, 3)
2000 MIPS_SYS(sys_pipe2, 2)
2001 MIPS_SYS(sys_inotify_init1, 1)
2002 MIPS_SYS(sys_preadv, 6) /* 4330 */
2003 MIPS_SYS(sys_pwritev, 6)
2004 MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
2005 MIPS_SYS(sys_perf_event_open, 5)
2006 MIPS_SYS(sys_accept4, 4)
2007 MIPS_SYS(sys_recvmmsg, 5) /* 4335 */
2008 MIPS_SYS(sys_fanotify_init, 2)
2009 MIPS_SYS(sys_fanotify_mark, 6)
2010 MIPS_SYS(sys_prlimit64, 4)
2011 MIPS_SYS(sys_name_to_handle_at, 5)
2012 MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */
2013 MIPS_SYS(sys_clock_adjtime, 2)
2014 MIPS_SYS(sys_syncfs, 1)
048f6b4d
FB		 2015};
2016
2017#undef MIPS_SYS
2018
590bc601
PB		 2019static int do_store_exclusive(CPUMIPSState *env)
2020{
2021 target_ulong addr;
2022 target_ulong page_addr;
2023 target_ulong val;
2024 int flags;
2025 int segv = 0;
2026 int reg;
2027 int d;
2028
5499b6ff 2029 addr = env->lladdr;
590bc601
PB		 2030 page_addr = addr & TARGET_PAGE_MASK;
2031 start_exclusive();
2032 mmap_lock();
2033 flags = page_get_flags(page_addr);
2034 if ((flags & PAGE_READ) == 0) {
2035 segv = 1;
2036 } else {
2037 reg = env->llreg & 0x1f;
2038 d = (env->llreg & 0x20) != 0;
2039 if (d) {
2040 segv = get_user_s64(val, addr);
2041 } else {
2042 segv = get_user_s32(val, addr);
2043 }
2044 if (!segv) {
2045 if (val != env->llval) {
2046 env->active_tc.gpr[reg] = 0;
2047 } else {
2048 if (d) {
2049 segv = put_user_u64(env->llnewval, addr);
2050 } else {
2051 segv = put_user_u32(env->llnewval, addr);
2052 }
2053 if (!segv) {
2054 env->active_tc.gpr[reg] = 1;
2055 }
2056 }
2057 }
2058 }
5499b6ff 2059 env->lladdr = -1;
590bc601
PB		 2060 if (!segv) {
2061 env->active_tc.PC += 4;
2062 }
2063 mmap_unlock();
2064 end_exclusive();
2065 return segv;
2066}
2067
048f6b4d
FB		 2068void cpu_loop(CPUMIPSState *env)
2069{
c227f099 2070 target_siginfo_t info;
388bb21a 2071 int trapnr, ret;
048f6b4d 2072 unsigned int syscall_num;
048f6b4d
FB		 2073
2074 for(;;) {
590bc601 2075 cpu_exec_start(env);
048f6b4d 2076 trapnr = cpu_mips_exec(env);
590bc601 2077 cpu_exec_end(env);
048f6b4d
FB		 2078 switch(trapnr) {
2079 case EXCP_SYSCALL:
b5dc7732
TS		 2080 syscall_num = env->active_tc.gpr[2] - 4000;
2081 env->active_tc.PC += 4;
388bb21a 2082 if (syscall_num >= sizeof(mips_syscall_args)) {
7c2f6157 2083 ret = -TARGET_ENOSYS;
388bb21a
TS		 2084 } else {
2085 int nb_args;
992f48a0
BS		 2086 abi_ulong sp_reg;
2087 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
388bb21a
TS		 2088
2089 nb_args = mips_syscall_args[syscall_num];
b5dc7732 2090 sp_reg = env->active_tc.gpr[29];
388bb21a
TS		 2091 switch (nb_args) {
2092 /* these arguments are taken from the stack */
2f619698
FB		 2093 /* FIXME - what to do if get_user() fails? */
2094 case 8: get_user_ual(arg8, sp_reg + 28);
2095 case 7: get_user_ual(arg7, sp_reg + 24);
2096 case 6: get_user_ual(arg6, sp_reg + 20);
2097 case 5: get_user_ual(arg5, sp_reg + 16);
388bb21a
TS		 2098 default:
2099 break;
048f6b4d 2100 }
b5dc7732
TS		 2101 ret = do_syscall(env, env->active_tc.gpr[2],
2102 env->active_tc.gpr[4],
2103 env->active_tc.gpr[5],
2104 env->active_tc.gpr[6],
2105 env->active_tc.gpr[7],
5945cfcb 2106 arg5, arg6, arg7, arg8);
388bb21a 2107 }
0b1bcb00
PB		 2108 if (ret == -TARGET_QEMU_ESIGRETURN) {
2109 /* Returning from a successful sigreturn syscall.
2110 Avoid clobbering register state. */
2111 break;
2112 }
388bb21a 2113 if ((unsigned int)ret >= (unsigned int)(-1133)) {
b5dc7732 2114 env->active_tc.gpr[7] = 1; /* error flag */
388bb21a
TS		 2115 ret = -ret;
2116 } else {
b5dc7732 2117 env->active_tc.gpr[7] = 0; /* error flag */
048f6b4d 2118 }
b5dc7732 2119 env->active_tc.gpr[2] = ret;
048f6b4d 2120 break;
ca7c2b1b
TS		 2121 case EXCP_TLBL:
2122 case EXCP_TLBS:
e6e5bd2d
WT		 2123 case EXCP_AdEL:
2124 case EXCP_AdES:
e4474235
PB		 2125 info.si_signo = TARGET_SIGSEGV;
2126 info.si_errno = 0;
2127 /* XXX: check env->error_code */
2128 info.si_code = TARGET_SEGV_MAPERR;
2129 info._sifields._sigfault._addr = env->CP0_BadVAddr;
2130 queue_signal(env, info.si_signo, &info);
2131 break;
6900e84b 2132 case EXCP_CpU:
048f6b4d 2133 case EXCP_RI:
bc1ad2de
FB		 2134 info.si_signo = TARGET_SIGILL;
2135 info.si_errno = 0;
2136 info.si_code = 0;
624f7979 2137 queue_signal(env, info.si_signo, &info);
048f6b4d 2138 break;
106ec879
FB		 2139 case EXCP_INTERRUPT:
2140 /* just indicate that signals should be handled asap */
2141 break;
d08b2a28
PB		 2142 case EXCP_DEBUG:
2143 {
2144 int sig;
2145
2146 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2147 if (sig)
2148 {
2149 info.si_signo = sig;
2150 info.si_errno = 0;
2151 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2152 queue_signal(env, info.si_signo, &info);
d08b2a28
PB		 2153 }
2154 }
2155 break;
590bc601
PB		 2156 case EXCP_SC:
2157 if (do_store_exclusive(env)) {
2158 info.si_signo = TARGET_SIGSEGV;
2159 info.si_errno = 0;
2160 info.si_code = TARGET_SEGV_MAPERR;
2161 info._sifields._sigfault._addr = env->active_tc.PC;
2162 queue_signal(env, info.si_signo, &info);
2163 }
2164 break;
048f6b4d
FB		 2165 default:
2166 // error:
5fafdf24 2167 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
048f6b4d
FB		 2168 trapnr);
2169 cpu_dump_state(env, stderr, fprintf, 0);
2170 abort();
2171 }
2172 process_pending_signals(env);
2173 }
2174}
2175#endif
2176
fdf9b3e8
FB		 2177#ifdef TARGET_SH4
2178void cpu_loop (CPUState *env)
2179{
2180 int trapnr, ret;
c227f099 2181 target_siginfo_t info;
3b46e624 2182
fdf9b3e8
FB		 2183 while (1) {
2184 trapnr = cpu_sh4_exec (env);
3b46e624 2185
fdf9b3e8
FB		 2186 switch (trapnr) {
2187 case 0x160:
0b6d3ae0 2188 env->pc += 2;
5fafdf24
TS		 2189 ret = do_syscall(env,
2190 env->gregs[3],
2191 env->gregs[4],
2192 env->gregs[5],
2193 env->gregs[6],
2194 env->gregs[7],
2195 env->gregs[0],
5945cfcb
PM		 2196 env->gregs[1],
2197 0, 0);
9c2a9ea1 2198 env->gregs[0] = ret;
fdf9b3e8 2199 break;
c3b5bc8a
TS		 2200 case EXCP_INTERRUPT:
2201 /* just indicate that signals should be handled asap */
2202 break;
355fb23d
PB		 2203 case EXCP_DEBUG:
2204 {
2205 int sig;
2206
2207 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2208 if (sig)
2209 {
2210 info.si_signo = sig;
2211 info.si_errno = 0;
2212 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2213 queue_signal(env, info.si_signo, &info);
355fb23d
PB		 2214 }
2215 }
2216 break;
c3b5bc8a
TS		 2217 case 0xa0:
2218 case 0xc0:
2219 info.si_signo = SIGSEGV;
2220 info.si_errno = 0;
2221 info.si_code = TARGET_SEGV_MAPERR;
2222 info._sifields._sigfault._addr = env->tea;
624f7979 2223 queue_signal(env, info.si_signo, &info);
c3b5bc8a
TS		 2224 break;
2225
fdf9b3e8
FB		 2226 default:
2227 printf ("Unhandled trap: 0x%x\n", trapnr);
2228 cpu_dump_state(env, stderr, fprintf, 0);
2229 exit (1);
2230 }
2231 process_pending_signals (env);
2232 }
2233}
2234#endif
2235
48733d19
TS		 2236#ifdef TARGET_CRIS
2237void cpu_loop (CPUState *env)
2238{
2239 int trapnr, ret;
c227f099 2240 target_siginfo_t info;
48733d19
TS		 2241
2242 while (1) {
2243 trapnr = cpu_cris_exec (env);
2244 switch (trapnr) {
2245 case 0xaa:
2246 {
2247 info.si_signo = SIGSEGV;
2248 info.si_errno = 0;
2249 /* XXX: check env->error_code */
2250 info.si_code = TARGET_SEGV_MAPERR;
e00c1e71 2251 info._sifields._sigfault._addr = env->pregs[PR_EDA];
624f7979 2252 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2253 }
2254 break;
b6d3abda
EI		 2255 case EXCP_INTERRUPT:
2256 /* just indicate that signals should be handled asap */
2257 break;
48733d19
TS		 2258 case EXCP_BREAK:
2259 ret = do_syscall(env,
2260 env->regs[9],
2261 env->regs[10],
2262 env->regs[11],
2263 env->regs[12],
2264 env->regs[13],
2265 env->pregs[7],
5945cfcb
PM		 2266 env->pregs[11],
2267 0, 0);
48733d19 2268 env->regs[10] = ret;
48733d19
TS		 2269 break;
2270 case EXCP_DEBUG:
2271 {
2272 int sig;
2273
2274 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2275 if (sig)
2276 {
2277 info.si_signo = sig;
2278 info.si_errno = 0;
2279 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2280 queue_signal(env, info.si_signo, &info);
48733d19
TS		 2281 }
2282 }
2283 break;
2284 default:
2285 printf ("Unhandled trap: 0x%x\n", trapnr);
2286 cpu_dump_state(env, stderr, fprintf, 0);
2287 exit (1);
2288 }
2289 process_pending_signals (env);
2290 }
2291}
2292#endif
2293
b779e29e
EI		 2294#ifdef TARGET_MICROBLAZE
2295void cpu_loop (CPUState *env)
2296{
2297 int trapnr, ret;
c227f099 2298 target_siginfo_t info;
b779e29e
EI		 2299
2300 while (1) {
2301 trapnr = cpu_mb_exec (env);
2302 switch (trapnr) {
2303 case 0xaa:
2304 {
2305 info.si_signo = SIGSEGV;
2306 info.si_errno = 0;
2307 /* XXX: check env->error_code */
2308 info.si_code = TARGET_SEGV_MAPERR;
2309 info._sifields._sigfault._addr = 0;
2310 queue_signal(env, info.si_signo, &info);
2311 }
2312 break;
2313 case EXCP_INTERRUPT:
2314 /* just indicate that signals should be handled asap */
2315 break;
2316 case EXCP_BREAK:
2317 /* Return address is 4 bytes after the call. */
2318 env->regs[14] += 4;
2319 ret = do_syscall(env,
2320 env->regs[12],
2321 env->regs[5],
2322 env->regs[6],
2323 env->regs[7],
2324 env->regs[8],
2325 env->regs[9],
5945cfcb
PM		 2326 env->regs[10],
2327 0, 0);
b779e29e
EI		 2328 env->regs[3] = ret;
2329 env->sregs[SR_PC] = env->regs[14];
2330 break;
b76da7e3
EI		 2331 case EXCP_HW_EXCP:
2332 env->regs[17] = env->sregs[SR_PC] + 4;
2333 if (env->iflags & D_FLAG) {
2334 env->sregs[SR_ESR] |= 1 << 12;
2335 env->sregs[SR_PC] -= 4;
2336 /* FIXME: if branch was immed, replay the imm aswell. */
2337 }
2338
2339 env->iflags &= ~(IMM_FLAG | D_FLAG);
2340
2341 switch (env->sregs[SR_ESR] & 31) {
2342 case ESR_EC_FPU:
2343 info.si_signo = SIGFPE;
2344 info.si_errno = 0;
2345 if (env->sregs[SR_FSR] & FSR_IO) {
2346 info.si_code = TARGET_FPE_FLTINV;
2347 }
2348 if (env->sregs[SR_FSR] & FSR_DZ) {
2349 info.si_code = TARGET_FPE_FLTDIV;
2350 }
2351 info._sifields._sigfault._addr = 0;
2352 queue_signal(env, info.si_signo, &info);
2353 break;
2354 default:
2355 printf ("Unhandled hw-exception: 0x%x\n",
2e42d52d 2356 env->sregs[SR_ESR] & ESR_EC_MASK);
b76da7e3
EI		 2357 cpu_dump_state(env, stderr, fprintf, 0);
2358 exit (1);
2359 break;
2360 }
2361 break;
b779e29e
EI		 2362 case EXCP_DEBUG:
2363 {
2364 int sig;
2365
2366 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2367 if (sig)
2368 {
2369 info.si_signo = sig;
2370 info.si_errno = 0;
2371 info.si_code = TARGET_TRAP_BRKPT;
2372 queue_signal(env, info.si_signo, &info);
2373 }
2374 }
2375 break;
2376 default:
2377 printf ("Unhandled trap: 0x%x\n", trapnr);
2378 cpu_dump_state(env, stderr, fprintf, 0);
2379 exit (1);
2380 }
2381 process_pending_signals (env);
2382 }
2383}
2384#endif
2385
e6e5906b
PB		 2386#ifdef TARGET_M68K
2387
2388void cpu_loop(CPUM68KState *env)
2389{
2390 int trapnr;
2391 unsigned int n;
c227f099 2392 target_siginfo_t info;
e6e5906b 2393 TaskState *ts = env->opaque;
3b46e624 2394
e6e5906b
PB		 2395 for(;;) {
2396 trapnr = cpu_m68k_exec(env);
2397 switch(trapnr) {
2398 case EXCP_ILLEGAL:
2399 {
2400 if (ts->sim_syscalls) {
2401 uint16_t nr;
2402 nr = lduw(env->pc + 2);
2403 env->pc += 4;
2404 do_m68k_simcall(env, nr);
2405 } else {
2406 goto do_sigill;
2407 }
2408 }
2409 break;
a87295e8 2410 case EXCP_HALT_INSN:
e6e5906b 2411 /* Semihosing syscall. */
a87295e8 2412 env->pc += 4;
e6e5906b
PB		 2413 do_m68k_semihosting(env, env->dregs[0]);
2414 break;
2415 case EXCP_LINEA:
2416 case EXCP_LINEF:
2417 case EXCP_UNSUPPORTED:
2418 do_sigill:
2419 info.si_signo = SIGILL;
2420 info.si_errno = 0;
2421 info.si_code = TARGET_ILL_ILLOPN;
2422 info._sifields._sigfault._addr = env->pc;
624f7979 2423 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2424 break;
2425 case EXCP_TRAP0:
2426 {
2427 ts->sim_syscalls = 0;
2428 n = env->dregs[0];
2429 env->pc += 2;
5fafdf24
TS		 2430 env->dregs[0] = do_syscall(env,
2431 n,
e6e5906b
PB		 2432 env->dregs[1],
2433 env->dregs[2],
2434 env->dregs[3],
2435 env->dregs[4],
2436 env->dregs[5],
5945cfcb
PM		 2437 env->aregs[0],
2438 0, 0);
e6e5906b
PB		 2439 }
2440 break;
2441 case EXCP_INTERRUPT:
2442 /* just indicate that signals should be handled asap */
2443 break;
2444 case EXCP_ACCESS:
2445 {
2446 info.si_signo = SIGSEGV;
2447 info.si_errno = 0;
2448 /* XXX: check env->error_code */
2449 info.si_code = TARGET_SEGV_MAPERR;
2450 info._sifields._sigfault._addr = env->mmu.ar;
624f7979 2451 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2452 }
2453 break;
2454 case EXCP_DEBUG:
2455 {
2456 int sig;
2457
2458 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2459 if (sig)
2460 {
2461 info.si_signo = sig;
2462 info.si_errno = 0;
2463 info.si_code = TARGET_TRAP_BRKPT;
624f7979 2464 queue_signal(env, info.si_signo, &info);
e6e5906b
PB		 2465 }
2466 }
2467 break;
2468 default:
5fafdf24 2469 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
e6e5906b
PB		 2470 trapnr);
2471 cpu_dump_state(env, stderr, fprintf, 0);
2472 abort();
2473 }
2474 process_pending_signals(env);
2475 }
2476}
2477#endif /* TARGET_M68K */
2478
7a3148a9 2479#ifdef TARGET_ALPHA
6910b8f6
RH		 2480static void do_store_exclusive(CPUAlphaState *env, int reg, int quad)
2481{
2482 target_ulong addr, val, tmp;
2483 target_siginfo_t info;
2484 int ret = 0;
2485
2486 addr = env->lock_addr;
2487 tmp = env->lock_st_addr;
2488 env->lock_addr = -1;
2489 env->lock_st_addr = 0;
2490
2491 start_exclusive();
2492 mmap_lock();
2493
2494 if (addr == tmp) {
2495 if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
2496 goto do_sigsegv;
2497 }
2498
2499 if (val == env->lock_value) {
2500 tmp = env->ir[reg];
2501 if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
2502 goto do_sigsegv;
2503 }
2504 ret = 1;
2505 }
2506 }
2507 env->ir[reg] = ret;
2508 env->pc += 4;
2509
2510 mmap_unlock();
2511 end_exclusive();
2512 return;
2513
2514 do_sigsegv:
2515 mmap_unlock();
2516 end_exclusive();
2517
2518 info.si_signo = TARGET_SIGSEGV;
2519 info.si_errno = 0;
2520 info.si_code = TARGET_SEGV_MAPERR;
2521 info._sifields._sigfault._addr = addr;
2522 queue_signal(env, TARGET_SIGSEGV, &info);
2523}
2524
7a3148a9
JM		 2525void cpu_loop (CPUState *env)
2526{
e96efcfc 2527 int trapnr;
c227f099 2528 target_siginfo_t info;
6049f4f8 2529 abi_long sysret;
3b46e624 2530
7a3148a9
JM		 2531 while (1) {
2532 trapnr = cpu_alpha_exec (env);
3b46e624 2533
ac316ca4
RH		 2534 /* All of the traps imply a transition through PALcode, which
2535 implies an REI instruction has been executed. Which means
2536 that the intr_flag should be cleared. */
2537 env->intr_flag = 0;
2538
7a3148a9
JM		 2539 switch (trapnr) {
2540 case EXCP_RESET:
2541 fprintf(stderr, "Reset requested. Exit\n");
2542 exit(1);
2543 break;
2544 case EXCP_MCHK:
2545 fprintf(stderr, "Machine check exception. Exit\n");
2546 exit(1);
2547 break;
07b6c13b
RH		 2548 case EXCP_SMP_INTERRUPT:
2549 case EXCP_CLK_INTERRUPT:
2550 case EXCP_DEV_INTERRUPT:
5fafdf24 2551 fprintf(stderr, "External interrupt. Exit\n");
7a3148a9
JM		 2552 exit(1);
2553 break;
07b6c13b 2554 case EXCP_MMFAULT:
6910b8f6 2555 env->lock_addr = -1;
6049f4f8
RH		 2556 info.si_signo = TARGET_SIGSEGV;
2557 info.si_errno = 0;
129d8aa5 2558 info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID
0be1d07c 2559 ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR);
129d8aa5 2560 info._sifields._sigfault._addr = env->trap_arg0;
6049f4f8 2561 queue_signal(env, info.si_signo, &info);
7a3148a9 2562 break;
7a3148a9 2563 case EXCP_UNALIGN:
6910b8f6 2564 env->lock_addr = -1;
6049f4f8
RH		 2565 info.si_signo = TARGET_SIGBUS;
2566 info.si_errno = 0;
2567 info.si_code = TARGET_BUS_ADRALN;
129d8aa5 2568 info._sifields._sigfault._addr = env->trap_arg0;
6049f4f8 2569 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2570 break;
2571 case EXCP_OPCDEC:
6049f4f8 2572 do_sigill:
6910b8f6 2573 env->lock_addr = -1;
6049f4f8
RH		 2574 info.si_signo = TARGET_SIGILL;
2575 info.si_errno = 0;
2576 info.si_code = TARGET_ILL_ILLOPC;
2577 info._sifields._sigfault._addr = env->pc;
2578 queue_signal(env, info.si_signo, &info);
7a3148a9 2579 break;
07b6c13b
RH		 2580 case EXCP_ARITH:
2581 env->lock_addr = -1;
2582 info.si_signo = TARGET_SIGFPE;
2583 info.si_errno = 0;
2584 info.si_code = TARGET_FPE_FLTINV;
2585 info._sifields._sigfault._addr = env->pc;
2586 queue_signal(env, info.si_signo, &info);
2587 break;
7a3148a9 2588 case EXCP_FEN:
6049f4f8 2589 /* No-op. Linux simply re-enables the FPU. */
7a3148a9 2590 break;
07b6c13b 2591 case EXCP_CALL_PAL:
6910b8f6 2592 env->lock_addr = -1;
07b6c13b 2593 switch (env->error_code) {
6049f4f8
RH		 2594 case 0x80:
2595 /* BPT */
2596 info.si_signo = TARGET_SIGTRAP;
2597 info.si_errno = 0;
2598 info.si_code = TARGET_TRAP_BRKPT;
2599 info._sifields._sigfault._addr = env->pc;
2600 queue_signal(env, info.si_signo, &info);
2601 break;
2602 case 0x81:
2603 /* BUGCHK */
2604 info.si_signo = TARGET_SIGTRAP;
2605 info.si_errno = 0;
2606 info.si_code = 0;
2607 info._sifields._sigfault._addr = env->pc;
2608 queue_signal(env, info.si_signo, &info);
2609 break;
2610 case 0x83:
2611 /* CALLSYS */
2612 trapnr = env->ir[IR_V0];
2613 sysret = do_syscall(env, trapnr,
2614 env->ir[IR_A0], env->ir[IR_A1],
2615 env->ir[IR_A2], env->ir[IR_A3],
5945cfcb
PM		 2616 env->ir[IR_A4], env->ir[IR_A5],
2617 0, 0);
a5b3b13b
RH		 2618 if (trapnr == TARGET_NR_sigreturn
2619 || trapnr == TARGET_NR_rt_sigreturn) {
2620 break;
2621 }
2622 /* Syscall writes 0 to V0 to bypass error check, similar
2623 to how this is handled internal to Linux kernel. */
2624 if (env->ir[IR_V0] == 0) {
2625 env->ir[IR_V0] = sysret;
2626 } else {
6049f4f8
RH		 2627 env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
2628 env->ir[IR_A3] = (sysret < 0);
2629 }
2630 break;
2631 case 0x86:
2632 /* IMB */
2633 /* ??? We can probably elide the code using page_unprotect
2634 that is checking for self-modifying code. Instead we
2635 could simply call tb_flush here. Until we work out the
2636 changes required to turn off the extra write protection,
2637 this can be a no-op. */
2638 break;
2639 case 0x9E:
2640 /* RDUNIQUE */
2641 /* Handled in the translator for usermode. */
2642 abort();
2643 case 0x9F:
2644 /* WRUNIQUE */
2645 /* Handled in the translator for usermode. */
2646 abort();
2647 case 0xAA:
2648 /* GENTRAP */
2649 info.si_signo = TARGET_SIGFPE;
2650 switch (env->ir[IR_A0]) {
2651 case TARGET_GEN_INTOVF:
2652 info.si_code = TARGET_FPE_INTOVF;
2653 break;
2654 case TARGET_GEN_INTDIV:
2655 info.si_code = TARGET_FPE_INTDIV;
2656 break;
2657 case TARGET_GEN_FLTOVF:
2658 info.si_code = TARGET_FPE_FLTOVF;
2659 break;
2660 case TARGET_GEN_FLTUND:
2661 info.si_code = TARGET_FPE_FLTUND;
2662 break;
2663 case TARGET_GEN_FLTINV:
2664 info.si_code = TARGET_FPE_FLTINV;
2665 break;
2666 case TARGET_GEN_FLTINE:
2667 info.si_code = TARGET_FPE_FLTRES;
2668 break;
2669 case TARGET_GEN_ROPRAND:
2670 info.si_code = 0;
2671 break;
2672 default:
2673 info.si_signo = TARGET_SIGTRAP;
2674 info.si_code = 0;
2675 break;
2676 }
2677 info.si_errno = 0;
2678 info._sifields._sigfault._addr = env->pc;
2679 queue_signal(env, info.si_signo, &info);
2680 break;
2681 default:
2682 goto do_sigill;
2683 }
7a3148a9 2684 break;
7a3148a9 2685 case EXCP_DEBUG:
6049f4f8
RH		 2686 info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP);
2687 if (info.si_signo) {
6910b8f6 2688 env->lock_addr = -1;
6049f4f8
RH		 2689 info.si_errno = 0;
2690 info.si_code = TARGET_TRAP_BRKPT;
2691 queue_signal(env, info.si_signo, &info);
7a3148a9
JM		 2692 }
2693 break;
6910b8f6
RH		 2694 case EXCP_STL_C:
2695 case EXCP_STQ_C:
2696 do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C);
2697 break;
7a3148a9
JM		 2698 default:
2699 printf ("Unhandled trap: 0x%x\n", trapnr);
2700 cpu_dump_state(env, stderr, fprintf, 0);
2701 exit (1);
2702 }
2703 process_pending_signals (env);
2704 }
2705}
2706#endif /* TARGET_ALPHA */
2707
a4c075f1
UH		 2708#ifdef TARGET_S390X
2709void cpu_loop(CPUS390XState *env)
2710{
2711 int trapnr;
2712 target_siginfo_t info;
2713
2714 while (1) {
2715 trapnr = cpu_s390x_exec (env);
2716
2717 switch (trapnr) {
2718 case EXCP_INTERRUPT:
2719 /* just indicate that signals should be handled asap */
2720 break;
2721 case EXCP_DEBUG:
2722 {
2723 int sig;
2724
2725 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2726 if (sig) {
2727 info.si_signo = sig;
2728 info.si_errno = 0;
2729 info.si_code = TARGET_TRAP_BRKPT;
2730 queue_signal(env, info.si_signo, &info);
2731 }
2732 }
2733 break;
2734 case EXCP_SVC:
2735 {
2736 int n = env->int_svc_code;
2737 if (!n) {
2738 /* syscalls > 255 */
2739 n = env->regs[1];
2740 }
2741 env->psw.addr += env->int_svc_ilc;
2742 env->regs[2] = do_syscall(env, n,
2743 env->regs[2],
2744 env->regs[3],
2745 env->regs[4],
2746 env->regs[5],
2747 env->regs[6],
5945cfcb
PM		 2748 env->regs[7],
2749 0, 0);
a4c075f1
UH		 2750 }
2751 break;
2752 case EXCP_ADDR:
2753 {
2754 info.si_signo = SIGSEGV;
2755 info.si_errno = 0;
2756 /* XXX: check env->error_code */
2757 info.si_code = TARGET_SEGV_MAPERR;
2758 info._sifields._sigfault._addr = env->__excp_addr;
2759 queue_signal(env, info.si_signo, &info);
2760 }
2761 break;
2762 case EXCP_SPEC:
2763 {
2764 fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4));
2765 info.si_signo = SIGILL;
2766 info.si_errno = 0;
2767 info.si_code = TARGET_ILL_ILLOPC;
2768 info._sifields._sigfault._addr = env->__excp_addr;
2769 queue_signal(env, info.si_signo, &info);
2770 }
2771 break;
2772 default:
2773 printf ("Unhandled trap: 0x%x\n", trapnr);
2774 cpu_dump_state(env, stderr, fprintf, 0);
2775 exit (1);
2776 }
2777 process_pending_signals (env);
2778 }
2779}
2780
2781#endif /* TARGET_S390X */
2782
6672b0b2
PM		 2783static void version(void)
2784{
2785 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION
2786 ", Copyright (c) 2003-2008 Fabrice Bellard\n");
2787}
2788
8fcd3692 2789static void usage(void)
31e31b8a 2790{
6672b0b2
PM		 2791 version();
2792 printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
b346ff46 2793 "Linux CPU emulator (compiled for %s emulation)\n"
d691f669 2794 "\n"
68d0f70e 2795 "Standard options:\n"
b12b6a18 2796 "-h print this help\n"
6672b0b2 2797 "-version display version information and exit\n"
b12b6a18
TS		 2798 "-g port wait gdb connection to port\n"
2799 "-L path set the elf interpreter prefix (default=%s)\n"
2800 "-s size set the stack size in bytes (default=%ld)\n"
2801 "-cpu model select CPU (-cpu ? for list)\n"
2802 "-drop-ld-preload drop LD_PRELOAD for target process\n"
04a6dfeb
AJ		 2803 "-E var=value sets/modifies targets environment variable(s)\n"
2804 "-U var unsets targets environment variable(s)\n"
7d8cec95 2805 "-0 argv0 forces target process argv[0] to be argv0\n"
379f6698
PB		 2806#if defined(CONFIG_USE_GUEST_BASE)
2807 "-B address set guest_base address to address\n"
68a1c816 2808 "-R size reserve size bytes for guest virtual address space\n"
379f6698 2809#endif
54936004 2810 "\n"
68d0f70e 2811 "Debug options:\n"
6f1f31c0 2812 "-d options activate log (logfile=%s)\n"
b6741956 2813 "-p pagesize set the host page size to 'pagesize'\n"
1b530a6d 2814 "-singlestep always run in singlestep mode\n"
b01bcae6
AZ		 2815 "-strace log system calls\n"
2816 "\n"
68d0f70e 2817 "Environment variables:\n"
b01bcae6
AZ		 2818 "QEMU_STRACE Print system calls and arguments similar to the\n"
2819 " 'strace' program. Enable by setting to any value.\n"
04a6dfeb
AJ		 2820 "You can use -E and -U options to set/unset environment variables\n"
2821 "for target process. It is possible to provide several variables\n"
2822 "by repeating the option. For example:\n"
2823 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2824 "Note that if you provide several changes to single variable\n"
2825 "last change will stay in effect.\n"
b01bcae6 2826 ,
b346ff46 2827 TARGET_ARCH,
5fafdf24 2828 interp_prefix,
703e0e89 2829 guest_stack_size,
54936004 2830 DEBUG_LOGFILE);
2d18e637 2831 exit(1);
31e31b8a
FB		 2832}
2833
d5975363 2834THREAD CPUState *thread_env;
59faf6d6 2835
edf8e2af
MW		 2836void task_settid(TaskState *ts)
2837{
2838 if (ts->ts_tid == 0) {
2f7bb878 2839#ifdef CONFIG_USE_NPTL
edf8e2af
MW		 2840 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2841#else
2842 /* when no threads are used, tid becomes pid */
2843 ts->ts_tid = getpid();
2844#endif
2845 }
2846}
2847
2848void stop_all_tasks(void)
2849{
2850 /*
2851 * We trust that when using NPTL, start_exclusive()
2852 * handles thread stopping correctly.
2853 */
2854 start_exclusive();
2855}
2856
c3a92833 2857/* Assumes contents are already zeroed. */
624f7979
PB		 2858void init_task_state(TaskState *ts)
2859{
2860 int i;
2861
624f7979
PB		 2862 ts->used = 1;
2863 ts->first_free = ts->sigqueue_table;
2864 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2865 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2866 }
2867 ts->sigqueue_table[i].next = NULL;
2868}
2869
902b3d5c 2870int main(int argc, char **argv, char **envp)
31e31b8a
FB		 2871{
2872 const char *filename;
b1f9be31 2873 const char *cpu_model;
c235d738
MF		 2874 const char *log_file = DEBUG_LOGFILE;
2875 const char *log_mask = NULL;
01ffc75b 2876 struct target_pt_regs regs1, *regs = &regs1;
31e31b8a 2877 struct image_info info1, *info = &info1;
edf8e2af 2878 struct linux_binprm bprm;
48e15fc2 2879 TaskState *ts;
b346ff46 2880 CPUState *env;
586314f2 2881 int optind;
d691f669 2882 const char *r;
74c33bed 2883 int gdbstub_port = 0;
04a6dfeb 2884 char **target_environ, **wrk;
7d8cec95
AJ		 2885 char **target_argv;
2886 int target_argc;
04a6dfeb 2887 envlist_t *envlist = NULL;
7d8cec95
AJ		 2888 const char *argv0 = NULL;
2889 int i;
fd4d81dd 2890 int ret;
b12b6a18 2891
31e31b8a 2892 if (argc <= 1)
44de1b33 2893 usage();
f801f97e 2894
902b3d5c 2895 qemu_cache_utils_init(envp);
2896
04a6dfeb
AJ		 2897 if ((envlist = envlist_create()) == NULL) {
2898 (void) fprintf(stderr, "Unable to allocate envlist\n");
2899 exit(1);
2900 }
2901
2902 /* add current environment into the list */
2903 for (wrk = environ; *wrk != NULL; wrk++) {
2904 (void) envlist_setenv(envlist, *wrk);
2905 }
2906
703e0e89
RH		 2907 /* Read the stack limit from the kernel. If it's "unlimited",
2908 then we can do little else besides use the default. */
2909 {
2910 struct rlimit lim;
2911 if (getrlimit(RLIMIT_STACK, &lim) == 0
81bbe906 2912 && lim.rlim_cur != RLIM_INFINITY
2913 && lim.rlim_cur == (target_long)lim.rlim_cur) {
703e0e89
RH		 2914 guest_stack_size = lim.rlim_cur;
2915 }
2916 }
2917
b1f9be31 2918 cpu_model = NULL;
b5ec5ce0 2919#if defined(cpudef_setup)
2920 cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
2921#endif
2922
586314f2 2923 optind = 1;
d691f669
FB		 2924 for(;;) {
2925 if (optind >= argc)
2926 break;
2927 r = argv[optind];
2928 if (r[0] != '-')
2929 break;
586314f2 2930 optind++;
d691f669
FB		 2931 r++;
2932 if (!strcmp(r, "-")) {
2933 break;
2934 } else if (!strcmp(r, "d")) {
c235d738 2935 if (optind >= argc) {
6f1f31c0 2936 break;
e19e89a5 2937 }
c235d738
MF		 2938 log_mask = argv[optind++];
2939 } else if (!strcmp(r, "D")) {
2940 if (optind >= argc) {
2941 break;
2942 }
2943 log_file = argv[optind++];
04a6dfeb
AJ		 2944 } else if (!strcmp(r, "E")) {
2945 r = argv[optind++];
2946 if (envlist_setenv(envlist, r) != 0)
2947 usage();
f66724c9
SW		 2948 } else if (!strcmp(r, "ignore-environment")) {
2949 envlist_free(envlist);
2950 if ((envlist = envlist_create()) == NULL) {
2951 (void) fprintf(stderr, "Unable to allocate envlist\n");
2952 exit(1);
2953 }
04a6dfeb
AJ		 2954 } else if (!strcmp(r, "U")) {
2955 r = argv[optind++];
2956 if (envlist_unsetenv(envlist, r) != 0)
2957 usage();
7d8cec95
AJ		 2958 } else if (!strcmp(r, "0")) {
2959 r = argv[optind++];
2960 argv0 = r;
d691f669 2961 } else if (!strcmp(r, "s")) {
491150db
AJ		 2962 if (optind >= argc)
2963 break;
d691f669 2964 r = argv[optind++];
703e0e89
RH		 2965 guest_stack_size = strtoul(r, (char **)&r, 0);
2966 if (guest_stack_size == 0)
44de1b33 2967 usage();
d691f669 2968 if (*r == 'M')
703e0e89 2969 guest_stack_size *= 1024 * 1024;
d691f669 2970 else if (*r == 'k' || *r == 'K')
703e0e89 2971 guest_stack_size *= 1024;
d691f669
FB		 2972 } else if (!strcmp(r, "L")) {
2973 interp_prefix = argv[optind++];
54936004 2974 } else if (!strcmp(r, "p")) {
491150db
AJ		 2975 if (optind >= argc)
2976 break;
83fb7adf
FB		 2977 qemu_host_page_size = atoi(argv[optind++]);
2978 if (qemu_host_page_size == 0 ||
2979 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
54936004
FB		 2980 fprintf(stderr, "page size must be a power of two\n");
2981 exit(1);
2982 }
1fddef4b 2983 } else if (!strcmp(r, "g")) {
491150db
AJ		 2984 if (optind >= argc)
2985 break;
74c33bed 2986 gdbstub_port = atoi(argv[optind++]);
c5937220
PB		 2987 } else if (!strcmp(r, "r")) {
2988 qemu_uname_release = argv[optind++];
b1f9be31
JM		 2989 } else if (!strcmp(r, "cpu")) {
2990 cpu_model = argv[optind++];
491150db 2991 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
c732abe2 2992/* XXX: implement xxx_cpu_list for targets that still miss it */
b5ec5ce0 2993#if defined(cpu_list_id)
2994 cpu_list_id(stdout, &fprintf, "");
6d1db8c3
LV		 2995#elif defined(cpu_list)
2996 cpu_list(stdout, &fprintf); /* deprecated */
b1f9be31 2997#endif
2d18e637 2998 exit(1);
b1f9be31 2999 }
379f6698
PB		 3000#if defined(CONFIG_USE_GUEST_BASE)
3001 } else if (!strcmp(r, "B")) {
3002 guest_base = strtol(argv[optind++], NULL, 0);
3003 have_guest_base = 1;
68a1c816
PB		 3004 } else if (!strcmp(r, "R")) {
3005 char *p;
3006 int shift = 0;
3007 reserved_va = strtoul(argv[optind++], &p, 0);
3008 switch (*p) {
3009 case 'k':
3010 case 'K':
3011 shift = 10;
3012 break;
3013 case 'M':
3014 shift = 20;
3015 break;
3016 case 'G':
3017 shift = 30;
3018 break;
3019 }
3020 if (shift) {
3021 unsigned long unshifted = reserved_va;
3022 p++;
3023 reserved_va <<= shift;
3024 if (((reserved_va >> shift) != unshifted)
3025#if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
3026 || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
3027#endif
3028 ) {
3029 fprintf(stderr, "Reserved virtual address too big\n");
3030 exit(1);
3031 }
3032 }
3033 if (*p) {
3034 fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
3035 exit(1);
3036 }
379f6698 3037#endif
b12b6a18 3038 } else if (!strcmp(r, "drop-ld-preload")) {
04a6dfeb 3039 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
1b530a6d
AJ		 3040 } else if (!strcmp(r, "singlestep")) {
3041 singlestep = 1;
b6741956
FB		 3042 } else if (!strcmp(r, "strace")) {
3043 do_strace = 1;
6672b0b2
PM		 3044 } else if (!strcmp(r, "version")) {
3045 version();
3046 exit(0);
3047 } else {
d691f669
FB		 3048 usage();
3049 }
586314f2 3050 }
c235d738
MF		 3051 /* init debug */
3052 cpu_set_log_filename(log_file);
3053 if (log_mask) {
3054 int mask;
3055 const CPULogItem *item;
3056
1dfdcaa8 3057 mask = cpu_str_to_log_mask(log_mask);
c235d738
MF		 3058 if (!mask) {
3059 printf("Log items (comma separated):\n");
3060 for (item = cpu_log_items; item->mask != 0; item++) {
3061 printf("%-10s %s\n", item->name, item->help);
3062 }
3063 exit(1);
3064 }
3065 cpu_set_log(mask);
3066 }
4b5dfd82
PM		 3067
3068 if (optind >= argc) {
3069 usage();
3070 }
3071 filename = argv[optind];
3072 exec_path = argv[optind];
586314f2 3073
31e31b8a 3074 /* Zero out regs */
01ffc75b 3075 memset(regs, 0, sizeof(struct target_pt_regs));
31e31b8a
FB		 3076
3077 /* Zero out image_info */
3078 memset(info, 0, sizeof(struct image_info));
3079
edf8e2af
MW		 3080 memset(&bprm, 0, sizeof (bprm));
3081
74cd30b8
FB		 3082 /* Scan interp_prefix dir for replacement files. */
3083 init_paths(interp_prefix);
3084
46027c07 3085 if (cpu_model == NULL) {
aaed909a 3086#if defined(TARGET_I386)
46027c07
FB		 3087#ifdef TARGET_X86_64
3088 cpu_model = "qemu64";
3089#else
3090 cpu_model = "qemu32";
3091#endif
aaed909a 3092#elif defined(TARGET_ARM)
088ab16c 3093 cpu_model = "any";
d2fbca94
GX		 3094#elif defined(TARGET_UNICORE32)
3095 cpu_model = "any";
aaed909a
FB		 3096#elif defined(TARGET_M68K)
3097 cpu_model = "any";
3098#elif defined(TARGET_SPARC)
3099#ifdef TARGET_SPARC64
3100 cpu_model = "TI UltraSparc II";
3101#else
3102 cpu_model = "Fujitsu MB86904";
46027c07 3103#endif
aaed909a
FB		 3104#elif defined(TARGET_MIPS)
3105#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
3106 cpu_model = "20Kc";
3107#else
3108 cpu_model = "24Kf";
3109#endif
3110#elif defined(TARGET_PPC)
7ded4f52 3111#ifdef TARGET_PPC64
f7177937 3112 cpu_model = "970fx";
7ded4f52 3113#else
aaed909a 3114 cpu_model = "750";
7ded4f52 3115#endif
aaed909a
FB		 3116#else
3117 cpu_model = "any";
3118#endif
3119 }
d5ab9713
JK		 3120 tcg_exec_init(0);
3121 cpu_exec_init_all();
83fb7adf
FB		 3122 /* NOTE: we need to init the CPU at this stage to get
3123 qemu_host_page_size */
aaed909a
FB		 3124 env = cpu_init(cpu_model);
3125 if (!env) {
3126 fprintf(stderr, "Unable to find CPU definition\n");
3127 exit(1);
3128 }
b55a37c9
BS		 3129#if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
3130 cpu_reset(env);
3131#endif
3132
d5975363 3133 thread_env = env;
3b46e624 3134
b6741956
FB		 3135 if (getenv("QEMU_STRACE")) {
3136 do_strace = 1;
b92c47c1
TS		 3137 }
3138
04a6dfeb
AJ		 3139 target_environ = envlist_to_environ(envlist, NULL);
3140 envlist_free(envlist);
b12b6a18 3141
379f6698
PB		 3142#if defined(CONFIG_USE_GUEST_BASE)
3143 /*
3144 * Now that page sizes are configured in cpu_init() we can do
3145 * proper page alignment for guest_base.
3146 */
3147 guest_base = HOST_PAGE_ALIGN(guest_base);
68a1c816
PB		 3148
3149 if (reserved_va) {
3150 void *p;
3151 int flags;
3152
3153 flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE;
3154 if (have_guest_base) {
3155 flags |= MAP_FIXED;
3156 }
3157 p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0);
3158 if (p == MAP_FAILED) {
3159 fprintf(stderr, "Unable to reserve guest address space\n");
3160 exit(1);
3161 }
3162 guest_base = (unsigned long)p;
3163 /* Make sure the address is properly aligned. */
3164 if (guest_base & ~qemu_host_page_mask) {
3165 munmap(p, reserved_va);
3166 p = mmap((void *)guest_base, reserved_va + qemu_host_page_size,
3167 PROT_NONE, flags, -1, 0);
3168 if (p == MAP_FAILED) {
3169 fprintf(stderr, "Unable to reserve guest address space\n");
3170 exit(1);
3171 }
3172 guest_base = HOST_PAGE_ALIGN((unsigned long)p);
3173 }
3174 qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va);
3175 }
14f24e14 3176#endif /* CONFIG_USE_GUEST_BASE */
379f6698
PB		 3177
3178 /*
3179 * Read in mmap_min_addr kernel parameter. This value is used
3180 * When loading the ELF image to determine whether guest_base
14f24e14 3181 * is needed. It is also used in mmap_find_vma.
379f6698 3182 */
14f24e14 3183 {
379f6698
PB		 3184 FILE *fp;
3185
3186 if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) {
3187 unsigned long tmp;
3188 if (fscanf(fp, "%lu", &tmp) == 1) {
3189 mmap_min_addr = tmp;
3190 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
3191 }
3192 fclose(fp);
3193 }
3194 }
379f6698 3195
7d8cec95
AJ		 3196 /*
3197 * Prepare copy of argv vector for target.
3198 */
3199 target_argc = argc - optind;
3200 target_argv = calloc(target_argc + 1, sizeof (char *));
3201 if (target_argv == NULL) {
3202 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
3203 exit(1);
3204 }
3205
3206 /*
3207 * If argv0 is specified (using '-0' switch) we replace
3208 * argv[0] pointer with the given one.
3209 */
3210 i = 0;
3211 if (argv0 != NULL) {
3212 target_argv[i++] = strdup(argv0);
3213 }
3214 for (; i < target_argc; i++) {
3215 target_argv[i] = strdup(argv[optind + i]);
3216 }
3217 target_argv[target_argc] = NULL;
3218
7267c094 3219 ts = g_malloc0 (sizeof(TaskState));
edf8e2af
MW		 3220 init_task_state(ts);
3221 /* build Task State */
3222 ts->info = info;
3223 ts->bprm = &bprm;
3224 env->opaque = ts;
3225 task_settid(ts);
3226
fd4d81dd
AP		 3227 ret = loader_exec(filename, target_argv, target_environ, regs,
3228 info, &bprm);
3229 if (ret != 0) {
3230 printf("Error %d while loading %s\n", ret, filename);
b12b6a18
TS		 3231 _exit(1);
3232 }
3233
7d8cec95
AJ		 3234 for (i = 0; i < target_argc; i++) {
3235 free(target_argv[i]);
3236 }
3237 free(target_argv);
3238
b12b6a18
TS		 3239 for (wrk = target_environ; *wrk; wrk++) {
3240 free(*wrk);
31e31b8a 3241 }
3b46e624 3242
b12b6a18
TS		 3243 free(target_environ);
3244
2e77eac6 3245 if (qemu_log_enabled()) {
379f6698
PB		 3246#if defined(CONFIG_USE_GUEST_BASE)
3247 qemu_log("guest_base 0x%lx\n", guest_base);
3248#endif
2e77eac6
BS		 3249 log_page_dump();
3250
3251 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
3252 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
3253 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
3254 info->start_code);
3255 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
3256 info->start_data);
3257 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
3258 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
3259 info->start_stack);
3260 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
3261 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
3262 }
31e31b8a 3263
53a5960a 3264 target_set_brk(info->brk);
31e31b8a 3265 syscall_init();
66fb9763 3266 signal_init();
31e31b8a 3267
9002ec79
RH		 3268#if defined(CONFIG_USE_GUEST_BASE)
3269 /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
3270 generating the prologue until now so that the prologue can take
3271 the real value of GUEST_BASE into account. */
3272 tcg_prologue_init(&tcg_ctx);
3273#endif
3274
b346ff46 3275#if defined(TARGET_I386)
2e255c6b
FB		 3276 cpu_x86_set_cpl(env, 3);
3277
3802ce26 3278 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
1bde465e
FB		 3279 env->hflags |= HF_PE_MASK;
3280 if (env->cpuid_features & CPUID_SSE) {
3281 env->cr[4] |= CR4_OSFXSR_MASK;
3282 env->hflags |= HF_OSFXSR_MASK;
3283 }
d2fd1af7 3284#ifndef TARGET_ABI32
4dbc422b
FB		 3285 /* enable 64 bit mode if possible */
3286 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
3287 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
3288 exit(1);
3289 }
d2fd1af7 3290 env->cr[4] |= CR4_PAE_MASK;
4dbc422b 3291 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
d2fd1af7
FB		 3292 env->hflags |= HF_LMA_MASK;
3293#endif
1bde465e 3294
415e561f
FB		 3295 /* flags setup : we activate the IRQs by default as in user mode */
3296 env->eflags |= IF_MASK;
3b46e624 3297
6dbad63e 3298 /* linux register setup */
d2fd1af7 3299#ifndef TARGET_ABI32
84409ddb
JM		 3300 env->regs[R_EAX] = regs->rax;
3301 env->regs[R_EBX] = regs->rbx;
3302 env->regs[R_ECX] = regs->rcx;
3303 env->regs[R_EDX] = regs->rdx;
3304 env->regs[R_ESI] = regs->rsi;
3305 env->regs[R_EDI] = regs->rdi;
3306 env->regs[R_EBP] = regs->rbp;
3307 env->regs[R_ESP] = regs->rsp;
3308 env->eip = regs->rip;
3309#else
0ecfa993
FB		 3310 env->regs[R_EAX] = regs->eax;
3311 env->regs[R_EBX] = regs->ebx;
3312 env->regs[R_ECX] = regs->ecx;
3313 env->regs[R_EDX] = regs->edx;
3314 env->regs[R_ESI] = regs->esi;
3315 env->regs[R_EDI] = regs->edi;
3316 env->regs[R_EBP] = regs->ebp;
3317 env->regs[R_ESP] = regs->esp;
dab2ed99 3318 env->eip = regs->eip;
84409ddb 3319#endif
31e31b8a 3320
f4beb510 3321 /* linux interrupt setup */
e441570f
AZ		 3322#ifndef TARGET_ABI32
3323 env->idt.limit = 511;
3324#else
3325 env->idt.limit = 255;
3326#endif
3327 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
3328 PROT_READ|PROT_WRITE,
3329 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
3330 idt_table = g2h(env->idt.base);
f4beb510
FB		 3331 set_idt(0, 0);
3332 set_idt(1, 0);
3333 set_idt(2, 0);
3334 set_idt(3, 3);
3335 set_idt(4, 3);
ec95da6c 3336 set_idt(5, 0);
f4beb510
FB		 3337 set_idt(6, 0);
3338 set_idt(7, 0);
3339 set_idt(8, 0);
3340 set_idt(9, 0);
3341 set_idt(10, 0);
3342 set_idt(11, 0);
3343 set_idt(12, 0);
3344 set_idt(13, 0);
3345 set_idt(14, 0);
3346 set_idt(15, 0);
3347 set_idt(16, 0);
3348 set_idt(17, 0);
3349 set_idt(18, 0);
3350 set_idt(19, 0);
3351 set_idt(0x80, 3);
3352
6dbad63e 3353 /* linux segment setup */
8d18e893
FB		 3354 {
3355 uint64_t *gdt_table;
e441570f
AZ		 3356 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
3357 PROT_READ|PROT_WRITE,
3358 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
8d18e893 3359 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
e441570f 3360 gdt_table = g2h(env->gdt.base);
d2fd1af7 3361#ifdef TARGET_ABI32
8d18e893
FB		 3362 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3363 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3364 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
d2fd1af7
FB		 3365#else
3366 /* 64 bit code segment */
3367 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
3368 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3369 DESC_L_MASK |
3370 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
3371#endif
8d18e893
FB		 3372 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
3373 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
3374 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
3375 }
6dbad63e 3376 cpu_x86_load_seg(env, R_CS, __USER_CS);
d2fd1af7
FB		 3377 cpu_x86_load_seg(env, R_SS, __USER_DS);
3378#ifdef TARGET_ABI32
6dbad63e
FB		 3379 cpu_x86_load_seg(env, R_DS, __USER_DS);
3380 cpu_x86_load_seg(env, R_ES, __USER_DS);
6dbad63e
FB		 3381 cpu_x86_load_seg(env, R_FS, __USER_DS);
3382 cpu_x86_load_seg(env, R_GS, __USER_DS);
d6eb40f6
TS		 3383 /* This hack makes Wine work... */
3384 env->segs[R_FS].selector = 0;
d2fd1af7
FB		 3385#else
3386 cpu_x86_load_seg(env, R_DS, 0);
3387 cpu_x86_load_seg(env, R_ES, 0);
3388 cpu_x86_load_seg(env, R_FS, 0);
3389 cpu_x86_load_seg(env, R_GS, 0);
3390#endif
b346ff46
FB		 3391#elif defined(TARGET_ARM)
3392 {
3393 int i;
b5ff1b31 3394 cpsr_write(env, regs->uregs[16], 0xffffffff);
b346ff46
FB		 3395 for(i = 0; i < 16; i++) {
3396 env->regs[i] = regs->uregs[i];
3397 }
b346ff46 3398 }
d2fbca94
GX		 3399#elif defined(TARGET_UNICORE32)
3400 {
3401 int i;
3402 cpu_asr_write(env, regs->uregs[32], 0xffffffff);
3403 for (i = 0; i < 32; i++) {
3404 env->regs[i] = regs->uregs[i];
3405 }
3406 }
93ac68bc 3407#elif defined(TARGET_SPARC)
060366c5
FB		 3408 {
3409 int i;
3410 env->pc = regs->pc;
3411 env->npc = regs->npc;
3412 env->y = regs->y;
3413 for(i = 0; i < 8; i++)
3414 env->gregs[i] = regs->u_regs[i];
3415 for(i = 0; i < 8; i++)
3416 env->regwptr[i] = regs->u_regs[i + 8];
3417 }
67867308
FB		 3418#elif defined(TARGET_PPC)
3419 {
3420 int i;
3fc6c082 3421
0411a972
JM		 3422#if defined(TARGET_PPC64)
3423#if defined(TARGET_ABI32)
3424 env->msr &= ~((target_ulong)1 << MSR_SF);
e85e7c6e 3425#else
0411a972
JM		 3426 env->msr |= (target_ulong)1 << MSR_SF;
3427#endif
84409ddb 3428#endif
67867308
FB		 3429 env->nip = regs->nip;
3430 for(i = 0; i < 32; i++) {
3431 env->gpr[i] = regs->gpr[i];
3432 }
3433 }
e6e5906b
PB		 3434#elif defined(TARGET_M68K)
3435 {
e6e5906b
PB		 3436 env->pc = regs->pc;
3437 env->dregs[0] = regs->d0;
3438 env->dregs[1] = regs->d1;
3439 env->dregs[2] = regs->d2;
3440 env->dregs[3] = regs->d3;
3441 env->dregs[4] = regs->d4;
3442 env->dregs[5] = regs->d5;
3443 env->dregs[6] = regs->d6;
3444 env->dregs[7] = regs->d7;
3445 env->aregs[0] = regs->a0;
3446 env->aregs[1] = regs->a1;
3447 env->aregs[2] = regs->a2;
3448 env->aregs[3] = regs->a3;
3449 env->aregs[4] = regs->a4;
3450 env->aregs[5] = regs->a5;
3451 env->aregs[6] = regs->a6;
3452 env->aregs[7] = regs->usp;
3453 env->sr = regs->sr;
3454 ts->sim_syscalls = 1;
3455 }
b779e29e
EI		 3456#elif defined(TARGET_MICROBLAZE)
3457 {
3458 env->regs[0] = regs->r0;
3459 env->regs[1] = regs->r1;
3460 env->regs[2] = regs->r2;
3461 env->regs[3] = regs->r3;
3462 env->regs[4] = regs->r4;
3463 env->regs[5] = regs->r5;
3464 env->regs[6] = regs->r6;
3465 env->regs[7] = regs->r7;
3466 env->regs[8] = regs->r8;
3467 env->regs[9] = regs->r9;
3468 env->regs[10] = regs->r10;
3469 env->regs[11] = regs->r11;
3470 env->regs[12] = regs->r12;
3471 env->regs[13] = regs->r13;
3472 env->regs[14] = regs->r14;
3473 env->regs[15] = regs->r15;
3474 env->regs[16] = regs->r16;
3475 env->regs[17] = regs->r17;
3476 env->regs[18] = regs->r18;
3477 env->regs[19] = regs->r19;
3478 env->regs[20] = regs->r20;
3479 env->regs[21] = regs->r21;
3480 env->regs[22] = regs->r22;
3481 env->regs[23] = regs->r23;
3482 env->regs[24] = regs->r24;
3483 env->regs[25] = regs->r25;
3484 env->regs[26] = regs->r26;
3485 env->regs[27] = regs->r27;
3486 env->regs[28] = regs->r28;
3487 env->regs[29] = regs->r29;
3488 env->regs[30] = regs->r30;
3489 env->regs[31] = regs->r31;
3490 env->sregs[SR_PC] = regs->pc;
3491 }
048f6b4d
FB		 3492#elif defined(TARGET_MIPS)
3493 {
3494 int i;
3495
3496 for(i = 0; i < 32; i++) {
b5dc7732 3497 env->active_tc.gpr[i] = regs->regs[i];
048f6b4d 3498 }
0fddbbf2
NF		 3499 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
3500 if (regs->cp0_epc & 1) {
3501 env->hflags |= MIPS_HFLAG_M16;
3502 }
048f6b4d 3503 }
fdf9b3e8
FB		 3504#elif defined(TARGET_SH4)
3505 {
3506 int i;
3507
3508 for(i = 0; i < 16; i++) {
3509 env->gregs[i] = regs->regs[i];
3510 }
3511 env->pc = regs->pc;
3512 }
7a3148a9
JM		 3513#elif defined(TARGET_ALPHA)
3514 {
3515 int i;
3516
3517 for(i = 0; i < 28; i++) {
992f48a0 3518 env->ir[i] = ((abi_ulong *)regs)[i];
7a3148a9 3519 }
dad081ee 3520 env->ir[IR_SP] = regs->usp;
7a3148a9 3521 env->pc = regs->pc;
7a3148a9 3522 }
48733d19
TS		 3523#elif defined(TARGET_CRIS)
3524 {
3525 env->regs[0] = regs->r0;
3526 env->regs[1] = regs->r1;
3527 env->regs[2] = regs->r2;
3528 env->regs[3] = regs->r3;
3529 env->regs[4] = regs->r4;
3530 env->regs[5] = regs->r5;
3531 env->regs[6] = regs->r6;
3532 env->regs[7] = regs->r7;
3533 env->regs[8] = regs->r8;
3534 env->regs[9] = regs->r9;
3535 env->regs[10] = regs->r10;
3536 env->regs[11] = regs->r11;
3537 env->regs[12] = regs->r12;
3538 env->regs[13] = regs->r13;
3539 env->regs[14] = info->start_stack;
3540 env->regs[15] = regs->acr;
3541 env->pc = regs->erp;
3542 }
a4c075f1
UH		 3543#elif defined(TARGET_S390X)
3544 {
3545 int i;
3546 for (i = 0; i < 16; i++) {
3547 env->regs[i] = regs->gprs[i];
3548 }
3549 env->psw.mask = regs->psw.mask;
3550 env->psw.addr = regs->psw.addr;
3551 }
b346ff46
FB		 3552#else
3553#error unsupported target CPU
3554#endif
31e31b8a 3555
d2fbca94 3556#if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
a87295e8
PB		 3557 ts->stack_base = info->start_stack;
3558 ts->heap_base = info->brk;
3559 /* This will be filled in on the first SYS_HEAPINFO call. */
3560 ts->heap_limit = 0;
3561#endif
3562
74c33bed
FB		 3563 if (gdbstub_port) {
3564 gdbserver_start (gdbstub_port);
1fddef4b
FB		 3565 gdb_handlesig(env, 0);
3566 }
1b6b029e
FB		 3567 cpu_loop(env);
3568 /* never exits */
31e31b8a
FB		 3569 return 0;
3570}
Qemu copy for testing