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CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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PB
16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
1de7afc9 19#include "qemu/bitops.h"
2c9b15ca 20#include "qom/object.h"
55d5d048 21#include "trace.h"
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22#include <assert.h>
23
022c62cb 24#include "exec/memory-internal.h"
67d95c15 25
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26//#define DEBUG_UNASSIGNED
27
22bde714
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28static unsigned memory_region_transaction_depth;
29static bool memory_region_update_pending;
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30static bool global_dirty_log = false;
31
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PB
32/* flat_view_mutex is taken around reading as->current_map; the critical
33 * section is extremely short, so I'm using a single mutex for every AS.
34 * We could also RCU for the read-side.
35 *
36 * The BQL is taken around transaction commits, hence both locks are taken
37 * while writing to as->current_map (with the BQL taken outside).
38 */
39static QemuMutex flat_view_mutex;
40
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41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 43
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44static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
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47static void memory_init(void)
48{
49 qemu_mutex_init(&flat_view_mutex);
50}
51
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52typedef struct AddrRange AddrRange;
53
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54/*
55 * Note using signed integers limits us to physical addresses at most
56 * 63 bits wide. They are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
093bc2cd 59struct AddrRange {
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60 Int128 start;
61 Int128 size;
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62};
63
08dafab4 64static AddrRange addrrange_make(Int128 start, Int128 size)
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65{
66 return (AddrRange) { start, size };
67}
68
69static bool addrrange_equal(AddrRange r1, AddrRange r2)
70{
08dafab4 71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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72}
73
08dafab4 74static Int128 addrrange_end(AddrRange r)
093bc2cd 75{
08dafab4 76 return int128_add(r.start, r.size);
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77}
78
08dafab4 79static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 80{
08dafab4 81 int128_addto(&range.start, delta);
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82 return range;
83}
84
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85static bool addrrange_contains(AddrRange range, Int128 addr)
86{
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89}
90
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91static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92{
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93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
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95}
96
97static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98{
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99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
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102}
103
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104enum ListenerDirection { Forward, Reverse };
105
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106static bool memory_listener_match(MemoryListener *listener,
107 MemoryRegionSection *section)
108{
109 return !listener->address_space_filter
110 || listener->address_space_filter == section->address_space;
111}
112
113#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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114 do { \
115 MemoryListener *_listener; \
116 \
117 switch (_direction) { \
118 case Forward: \
119 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
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123 } \
124 break; \
125 case Reverse: \
126 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
127 memory_listeners, link) { \
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128 if (_listener->_callback) { \
129 _listener->_callback(_listener, ##_args); \
130 } \
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131 } \
132 break; \
133 default: \
134 abort(); \
135 } \
136 } while (0)
137
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138#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
139 do { \
140 MemoryListener *_listener; \
141 \
142 switch (_direction) { \
143 case Forward: \
144 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
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147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 case Reverse: \
152 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
153 memory_listeners, link) { \
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154 if (_listener->_callback \
155 && memory_listener_match(_listener, _section)) { \
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156 _listener->_callback(_listener, _section, ##_args); \
157 } \
158 } \
159 break; \
160 default: \
161 abort(); \
162 } \
163 } while (0)
164
dfde4e6e 165/* No need to ref/unref .mr, the FlatRange keeps it alive. */
0e0d36b4 166#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 167 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 168 .mr = (fr)->mr, \
f6790af6 169 .address_space = (as), \
0e0d36b4 170 .offset_within_region = (fr)->offset_in_region, \
052e87b0 171 .size = (fr)->addr.size, \
0e0d36b4 172 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 173 .readonly = (fr)->readonly, \
7376e582 174 }))
0e0d36b4 175
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176struct CoalescedMemoryRange {
177 AddrRange addr;
178 QTAILQ_ENTRY(CoalescedMemoryRange) link;
179};
180
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181struct MemoryRegionIoeventfd {
182 AddrRange addr;
183 bool match_data;
184 uint64_t data;
753d5e14 185 EventNotifier *e;
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186};
187
188static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
189 MemoryRegionIoeventfd b)
190{
08dafab4 191 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 192 return true;
08dafab4 193 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 194 return false;
08dafab4 195 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 196 return true;
08dafab4 197 } else if (int128_gt(a.addr.size, b.addr.size)) {
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198 return false;
199 } else if (a.match_data < b.match_data) {
200 return true;
201 } else if (a.match_data > b.match_data) {
202 return false;
203 } else if (a.match_data) {
204 if (a.data < b.data) {
205 return true;
206 } else if (a.data > b.data) {
207 return false;
208 }
209 }
753d5e14 210 if (a.e < b.e) {
3e9d69e7 211 return true;
753d5e14 212 } else if (a.e > b.e) {
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213 return false;
214 }
215 return false;
216}
217
218static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
219 MemoryRegionIoeventfd b)
220{
221 return !memory_region_ioeventfd_before(a, b)
222 && !memory_region_ioeventfd_before(b, a);
223}
224
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225typedef struct FlatRange FlatRange;
226typedef struct FlatView FlatView;
227
228/* Range of memory in the global map. Addresses are absolute. */
229struct FlatRange {
230 MemoryRegion *mr;
a8170e5e 231 hwaddr offset_in_region;
093bc2cd 232 AddrRange addr;
5a583347 233 uint8_t dirty_log_mask;
5f9a5ea1 234 bool romd_mode;
fb1cd6f9 235 bool readonly;
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236};
237
238/* Flattened global view of current active memory hierarchy. Kept in sorted
239 * order.
240 */
241struct FlatView {
856d7245 242 unsigned ref;
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243 FlatRange *ranges;
244 unsigned nr;
245 unsigned nr_allocated;
246};
247
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248typedef struct AddressSpaceOps AddressSpaceOps;
249
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250#define FOR_EACH_FLAT_RANGE(var, view) \
251 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
252
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253static bool flatrange_equal(FlatRange *a, FlatRange *b)
254{
255 return a->mr == b->mr
256 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 257 && a->offset_in_region == b->offset_in_region
5f9a5ea1 258 && a->romd_mode == b->romd_mode
fb1cd6f9 259 && a->readonly == b->readonly;
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260}
261
262static void flatview_init(FlatView *view)
263{
856d7245 264 view->ref = 1;
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265 view->ranges = NULL;
266 view->nr = 0;
267 view->nr_allocated = 0;
268}
269
270/* Insert a range into a given position. Caller is responsible for maintaining
271 * sorting order.
272 */
273static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
274{
275 if (view->nr == view->nr_allocated) {
276 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 277 view->ranges = g_realloc(view->ranges,
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278 view->nr_allocated * sizeof(*view->ranges));
279 }
280 memmove(view->ranges + pos + 1, view->ranges + pos,
281 (view->nr - pos) * sizeof(FlatRange));
282 view->ranges[pos] = *range;
dfde4e6e 283 memory_region_ref(range->mr);
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284 ++view->nr;
285}
286
287static void flatview_destroy(FlatView *view)
288{
dfde4e6e
PB
289 int i;
290
291 for (i = 0; i < view->nr; i++) {
292 memory_region_unref(view->ranges[i].mr);
293 }
7267c094 294 g_free(view->ranges);
a9a0c06d 295 g_free(view);
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296}
297
856d7245
PB
298static void flatview_ref(FlatView *view)
299{
300 atomic_inc(&view->ref);
301}
302
303static void flatview_unref(FlatView *view)
304{
305 if (atomic_fetch_dec(&view->ref) == 1) {
306 flatview_destroy(view);
307 }
308}
309
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310static bool can_merge(FlatRange *r1, FlatRange *r2)
311{
08dafab4 312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 313 && r1->mr == r2->mr
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314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
d0a9b5bc 317 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 318 && r1->romd_mode == r2->romd_mode
fb1cd6f9 319 && r1->readonly == r2->readonly;
3d8e6bf9
AK
320}
321
8508e024 322/* Attempt to simplify a view by merging adjacent ranges */
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323static void flatview_simplify(FlatView *view)
324{
325 unsigned i, j;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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333 ++j;
334 }
335 ++i;
336 memmove(&view->ranges[i], &view->ranges[j],
337 (view->nr - j) * sizeof(view->ranges[j]));
338 view->nr -= j - i;
339 }
340}
341
e7342aa3
PB
342static bool memory_region_big_endian(MemoryRegion *mr)
343{
344#ifdef TARGET_WORDS_BIGENDIAN
345 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
346#else
347 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
348#endif
349}
350
e11ef3d1
PB
351static bool memory_region_wrong_endianness(MemoryRegion *mr)
352{
353#ifdef TARGET_WORDS_BIGENDIAN
354 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
355#else
356 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
357#endif
358}
359
360static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
361{
362 if (memory_region_wrong_endianness(mr)) {
363 switch (size) {
364 case 1:
365 break;
366 case 2:
367 *data = bswap16(*data);
368 break;
369 case 4:
370 *data = bswap32(*data);
371 break;
372 case 8:
373 *data = bswap64(*data);
374 break;
375 default:
376 abort();
377 }
378 }
379}
380
547e9201 381static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
382 hwaddr addr,
383 uint64_t *value,
384 unsigned size,
385 unsigned shift,
386 uint64_t mask)
387{
ce5d2f33
PB
388 uint64_t tmp;
389
390 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
55d5d048 391 trace_memory_region_ops_read(mr, addr, tmp, size);
ce5d2f33
PB
392 *value |= (tmp & mask) << shift;
393}
394
547e9201 395static void memory_region_read_accessor(MemoryRegion *mr,
a8170e5e 396 hwaddr addr,
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397 uint64_t *value,
398 unsigned size,
399 unsigned shift,
400 uint64_t mask)
401{
164a4dcd
AK
402 uint64_t tmp;
403
d410515e
JK
404 if (mr->flush_coalesced_mmio) {
405 qemu_flush_coalesced_mmio_buffer();
406 }
164a4dcd 407 tmp = mr->ops->read(mr->opaque, addr, size);
55d5d048 408 trace_memory_region_ops_read(mr, addr, tmp, size);
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AK
409 *value |= (tmp & mask) << shift;
410}
411
547e9201 412static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
ce5d2f33
PB
413 hwaddr addr,
414 uint64_t *value,
415 unsigned size,
416 unsigned shift,
417 uint64_t mask)
418{
ce5d2f33
PB
419 uint64_t tmp;
420
421 tmp = (*value >> shift) & mask;
55d5d048 422 trace_memory_region_ops_write(mr, addr, tmp, size);
ce5d2f33
PB
423 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
424}
425
547e9201 426static void memory_region_write_accessor(MemoryRegion *mr,
a8170e5e 427 hwaddr addr,
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AK
428 uint64_t *value,
429 unsigned size,
430 unsigned shift,
431 uint64_t mask)
432{
164a4dcd
AK
433 uint64_t tmp;
434
d410515e
JK
435 if (mr->flush_coalesced_mmio) {
436 qemu_flush_coalesced_mmio_buffer();
437 }
164a4dcd 438 tmp = (*value >> shift) & mask;
55d5d048 439 trace_memory_region_ops_write(mr, addr, tmp, size);
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AK
440 mr->ops->write(mr->opaque, addr, tmp, size);
441}
442
a8170e5e 443static void access_with_adjusted_size(hwaddr addr,
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444 uint64_t *value,
445 unsigned size,
446 unsigned access_size_min,
447 unsigned access_size_max,
547e9201 448 void (*access)(MemoryRegion *mr,
a8170e5e 449 hwaddr addr,
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AK
450 uint64_t *value,
451 unsigned size,
452 unsigned shift,
453 uint64_t mask),
547e9201 454 MemoryRegion *mr)
164a4dcd
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455{
456 uint64_t access_mask;
457 unsigned access_size;
458 unsigned i;
459
460 if (!access_size_min) {
461 access_size_min = 1;
462 }
463 if (!access_size_max) {
464 access_size_max = 4;
465 }
ce5d2f33
PB
466
467 /* FIXME: support unaligned access? */
164a4dcd
AK
468 access_size = MAX(MIN(size, access_size_max), access_size_min);
469 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
470 if (memory_region_big_endian(mr)) {
471 for (i = 0; i < size; i += access_size) {
472 access(mr, addr + i, value, access_size,
473 (size - access_size - i) * 8, access_mask);
474 }
475 } else {
476 for (i = 0; i < size; i += access_size) {
477 access(mr, addr + i, value, access_size, i * 8, access_mask);
478 }
164a4dcd
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479 }
480}
481
e2177955
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482static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
483{
0d673e36
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484 AddressSpace *as;
485
e2177955
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486 while (mr->parent) {
487 mr = mr->parent;
488 }
0d673e36
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489 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
490 if (mr == as->root) {
491 return as;
492 }
e2177955
AK
493 }
494 abort();
495}
496
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497/* Render a memory region into the global view. Ranges in @view obscure
498 * ranges in @mr.
499 */
500static void render_memory_region(FlatView *view,
501 MemoryRegion *mr,
08dafab4 502 Int128 base,
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503 AddrRange clip,
504 bool readonly)
093bc2cd
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505{
506 MemoryRegion *subregion;
507 unsigned i;
a8170e5e 508 hwaddr offset_in_region;
08dafab4
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509 Int128 remain;
510 Int128 now;
093bc2cd
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511 FlatRange fr;
512 AddrRange tmp;
513
6bba19ba
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514 if (!mr->enabled) {
515 return;
516 }
517
08dafab4 518 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 519 readonly |= mr->readonly;
093bc2cd
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520
521 tmp = addrrange_make(base, mr->size);
522
523 if (!addrrange_intersects(tmp, clip)) {
524 return;
525 }
526
527 clip = addrrange_intersection(tmp, clip);
528
529 if (mr->alias) {
08dafab4
AK
530 int128_subfrom(&base, int128_make64(mr->alias->addr));
531 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 532 render_memory_region(view, mr->alias, base, clip, readonly);
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533 return;
534 }
535
536 /* Render subregions in priority order. */
537 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 538 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
539 }
540
14a3c10a 541 if (!mr->terminates) {
093bc2cd
AK
542 return;
543 }
544
08dafab4 545 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
546 base = clip.start;
547 remain = clip.size;
548
2eb74e1a
PC
549 fr.mr = mr;
550 fr.dirty_log_mask = mr->dirty_log_mask;
551 fr.romd_mode = mr->romd_mode;
552 fr.readonly = readonly;
553
093bc2cd 554 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
555 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
556 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
557 continue;
558 }
08dafab4
AK
559 if (int128_lt(base, view->ranges[i].addr.start)) {
560 now = int128_min(remain,
561 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
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562 fr.offset_in_region = offset_in_region;
563 fr.addr = addrrange_make(base, now);
564 flatview_insert(view, i, &fr);
565 ++i;
08dafab4
AK
566 int128_addto(&base, now);
567 offset_in_region += int128_get64(now);
568 int128_subfrom(&remain, now);
093bc2cd 569 }
d26a8cae
AK
570 now = int128_sub(int128_min(int128_add(base, remain),
571 addrrange_end(view->ranges[i].addr)),
572 base);
573 int128_addto(&base, now);
574 offset_in_region += int128_get64(now);
575 int128_subfrom(&remain, now);
093bc2cd 576 }
08dafab4 577 if (int128_nz(remain)) {
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578 fr.offset_in_region = offset_in_region;
579 fr.addr = addrrange_make(base, remain);
580 flatview_insert(view, i, &fr);
581 }
582}
583
584/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 585static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 586{
a9a0c06d 587 FlatView *view;
093bc2cd 588
a9a0c06d
PB
589 view = g_new(FlatView, 1);
590 flatview_init(view);
093bc2cd 591
83f3c251 592 if (mr) {
a9a0c06d 593 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
594 addrrange_make(int128_zero(), int128_2_64()), false);
595 }
a9a0c06d 596 flatview_simplify(view);
093bc2cd
AK
597
598 return view;
599}
600
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601static void address_space_add_del_ioeventfds(AddressSpace *as,
602 MemoryRegionIoeventfd *fds_new,
603 unsigned fds_new_nb,
604 MemoryRegionIoeventfd *fds_old,
605 unsigned fds_old_nb)
606{
607 unsigned iold, inew;
80a1ea37
AK
608 MemoryRegionIoeventfd *fd;
609 MemoryRegionSection section;
3e9d69e7
AK
610
611 /* Generate a symmetric difference of the old and new fd sets, adding
612 * and deleting as necessary.
613 */
614
615 iold = inew = 0;
616 while (iold < fds_old_nb || inew < fds_new_nb) {
617 if (iold < fds_old_nb
618 && (inew == fds_new_nb
619 || memory_region_ioeventfd_before(fds_old[iold],
620 fds_new[inew]))) {
80a1ea37
AK
621 fd = &fds_old[iold];
622 section = (MemoryRegionSection) {
f6790af6 623 .address_space = as,
80a1ea37 624 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 625 .size = fd->addr.size,
80a1ea37
AK
626 };
627 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 628 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
629 ++iold;
630 } else if (inew < fds_new_nb
631 && (iold == fds_old_nb
632 || memory_region_ioeventfd_before(fds_new[inew],
633 fds_old[iold]))) {
80a1ea37
AK
634 fd = &fds_new[inew];
635 section = (MemoryRegionSection) {
f6790af6 636 .address_space = as,
80a1ea37 637 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 638 .size = fd->addr.size,
80a1ea37
AK
639 };
640 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 641 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
642 ++inew;
643 } else {
644 ++iold;
645 ++inew;
646 }
647 }
648}
649
856d7245
PB
650static FlatView *address_space_get_flatview(AddressSpace *as)
651{
652 FlatView *view;
653
654 qemu_mutex_lock(&flat_view_mutex);
655 view = as->current_map;
656 flatview_ref(view);
657 qemu_mutex_unlock(&flat_view_mutex);
658 return view;
659}
660
3e9d69e7
AK
661static void address_space_update_ioeventfds(AddressSpace *as)
662{
99e86347 663 FlatView *view;
3e9d69e7
AK
664 FlatRange *fr;
665 unsigned ioeventfd_nb = 0;
666 MemoryRegionIoeventfd *ioeventfds = NULL;
667 AddrRange tmp;
668 unsigned i;
669
856d7245 670 view = address_space_get_flatview(as);
99e86347 671 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
672 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
673 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
674 int128_sub(fr->addr.start,
675 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
676 if (addrrange_intersects(fr->addr, tmp)) {
677 ++ioeventfd_nb;
7267c094 678 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
679 ioeventfd_nb * sizeof(*ioeventfds));
680 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
681 ioeventfds[ioeventfd_nb-1].addr = tmp;
682 }
683 }
684 }
685
686 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
687 as->ioeventfds, as->ioeventfd_nb);
688
7267c094 689 g_free(as->ioeventfds);
3e9d69e7
AK
690 as->ioeventfds = ioeventfds;
691 as->ioeventfd_nb = ioeventfd_nb;
856d7245 692 flatview_unref(view);
3e9d69e7
AK
693}
694
b8af1afb 695static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
696 const FlatView *old_view,
697 const FlatView *new_view,
b8af1afb 698 bool adding)
093bc2cd 699{
093bc2cd
AK
700 unsigned iold, inew;
701 FlatRange *frold, *frnew;
093bc2cd
AK
702
703 /* Generate a symmetric difference of the old and new memory maps.
704 * Kill ranges in the old map, and instantiate ranges in the new map.
705 */
706 iold = inew = 0;
a9a0c06d
PB
707 while (iold < old_view->nr || inew < new_view->nr) {
708 if (iold < old_view->nr) {
709 frold = &old_view->ranges[iold];
093bc2cd
AK
710 } else {
711 frold = NULL;
712 }
a9a0c06d
PB
713 if (inew < new_view->nr) {
714 frnew = &new_view->ranges[inew];
093bc2cd
AK
715 } else {
716 frnew = NULL;
717 }
718
719 if (frold
720 && (!frnew
08dafab4
AK
721 || int128_lt(frold->addr.start, frnew->addr.start)
722 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 723 && !flatrange_equal(frold, frnew)))) {
41a6e477 724 /* In old but not in new, or in both but attributes changed. */
093bc2cd 725
b8af1afb 726 if (!adding) {
72e22d2f 727 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
728 }
729
093bc2cd
AK
730 ++iold;
731 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 732 /* In both and unchanged (except logging may have changed) */
093bc2cd 733
b8af1afb 734 if (adding) {
50c1e149 735 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 736 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 737 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 738 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 739 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 740 }
5a583347
AK
741 }
742
093bc2cd
AK
743 ++iold;
744 ++inew;
093bc2cd
AK
745 } else {
746 /* In new */
747
b8af1afb 748 if (adding) {
72e22d2f 749 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
750 }
751
093bc2cd
AK
752 ++inew;
753 }
754 }
b8af1afb
AK
755}
756
757
758static void address_space_update_topology(AddressSpace *as)
759{
856d7245 760 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 761 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
762
763 address_space_update_topology_pass(as, old_view, new_view, false);
764 address_space_update_topology_pass(as, old_view, new_view, true);
765
856d7245
PB
766 qemu_mutex_lock(&flat_view_mutex);
767 flatview_unref(as->current_map);
a9a0c06d 768 as->current_map = new_view;
856d7245
PB
769 qemu_mutex_unlock(&flat_view_mutex);
770
771 /* Note that all the old MemoryRegions are still alive up to this
772 * point. This relieves most MemoryListeners from the need to
773 * ref/unref the MemoryRegions they get---unless they use them
774 * outside the iothread mutex, in which case precise reference
775 * counting is necessary.
776 */
777 flatview_unref(old_view);
778
3e9d69e7 779 address_space_update_ioeventfds(as);
093bc2cd
AK
780}
781
4ef4db86
AK
782void memory_region_transaction_begin(void)
783{
bb880ded 784 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
785 ++memory_region_transaction_depth;
786}
787
788void memory_region_transaction_commit(void)
789{
0d673e36
AK
790 AddressSpace *as;
791
4ef4db86
AK
792 assert(memory_region_transaction_depth);
793 --memory_region_transaction_depth;
22bde714
JK
794 if (!memory_region_transaction_depth && memory_region_update_pending) {
795 memory_region_update_pending = false;
02e2b95f
JK
796 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
797
0d673e36
AK
798 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
799 address_space_update_topology(as);
02e2b95f
JK
800 }
801
802 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 803 }
4ef4db86
AK
804}
805
545e92e0
AK
806static void memory_region_destructor_none(MemoryRegion *mr)
807{
808}
809
810static void memory_region_destructor_ram(MemoryRegion *mr)
811{
812 qemu_ram_free(mr->ram_addr);
813}
814
dfde4e6e
PB
815static void memory_region_destructor_alias(MemoryRegion *mr)
816{
817 memory_region_unref(mr->alias);
818}
819
545e92e0
AK
820static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
821{
822 qemu_ram_free_from_ptr(mr->ram_addr);
823}
824
d0a9b5bc
AK
825static void memory_region_destructor_rom_device(MemoryRegion *mr)
826{
827 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
828}
829
093bc2cd 830void memory_region_init(MemoryRegion *mr,
2c9b15ca 831 Object *owner,
093bc2cd
AK
832 const char *name,
833 uint64_t size)
834{
2cdfcf27
PB
835 mr->ops = &unassigned_mem_ops;
836 mr->opaque = NULL;
2c9b15ca 837 mr->owner = owner;
30951157 838 mr->iommu_ops = NULL;
093bc2cd 839 mr->parent = NULL;
08dafab4
AK
840 mr->size = int128_make64(size);
841 if (size == UINT64_MAX) {
842 mr->size = int128_2_64();
843 }
093bc2cd 844 mr->addr = 0;
b3b00c78 845 mr->subpage = false;
6bba19ba 846 mr->enabled = true;
14a3c10a 847 mr->terminates = false;
8ea9252a 848 mr->ram = false;
5f9a5ea1 849 mr->romd_mode = true;
fb1cd6f9 850 mr->readonly = false;
75c578dc 851 mr->rom_device = false;
545e92e0 852 mr->destructor = memory_region_destructor_none;
093bc2cd
AK
853 mr->priority = 0;
854 mr->may_overlap = false;
855 mr->alias = NULL;
856 QTAILQ_INIT(&mr->subregions);
857 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
858 QTAILQ_INIT(&mr->coalesced);
7267c094 859 mr->name = g_strdup(name);
5a583347 860 mr->dirty_log_mask = 0;
3e9d69e7
AK
861 mr->ioeventfd_nb = 0;
862 mr->ioeventfds = NULL;
d410515e 863 mr->flush_coalesced_mmio = false;
093bc2cd
AK
864}
865
b018ddf6
PB
866static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
867 unsigned size)
868{
869#ifdef DEBUG_UNASSIGNED
870 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
871#endif
4917cf44
AF
872 if (current_cpu != NULL) {
873 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 874 }
68a7439a 875 return 0;
b018ddf6
PB
876}
877
878static void unassigned_mem_write(void *opaque, hwaddr addr,
879 uint64_t val, unsigned size)
880{
881#ifdef DEBUG_UNASSIGNED
882 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
883#endif
4917cf44
AF
884 if (current_cpu != NULL) {
885 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 886 }
b018ddf6
PB
887}
888
d197063f
PB
889static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
890 unsigned size, bool is_write)
891{
892 return false;
893}
894
895const MemoryRegionOps unassigned_mem_ops = {
896 .valid.accepts = unassigned_mem_accepts,
897 .endianness = DEVICE_NATIVE_ENDIAN,
898};
899
d2702032
PB
900bool memory_region_access_valid(MemoryRegion *mr,
901 hwaddr addr,
902 unsigned size,
903 bool is_write)
093bc2cd 904{
a014ed07
PB
905 int access_size_min, access_size_max;
906 int access_size, i;
897fa7cf 907
093bc2cd
AK
908 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
909 return false;
910 }
911
a014ed07 912 if (!mr->ops->valid.accepts) {
093bc2cd
AK
913 return true;
914 }
915
a014ed07
PB
916 access_size_min = mr->ops->valid.min_access_size;
917 if (!mr->ops->valid.min_access_size) {
918 access_size_min = 1;
919 }
920
921 access_size_max = mr->ops->valid.max_access_size;
922 if (!mr->ops->valid.max_access_size) {
923 access_size_max = 4;
924 }
925
926 access_size = MAX(MIN(size, access_size_max), access_size_min);
927 for (i = 0; i < size; i += access_size) {
928 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
929 is_write)) {
930 return false;
931 }
093bc2cd 932 }
a014ed07 933
093bc2cd
AK
934 return true;
935}
936
a621f38d 937static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 938 hwaddr addr,
a621f38d 939 unsigned size)
093bc2cd 940{
164a4dcd 941 uint64_t data = 0;
093bc2cd 942
ce5d2f33
PB
943 if (mr->ops->read) {
944 access_with_adjusted_size(addr, &data, size,
945 mr->ops->impl.min_access_size,
946 mr->ops->impl.max_access_size,
947 memory_region_read_accessor, mr);
948 } else {
949 access_with_adjusted_size(addr, &data, size, 1, 4,
950 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
951 }
952
093bc2cd
AK
953 return data;
954}
955
791af8c8
PB
956static bool memory_region_dispatch_read(MemoryRegion *mr,
957 hwaddr addr,
958 uint64_t *pval,
959 unsigned size)
a621f38d 960{
791af8c8
PB
961 if (!memory_region_access_valid(mr, addr, size, false)) {
962 *pval = unassigned_mem_read(mr, addr, size);
963 return true;
964 }
a621f38d 965
791af8c8
PB
966 *pval = memory_region_dispatch_read1(mr, addr, size);
967 adjust_endianness(mr, pval, size);
968 return false;
a621f38d 969}
093bc2cd 970
791af8c8 971static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 972 hwaddr addr,
a621f38d
AK
973 uint64_t data,
974 unsigned size)
975{
897fa7cf 976 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 977 unassigned_mem_write(mr, addr, data, size);
791af8c8 978 return true;
093bc2cd
AK
979 }
980
a621f38d
AK
981 adjust_endianness(mr, &data, size);
982
ce5d2f33
PB
983 if (mr->ops->write) {
984 access_with_adjusted_size(addr, &data, size,
985 mr->ops->impl.min_access_size,
986 mr->ops->impl.max_access_size,
987 memory_region_write_accessor, mr);
988 } else {
989 access_with_adjusted_size(addr, &data, size, 1, 4,
990 memory_region_oldmmio_write_accessor, mr);
74901c3b 991 }
791af8c8 992 return false;
093bc2cd
AK
993}
994
093bc2cd 995void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 996 Object *owner,
093bc2cd
AK
997 const MemoryRegionOps *ops,
998 void *opaque,
999 const char *name,
1000 uint64_t size)
1001{
2c9b15ca 1002 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1003 mr->ops = ops;
1004 mr->opaque = opaque;
14a3c10a 1005 mr->terminates = true;
97161e17 1006 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1007}
1008
1009void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1010 Object *owner,
093bc2cd
AK
1011 const char *name,
1012 uint64_t size)
1013{
2c9b15ca 1014 memory_region_init(mr, owner, name, size);
8ea9252a 1015 mr->ram = true;
14a3c10a 1016 mr->terminates = true;
545e92e0 1017 mr->destructor = memory_region_destructor_ram;
c5705a77 1018 mr->ram_addr = qemu_ram_alloc(size, mr);
093bc2cd
AK
1019}
1020
1021void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1022 Object *owner,
093bc2cd
AK
1023 const char *name,
1024 uint64_t size,
1025 void *ptr)
1026{
2c9b15ca 1027 memory_region_init(mr, owner, name, size);
8ea9252a 1028 mr->ram = true;
14a3c10a 1029 mr->terminates = true;
545e92e0 1030 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1031 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
1032}
1033
1034void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1035 Object *owner,
093bc2cd
AK
1036 const char *name,
1037 MemoryRegion *orig,
a8170e5e 1038 hwaddr offset,
093bc2cd
AK
1039 uint64_t size)
1040{
2c9b15ca 1041 memory_region_init(mr, owner, name, size);
dfde4e6e
PB
1042 memory_region_ref(orig);
1043 mr->destructor = memory_region_destructor_alias;
093bc2cd
AK
1044 mr->alias = orig;
1045 mr->alias_offset = offset;
1046}
1047
d0a9b5bc 1048void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1049 Object *owner,
d0a9b5bc 1050 const MemoryRegionOps *ops,
75f5941c 1051 void *opaque,
d0a9b5bc
AK
1052 const char *name,
1053 uint64_t size)
1054{
2c9b15ca 1055 memory_region_init(mr, owner, name, size);
7bc2b9cd 1056 mr->ops = ops;
75f5941c 1057 mr->opaque = opaque;
d0a9b5bc 1058 mr->terminates = true;
75c578dc 1059 mr->rom_device = true;
d0a9b5bc 1060 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1061 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
1062}
1063
30951157 1064void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1065 Object *owner,
30951157
AK
1066 const MemoryRegionIOMMUOps *ops,
1067 const char *name,
1068 uint64_t size)
1069{
2c9b15ca 1070 memory_region_init(mr, owner, name, size);
30951157
AK
1071 mr->iommu_ops = ops,
1072 mr->terminates = true; /* then re-forwards */
06866575 1073 notifier_list_init(&mr->iommu_notify);
30951157
AK
1074}
1075
1660e72d 1076void memory_region_init_reservation(MemoryRegion *mr,
2c9b15ca 1077 Object *owner,
1660e72d
JK
1078 const char *name,
1079 uint64_t size)
1080{
2c9b15ca 1081 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1082}
1083
093bc2cd
AK
1084void memory_region_destroy(MemoryRegion *mr)
1085{
1086 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1087 assert(memory_region_transaction_depth == 0);
545e92e0 1088 mr->destructor(mr);
093bc2cd 1089 memory_region_clear_coalescing(mr);
7267c094
AL
1090 g_free((char *)mr->name);
1091 g_free(mr->ioeventfds);
093bc2cd
AK
1092}
1093
803c0816
PB
1094Object *memory_region_owner(MemoryRegion *mr)
1095{
1096 return mr->owner;
1097}
1098
46637be2
PB
1099void memory_region_ref(MemoryRegion *mr)
1100{
1101 if (mr && mr->owner) {
1102 object_ref(mr->owner);
1103 }
1104}
1105
1106void memory_region_unref(MemoryRegion *mr)
1107{
1108 if (mr && mr->owner) {
1109 object_unref(mr->owner);
1110 }
1111}
1112
093bc2cd
AK
1113uint64_t memory_region_size(MemoryRegion *mr)
1114{
08dafab4
AK
1115 if (int128_eq(mr->size, int128_2_64())) {
1116 return UINT64_MAX;
1117 }
1118 return int128_get64(mr->size);
093bc2cd
AK
1119}
1120
8991c79b
AK
1121const char *memory_region_name(MemoryRegion *mr)
1122{
1123 return mr->name;
1124}
1125
8ea9252a
AK
1126bool memory_region_is_ram(MemoryRegion *mr)
1127{
1128 return mr->ram;
1129}
1130
55043ba3
AK
1131bool memory_region_is_logging(MemoryRegion *mr)
1132{
1133 return mr->dirty_log_mask;
1134}
1135
ce7923da
AK
1136bool memory_region_is_rom(MemoryRegion *mr)
1137{
1138 return mr->ram && mr->readonly;
1139}
1140
30951157
AK
1141bool memory_region_is_iommu(MemoryRegion *mr)
1142{
1143 return mr->iommu_ops;
1144}
1145
06866575
DG
1146void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1147{
1148 notifier_list_add(&mr->iommu_notify, n);
1149}
1150
1151void memory_region_unregister_iommu_notifier(Notifier *n)
1152{
1153 notifier_remove(n);
1154}
1155
1156void memory_region_notify_iommu(MemoryRegion *mr,
1157 IOMMUTLBEntry entry)
1158{
1159 assert(memory_region_is_iommu(mr));
1160 notifier_list_notify(&mr->iommu_notify, &entry);
1161}
1162
093bc2cd
AK
1163void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1164{
5a583347
AK
1165 uint8_t mask = 1 << client;
1166
59023ef4 1167 memory_region_transaction_begin();
5a583347 1168 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1169 memory_region_update_pending |= mr->enabled;
59023ef4 1170 memory_region_transaction_commit();
093bc2cd
AK
1171}
1172
a8170e5e
AK
1173bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1174 hwaddr size, unsigned client)
093bc2cd 1175{
14a3c10a 1176 assert(mr->terminates);
cd7a45c9
BS
1177 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1178 1 << client);
093bc2cd
AK
1179}
1180
a8170e5e
AK
1181void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1182 hwaddr size)
093bc2cd 1183{
14a3c10a 1184 assert(mr->terminates);
fd4aa979 1185 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
093bc2cd
AK
1186}
1187
6c279db8
JQ
1188bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1189 hwaddr size, unsigned client)
1190{
1191 bool ret;
1192 assert(mr->terminates);
1193 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1194 1 << client);
1195 if (ret) {
1196 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1197 mr->ram_addr + addr + size,
1198 1 << client);
1199 }
1200 return ret;
1201}
1202
1203
093bc2cd
AK
1204void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1205{
0d673e36 1206 AddressSpace *as;
5a583347
AK
1207 FlatRange *fr;
1208
0d673e36 1209 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1210 FlatView *view = address_space_get_flatview(as);
99e86347 1211 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1212 if (fr->mr == mr) {
1213 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1214 }
5a583347 1215 }
856d7245 1216 flatview_unref(view);
5a583347 1217 }
093bc2cd
AK
1218}
1219
1220void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1221{
fb1cd6f9 1222 if (mr->readonly != readonly) {
59023ef4 1223 memory_region_transaction_begin();
fb1cd6f9 1224 mr->readonly = readonly;
22bde714 1225 memory_region_update_pending |= mr->enabled;
59023ef4 1226 memory_region_transaction_commit();
fb1cd6f9 1227 }
093bc2cd
AK
1228}
1229
5f9a5ea1 1230void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1231{
5f9a5ea1 1232 if (mr->romd_mode != romd_mode) {
59023ef4 1233 memory_region_transaction_begin();
5f9a5ea1 1234 mr->romd_mode = romd_mode;
22bde714 1235 memory_region_update_pending |= mr->enabled;
59023ef4 1236 memory_region_transaction_commit();
d0a9b5bc
AK
1237 }
1238}
1239
a8170e5e
AK
1240void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1241 hwaddr size, unsigned client)
093bc2cd 1242{
14a3c10a 1243 assert(mr->terminates);
5a583347
AK
1244 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1245 mr->ram_addr + addr + size,
1246 1 << client);
093bc2cd
AK
1247}
1248
1249void *memory_region_get_ram_ptr(MemoryRegion *mr)
1250{
1251 if (mr->alias) {
1252 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1253 }
1254
14a3c10a 1255 assert(mr->terminates);
093bc2cd 1256
021d26d1 1257 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1258}
1259
0d673e36 1260static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1261{
99e86347 1262 FlatView *view;
093bc2cd
AK
1263 FlatRange *fr;
1264 CoalescedMemoryRange *cmr;
1265 AddrRange tmp;
95d2994a 1266 MemoryRegionSection section;
093bc2cd 1267
856d7245 1268 view = address_space_get_flatview(as);
99e86347 1269 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1270 if (fr->mr == mr) {
95d2994a 1271 section = (MemoryRegionSection) {
f6790af6 1272 .address_space = as,
95d2994a 1273 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1274 .size = fr->addr.size,
95d2994a
AK
1275 };
1276
1277 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1278 int128_get64(fr->addr.start),
1279 int128_get64(fr->addr.size));
093bc2cd
AK
1280 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1281 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1282 int128_sub(fr->addr.start,
1283 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1284 if (!addrrange_intersects(tmp, fr->addr)) {
1285 continue;
1286 }
1287 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1288 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1289 int128_get64(tmp.start),
1290 int128_get64(tmp.size));
093bc2cd
AK
1291 }
1292 }
1293 }
856d7245 1294 flatview_unref(view);
093bc2cd
AK
1295}
1296
0d673e36
AK
1297static void memory_region_update_coalesced_range(MemoryRegion *mr)
1298{
1299 AddressSpace *as;
1300
1301 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1302 memory_region_update_coalesced_range_as(mr, as);
1303 }
1304}
1305
093bc2cd
AK
1306void memory_region_set_coalescing(MemoryRegion *mr)
1307{
1308 memory_region_clear_coalescing(mr);
08dafab4 1309 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1310}
1311
1312void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1313 hwaddr offset,
093bc2cd
AK
1314 uint64_t size)
1315{
7267c094 1316 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1317
08dafab4 1318 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1319 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1320 memory_region_update_coalesced_range(mr);
d410515e 1321 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1322}
1323
1324void memory_region_clear_coalescing(MemoryRegion *mr)
1325{
1326 CoalescedMemoryRange *cmr;
1327
d410515e
JK
1328 qemu_flush_coalesced_mmio_buffer();
1329 mr->flush_coalesced_mmio = false;
1330
093bc2cd
AK
1331 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1332 cmr = QTAILQ_FIRST(&mr->coalesced);
1333 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1334 g_free(cmr);
093bc2cd
AK
1335 }
1336 memory_region_update_coalesced_range(mr);
1337}
1338
d410515e
JK
1339void memory_region_set_flush_coalesced(MemoryRegion *mr)
1340{
1341 mr->flush_coalesced_mmio = true;
1342}
1343
1344void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1345{
1346 qemu_flush_coalesced_mmio_buffer();
1347 if (QTAILQ_EMPTY(&mr->coalesced)) {
1348 mr->flush_coalesced_mmio = false;
1349 }
1350}
1351
3e9d69e7 1352void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1353 hwaddr addr,
3e9d69e7
AK
1354 unsigned size,
1355 bool match_data,
1356 uint64_t data,
753d5e14 1357 EventNotifier *e)
3e9d69e7
AK
1358{
1359 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1360 .addr.start = int128_make64(addr),
1361 .addr.size = int128_make64(size),
3e9d69e7
AK
1362 .match_data = match_data,
1363 .data = data,
753d5e14 1364 .e = e,
3e9d69e7
AK
1365 };
1366 unsigned i;
1367
28f362be 1368 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1369 memory_region_transaction_begin();
3e9d69e7
AK
1370 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1371 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1372 break;
1373 }
1374 }
1375 ++mr->ioeventfd_nb;
7267c094 1376 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1377 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1378 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1379 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1380 mr->ioeventfds[i] = mrfd;
22bde714 1381 memory_region_update_pending |= mr->enabled;
59023ef4 1382 memory_region_transaction_commit();
3e9d69e7
AK
1383}
1384
1385void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1386 hwaddr addr,
3e9d69e7
AK
1387 unsigned size,
1388 bool match_data,
1389 uint64_t data,
753d5e14 1390 EventNotifier *e)
3e9d69e7
AK
1391{
1392 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1393 .addr.start = int128_make64(addr),
1394 .addr.size = int128_make64(size),
3e9d69e7
AK
1395 .match_data = match_data,
1396 .data = data,
753d5e14 1397 .e = e,
3e9d69e7
AK
1398 };
1399 unsigned i;
1400
28f362be 1401 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1402 memory_region_transaction_begin();
3e9d69e7
AK
1403 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1404 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1405 break;
1406 }
1407 }
1408 assert(i != mr->ioeventfd_nb);
1409 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1410 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1411 --mr->ioeventfd_nb;
7267c094 1412 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1413 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
22bde714 1414 memory_region_update_pending |= mr->enabled;
59023ef4 1415 memory_region_transaction_commit();
3e9d69e7
AK
1416}
1417
093bc2cd 1418static void memory_region_add_subregion_common(MemoryRegion *mr,
a8170e5e 1419 hwaddr offset,
093bc2cd
AK
1420 MemoryRegion *subregion)
1421{
1422 MemoryRegion *other;
1423
59023ef4
JK
1424 memory_region_transaction_begin();
1425
093bc2cd 1426 assert(!subregion->parent);
dfde4e6e 1427 memory_region_ref(subregion);
093bc2cd
AK
1428 subregion->parent = mr;
1429 subregion->addr = offset;
1430 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1431 if (subregion->may_overlap || other->may_overlap) {
1432 continue;
1433 }
2c7cfd65 1434 if (int128_ge(int128_make64(offset),
08dafab4
AK
1435 int128_add(int128_make64(other->addr), other->size))
1436 || int128_le(int128_add(int128_make64(offset), subregion->size),
1437 int128_make64(other->addr))) {
093bc2cd
AK
1438 continue;
1439 }
a5e1cbc8 1440#if 0
860329b2
MW
1441 printf("warning: subregion collision %llx/%llx (%s) "
1442 "vs %llx/%llx (%s)\n",
093bc2cd 1443 (unsigned long long)offset,
08dafab4 1444 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1445 subregion->name,
1446 (unsigned long long)other->addr,
08dafab4 1447 (unsigned long long)int128_get64(other->size),
860329b2 1448 other->name);
a5e1cbc8 1449#endif
093bc2cd
AK
1450 }
1451 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1452 if (subregion->priority >= other->priority) {
1453 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1454 goto done;
1455 }
1456 }
1457 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1458done:
22bde714 1459 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1460 memory_region_transaction_commit();
093bc2cd
AK
1461}
1462
1463
1464void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1465 hwaddr offset,
093bc2cd
AK
1466 MemoryRegion *subregion)
1467{
1468 subregion->may_overlap = false;
1469 subregion->priority = 0;
1470 memory_region_add_subregion_common(mr, offset, subregion);
1471}
1472
1473void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1474 hwaddr offset,
093bc2cd 1475 MemoryRegion *subregion,
a1ff8ae0 1476 int priority)
093bc2cd
AK
1477{
1478 subregion->may_overlap = true;
1479 subregion->priority = priority;
1480 memory_region_add_subregion_common(mr, offset, subregion);
1481}
1482
1483void memory_region_del_subregion(MemoryRegion *mr,
1484 MemoryRegion *subregion)
1485{
59023ef4 1486 memory_region_transaction_begin();
093bc2cd
AK
1487 assert(subregion->parent == mr);
1488 subregion->parent = NULL;
1489 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1490 memory_region_unref(subregion);
22bde714 1491 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1492 memory_region_transaction_commit();
6bba19ba
AK
1493}
1494
1495void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1496{
1497 if (enabled == mr->enabled) {
1498 return;
1499 }
59023ef4 1500 memory_region_transaction_begin();
6bba19ba 1501 mr->enabled = enabled;
22bde714 1502 memory_region_update_pending = true;
59023ef4 1503 memory_region_transaction_commit();
093bc2cd 1504}
1c0ffa58 1505
a8170e5e 1506void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2282e1af
AK
1507{
1508 MemoryRegion *parent = mr->parent;
a1ff8ae0 1509 int priority = mr->priority;
2282e1af
AK
1510 bool may_overlap = mr->may_overlap;
1511
1512 if (addr == mr->addr || !parent) {
1513 mr->addr = addr;
1514 return;
1515 }
1516
1517 memory_region_transaction_begin();
dfde4e6e 1518 memory_region_ref(mr);
2282e1af
AK
1519 memory_region_del_subregion(parent, mr);
1520 if (may_overlap) {
1521 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1522 } else {
1523 memory_region_add_subregion(parent, addr, mr);
1524 }
dfde4e6e 1525 memory_region_unref(mr);
2282e1af
AK
1526 memory_region_transaction_commit();
1527}
1528
a8170e5e 1529void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1530{
4703359e 1531 assert(mr->alias);
4703359e 1532
59023ef4 1533 if (offset == mr->alias_offset) {
4703359e
AK
1534 return;
1535 }
1536
59023ef4
JK
1537 memory_region_transaction_begin();
1538 mr->alias_offset = offset;
22bde714 1539 memory_region_update_pending |= mr->enabled;
59023ef4 1540 memory_region_transaction_commit();
4703359e
AK
1541}
1542
e34911c4
AK
1543ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1544{
e34911c4
AK
1545 return mr->ram_addr;
1546}
1547
e2177955
AK
1548static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1549{
1550 const AddrRange *addr = addr_;
1551 const FlatRange *fr = fr_;
1552
1553 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1554 return -1;
1555 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1556 return 1;
1557 }
1558 return 0;
1559}
1560
99e86347 1561static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 1562{
99e86347 1563 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
1564 sizeof(FlatRange), cmp_flatrange_addr);
1565}
1566
3ce10901
PB
1567bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1568{
1569 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1570 if (!mr) {
1571 return false;
1572 }
dfde4e6e 1573 memory_region_unref(mr);
3ce10901
PB
1574 return true;
1575}
1576
73034e9e 1577MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1578 hwaddr addr, uint64_t size)
e2177955 1579{
052e87b0 1580 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1581 MemoryRegion *root;
1582 AddressSpace *as;
1583 AddrRange range;
99e86347 1584 FlatView *view;
73034e9e
PB
1585 FlatRange *fr;
1586
1587 addr += mr->addr;
1588 for (root = mr; root->parent; ) {
1589 root = root->parent;
1590 addr += root->addr;
1591 }
e2177955 1592
73034e9e
PB
1593 as = memory_region_to_address_space(root);
1594 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 1595
856d7245 1596 view = address_space_get_flatview(as);
99e86347 1597 fr = flatview_lookup(view, range);
e2177955
AK
1598 if (!fr) {
1599 return ret;
1600 }
1601
99e86347 1602 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
1603 --fr;
1604 }
1605
1606 ret.mr = fr->mr;
73034e9e 1607 ret.address_space = as;
e2177955
AK
1608 range = addrrange_intersection(range, fr->addr);
1609 ret.offset_within_region = fr->offset_in_region;
1610 ret.offset_within_region += int128_get64(int128_sub(range.start,
1611 fr->addr.start));
052e87b0 1612 ret.size = range.size;
e2177955 1613 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1614 ret.readonly = fr->readonly;
dfde4e6e
PB
1615 memory_region_ref(ret.mr);
1616
856d7245 1617 flatview_unref(view);
e2177955
AK
1618 return ret;
1619}
1620
1d671369 1621void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1622{
99e86347 1623 FlatView *view;
7664e80c
AK
1624 FlatRange *fr;
1625
856d7245 1626 view = address_space_get_flatview(as);
99e86347 1627 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 1628 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 1629 }
856d7245 1630 flatview_unref(view);
7664e80c
AK
1631}
1632
1633void memory_global_dirty_log_start(void)
1634{
7664e80c 1635 global_dirty_log = true;
7376e582 1636 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1637}
1638
1639void memory_global_dirty_log_stop(void)
1640{
7664e80c 1641 global_dirty_log = false;
7376e582 1642 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1643}
1644
1645static void listener_add_address_space(MemoryListener *listener,
1646 AddressSpace *as)
1647{
99e86347 1648 FlatView *view;
7664e80c
AK
1649 FlatRange *fr;
1650
221b3a3f 1651 if (listener->address_space_filter
f6790af6 1652 && listener->address_space_filter != as) {
221b3a3f
JG
1653 return;
1654 }
1655
7664e80c 1656 if (global_dirty_log) {
975aefe0
AK
1657 if (listener->log_global_start) {
1658 listener->log_global_start(listener);
1659 }
7664e80c 1660 }
975aefe0 1661
856d7245 1662 view = address_space_get_flatview(as);
99e86347 1663 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
1664 MemoryRegionSection section = {
1665 .mr = fr->mr,
f6790af6 1666 .address_space = as,
7664e80c 1667 .offset_within_region = fr->offset_in_region,
052e87b0 1668 .size = fr->addr.size,
7664e80c 1669 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1670 .readonly = fr->readonly,
7664e80c 1671 };
975aefe0
AK
1672 if (listener->region_add) {
1673 listener->region_add(listener, &section);
1674 }
7664e80c 1675 }
856d7245 1676 flatview_unref(view);
7664e80c
AK
1677}
1678
f6790af6 1679void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1680{
72e22d2f 1681 MemoryListener *other = NULL;
0d673e36 1682 AddressSpace *as;
72e22d2f 1683
7376e582 1684 listener->address_space_filter = filter;
72e22d2f
AK
1685 if (QTAILQ_EMPTY(&memory_listeners)
1686 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1687 memory_listeners)->priority) {
1688 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1689 } else {
1690 QTAILQ_FOREACH(other, &memory_listeners, link) {
1691 if (listener->priority < other->priority) {
1692 break;
1693 }
1694 }
1695 QTAILQ_INSERT_BEFORE(other, listener, link);
1696 }
0d673e36
AK
1697
1698 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1699 listener_add_address_space(listener, as);
1700 }
7664e80c
AK
1701}
1702
1703void memory_listener_unregister(MemoryListener *listener)
1704{
72e22d2f 1705 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1706}
e2177955 1707
7dca8043 1708void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1709{
856d7245
PB
1710 if (QTAILQ_EMPTY(&address_spaces)) {
1711 memory_init();
1712 }
1713
59023ef4 1714 memory_region_transaction_begin();
8786db7c
AK
1715 as->root = root;
1716 as->current_map = g_new(FlatView, 1);
1717 flatview_init(as->current_map);
4c19eb72
AK
1718 as->ioeventfd_nb = 0;
1719 as->ioeventfds = NULL;
0d673e36 1720 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1721 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1722 address_space_init_dispatch(as);
f43793c7
PB
1723 memory_region_update_pending |= root->enabled;
1724 memory_region_transaction_commit();
1c0ffa58 1725}
658b2224 1726
83f3c251
AK
1727void address_space_destroy(AddressSpace *as)
1728{
1729 /* Flush out anything from MemoryListeners listening in on this */
1730 memory_region_transaction_begin();
1731 as->root = NULL;
1732 memory_region_transaction_commit();
1733 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1734 address_space_destroy_dispatch(as);
856d7245 1735 flatview_unref(as->current_map);
7dca8043 1736 g_free(as->name);
4c19eb72 1737 g_free(as->ioeventfds);
83f3c251
AK
1738}
1739
791af8c8 1740bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1741{
791af8c8 1742 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1743}
1744
791af8c8 1745bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1746 uint64_t val, unsigned size)
1747{
791af8c8 1748 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1749}
1750
314e2987
BS
1751typedef struct MemoryRegionList MemoryRegionList;
1752
1753struct MemoryRegionList {
1754 const MemoryRegion *mr;
1755 bool printed;
1756 QTAILQ_ENTRY(MemoryRegionList) queue;
1757};
1758
1759typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1760
1761static void mtree_print_mr(fprintf_function mon_printf, void *f,
1762 const MemoryRegion *mr, unsigned int level,
a8170e5e 1763 hwaddr base,
9479c57a 1764 MemoryRegionListHead *alias_print_queue)
314e2987 1765{
9479c57a
JK
1766 MemoryRegionList *new_ml, *ml, *next_ml;
1767 MemoryRegionListHead submr_print_queue;
314e2987
BS
1768 const MemoryRegion *submr;
1769 unsigned int i;
1770
7ea692b2 1771 if (!mr || !mr->enabled) {
314e2987
BS
1772 return;
1773 }
1774
1775 for (i = 0; i < level; i++) {
1776 mon_printf(f, " ");
1777 }
1778
1779 if (mr->alias) {
1780 MemoryRegionList *ml;
1781 bool found = false;
1782
1783 /* check if the alias is already in the queue */
9479c57a 1784 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1785 if (ml->mr == mr->alias && !ml->printed) {
1786 found = true;
1787 }
1788 }
1789
1790 if (!found) {
1791 ml = g_new(MemoryRegionList, 1);
1792 ml->mr = mr->alias;
1793 ml->printed = false;
9479c57a 1794 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1795 }
4896d74b
JK
1796 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1797 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1798 "-" TARGET_FMT_plx "\n",
314e2987 1799 base + mr->addr,
08dafab4 1800 base + mr->addr
fd1d9926
AW
1801 + (int128_nz(mr->size) ?
1802 (hwaddr)int128_get64(int128_sub(mr->size,
1803 int128_one())) : 0),
4b474ba7 1804 mr->priority,
5f9a5ea1
JK
1805 mr->romd_mode ? 'R' : '-',
1806 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1807 : '-',
314e2987
BS
1808 mr->name,
1809 mr->alias->name,
1810 mr->alias_offset,
08dafab4 1811 mr->alias_offset
a66670c7
AK
1812 + (int128_nz(mr->size) ?
1813 (hwaddr)int128_get64(int128_sub(mr->size,
1814 int128_one())) : 0));
314e2987 1815 } else {
4896d74b
JK
1816 mon_printf(f,
1817 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1818 base + mr->addr,
08dafab4 1819 base + mr->addr
fd1d9926
AW
1820 + (int128_nz(mr->size) ?
1821 (hwaddr)int128_get64(int128_sub(mr->size,
1822 int128_one())) : 0),
4b474ba7 1823 mr->priority,
5f9a5ea1
JK
1824 mr->romd_mode ? 'R' : '-',
1825 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1826 : '-',
314e2987
BS
1827 mr->name);
1828 }
9479c57a
JK
1829
1830 QTAILQ_INIT(&submr_print_queue);
1831
314e2987 1832 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1833 new_ml = g_new(MemoryRegionList, 1);
1834 new_ml->mr = submr;
1835 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1836 if (new_ml->mr->addr < ml->mr->addr ||
1837 (new_ml->mr->addr == ml->mr->addr &&
1838 new_ml->mr->priority > ml->mr->priority)) {
1839 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1840 new_ml = NULL;
1841 break;
1842 }
1843 }
1844 if (new_ml) {
1845 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1846 }
1847 }
1848
1849 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1850 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1851 alias_print_queue);
1852 }
1853
88365e47 1854 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1855 g_free(ml);
314e2987
BS
1856 }
1857}
1858
1859void mtree_info(fprintf_function mon_printf, void *f)
1860{
1861 MemoryRegionListHead ml_head;
1862 MemoryRegionList *ml, *ml2;
0d673e36 1863 AddressSpace *as;
314e2987
BS
1864
1865 QTAILQ_INIT(&ml_head);
1866
0d673e36 1867 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
0d673e36
AK
1868 mon_printf(f, "%s\n", as->name);
1869 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
1870 }
1871
1872 mon_printf(f, "aliases\n");
314e2987
BS
1873 /* print aliased regions */
1874 QTAILQ_FOREACH(ml, &ml_head, queue) {
1875 if (!ml->printed) {
1876 mon_printf(f, "%s\n", ml->mr->name);
1877 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1878 }
1879 }
1880
1881 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1882 g_free(ml);
314e2987 1883 }
314e2987 1884}