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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
1de7afc9 19#include "qemu/bitops.h"
9c17d615 20#include "sysemu/kvm.h"
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21#include <assert.h>
22
022c62cb 23#include "exec/memory-internal.h"
67d95c15 24
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25static unsigned memory_region_transaction_depth;
26static bool memory_region_update_pending;
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27static bool global_dirty_log = false;
28
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29static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
30 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 31
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32static QTAILQ_HEAD(, AddressSpace) address_spaces
33 = QTAILQ_HEAD_INITIALIZER(address_spaces);
34
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35typedef struct AddrRange AddrRange;
36
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37/*
38 * Note using signed integers limits us to physical addresses at most
39 * 63 bits wide. They are needed for negative offsetting in aliases
40 * (large MemoryRegion::alias_offset).
41 */
093bc2cd 42struct AddrRange {
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43 Int128 start;
44 Int128 size;
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45};
46
08dafab4 47static AddrRange addrrange_make(Int128 start, Int128 size)
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48{
49 return (AddrRange) { start, size };
50}
51
52static bool addrrange_equal(AddrRange r1, AddrRange r2)
53{
08dafab4 54 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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55}
56
08dafab4 57static Int128 addrrange_end(AddrRange r)
093bc2cd 58{
08dafab4 59 return int128_add(r.start, r.size);
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60}
61
08dafab4 62static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 63{
08dafab4 64 int128_addto(&range.start, delta);
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65 return range;
66}
67
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68static bool addrrange_contains(AddrRange range, Int128 addr)
69{
70 return int128_ge(addr, range.start)
71 && int128_lt(addr, addrrange_end(range));
72}
73
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74static bool addrrange_intersects(AddrRange r1, AddrRange r2)
75{
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76 return addrrange_contains(r1, r2.start)
77 || addrrange_contains(r2, r1.start);
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78}
79
80static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
81{
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82 Int128 start = int128_max(r1.start, r2.start);
83 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
84 return addrrange_make(start, int128_sub(end, start));
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85}
86
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87enum ListenerDirection { Forward, Reverse };
88
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89static bool memory_listener_match(MemoryListener *listener,
90 MemoryRegionSection *section)
91{
92 return !listener->address_space_filter
93 || listener->address_space_filter == section->address_space;
94}
95
96#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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97 do { \
98 MemoryListener *_listener; \
99 \
100 switch (_direction) { \
101 case Forward: \
102 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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103 if (_listener->_callback) { \
104 _listener->_callback(_listener, ##_args); \
105 } \
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106 } \
107 break; \
108 case Reverse: \
109 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
110 memory_listeners, link) { \
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111 if (_listener->_callback) { \
112 _listener->_callback(_listener, ##_args); \
113 } \
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114 } \
115 break; \
116 default: \
117 abort(); \
118 } \
119 } while (0)
120
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121#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
122 do { \
123 MemoryListener *_listener; \
124 \
125 switch (_direction) { \
126 case Forward: \
127 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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128 if (_listener->_callback \
129 && memory_listener_match(_listener, _section)) { \
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130 _listener->_callback(_listener, _section, ##_args); \
131 } \
132 } \
133 break; \
134 case Reverse: \
135 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
136 memory_listeners, link) { \
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137 if (_listener->_callback \
138 && memory_listener_match(_listener, _section)) { \
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139 _listener->_callback(_listener, _section, ##_args); \
140 } \
141 } \
142 break; \
143 default: \
144 abort(); \
145 } \
146 } while (0)
147
0e0d36b4 148#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 149 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 150 .mr = (fr)->mr, \
f6790af6 151 .address_space = (as), \
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152 .offset_within_region = (fr)->offset_in_region, \
153 .size = int128_get64((fr)->addr.size), \
154 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 155 .readonly = (fr)->readonly, \
7376e582 156 }))
0e0d36b4 157
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158struct CoalescedMemoryRange {
159 AddrRange addr;
160 QTAILQ_ENTRY(CoalescedMemoryRange) link;
161};
162
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163struct MemoryRegionIoeventfd {
164 AddrRange addr;
165 bool match_data;
166 uint64_t data;
753d5e14 167 EventNotifier *e;
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168};
169
170static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
171 MemoryRegionIoeventfd b)
172{
08dafab4 173 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 174 return true;
08dafab4 175 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 176 return false;
08dafab4 177 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 178 return true;
08dafab4 179 } else if (int128_gt(a.addr.size, b.addr.size)) {
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180 return false;
181 } else if (a.match_data < b.match_data) {
182 return true;
183 } else if (a.match_data > b.match_data) {
184 return false;
185 } else if (a.match_data) {
186 if (a.data < b.data) {
187 return true;
188 } else if (a.data > b.data) {
189 return false;
190 }
191 }
753d5e14 192 if (a.e < b.e) {
3e9d69e7 193 return true;
753d5e14 194 } else if (a.e > b.e) {
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195 return false;
196 }
197 return false;
198}
199
200static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
201 MemoryRegionIoeventfd b)
202{
203 return !memory_region_ioeventfd_before(a, b)
204 && !memory_region_ioeventfd_before(b, a);
205}
206
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207typedef struct FlatRange FlatRange;
208typedef struct FlatView FlatView;
209
210/* Range of memory in the global map. Addresses are absolute. */
211struct FlatRange {
212 MemoryRegion *mr;
a8170e5e 213 hwaddr offset_in_region;
093bc2cd 214 AddrRange addr;
5a583347 215 uint8_t dirty_log_mask;
d0a9b5bc 216 bool readable;
fb1cd6f9 217 bool readonly;
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218};
219
220/* Flattened global view of current active memory hierarchy. Kept in sorted
221 * order.
222 */
223struct FlatView {
224 FlatRange *ranges;
225 unsigned nr;
226 unsigned nr_allocated;
227};
228
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229typedef struct AddressSpaceOps AddressSpaceOps;
230
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231#define FOR_EACH_FLAT_RANGE(var, view) \
232 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
233
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234static bool flatrange_equal(FlatRange *a, FlatRange *b)
235{
236 return a->mr == b->mr
237 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 238 && a->offset_in_region == b->offset_in_region
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239 && a->readable == b->readable
240 && a->readonly == b->readonly;
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241}
242
243static void flatview_init(FlatView *view)
244{
245 view->ranges = NULL;
246 view->nr = 0;
247 view->nr_allocated = 0;
248}
249
250/* Insert a range into a given position. Caller is responsible for maintaining
251 * sorting order.
252 */
253static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
254{
255 if (view->nr == view->nr_allocated) {
256 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 257 view->ranges = g_realloc(view->ranges,
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258 view->nr_allocated * sizeof(*view->ranges));
259 }
260 memmove(view->ranges + pos + 1, view->ranges + pos,
261 (view->nr - pos) * sizeof(FlatRange));
262 view->ranges[pos] = *range;
263 ++view->nr;
264}
265
266static void flatview_destroy(FlatView *view)
267{
7267c094 268 g_free(view->ranges);
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269}
270
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271static bool can_merge(FlatRange *r1, FlatRange *r2)
272{
08dafab4 273 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 274 && r1->mr == r2->mr
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275 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
276 r1->addr.size),
277 int128_make64(r2->offset_in_region))
d0a9b5bc 278 && r1->dirty_log_mask == r2->dirty_log_mask
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279 && r1->readable == r2->readable
280 && r1->readonly == r2->readonly;
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281}
282
283/* Attempt to simplify a view by merging ajacent ranges */
284static void flatview_simplify(FlatView *view)
285{
286 unsigned i, j;
287
288 i = 0;
289 while (i < view->nr) {
290 j = i + 1;
291 while (j < view->nr
292 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 293 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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294 ++j;
295 }
296 ++i;
297 memmove(&view->ranges[i], &view->ranges[j],
298 (view->nr - j) * sizeof(view->ranges[j]));
299 view->nr -= j - i;
300 }
301}
302
164a4dcd 303static void memory_region_read_accessor(void *opaque,
a8170e5e 304 hwaddr addr,
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305 uint64_t *value,
306 unsigned size,
307 unsigned shift,
308 uint64_t mask)
309{
310 MemoryRegion *mr = opaque;
311 uint64_t tmp;
312
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313 if (mr->flush_coalesced_mmio) {
314 qemu_flush_coalesced_mmio_buffer();
315 }
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316 tmp = mr->ops->read(mr->opaque, addr, size);
317 *value |= (tmp & mask) << shift;
318}
319
320static void memory_region_write_accessor(void *opaque,
a8170e5e 321 hwaddr addr,
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322 uint64_t *value,
323 unsigned size,
324 unsigned shift,
325 uint64_t mask)
326{
327 MemoryRegion *mr = opaque;
328 uint64_t tmp;
329
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330 if (mr->flush_coalesced_mmio) {
331 qemu_flush_coalesced_mmio_buffer();
332 }
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333 tmp = (*value >> shift) & mask;
334 mr->ops->write(mr->opaque, addr, tmp, size);
335}
336
a8170e5e 337static void access_with_adjusted_size(hwaddr addr,
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338 uint64_t *value,
339 unsigned size,
340 unsigned access_size_min,
341 unsigned access_size_max,
342 void (*access)(void *opaque,
a8170e5e 343 hwaddr addr,
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344 uint64_t *value,
345 unsigned size,
346 unsigned shift,
347 uint64_t mask),
348 void *opaque)
349{
350 uint64_t access_mask;
351 unsigned access_size;
352 unsigned i;
353
354 if (!access_size_min) {
355 access_size_min = 1;
356 }
357 if (!access_size_max) {
358 access_size_max = 4;
359 }
360 access_size = MAX(MIN(size, access_size_max), access_size_min);
361 access_mask = -1ULL >> (64 - access_size * 8);
362 for (i = 0; i < size; i += access_size) {
363 /* FIXME: big-endian support */
364 access(opaque, addr + i, value, access_size, i * 8, access_mask);
365 }
366}
367
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368static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
369 unsigned width, bool write)
370{
371 const MemoryRegionPortio *mrp;
372
373 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
374 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
375 && width == mrp->size
376 && (write ? (bool)mrp->write : (bool)mrp->read)) {
377 return mrp;
378 }
379 }
380 return NULL;
381}
382
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383static void memory_region_iorange_read(IORange *iorange,
384 uint64_t offset,
385 unsigned width,
386 uint64_t *data)
387{
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388 MemoryRegionIORange *mrio
389 = container_of(iorange, MemoryRegionIORange, iorange);
390 MemoryRegion *mr = mrio->mr;
658b2224 391
a2d33521 392 offset += mrio->offset;
627a0e90 393 if (mr->ops->old_portio) {
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394 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
395 width, false);
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396
397 *data = ((uint64_t)1 << (width * 8)) - 1;
398 if (mrp) {
2b50aa1f 399 *data = mrp->read(mr->opaque, offset);
03808f58 400 } else if (width == 2) {
a2d33521 401 mrp = find_portio(mr, offset - mrio->offset, 1, false);
03808f58 402 assert(mrp);
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403 *data = mrp->read(mr->opaque, offset) |
404 (mrp->read(mr->opaque, offset + 1) << 8);
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405 }
406 return;
407 }
3a130f4e 408 *data = 0;
2b50aa1f 409 access_with_adjusted_size(offset, data, width,
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410 mr->ops->impl.min_access_size,
411 mr->ops->impl.max_access_size,
412 memory_region_read_accessor, mr);
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413}
414
415static void memory_region_iorange_write(IORange *iorange,
416 uint64_t offset,
417 unsigned width,
418 uint64_t data)
419{
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420 MemoryRegionIORange *mrio
421 = container_of(iorange, MemoryRegionIORange, iorange);
422 MemoryRegion *mr = mrio->mr;
658b2224 423
a2d33521 424 offset += mrio->offset;
627a0e90 425 if (mr->ops->old_portio) {
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426 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
427 width, true);
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428
429 if (mrp) {
2b50aa1f 430 mrp->write(mr->opaque, offset, data);
03808f58 431 } else if (width == 2) {
7e2a62d8 432 mrp = find_portio(mr, offset - mrio->offset, 1, true);
03808f58 433 assert(mrp);
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434 mrp->write(mr->opaque, offset, data & 0xff);
435 mrp->write(mr->opaque, offset + 1, data >> 8);
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436 }
437 return;
438 }
2b50aa1f 439 access_with_adjusted_size(offset, &data, width,
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440 mr->ops->impl.min_access_size,
441 mr->ops->impl.max_access_size,
442 memory_region_write_accessor, mr);
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443}
444
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445static void memory_region_iorange_destructor(IORange *iorange)
446{
447 g_free(container_of(iorange, MemoryRegionIORange, iorange));
448}
449
93632747 450const IORangeOps memory_region_iorange_ops = {
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451 .read = memory_region_iorange_read,
452 .write = memory_region_iorange_write,
a2d33521 453 .destructor = memory_region_iorange_destructor,
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454};
455
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456static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
457{
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458 AddressSpace *as;
459
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460 while (mr->parent) {
461 mr = mr->parent;
462 }
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463 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
464 if (mr == as->root) {
465 return as;
466 }
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467 }
468 abort();
469}
470
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471/* Render a memory region into the global view. Ranges in @view obscure
472 * ranges in @mr.
473 */
474static void render_memory_region(FlatView *view,
475 MemoryRegion *mr,
08dafab4 476 Int128 base,
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477 AddrRange clip,
478 bool readonly)
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479{
480 MemoryRegion *subregion;
481 unsigned i;
a8170e5e 482 hwaddr offset_in_region;
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483 Int128 remain;
484 Int128 now;
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485 FlatRange fr;
486 AddrRange tmp;
487
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488 if (!mr->enabled) {
489 return;
490 }
491
08dafab4 492 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 493 readonly |= mr->readonly;
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494
495 tmp = addrrange_make(base, mr->size);
496
497 if (!addrrange_intersects(tmp, clip)) {
498 return;
499 }
500
501 clip = addrrange_intersection(tmp, clip);
502
503 if (mr->alias) {
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504 int128_subfrom(&base, int128_make64(mr->alias->addr));
505 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 506 render_memory_region(view, mr->alias, base, clip, readonly);
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507 return;
508 }
509
510 /* Render subregions in priority order. */
511 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 512 render_memory_region(view, subregion, base, clip, readonly);
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513 }
514
14a3c10a 515 if (!mr->terminates) {
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516 return;
517 }
518
08dafab4 519 offset_in_region = int128_get64(int128_sub(clip.start, base));
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520 base = clip.start;
521 remain = clip.size;
522
523 /* Render the region itself into any gaps left by the current view. */
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524 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
525 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
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526 continue;
527 }
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528 if (int128_lt(base, view->ranges[i].addr.start)) {
529 now = int128_min(remain,
530 int128_sub(view->ranges[i].addr.start, base));
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531 fr.mr = mr;
532 fr.offset_in_region = offset_in_region;
533 fr.addr = addrrange_make(base, now);
5a583347 534 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 535 fr.readable = mr->readable;
fb1cd6f9 536 fr.readonly = readonly;
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537 flatview_insert(view, i, &fr);
538 ++i;
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539 int128_addto(&base, now);
540 offset_in_region += int128_get64(now);
541 int128_subfrom(&remain, now);
093bc2cd 542 }
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543 now = int128_sub(int128_min(int128_add(base, remain),
544 addrrange_end(view->ranges[i].addr)),
545 base);
546 int128_addto(&base, now);
547 offset_in_region += int128_get64(now);
548 int128_subfrom(&remain, now);
093bc2cd 549 }
08dafab4 550 if (int128_nz(remain)) {
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551 fr.mr = mr;
552 fr.offset_in_region = offset_in_region;
553 fr.addr = addrrange_make(base, remain);
5a583347 554 fr.dirty_log_mask = mr->dirty_log_mask;
d0a9b5bc 555 fr.readable = mr->readable;
fb1cd6f9 556 fr.readonly = readonly;
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557 flatview_insert(view, i, &fr);
558 }
559}
560
561/* Render a memory topology into a list of disjoint absolute ranges. */
562static FlatView generate_memory_topology(MemoryRegion *mr)
563{
564 FlatView view;
565
566 flatview_init(&view);
567
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568 if (mr) {
569 render_memory_region(&view, mr, int128_zero(),
570 addrrange_make(int128_zero(), int128_2_64()), false);
571 }
3d8e6bf9 572 flatview_simplify(&view);
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573
574 return view;
575}
576
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577static void address_space_add_del_ioeventfds(AddressSpace *as,
578 MemoryRegionIoeventfd *fds_new,
579 unsigned fds_new_nb,
580 MemoryRegionIoeventfd *fds_old,
581 unsigned fds_old_nb)
582{
583 unsigned iold, inew;
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584 MemoryRegionIoeventfd *fd;
585 MemoryRegionSection section;
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586
587 /* Generate a symmetric difference of the old and new fd sets, adding
588 * and deleting as necessary.
589 */
590
591 iold = inew = 0;
592 while (iold < fds_old_nb || inew < fds_new_nb) {
593 if (iold < fds_old_nb
594 && (inew == fds_new_nb
595 || memory_region_ioeventfd_before(fds_old[iold],
596 fds_new[inew]))) {
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597 fd = &fds_old[iold];
598 section = (MemoryRegionSection) {
f6790af6 599 .address_space = as,
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600 .offset_within_address_space = int128_get64(fd->addr.start),
601 .size = int128_get64(fd->addr.size),
602 };
603 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 604 fd->match_data, fd->data, fd->e);
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605 ++iold;
606 } else if (inew < fds_new_nb
607 && (iold == fds_old_nb
608 || memory_region_ioeventfd_before(fds_new[inew],
609 fds_old[iold]))) {
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610 fd = &fds_new[inew];
611 section = (MemoryRegionSection) {
f6790af6 612 .address_space = as,
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613 .offset_within_address_space = int128_get64(fd->addr.start),
614 .size = int128_get64(fd->addr.size),
615 };
616 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 617 fd->match_data, fd->data, fd->e);
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618 ++inew;
619 } else {
620 ++iold;
621 ++inew;
622 }
623 }
624}
625
626static void address_space_update_ioeventfds(AddressSpace *as)
627{
628 FlatRange *fr;
629 unsigned ioeventfd_nb = 0;
630 MemoryRegionIoeventfd *ioeventfds = NULL;
631 AddrRange tmp;
632 unsigned i;
633
8786db7c 634 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
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635 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
636 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
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637 int128_sub(fr->addr.start,
638 int128_make64(fr->offset_in_region)));
3e9d69e7
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639 if (addrrange_intersects(fr->addr, tmp)) {
640 ++ioeventfd_nb;
7267c094 641 ioeventfds = g_realloc(ioeventfds,
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642 ioeventfd_nb * sizeof(*ioeventfds));
643 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
644 ioeventfds[ioeventfd_nb-1].addr = tmp;
645 }
646 }
647 }
648
649 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
650 as->ioeventfds, as->ioeventfd_nb);
651
7267c094 652 g_free(as->ioeventfds);
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653 as->ioeventfds = ioeventfds;
654 as->ioeventfd_nb = ioeventfd_nb;
655}
656
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657static void address_space_update_topology_pass(AddressSpace *as,
658 FlatView old_view,
659 FlatView new_view,
660 bool adding)
093bc2cd 661{
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662 unsigned iold, inew;
663 FlatRange *frold, *frnew;
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664
665 /* Generate a symmetric difference of the old and new memory maps.
666 * Kill ranges in the old map, and instantiate ranges in the new map.
667 */
668 iold = inew = 0;
669 while (iold < old_view.nr || inew < new_view.nr) {
670 if (iold < old_view.nr) {
671 frold = &old_view.ranges[iold];
672 } else {
673 frold = NULL;
674 }
675 if (inew < new_view.nr) {
676 frnew = &new_view.ranges[inew];
677 } else {
678 frnew = NULL;
679 }
680
681 if (frold
682 && (!frnew
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683 || int128_lt(frold->addr.start, frnew->addr.start)
684 || (int128_eq(frold->addr.start, frnew->addr.start)
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685 && !flatrange_equal(frold, frnew)))) {
686 /* In old, but (not in new, or in new but attributes changed). */
687
b8af1afb 688 if (!adding) {
72e22d2f 689 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
690 }
691
093bc2cd
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692 ++iold;
693 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
694 /* In both (logging may have changed) */
695
b8af1afb 696 if (adding) {
50c1e149 697 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 698 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 699 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 700 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 701 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 702 }
5a583347
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703 }
704
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705 ++iold;
706 ++inew;
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707 } else {
708 /* In new */
709
b8af1afb 710 if (adding) {
72e22d2f 711 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
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712 }
713
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714 ++inew;
715 }
716 }
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717}
718
719
720static void address_space_update_topology(AddressSpace *as)
721{
8786db7c 722 FlatView old_view = *as->current_map;
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723 FlatView new_view = generate_memory_topology(as->root);
724
725 address_space_update_topology_pass(as, old_view, new_view, false);
726 address_space_update_topology_pass(as, old_view, new_view, true);
727
8786db7c 728 *as->current_map = new_view;
093bc2cd 729 flatview_destroy(&old_view);
3e9d69e7 730 address_space_update_ioeventfds(as);
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AK
731}
732
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733void memory_region_transaction_begin(void)
734{
bb880ded 735 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
736 ++memory_region_transaction_depth;
737}
738
739void memory_region_transaction_commit(void)
740{
0d673e36
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741 AddressSpace *as;
742
4ef4db86
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743 assert(memory_region_transaction_depth);
744 --memory_region_transaction_depth;
22bde714
JK
745 if (!memory_region_transaction_depth && memory_region_update_pending) {
746 memory_region_update_pending = false;
02e2b95f
JK
747 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
748
0d673e36
AK
749 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
750 address_space_update_topology(as);
02e2b95f
JK
751 }
752
753 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 754 }
4ef4db86
AK
755}
756
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757static void memory_region_destructor_none(MemoryRegion *mr)
758{
759}
760
761static void memory_region_destructor_ram(MemoryRegion *mr)
762{
763 qemu_ram_free(mr->ram_addr);
764}
765
766static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
767{
768 qemu_ram_free_from_ptr(mr->ram_addr);
769}
770
771static void memory_region_destructor_iomem(MemoryRegion *mr)
772{
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773}
774
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775static void memory_region_destructor_rom_device(MemoryRegion *mr)
776{
777 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
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778}
779
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780static bool memory_region_wrong_endianness(MemoryRegion *mr)
781{
2c3579ab 782#ifdef TARGET_WORDS_BIGENDIAN
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783 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
784#else
785 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
786#endif
787}
788
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789void memory_region_init(MemoryRegion *mr,
790 const char *name,
791 uint64_t size)
792{
793 mr->ops = NULL;
794 mr->parent = NULL;
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795 mr->size = int128_make64(size);
796 if (size == UINT64_MAX) {
797 mr->size = int128_2_64();
798 }
093bc2cd 799 mr->addr = 0;
b3b00c78 800 mr->subpage = false;
6bba19ba 801 mr->enabled = true;
14a3c10a 802 mr->terminates = false;
8ea9252a 803 mr->ram = false;
d0a9b5bc 804 mr->readable = true;
fb1cd6f9 805 mr->readonly = false;
75c578dc 806 mr->rom_device = false;
545e92e0 807 mr->destructor = memory_region_destructor_none;
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808 mr->priority = 0;
809 mr->may_overlap = false;
810 mr->alias = NULL;
811 QTAILQ_INIT(&mr->subregions);
812 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
813 QTAILQ_INIT(&mr->coalesced);
7267c094 814 mr->name = g_strdup(name);
5a583347 815 mr->dirty_log_mask = 0;
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816 mr->ioeventfd_nb = 0;
817 mr->ioeventfds = NULL;
d410515e 818 mr->flush_coalesced_mmio = false;
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819}
820
821static bool memory_region_access_valid(MemoryRegion *mr,
a8170e5e 822 hwaddr addr,
897fa7cf
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823 unsigned size,
824 bool is_write)
093bc2cd 825{
897fa7cf
AK
826 if (mr->ops->valid.accepts
827 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
828 return false;
829 }
830
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AK
831 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
832 return false;
833 }
834
835 /* Treat zero as compatibility all valid */
836 if (!mr->ops->valid.max_access_size) {
837 return true;
838 }
839
840 if (size > mr->ops->valid.max_access_size
841 || size < mr->ops->valid.min_access_size) {
842 return false;
843 }
844 return true;
845}
846
a621f38d 847static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 848 hwaddr addr,
a621f38d 849 unsigned size)
093bc2cd 850{
164a4dcd 851 uint64_t data = 0;
093bc2cd 852
897fa7cf 853 if (!memory_region_access_valid(mr, addr, size, false)) {
093bc2cd
AK
854 return -1U; /* FIXME: better signalling */
855 }
856
74901c3b 857 if (!mr->ops->read) {
5bbf90be 858 return mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
74901c3b
AK
859 }
860
093bc2cd 861 /* FIXME: support unaligned access */
2b50aa1f 862 access_with_adjusted_size(addr, &data, size,
164a4dcd
AK
863 mr->ops->impl.min_access_size,
864 mr->ops->impl.max_access_size,
865 memory_region_read_accessor, mr);
093bc2cd
AK
866
867 return data;
868}
869
a621f38d 870static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
093bc2cd 871{
a621f38d
AK
872 if (memory_region_wrong_endianness(mr)) {
873 switch (size) {
874 case 1:
875 break;
876 case 2:
877 *data = bswap16(*data);
878 break;
879 case 4:
880 *data = bswap32(*data);
1470a0cd 881 break;
a621f38d
AK
882 default:
883 abort();
884 }
885 }
886}
887
888static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
a8170e5e 889 hwaddr addr,
a621f38d
AK
890 unsigned size)
891{
892 uint64_t ret;
893
894 ret = memory_region_dispatch_read1(mr, addr, size);
895 adjust_endianness(mr, &ret, size);
896 return ret;
897}
093bc2cd 898
a621f38d 899static void memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 900 hwaddr addr,
a621f38d
AK
901 uint64_t data,
902 unsigned size)
903{
897fa7cf 904 if (!memory_region_access_valid(mr, addr, size, true)) {
093bc2cd
AK
905 return; /* FIXME: better signalling */
906 }
907
a621f38d
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908 adjust_endianness(mr, &data, size);
909
74901c3b 910 if (!mr->ops->write) {
5bbf90be 911 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, data);
74901c3b
AK
912 return;
913 }
914
093bc2cd 915 /* FIXME: support unaligned access */
2b50aa1f 916 access_with_adjusted_size(addr, &data, size,
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AK
917 mr->ops->impl.min_access_size,
918 mr->ops->impl.max_access_size,
919 memory_region_write_accessor, mr);
093bc2cd
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920}
921
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922void memory_region_init_io(MemoryRegion *mr,
923 const MemoryRegionOps *ops,
924 void *opaque,
925 const char *name,
926 uint64_t size)
927{
928 memory_region_init(mr, name, size);
929 mr->ops = ops;
930 mr->opaque = opaque;
14a3c10a 931 mr->terminates = true;
26a83ad0 932 mr->destructor = memory_region_destructor_iomem;
97161e17 933 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
934}
935
936void memory_region_init_ram(MemoryRegion *mr,
093bc2cd
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937 const char *name,
938 uint64_t size)
939{
940 memory_region_init(mr, name, size);
8ea9252a 941 mr->ram = true;
14a3c10a 942 mr->terminates = true;
545e92e0 943 mr->destructor = memory_region_destructor_ram;
c5705a77 944 mr->ram_addr = qemu_ram_alloc(size, mr);
093bc2cd
AK
945}
946
947void memory_region_init_ram_ptr(MemoryRegion *mr,
093bc2cd
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948 const char *name,
949 uint64_t size,
950 void *ptr)
951{
952 memory_region_init(mr, name, size);
8ea9252a 953 mr->ram = true;
14a3c10a 954 mr->terminates = true;
545e92e0 955 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 956 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
957}
958
959void memory_region_init_alias(MemoryRegion *mr,
960 const char *name,
961 MemoryRegion *orig,
a8170e5e 962 hwaddr offset,
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963 uint64_t size)
964{
965 memory_region_init(mr, name, size);
966 mr->alias = orig;
967 mr->alias_offset = offset;
968}
969
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970void memory_region_init_rom_device(MemoryRegion *mr,
971 const MemoryRegionOps *ops,
75f5941c 972 void *opaque,
d0a9b5bc
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973 const char *name,
974 uint64_t size)
975{
976 memory_region_init(mr, name, size);
7bc2b9cd 977 mr->ops = ops;
75f5941c 978 mr->opaque = opaque;
d0a9b5bc 979 mr->terminates = true;
75c578dc 980 mr->rom_device = true;
d0a9b5bc 981 mr->destructor = memory_region_destructor_rom_device;
c5705a77 982 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
983}
984
a8170e5e 985static uint64_t invalid_read(void *opaque, hwaddr addr,
1660e72d
JK
986 unsigned size)
987{
988 MemoryRegion *mr = opaque;
989
990 if (!mr->warning_printed) {
991 fprintf(stderr, "Invalid read from memory region %s\n", mr->name);
992 mr->warning_printed = true;
993 }
994 return -1U;
995}
996
a8170e5e 997static void invalid_write(void *opaque, hwaddr addr, uint64_t data,
1660e72d
JK
998 unsigned size)
999{
1000 MemoryRegion *mr = opaque;
1001
1002 if (!mr->warning_printed) {
1003 fprintf(stderr, "Invalid write to memory region %s\n", mr->name);
1004 mr->warning_printed = true;
1005 }
1006}
1007
1008static const MemoryRegionOps reservation_ops = {
1009 .read = invalid_read,
1010 .write = invalid_write,
1011 .endianness = DEVICE_NATIVE_ENDIAN,
1012};
1013
1014void memory_region_init_reservation(MemoryRegion *mr,
1015 const char *name,
1016 uint64_t size)
1017{
1018 memory_region_init_io(mr, &reservation_ops, mr, name, size);
1019}
1020
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1021void memory_region_destroy(MemoryRegion *mr)
1022{
1023 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1024 assert(memory_region_transaction_depth == 0);
545e92e0 1025 mr->destructor(mr);
093bc2cd 1026 memory_region_clear_coalescing(mr);
7267c094
AL
1027 g_free((char *)mr->name);
1028 g_free(mr->ioeventfds);
093bc2cd
AK
1029}
1030
1031uint64_t memory_region_size(MemoryRegion *mr)
1032{
08dafab4
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1033 if (int128_eq(mr->size, int128_2_64())) {
1034 return UINT64_MAX;
1035 }
1036 return int128_get64(mr->size);
093bc2cd
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1037}
1038
8991c79b
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1039const char *memory_region_name(MemoryRegion *mr)
1040{
1041 return mr->name;
1042}
1043
8ea9252a
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1044bool memory_region_is_ram(MemoryRegion *mr)
1045{
1046 return mr->ram;
1047}
1048
55043ba3
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1049bool memory_region_is_logging(MemoryRegion *mr)
1050{
1051 return mr->dirty_log_mask;
1052}
1053
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1054bool memory_region_is_rom(MemoryRegion *mr)
1055{
1056 return mr->ram && mr->readonly;
1057}
1058
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1059void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1060{
5a583347
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1061 uint8_t mask = 1 << client;
1062
59023ef4 1063 memory_region_transaction_begin();
5a583347 1064 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1065 memory_region_update_pending |= mr->enabled;
59023ef4 1066 memory_region_transaction_commit();
093bc2cd
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1067}
1068
a8170e5e
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1069bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1070 hwaddr size, unsigned client)
093bc2cd 1071{
14a3c10a 1072 assert(mr->terminates);
cd7a45c9
BS
1073 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1074 1 << client);
093bc2cd
AK
1075}
1076
a8170e5e
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1077void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1078 hwaddr size)
093bc2cd 1079{
14a3c10a 1080 assert(mr->terminates);
fd4aa979 1081 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
093bc2cd
AK
1082}
1083
6c279db8
JQ
1084bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1085 hwaddr size, unsigned client)
1086{
1087 bool ret;
1088 assert(mr->terminates);
1089 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1090 1 << client);
1091 if (ret) {
1092 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1093 mr->ram_addr + addr + size,
1094 1 << client);
1095 }
1096 return ret;
1097}
1098
1099
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1100void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1101{
0d673e36 1102 AddressSpace *as;
5a583347
AK
1103 FlatRange *fr;
1104
0d673e36
AK
1105 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1106 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1107 if (fr->mr == mr) {
1108 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1109 }
5a583347
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1110 }
1111 }
093bc2cd
AK
1112}
1113
1114void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1115{
fb1cd6f9 1116 if (mr->readonly != readonly) {
59023ef4 1117 memory_region_transaction_begin();
fb1cd6f9 1118 mr->readonly = readonly;
22bde714 1119 memory_region_update_pending |= mr->enabled;
59023ef4 1120 memory_region_transaction_commit();
fb1cd6f9 1121 }
093bc2cd
AK
1122}
1123
d0a9b5bc
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1124void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
1125{
1126 if (mr->readable != readable) {
59023ef4 1127 memory_region_transaction_begin();
d0a9b5bc 1128 mr->readable = readable;
22bde714 1129 memory_region_update_pending |= mr->enabled;
59023ef4 1130 memory_region_transaction_commit();
d0a9b5bc
AK
1131 }
1132}
1133
a8170e5e
AK
1134void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1135 hwaddr size, unsigned client)
093bc2cd 1136{
14a3c10a 1137 assert(mr->terminates);
5a583347
AK
1138 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1139 mr->ram_addr + addr + size,
1140 1 << client);
093bc2cd
AK
1141}
1142
1143void *memory_region_get_ram_ptr(MemoryRegion *mr)
1144{
1145 if (mr->alias) {
1146 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1147 }
1148
14a3c10a 1149 assert(mr->terminates);
093bc2cd 1150
021d26d1 1151 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1152}
1153
0d673e36 1154static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd
AK
1155{
1156 FlatRange *fr;
1157 CoalescedMemoryRange *cmr;
1158 AddrRange tmp;
95d2994a 1159 MemoryRegionSection section;
093bc2cd 1160
0d673e36 1161 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
093bc2cd 1162 if (fr->mr == mr) {
95d2994a 1163 section = (MemoryRegionSection) {
f6790af6 1164 .address_space = as,
95d2994a
AK
1165 .offset_within_address_space = int128_get64(fr->addr.start),
1166 .size = int128_get64(fr->addr.size),
1167 };
1168
1169 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1170 int128_get64(fr->addr.start),
1171 int128_get64(fr->addr.size));
093bc2cd
AK
1172 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1173 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1174 int128_sub(fr->addr.start,
1175 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1176 if (!addrrange_intersects(tmp, fr->addr)) {
1177 continue;
1178 }
1179 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1180 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1181 int128_get64(tmp.start),
1182 int128_get64(tmp.size));
093bc2cd
AK
1183 }
1184 }
1185 }
1186}
1187
0d673e36
AK
1188static void memory_region_update_coalesced_range(MemoryRegion *mr)
1189{
1190 AddressSpace *as;
1191
1192 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1193 memory_region_update_coalesced_range_as(mr, as);
1194 }
1195}
1196
093bc2cd
AK
1197void memory_region_set_coalescing(MemoryRegion *mr)
1198{
1199 memory_region_clear_coalescing(mr);
08dafab4 1200 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1201}
1202
1203void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1204 hwaddr offset,
093bc2cd
AK
1205 uint64_t size)
1206{
7267c094 1207 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1208
08dafab4 1209 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1210 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1211 memory_region_update_coalesced_range(mr);
d410515e 1212 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1213}
1214
1215void memory_region_clear_coalescing(MemoryRegion *mr)
1216{
1217 CoalescedMemoryRange *cmr;
1218
d410515e
JK
1219 qemu_flush_coalesced_mmio_buffer();
1220 mr->flush_coalesced_mmio = false;
1221
093bc2cd
AK
1222 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1223 cmr = QTAILQ_FIRST(&mr->coalesced);
1224 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1225 g_free(cmr);
093bc2cd
AK
1226 }
1227 memory_region_update_coalesced_range(mr);
1228}
1229
d410515e
JK
1230void memory_region_set_flush_coalesced(MemoryRegion *mr)
1231{
1232 mr->flush_coalesced_mmio = true;
1233}
1234
1235void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1236{
1237 qemu_flush_coalesced_mmio_buffer();
1238 if (QTAILQ_EMPTY(&mr->coalesced)) {
1239 mr->flush_coalesced_mmio = false;
1240 }
1241}
1242
3e9d69e7 1243void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1244 hwaddr addr,
3e9d69e7
AK
1245 unsigned size,
1246 bool match_data,
1247 uint64_t data,
753d5e14 1248 EventNotifier *e)
3e9d69e7
AK
1249{
1250 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1251 .addr.start = int128_make64(addr),
1252 .addr.size = int128_make64(size),
3e9d69e7
AK
1253 .match_data = match_data,
1254 .data = data,
753d5e14 1255 .e = e,
3e9d69e7
AK
1256 };
1257 unsigned i;
1258
28f362be 1259 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1260 memory_region_transaction_begin();
3e9d69e7
AK
1261 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1262 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1263 break;
1264 }
1265 }
1266 ++mr->ioeventfd_nb;
7267c094 1267 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1268 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1269 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1270 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1271 mr->ioeventfds[i] = mrfd;
22bde714 1272 memory_region_update_pending |= mr->enabled;
59023ef4 1273 memory_region_transaction_commit();
3e9d69e7
AK
1274}
1275
1276void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1277 hwaddr addr,
3e9d69e7
AK
1278 unsigned size,
1279 bool match_data,
1280 uint64_t data,
753d5e14 1281 EventNotifier *e)
3e9d69e7
AK
1282{
1283 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1284 .addr.start = int128_make64(addr),
1285 .addr.size = int128_make64(size),
3e9d69e7
AK
1286 .match_data = match_data,
1287 .data = data,
753d5e14 1288 .e = e,
3e9d69e7
AK
1289 };
1290 unsigned i;
1291
28f362be 1292 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1293 memory_region_transaction_begin();
3e9d69e7
AK
1294 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1295 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1296 break;
1297 }
1298 }
1299 assert(i != mr->ioeventfd_nb);
1300 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1301 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1302 --mr->ioeventfd_nb;
7267c094 1303 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1304 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
22bde714 1305 memory_region_update_pending |= mr->enabled;
59023ef4 1306 memory_region_transaction_commit();
3e9d69e7
AK
1307}
1308
093bc2cd 1309static void memory_region_add_subregion_common(MemoryRegion *mr,
a8170e5e 1310 hwaddr offset,
093bc2cd
AK
1311 MemoryRegion *subregion)
1312{
1313 MemoryRegion *other;
1314
59023ef4
JK
1315 memory_region_transaction_begin();
1316
093bc2cd
AK
1317 assert(!subregion->parent);
1318 subregion->parent = mr;
1319 subregion->addr = offset;
1320 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1321 if (subregion->may_overlap || other->may_overlap) {
1322 continue;
1323 }
2c7cfd65 1324 if (int128_ge(int128_make64(offset),
08dafab4
AK
1325 int128_add(int128_make64(other->addr), other->size))
1326 || int128_le(int128_add(int128_make64(offset), subregion->size),
1327 int128_make64(other->addr))) {
093bc2cd
AK
1328 continue;
1329 }
a5e1cbc8 1330#if 0
860329b2
MW
1331 printf("warning: subregion collision %llx/%llx (%s) "
1332 "vs %llx/%llx (%s)\n",
093bc2cd 1333 (unsigned long long)offset,
08dafab4 1334 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1335 subregion->name,
1336 (unsigned long long)other->addr,
08dafab4 1337 (unsigned long long)int128_get64(other->size),
860329b2 1338 other->name);
a5e1cbc8 1339#endif
093bc2cd
AK
1340 }
1341 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1342 if (subregion->priority >= other->priority) {
1343 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1344 goto done;
1345 }
1346 }
1347 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1348done:
22bde714 1349 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1350 memory_region_transaction_commit();
093bc2cd
AK
1351}
1352
1353
1354void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1355 hwaddr offset,
093bc2cd
AK
1356 MemoryRegion *subregion)
1357{
1358 subregion->may_overlap = false;
1359 subregion->priority = 0;
1360 memory_region_add_subregion_common(mr, offset, subregion);
1361}
1362
1363void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1364 hwaddr offset,
093bc2cd
AK
1365 MemoryRegion *subregion,
1366 unsigned priority)
1367{
1368 subregion->may_overlap = true;
1369 subregion->priority = priority;
1370 memory_region_add_subregion_common(mr, offset, subregion);
1371}
1372
1373void memory_region_del_subregion(MemoryRegion *mr,
1374 MemoryRegion *subregion)
1375{
59023ef4 1376 memory_region_transaction_begin();
093bc2cd
AK
1377 assert(subregion->parent == mr);
1378 subregion->parent = NULL;
1379 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
22bde714 1380 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1381 memory_region_transaction_commit();
6bba19ba
AK
1382}
1383
1384void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1385{
1386 if (enabled == mr->enabled) {
1387 return;
1388 }
59023ef4 1389 memory_region_transaction_begin();
6bba19ba 1390 mr->enabled = enabled;
22bde714 1391 memory_region_update_pending = true;
59023ef4 1392 memory_region_transaction_commit();
093bc2cd 1393}
1c0ffa58 1394
a8170e5e 1395void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2282e1af
AK
1396{
1397 MemoryRegion *parent = mr->parent;
1398 unsigned priority = mr->priority;
1399 bool may_overlap = mr->may_overlap;
1400
1401 if (addr == mr->addr || !parent) {
1402 mr->addr = addr;
1403 return;
1404 }
1405
1406 memory_region_transaction_begin();
1407 memory_region_del_subregion(parent, mr);
1408 if (may_overlap) {
1409 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1410 } else {
1411 memory_region_add_subregion(parent, addr, mr);
1412 }
1413 memory_region_transaction_commit();
1414}
1415
a8170e5e 1416void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1417{
4703359e 1418 assert(mr->alias);
4703359e 1419
59023ef4 1420 if (offset == mr->alias_offset) {
4703359e
AK
1421 return;
1422 }
1423
59023ef4
JK
1424 memory_region_transaction_begin();
1425 mr->alias_offset = offset;
22bde714 1426 memory_region_update_pending |= mr->enabled;
59023ef4 1427 memory_region_transaction_commit();
4703359e
AK
1428}
1429
e34911c4
AK
1430ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1431{
e34911c4
AK
1432 return mr->ram_addr;
1433}
1434
e2177955
AK
1435static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1436{
1437 const AddrRange *addr = addr_;
1438 const FlatRange *fr = fr_;
1439
1440 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1441 return -1;
1442 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1443 return 1;
1444 }
1445 return 0;
1446}
1447
1448static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1449{
8786db7c 1450 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
e2177955
AK
1451 sizeof(FlatRange), cmp_flatrange_addr);
1452}
1453
1454MemoryRegionSection memory_region_find(MemoryRegion *address_space,
a8170e5e 1455 hwaddr addr, uint64_t size)
e2177955
AK
1456{
1457 AddressSpace *as = memory_region_to_address_space(address_space);
1458 AddrRange range = addrrange_make(int128_make64(addr),
1459 int128_make64(size));
1460 FlatRange *fr = address_space_lookup(as, range);
1461 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1462
1463 if (!fr) {
1464 return ret;
1465 }
1466
8786db7c 1467 while (fr > as->current_map->ranges
e2177955
AK
1468 && addrrange_intersects(fr[-1].addr, range)) {
1469 --fr;
1470 }
1471
1472 ret.mr = fr->mr;
1473 range = addrrange_intersection(range, fr->addr);
1474 ret.offset_within_region = fr->offset_in_region;
1475 ret.offset_within_region += int128_get64(int128_sub(range.start,
1476 fr->addr.start));
1477 ret.size = int128_get64(range.size);
1478 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1479 ret.readonly = fr->readonly;
e2177955
AK
1480 return ret;
1481}
1482
86e775c6
AK
1483void memory_global_sync_dirty_bitmap(MemoryRegion *address_space)
1484{
7664e80c
AK
1485 AddressSpace *as = memory_region_to_address_space(address_space);
1486 FlatRange *fr;
1487
8786db7c 1488 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
72e22d2f 1489 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c
AK
1490 }
1491}
1492
1493void memory_global_dirty_log_start(void)
1494{
7664e80c 1495 global_dirty_log = true;
7376e582 1496 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1497}
1498
1499void memory_global_dirty_log_stop(void)
1500{
7664e80c 1501 global_dirty_log = false;
7376e582 1502 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1503}
1504
1505static void listener_add_address_space(MemoryListener *listener,
1506 AddressSpace *as)
1507{
1508 FlatRange *fr;
1509
221b3a3f 1510 if (listener->address_space_filter
f6790af6 1511 && listener->address_space_filter != as) {
221b3a3f
JG
1512 return;
1513 }
1514
7664e80c 1515 if (global_dirty_log) {
975aefe0
AK
1516 if (listener->log_global_start) {
1517 listener->log_global_start(listener);
1518 }
7664e80c 1519 }
975aefe0 1520
8786db7c 1521 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
7664e80c
AK
1522 MemoryRegionSection section = {
1523 .mr = fr->mr,
f6790af6 1524 .address_space = as,
7664e80c
AK
1525 .offset_within_region = fr->offset_in_region,
1526 .size = int128_get64(fr->addr.size),
1527 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1528 .readonly = fr->readonly,
7664e80c 1529 };
975aefe0
AK
1530 if (listener->region_add) {
1531 listener->region_add(listener, &section);
1532 }
7664e80c
AK
1533 }
1534}
1535
f6790af6 1536void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1537{
72e22d2f 1538 MemoryListener *other = NULL;
0d673e36 1539 AddressSpace *as;
72e22d2f 1540
7376e582 1541 listener->address_space_filter = filter;
72e22d2f
AK
1542 if (QTAILQ_EMPTY(&memory_listeners)
1543 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1544 memory_listeners)->priority) {
1545 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1546 } else {
1547 QTAILQ_FOREACH(other, &memory_listeners, link) {
1548 if (listener->priority < other->priority) {
1549 break;
1550 }
1551 }
1552 QTAILQ_INSERT_BEFORE(other, listener, link);
1553 }
0d673e36
AK
1554
1555 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1556 listener_add_address_space(listener, as);
1557 }
7664e80c
AK
1558}
1559
1560void memory_listener_unregister(MemoryListener *listener)
1561{
72e22d2f 1562 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1563}
e2177955 1564
9ad2bbc1 1565void address_space_init(AddressSpace *as, MemoryRegion *root)
1c0ffa58 1566{
59023ef4 1567 memory_region_transaction_begin();
8786db7c
AK
1568 as->root = root;
1569 as->current_map = g_new(FlatView, 1);
1570 flatview_init(as->current_map);
0d673e36
AK
1571 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1572 as->name = NULL;
59023ef4 1573 memory_region_transaction_commit();
ac1970fb 1574 address_space_init_dispatch(as);
1c0ffa58 1575}
658b2224 1576
83f3c251
AK
1577void address_space_destroy(AddressSpace *as)
1578{
1579 /* Flush out anything from MemoryListeners listening in on this */
1580 memory_region_transaction_begin();
1581 as->root = NULL;
1582 memory_region_transaction_commit();
1583 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1584 address_space_destroy_dispatch(as);
1585 flatview_destroy(as->current_map);
1586 g_free(as->current_map);
1587}
1588
a8170e5e 1589uint64_t io_mem_read(MemoryRegion *mr, hwaddr addr, unsigned size)
acbbec5d 1590{
37ec01d4 1591 return memory_region_dispatch_read(mr, addr, size);
acbbec5d
AK
1592}
1593
a8170e5e 1594void io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1595 uint64_t val, unsigned size)
1596{
37ec01d4 1597 memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1598}
1599
314e2987
BS
1600typedef struct MemoryRegionList MemoryRegionList;
1601
1602struct MemoryRegionList {
1603 const MemoryRegion *mr;
1604 bool printed;
1605 QTAILQ_ENTRY(MemoryRegionList) queue;
1606};
1607
1608typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1609
1610static void mtree_print_mr(fprintf_function mon_printf, void *f,
1611 const MemoryRegion *mr, unsigned int level,
a8170e5e 1612 hwaddr base,
9479c57a 1613 MemoryRegionListHead *alias_print_queue)
314e2987 1614{
9479c57a
JK
1615 MemoryRegionList *new_ml, *ml, *next_ml;
1616 MemoryRegionListHead submr_print_queue;
314e2987
BS
1617 const MemoryRegion *submr;
1618 unsigned int i;
1619
7ea692b2 1620 if (!mr || !mr->enabled) {
314e2987
BS
1621 return;
1622 }
1623
1624 for (i = 0; i < level; i++) {
1625 mon_printf(f, " ");
1626 }
1627
1628 if (mr->alias) {
1629 MemoryRegionList *ml;
1630 bool found = false;
1631
1632 /* check if the alias is already in the queue */
9479c57a 1633 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1634 if (ml->mr == mr->alias && !ml->printed) {
1635 found = true;
1636 }
1637 }
1638
1639 if (!found) {
1640 ml = g_new(MemoryRegionList, 1);
1641 ml->mr = mr->alias;
1642 ml->printed = false;
9479c57a 1643 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1644 }
4896d74b
JK
1645 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1646 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1647 "-" TARGET_FMT_plx "\n",
314e2987 1648 base + mr->addr,
08dafab4 1649 base + mr->addr
a8170e5e 1650 + (hwaddr)int128_get64(mr->size) - 1,
4b474ba7 1651 mr->priority,
4896d74b
JK
1652 mr->readable ? 'R' : '-',
1653 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1654 : '-',
314e2987
BS
1655 mr->name,
1656 mr->alias->name,
1657 mr->alias_offset,
08dafab4 1658 mr->alias_offset
a8170e5e 1659 + (hwaddr)int128_get64(mr->size) - 1);
314e2987 1660 } else {
4896d74b
JK
1661 mon_printf(f,
1662 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1663 base + mr->addr,
08dafab4 1664 base + mr->addr
a8170e5e 1665 + (hwaddr)int128_get64(mr->size) - 1,
4b474ba7 1666 mr->priority,
4896d74b
JK
1667 mr->readable ? 'R' : '-',
1668 !mr->readonly && !(mr->rom_device && mr->readable) ? 'W'
1669 : '-',
314e2987
BS
1670 mr->name);
1671 }
9479c57a
JK
1672
1673 QTAILQ_INIT(&submr_print_queue);
1674
314e2987 1675 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1676 new_ml = g_new(MemoryRegionList, 1);
1677 new_ml->mr = submr;
1678 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1679 if (new_ml->mr->addr < ml->mr->addr ||
1680 (new_ml->mr->addr == ml->mr->addr &&
1681 new_ml->mr->priority > ml->mr->priority)) {
1682 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1683 new_ml = NULL;
1684 break;
1685 }
1686 }
1687 if (new_ml) {
1688 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1689 }
1690 }
1691
1692 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1693 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1694 alias_print_queue);
1695 }
1696
88365e47 1697 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1698 g_free(ml);
314e2987
BS
1699 }
1700}
1701
1702void mtree_info(fprintf_function mon_printf, void *f)
1703{
1704 MemoryRegionListHead ml_head;
1705 MemoryRegionList *ml, *ml2;
0d673e36 1706 AddressSpace *as;
314e2987
BS
1707
1708 QTAILQ_INIT(&ml_head);
1709
0d673e36
AK
1710 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1711 if (!as->name) {
1712 continue;
1713 }
1714 mon_printf(f, "%s\n", as->name);
1715 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
1716 }
1717
1718 mon_printf(f, "aliases\n");
314e2987
BS
1719 /* print aliased regions */
1720 QTAILQ_FOREACH(ml, &ml_head, queue) {
1721 if (!ml->printed) {
1722 mon_printf(f, "%s\n", ml->mr->name);
1723 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1724 }
1725 }
1726
1727 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1728 g_free(ml);
314e2987 1729 }
314e2987 1730}