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cpu: Turn cpu_unassigned_access() into a CPUState hook
[qemu.git] / memory.c
CommitLineData
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
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12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
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16#include "exec/memory.h"
17#include "exec/address-spaces.h"
18#include "exec/ioport.h"
1de7afc9 19#include "qemu/bitops.h"
9c17d615 20#include "sysemu/kvm.h"
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21#include <assert.h>
22
022c62cb 23#include "exec/memory-internal.h"
67d95c15 24
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25//#define DEBUG_UNASSIGNED
26
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27static unsigned memory_region_transaction_depth;
28static bool memory_region_update_pending;
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29static bool global_dirty_log = false;
30
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31static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 33
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34static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
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37typedef struct AddrRange AddrRange;
38
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39/*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
093bc2cd 44struct AddrRange {
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45 Int128 start;
46 Int128 size;
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47};
48
08dafab4 49static AddrRange addrrange_make(Int128 start, Int128 size)
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50{
51 return (AddrRange) { start, size };
52}
53
54static bool addrrange_equal(AddrRange r1, AddrRange r2)
55{
08dafab4 56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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57}
58
08dafab4 59static Int128 addrrange_end(AddrRange r)
093bc2cd 60{
08dafab4 61 return int128_add(r.start, r.size);
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62}
63
08dafab4 64static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 65{
08dafab4 66 int128_addto(&range.start, delta);
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67 return range;
68}
69
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70static bool addrrange_contains(AddrRange range, Int128 addr)
71{
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74}
75
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76static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77{
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78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
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80}
81
82static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83{
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84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
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87}
88
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89enum ListenerDirection { Forward, Reverse };
90
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91static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93{
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96}
97
98#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
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108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
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113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
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116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
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123#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
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132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
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139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
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141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
0e0d36b4 150#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
7376e582 151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 152 .mr = (fr)->mr, \
f6790af6 153 .address_space = (as), \
0e0d36b4 154 .offset_within_region = (fr)->offset_in_region, \
052e87b0 155 .size = (fr)->addr.size, \
0e0d36b4 156 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 157 .readonly = (fr)->readonly, \
7376e582 158 }))
0e0d36b4 159
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160struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163};
164
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165struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
753d5e14 169 EventNotifier *e;
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170};
171
172static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174{
08dafab4 175 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 176 return true;
08dafab4 177 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 178 return false;
08dafab4 179 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 180 return true;
08dafab4 181 } else if (int128_gt(a.addr.size, b.addr.size)) {
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182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
753d5e14 194 if (a.e < b.e) {
3e9d69e7 195 return true;
753d5e14 196 } else if (a.e > b.e) {
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197 return false;
198 }
199 return false;
200}
201
202static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204{
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207}
208
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209typedef struct FlatRange FlatRange;
210typedef struct FlatView FlatView;
211
212/* Range of memory in the global map. Addresses are absolute. */
213struct FlatRange {
214 MemoryRegion *mr;
a8170e5e 215 hwaddr offset_in_region;
093bc2cd 216 AddrRange addr;
5a583347 217 uint8_t dirty_log_mask;
5f9a5ea1 218 bool romd_mode;
fb1cd6f9 219 bool readonly;
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220};
221
222/* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229};
230
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231typedef struct AddressSpaceOps AddressSpaceOps;
232
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233#define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
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236static bool flatrange_equal(FlatRange *a, FlatRange *b)
237{
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 240 && a->offset_in_region == b->offset_in_region
5f9a5ea1 241 && a->romd_mode == b->romd_mode
fb1cd6f9 242 && a->readonly == b->readonly;
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243}
244
245static void flatview_init(FlatView *view)
246{
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250}
251
252/* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256{
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 259 view->ranges = g_realloc(view->ranges,
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260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266}
267
268static void flatview_destroy(FlatView *view)
269{
7267c094 270 g_free(view->ranges);
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271}
272
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273static bool can_merge(FlatRange *r1, FlatRange *r2)
274{
08dafab4 275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 276 && r1->mr == r2->mr
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277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
d0a9b5bc 280 && r1->dirty_log_mask == r2->dirty_log_mask
5f9a5ea1 281 && r1->romd_mode == r2->romd_mode
fb1cd6f9 282 && r1->readonly == r2->readonly;
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283}
284
8508e024 285/* Attempt to simplify a view by merging adjacent ranges */
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286static void flatview_simplify(FlatView *view)
287{
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
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296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303}
304
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305static void memory_region_oldmmio_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311{
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
316 *value |= (tmp & mask) << shift;
317}
318
164a4dcd 319static void memory_region_read_accessor(void *opaque,
a8170e5e 320 hwaddr addr,
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321 uint64_t *value,
322 unsigned size,
323 unsigned shift,
324 uint64_t mask)
325{
326 MemoryRegion *mr = opaque;
327 uint64_t tmp;
328
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329 if (mr->flush_coalesced_mmio) {
330 qemu_flush_coalesced_mmio_buffer();
331 }
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332 tmp = mr->ops->read(mr->opaque, addr, size);
333 *value |= (tmp & mask) << shift;
334}
335
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336static void memory_region_oldmmio_write_accessor(void *opaque,
337 hwaddr addr,
338 uint64_t *value,
339 unsigned size,
340 unsigned shift,
341 uint64_t mask)
342{
343 MemoryRegion *mr = opaque;
344 uint64_t tmp;
345
346 tmp = (*value >> shift) & mask;
347 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
348}
349
164a4dcd 350static void memory_region_write_accessor(void *opaque,
a8170e5e 351 hwaddr addr,
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352 uint64_t *value,
353 unsigned size,
354 unsigned shift,
355 uint64_t mask)
356{
357 MemoryRegion *mr = opaque;
358 uint64_t tmp;
359
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360 if (mr->flush_coalesced_mmio) {
361 qemu_flush_coalesced_mmio_buffer();
362 }
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363 tmp = (*value >> shift) & mask;
364 mr->ops->write(mr->opaque, addr, tmp, size);
365}
366
a8170e5e 367static void access_with_adjusted_size(hwaddr addr,
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368 uint64_t *value,
369 unsigned size,
370 unsigned access_size_min,
371 unsigned access_size_max,
372 void (*access)(void *opaque,
a8170e5e 373 hwaddr addr,
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374 uint64_t *value,
375 unsigned size,
376 unsigned shift,
377 uint64_t mask),
378 void *opaque)
379{
380 uint64_t access_mask;
381 unsigned access_size;
382 unsigned i;
383
384 if (!access_size_min) {
385 access_size_min = 1;
386 }
387 if (!access_size_max) {
388 access_size_max = 4;
389 }
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390
391 /* FIXME: support unaligned access? */
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392 access_size = MAX(MIN(size, access_size_max), access_size_min);
393 access_mask = -1ULL >> (64 - access_size * 8);
394 for (i = 0; i < size; i += access_size) {
08521e28
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395#ifdef TARGET_WORDS_BIGENDIAN
396 access(opaque, addr + i, value, access_size,
397 (size - access_size - i) * 8, access_mask);
398#else
164a4dcd 399 access(opaque, addr + i, value, access_size, i * 8, access_mask);
08521e28 400#endif
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401 }
402}
403
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404static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
405 unsigned width, bool write)
406{
407 const MemoryRegionPortio *mrp;
408
409 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
410 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
411 && width == mrp->size
412 && (write ? (bool)mrp->write : (bool)mrp->read)) {
413 return mrp;
414 }
415 }
416 return NULL;
417}
418
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419static void memory_region_iorange_read(IORange *iorange,
420 uint64_t offset,
421 unsigned width,
422 uint64_t *data)
423{
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424 MemoryRegionIORange *mrio
425 = container_of(iorange, MemoryRegionIORange, iorange);
426 MemoryRegion *mr = mrio->mr;
658b2224 427
a2d33521 428 offset += mrio->offset;
627a0e90 429 if (mr->ops->old_portio) {
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430 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
431 width, false);
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432
433 *data = ((uint64_t)1 << (width * 8)) - 1;
434 if (mrp) {
2b50aa1f 435 *data = mrp->read(mr->opaque, offset);
03808f58 436 } else if (width == 2) {
a2d33521 437 mrp = find_portio(mr, offset - mrio->offset, 1, false);
03808f58 438 assert(mrp);
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439 *data = mrp->read(mr->opaque, offset) |
440 (mrp->read(mr->opaque, offset + 1) << 8);
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441 }
442 return;
443 }
3a130f4e 444 *data = 0;
2b50aa1f 445 access_with_adjusted_size(offset, data, width,
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446 mr->ops->impl.min_access_size,
447 mr->ops->impl.max_access_size,
448 memory_region_read_accessor, mr);
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449}
450
451static void memory_region_iorange_write(IORange *iorange,
452 uint64_t offset,
453 unsigned width,
454 uint64_t data)
455{
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456 MemoryRegionIORange *mrio
457 = container_of(iorange, MemoryRegionIORange, iorange);
458 MemoryRegion *mr = mrio->mr;
658b2224 459
a2d33521 460 offset += mrio->offset;
627a0e90 461 if (mr->ops->old_portio) {
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462 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
463 width, true);
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464
465 if (mrp) {
2b50aa1f 466 mrp->write(mr->opaque, offset, data);
03808f58 467 } else if (width == 2) {
7e2a62d8 468 mrp = find_portio(mr, offset - mrio->offset, 1, true);
03808f58 469 assert(mrp);
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470 mrp->write(mr->opaque, offset, data & 0xff);
471 mrp->write(mr->opaque, offset + 1, data >> 8);
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472 }
473 return;
474 }
2b50aa1f 475 access_with_adjusted_size(offset, &data, width,
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476 mr->ops->impl.min_access_size,
477 mr->ops->impl.max_access_size,
478 memory_region_write_accessor, mr);
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479}
480
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481static void memory_region_iorange_destructor(IORange *iorange)
482{
483 g_free(container_of(iorange, MemoryRegionIORange, iorange));
484}
485
93632747 486const IORangeOps memory_region_iorange_ops = {
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487 .read = memory_region_iorange_read,
488 .write = memory_region_iorange_write,
a2d33521 489 .destructor = memory_region_iorange_destructor,
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490};
491
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492static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
493{
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494 AddressSpace *as;
495
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496 while (mr->parent) {
497 mr = mr->parent;
498 }
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499 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
500 if (mr == as->root) {
501 return as;
502 }
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503 }
504 abort();
505}
506
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507/* Render a memory region into the global view. Ranges in @view obscure
508 * ranges in @mr.
509 */
510static void render_memory_region(FlatView *view,
511 MemoryRegion *mr,
08dafab4 512 Int128 base,
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513 AddrRange clip,
514 bool readonly)
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515{
516 MemoryRegion *subregion;
517 unsigned i;
a8170e5e 518 hwaddr offset_in_region;
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519 Int128 remain;
520 Int128 now;
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521 FlatRange fr;
522 AddrRange tmp;
523
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524 if (!mr->enabled) {
525 return;
526 }
527
08dafab4 528 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 529 readonly |= mr->readonly;
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530
531 tmp = addrrange_make(base, mr->size);
532
533 if (!addrrange_intersects(tmp, clip)) {
534 return;
535 }
536
537 clip = addrrange_intersection(tmp, clip);
538
539 if (mr->alias) {
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540 int128_subfrom(&base, int128_make64(mr->alias->addr));
541 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 542 render_memory_region(view, mr->alias, base, clip, readonly);
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543 return;
544 }
545
546 /* Render subregions in priority order. */
547 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 548 render_memory_region(view, subregion, base, clip, readonly);
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549 }
550
14a3c10a 551 if (!mr->terminates) {
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552 return;
553 }
554
08dafab4 555 offset_in_region = int128_get64(int128_sub(clip.start, base));
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556 base = clip.start;
557 remain = clip.size;
558
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559 fr.mr = mr;
560 fr.dirty_log_mask = mr->dirty_log_mask;
561 fr.romd_mode = mr->romd_mode;
562 fr.readonly = readonly;
563
093bc2cd 564 /* Render the region itself into any gaps left by the current view. */
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565 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
566 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
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567 continue;
568 }
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569 if (int128_lt(base, view->ranges[i].addr.start)) {
570 now = int128_min(remain,
571 int128_sub(view->ranges[i].addr.start, base));
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572 fr.offset_in_region = offset_in_region;
573 fr.addr = addrrange_make(base, now);
574 flatview_insert(view, i, &fr);
575 ++i;
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576 int128_addto(&base, now);
577 offset_in_region += int128_get64(now);
578 int128_subfrom(&remain, now);
093bc2cd 579 }
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580 now = int128_sub(int128_min(int128_add(base, remain),
581 addrrange_end(view->ranges[i].addr)),
582 base);
583 int128_addto(&base, now);
584 offset_in_region += int128_get64(now);
585 int128_subfrom(&remain, now);
093bc2cd 586 }
08dafab4 587 if (int128_nz(remain)) {
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588 fr.offset_in_region = offset_in_region;
589 fr.addr = addrrange_make(base, remain);
590 flatview_insert(view, i, &fr);
591 }
592}
593
594/* Render a memory topology into a list of disjoint absolute ranges. */
595static FlatView generate_memory_topology(MemoryRegion *mr)
596{
597 FlatView view;
598
599 flatview_init(&view);
600
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601 if (mr) {
602 render_memory_region(&view, mr, int128_zero(),
603 addrrange_make(int128_zero(), int128_2_64()), false);
604 }
3d8e6bf9 605 flatview_simplify(&view);
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606
607 return view;
608}
609
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610static void address_space_add_del_ioeventfds(AddressSpace *as,
611 MemoryRegionIoeventfd *fds_new,
612 unsigned fds_new_nb,
613 MemoryRegionIoeventfd *fds_old,
614 unsigned fds_old_nb)
615{
616 unsigned iold, inew;
80a1ea37
AK
617 MemoryRegionIoeventfd *fd;
618 MemoryRegionSection section;
3e9d69e7
AK
619
620 /* Generate a symmetric difference of the old and new fd sets, adding
621 * and deleting as necessary.
622 */
623
624 iold = inew = 0;
625 while (iold < fds_old_nb || inew < fds_new_nb) {
626 if (iold < fds_old_nb
627 && (inew == fds_new_nb
628 || memory_region_ioeventfd_before(fds_old[iold],
629 fds_new[inew]))) {
80a1ea37
AK
630 fd = &fds_old[iold];
631 section = (MemoryRegionSection) {
f6790af6 632 .address_space = as,
80a1ea37 633 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 634 .size = fd->addr.size,
80a1ea37
AK
635 };
636 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 637 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
638 ++iold;
639 } else if (inew < fds_new_nb
640 && (iold == fds_old_nb
641 || memory_region_ioeventfd_before(fds_new[inew],
642 fds_old[iold]))) {
80a1ea37
AK
643 fd = &fds_new[inew];
644 section = (MemoryRegionSection) {
f6790af6 645 .address_space = as,
80a1ea37 646 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 647 .size = fd->addr.size,
80a1ea37
AK
648 };
649 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 650 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
651 ++inew;
652 } else {
653 ++iold;
654 ++inew;
655 }
656 }
657}
658
659static void address_space_update_ioeventfds(AddressSpace *as)
660{
661 FlatRange *fr;
662 unsigned ioeventfd_nb = 0;
663 MemoryRegionIoeventfd *ioeventfds = NULL;
664 AddrRange tmp;
665 unsigned i;
666
8786db7c 667 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
3e9d69e7
AK
668 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
669 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
670 int128_sub(fr->addr.start,
671 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
672 if (addrrange_intersects(fr->addr, tmp)) {
673 ++ioeventfd_nb;
7267c094 674 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
675 ioeventfd_nb * sizeof(*ioeventfds));
676 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
677 ioeventfds[ioeventfd_nb-1].addr = tmp;
678 }
679 }
680 }
681
682 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
683 as->ioeventfds, as->ioeventfd_nb);
684
7267c094 685 g_free(as->ioeventfds);
3e9d69e7
AK
686 as->ioeventfds = ioeventfds;
687 as->ioeventfd_nb = ioeventfd_nb;
688}
689
b8af1afb
AK
690static void address_space_update_topology_pass(AddressSpace *as,
691 FlatView old_view,
692 FlatView new_view,
693 bool adding)
093bc2cd 694{
093bc2cd
AK
695 unsigned iold, inew;
696 FlatRange *frold, *frnew;
093bc2cd
AK
697
698 /* Generate a symmetric difference of the old and new memory maps.
699 * Kill ranges in the old map, and instantiate ranges in the new map.
700 */
701 iold = inew = 0;
702 while (iold < old_view.nr || inew < new_view.nr) {
703 if (iold < old_view.nr) {
704 frold = &old_view.ranges[iold];
705 } else {
706 frold = NULL;
707 }
708 if (inew < new_view.nr) {
709 frnew = &new_view.ranges[inew];
710 } else {
711 frnew = NULL;
712 }
713
714 if (frold
715 && (!frnew
08dafab4
AK
716 || int128_lt(frold->addr.start, frnew->addr.start)
717 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 718 && !flatrange_equal(frold, frnew)))) {
41a6e477 719 /* In old but not in new, or in both but attributes changed. */
093bc2cd 720
b8af1afb 721 if (!adding) {
72e22d2f 722 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
723 }
724
093bc2cd
AK
725 ++iold;
726 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 727 /* In both and unchanged (except logging may have changed) */
093bc2cd 728
b8af1afb 729 if (adding) {
50c1e149 730 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b8af1afb 731 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
72e22d2f 732 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
b8af1afb 733 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
72e22d2f 734 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
b8af1afb 735 }
5a583347
AK
736 }
737
093bc2cd
AK
738 ++iold;
739 ++inew;
093bc2cd
AK
740 } else {
741 /* In new */
742
b8af1afb 743 if (adding) {
72e22d2f 744 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
745 }
746
093bc2cd
AK
747 ++inew;
748 }
749 }
b8af1afb
AK
750}
751
752
753static void address_space_update_topology(AddressSpace *as)
754{
8786db7c 755 FlatView old_view = *as->current_map;
b8af1afb
AK
756 FlatView new_view = generate_memory_topology(as->root);
757
758 address_space_update_topology_pass(as, old_view, new_view, false);
759 address_space_update_topology_pass(as, old_view, new_view, true);
760
8786db7c 761 *as->current_map = new_view;
093bc2cd 762 flatview_destroy(&old_view);
3e9d69e7 763 address_space_update_ioeventfds(as);
093bc2cd
AK
764}
765
4ef4db86
AK
766void memory_region_transaction_begin(void)
767{
bb880ded 768 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
769 ++memory_region_transaction_depth;
770}
771
772void memory_region_transaction_commit(void)
773{
0d673e36
AK
774 AddressSpace *as;
775
4ef4db86
AK
776 assert(memory_region_transaction_depth);
777 --memory_region_transaction_depth;
22bde714
JK
778 if (!memory_region_transaction_depth && memory_region_update_pending) {
779 memory_region_update_pending = false;
02e2b95f
JK
780 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
781
0d673e36
AK
782 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
783 address_space_update_topology(as);
02e2b95f
JK
784 }
785
786 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
e87c099f 787 }
4ef4db86
AK
788}
789
545e92e0
AK
790static void memory_region_destructor_none(MemoryRegion *mr)
791{
792}
793
794static void memory_region_destructor_ram(MemoryRegion *mr)
795{
796 qemu_ram_free(mr->ram_addr);
797}
798
799static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
800{
801 qemu_ram_free_from_ptr(mr->ram_addr);
802}
803
d0a9b5bc
AK
804static void memory_region_destructor_rom_device(MemoryRegion *mr)
805{
806 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
d0a9b5bc
AK
807}
808
be675c97
AK
809static bool memory_region_wrong_endianness(MemoryRegion *mr)
810{
2c3579ab 811#ifdef TARGET_WORDS_BIGENDIAN
be675c97
AK
812 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
813#else
814 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
815#endif
816}
817
093bc2cd
AK
818void memory_region_init(MemoryRegion *mr,
819 const char *name,
820 uint64_t size)
821{
2cdfcf27
PB
822 mr->ops = &unassigned_mem_ops;
823 mr->opaque = NULL;
30951157 824 mr->iommu_ops = NULL;
093bc2cd 825 mr->parent = NULL;
08dafab4
AK
826 mr->size = int128_make64(size);
827 if (size == UINT64_MAX) {
828 mr->size = int128_2_64();
829 }
093bc2cd 830 mr->addr = 0;
b3b00c78 831 mr->subpage = false;
6bba19ba 832 mr->enabled = true;
14a3c10a 833 mr->terminates = false;
8ea9252a 834 mr->ram = false;
5f9a5ea1 835 mr->romd_mode = true;
fb1cd6f9 836 mr->readonly = false;
75c578dc 837 mr->rom_device = false;
545e92e0 838 mr->destructor = memory_region_destructor_none;
093bc2cd
AK
839 mr->priority = 0;
840 mr->may_overlap = false;
841 mr->alias = NULL;
842 QTAILQ_INIT(&mr->subregions);
843 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
844 QTAILQ_INIT(&mr->coalesced);
7267c094 845 mr->name = g_strdup(name);
5a583347 846 mr->dirty_log_mask = 0;
3e9d69e7
AK
847 mr->ioeventfd_nb = 0;
848 mr->ioeventfds = NULL;
d410515e 849 mr->flush_coalesced_mmio = false;
093bc2cd
AK
850}
851
b018ddf6
PB
852static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
853 unsigned size)
854{
855#ifdef DEBUG_UNASSIGNED
856 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
857#endif
c658b94f
AF
858 if (cpu_single_env != NULL) {
859 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
860 addr, false, false, 0, size);
861 }
b018ddf6
PB
862 return 0;
863}
864
865static void unassigned_mem_write(void *opaque, hwaddr addr,
866 uint64_t val, unsigned size)
867{
868#ifdef DEBUG_UNASSIGNED
869 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
870#endif
c658b94f
AF
871 if (cpu_single_env != NULL) {
872 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
873 addr, true, false, 0, size);
874 }
b018ddf6
PB
875}
876
d197063f
PB
877static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
878 unsigned size, bool is_write)
879{
880 return false;
881}
882
883const MemoryRegionOps unassigned_mem_ops = {
884 .valid.accepts = unassigned_mem_accepts,
885 .endianness = DEVICE_NATIVE_ENDIAN,
886};
887
d2702032
PB
888bool memory_region_access_valid(MemoryRegion *mr,
889 hwaddr addr,
890 unsigned size,
891 bool is_write)
093bc2cd 892{
a014ed07
PB
893 int access_size_min, access_size_max;
894 int access_size, i;
897fa7cf 895
093bc2cd
AK
896 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
897 return false;
898 }
899
a014ed07 900 if (!mr->ops->valid.accepts) {
093bc2cd
AK
901 return true;
902 }
903
a014ed07
PB
904 access_size_min = mr->ops->valid.min_access_size;
905 if (!mr->ops->valid.min_access_size) {
906 access_size_min = 1;
907 }
908
909 access_size_max = mr->ops->valid.max_access_size;
910 if (!mr->ops->valid.max_access_size) {
911 access_size_max = 4;
912 }
913
914 access_size = MAX(MIN(size, access_size_max), access_size_min);
915 for (i = 0; i < size; i += access_size) {
916 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
917 is_write)) {
918 return false;
919 }
093bc2cd 920 }
a014ed07 921
093bc2cd
AK
922 return true;
923}
924
a621f38d 925static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
a8170e5e 926 hwaddr addr,
a621f38d 927 unsigned size)
093bc2cd 928{
164a4dcd 929 uint64_t data = 0;
093bc2cd 930
ce5d2f33
PB
931 if (mr->ops->read) {
932 access_with_adjusted_size(addr, &data, size,
933 mr->ops->impl.min_access_size,
934 mr->ops->impl.max_access_size,
935 memory_region_read_accessor, mr);
936 } else {
937 access_with_adjusted_size(addr, &data, size, 1, 4,
938 memory_region_oldmmio_read_accessor, mr);
74901c3b
AK
939 }
940
093bc2cd
AK
941 return data;
942}
943
a621f38d 944static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
093bc2cd 945{
a621f38d
AK
946 if (memory_region_wrong_endianness(mr)) {
947 switch (size) {
948 case 1:
949 break;
950 case 2:
951 *data = bswap16(*data);
952 break;
953 case 4:
954 *data = bswap32(*data);
1470a0cd 955 break;
968a5627
PB
956 case 8:
957 *data = bswap64(*data);
958 break;
a621f38d
AK
959 default:
960 abort();
961 }
962 }
963}
964
791af8c8
PB
965static bool memory_region_dispatch_read(MemoryRegion *mr,
966 hwaddr addr,
967 uint64_t *pval,
968 unsigned size)
a621f38d 969{
791af8c8
PB
970 if (!memory_region_access_valid(mr, addr, size, false)) {
971 *pval = unassigned_mem_read(mr, addr, size);
972 return true;
973 }
a621f38d 974
791af8c8
PB
975 *pval = memory_region_dispatch_read1(mr, addr, size);
976 adjust_endianness(mr, pval, size);
977 return false;
a621f38d 978}
093bc2cd 979
791af8c8 980static bool memory_region_dispatch_write(MemoryRegion *mr,
a8170e5e 981 hwaddr addr,
a621f38d
AK
982 uint64_t data,
983 unsigned size)
984{
897fa7cf 985 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 986 unassigned_mem_write(mr, addr, data, size);
791af8c8 987 return true;
093bc2cd
AK
988 }
989
a621f38d
AK
990 adjust_endianness(mr, &data, size);
991
ce5d2f33
PB
992 if (mr->ops->write) {
993 access_with_adjusted_size(addr, &data, size,
994 mr->ops->impl.min_access_size,
995 mr->ops->impl.max_access_size,
996 memory_region_write_accessor, mr);
997 } else {
998 access_with_adjusted_size(addr, &data, size, 1, 4,
999 memory_region_oldmmio_write_accessor, mr);
74901c3b 1000 }
791af8c8 1001 return false;
093bc2cd
AK
1002}
1003
093bc2cd
AK
1004void memory_region_init_io(MemoryRegion *mr,
1005 const MemoryRegionOps *ops,
1006 void *opaque,
1007 const char *name,
1008 uint64_t size)
1009{
1010 memory_region_init(mr, name, size);
1011 mr->ops = ops;
1012 mr->opaque = opaque;
14a3c10a 1013 mr->terminates = true;
97161e17 1014 mr->ram_addr = ~(ram_addr_t)0;
093bc2cd
AK
1015}
1016
1017void memory_region_init_ram(MemoryRegion *mr,
093bc2cd
AK
1018 const char *name,
1019 uint64_t size)
1020{
1021 memory_region_init(mr, name, size);
8ea9252a 1022 mr->ram = true;
14a3c10a 1023 mr->terminates = true;
545e92e0 1024 mr->destructor = memory_region_destructor_ram;
c5705a77 1025 mr->ram_addr = qemu_ram_alloc(size, mr);
093bc2cd
AK
1026}
1027
1028void memory_region_init_ram_ptr(MemoryRegion *mr,
093bc2cd
AK
1029 const char *name,
1030 uint64_t size,
1031 void *ptr)
1032{
1033 memory_region_init(mr, name, size);
8ea9252a 1034 mr->ram = true;
14a3c10a 1035 mr->terminates = true;
545e92e0 1036 mr->destructor = memory_region_destructor_ram_from_ptr;
c5705a77 1037 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
093bc2cd
AK
1038}
1039
1040void memory_region_init_alias(MemoryRegion *mr,
1041 const char *name,
1042 MemoryRegion *orig,
a8170e5e 1043 hwaddr offset,
093bc2cd
AK
1044 uint64_t size)
1045{
1046 memory_region_init(mr, name, size);
1047 mr->alias = orig;
1048 mr->alias_offset = offset;
1049}
1050
d0a9b5bc
AK
1051void memory_region_init_rom_device(MemoryRegion *mr,
1052 const MemoryRegionOps *ops,
75f5941c 1053 void *opaque,
d0a9b5bc
AK
1054 const char *name,
1055 uint64_t size)
1056{
1057 memory_region_init(mr, name, size);
7bc2b9cd 1058 mr->ops = ops;
75f5941c 1059 mr->opaque = opaque;
d0a9b5bc 1060 mr->terminates = true;
75c578dc 1061 mr->rom_device = true;
d0a9b5bc 1062 mr->destructor = memory_region_destructor_rom_device;
c5705a77 1063 mr->ram_addr = qemu_ram_alloc(size, mr);
d0a9b5bc
AK
1064}
1065
30951157
AK
1066void memory_region_init_iommu(MemoryRegion *mr,
1067 const MemoryRegionIOMMUOps *ops,
1068 const char *name,
1069 uint64_t size)
1070{
1071 memory_region_init(mr, name, size);
1072 mr->iommu_ops = ops,
1073 mr->terminates = true; /* then re-forwards */
06866575 1074 notifier_list_init(&mr->iommu_notify);
30951157
AK
1075}
1076
1660e72d
JK
1077void memory_region_init_reservation(MemoryRegion *mr,
1078 const char *name,
1079 uint64_t size)
1080{
d197063f 1081 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1660e72d
JK
1082}
1083
093bc2cd
AK
1084void memory_region_destroy(MemoryRegion *mr)
1085{
1086 assert(QTAILQ_EMPTY(&mr->subregions));
2be0e25f 1087 assert(memory_region_transaction_depth == 0);
545e92e0 1088 mr->destructor(mr);
093bc2cd 1089 memory_region_clear_coalescing(mr);
7267c094
AL
1090 g_free((char *)mr->name);
1091 g_free(mr->ioeventfds);
093bc2cd
AK
1092}
1093
1094uint64_t memory_region_size(MemoryRegion *mr)
1095{
08dafab4
AK
1096 if (int128_eq(mr->size, int128_2_64())) {
1097 return UINT64_MAX;
1098 }
1099 return int128_get64(mr->size);
093bc2cd
AK
1100}
1101
8991c79b
AK
1102const char *memory_region_name(MemoryRegion *mr)
1103{
1104 return mr->name;
1105}
1106
8ea9252a
AK
1107bool memory_region_is_ram(MemoryRegion *mr)
1108{
1109 return mr->ram;
1110}
1111
55043ba3
AK
1112bool memory_region_is_logging(MemoryRegion *mr)
1113{
1114 return mr->dirty_log_mask;
1115}
1116
ce7923da
AK
1117bool memory_region_is_rom(MemoryRegion *mr)
1118{
1119 return mr->ram && mr->readonly;
1120}
1121
30951157
AK
1122bool memory_region_is_iommu(MemoryRegion *mr)
1123{
1124 return mr->iommu_ops;
1125}
1126
06866575
DG
1127void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1128{
1129 notifier_list_add(&mr->iommu_notify, n);
1130}
1131
1132void memory_region_unregister_iommu_notifier(Notifier *n)
1133{
1134 notifier_remove(n);
1135}
1136
1137void memory_region_notify_iommu(MemoryRegion *mr,
1138 IOMMUTLBEntry entry)
1139{
1140 assert(memory_region_is_iommu(mr));
1141 notifier_list_notify(&mr->iommu_notify, &entry);
1142}
1143
093bc2cd
AK
1144void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1145{
5a583347
AK
1146 uint8_t mask = 1 << client;
1147
59023ef4 1148 memory_region_transaction_begin();
5a583347 1149 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1150 memory_region_update_pending |= mr->enabled;
59023ef4 1151 memory_region_transaction_commit();
093bc2cd
AK
1152}
1153
a8170e5e
AK
1154bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1155 hwaddr size, unsigned client)
093bc2cd 1156{
14a3c10a 1157 assert(mr->terminates);
cd7a45c9
BS
1158 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1159 1 << client);
093bc2cd
AK
1160}
1161
a8170e5e
AK
1162void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1163 hwaddr size)
093bc2cd 1164{
14a3c10a 1165 assert(mr->terminates);
fd4aa979 1166 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
093bc2cd
AK
1167}
1168
6c279db8
JQ
1169bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1170 hwaddr size, unsigned client)
1171{
1172 bool ret;
1173 assert(mr->terminates);
1174 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1175 1 << client);
1176 if (ret) {
1177 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1178 mr->ram_addr + addr + size,
1179 1 << client);
1180 }
1181 return ret;
1182}
1183
1184
093bc2cd
AK
1185void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1186{
0d673e36 1187 AddressSpace *as;
5a583347
AK
1188 FlatRange *fr;
1189
0d673e36
AK
1190 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1191 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1192 if (fr->mr == mr) {
1193 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1194 }
5a583347
AK
1195 }
1196 }
093bc2cd
AK
1197}
1198
1199void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1200{
fb1cd6f9 1201 if (mr->readonly != readonly) {
59023ef4 1202 memory_region_transaction_begin();
fb1cd6f9 1203 mr->readonly = readonly;
22bde714 1204 memory_region_update_pending |= mr->enabled;
59023ef4 1205 memory_region_transaction_commit();
fb1cd6f9 1206 }
093bc2cd
AK
1207}
1208
5f9a5ea1 1209void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1210{
5f9a5ea1 1211 if (mr->romd_mode != romd_mode) {
59023ef4 1212 memory_region_transaction_begin();
5f9a5ea1 1213 mr->romd_mode = romd_mode;
22bde714 1214 memory_region_update_pending |= mr->enabled;
59023ef4 1215 memory_region_transaction_commit();
d0a9b5bc
AK
1216 }
1217}
1218
a8170e5e
AK
1219void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1220 hwaddr size, unsigned client)
093bc2cd 1221{
14a3c10a 1222 assert(mr->terminates);
5a583347
AK
1223 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1224 mr->ram_addr + addr + size,
1225 1 << client);
093bc2cd
AK
1226}
1227
1228void *memory_region_get_ram_ptr(MemoryRegion *mr)
1229{
1230 if (mr->alias) {
1231 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1232 }
1233
14a3c10a 1234 assert(mr->terminates);
093bc2cd 1235
021d26d1 1236 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
093bc2cd
AK
1237}
1238
0d673e36 1239static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd
AK
1240{
1241 FlatRange *fr;
1242 CoalescedMemoryRange *cmr;
1243 AddrRange tmp;
95d2994a 1244 MemoryRegionSection section;
093bc2cd 1245
0d673e36 1246 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
093bc2cd 1247 if (fr->mr == mr) {
95d2994a 1248 section = (MemoryRegionSection) {
f6790af6 1249 .address_space = as,
95d2994a 1250 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1251 .size = fr->addr.size,
95d2994a
AK
1252 };
1253
1254 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1255 int128_get64(fr->addr.start),
1256 int128_get64(fr->addr.size));
093bc2cd
AK
1257 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1258 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1259 int128_sub(fr->addr.start,
1260 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1261 if (!addrrange_intersects(tmp, fr->addr)) {
1262 continue;
1263 }
1264 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1265 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1266 int128_get64(tmp.start),
1267 int128_get64(tmp.size));
093bc2cd
AK
1268 }
1269 }
1270 }
1271}
1272
0d673e36
AK
1273static void memory_region_update_coalesced_range(MemoryRegion *mr)
1274{
1275 AddressSpace *as;
1276
1277 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1278 memory_region_update_coalesced_range_as(mr, as);
1279 }
1280}
1281
093bc2cd
AK
1282void memory_region_set_coalescing(MemoryRegion *mr)
1283{
1284 memory_region_clear_coalescing(mr);
08dafab4 1285 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1286}
1287
1288void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1289 hwaddr offset,
093bc2cd
AK
1290 uint64_t size)
1291{
7267c094 1292 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1293
08dafab4 1294 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1295 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1296 memory_region_update_coalesced_range(mr);
d410515e 1297 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1298}
1299
1300void memory_region_clear_coalescing(MemoryRegion *mr)
1301{
1302 CoalescedMemoryRange *cmr;
1303
d410515e
JK
1304 qemu_flush_coalesced_mmio_buffer();
1305 mr->flush_coalesced_mmio = false;
1306
093bc2cd
AK
1307 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1308 cmr = QTAILQ_FIRST(&mr->coalesced);
1309 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1310 g_free(cmr);
093bc2cd
AK
1311 }
1312 memory_region_update_coalesced_range(mr);
1313}
1314
d410515e
JK
1315void memory_region_set_flush_coalesced(MemoryRegion *mr)
1316{
1317 mr->flush_coalesced_mmio = true;
1318}
1319
1320void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1321{
1322 qemu_flush_coalesced_mmio_buffer();
1323 if (QTAILQ_EMPTY(&mr->coalesced)) {
1324 mr->flush_coalesced_mmio = false;
1325 }
1326}
1327
3e9d69e7 1328void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1329 hwaddr addr,
3e9d69e7
AK
1330 unsigned size,
1331 bool match_data,
1332 uint64_t data,
753d5e14 1333 EventNotifier *e)
3e9d69e7
AK
1334{
1335 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1336 .addr.start = int128_make64(addr),
1337 .addr.size = int128_make64(size),
3e9d69e7
AK
1338 .match_data = match_data,
1339 .data = data,
753d5e14 1340 .e = e,
3e9d69e7
AK
1341 };
1342 unsigned i;
1343
28f362be 1344 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1345 memory_region_transaction_begin();
3e9d69e7
AK
1346 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1347 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1348 break;
1349 }
1350 }
1351 ++mr->ioeventfd_nb;
7267c094 1352 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1353 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1354 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1355 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1356 mr->ioeventfds[i] = mrfd;
22bde714 1357 memory_region_update_pending |= mr->enabled;
59023ef4 1358 memory_region_transaction_commit();
3e9d69e7
AK
1359}
1360
1361void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1362 hwaddr addr,
3e9d69e7
AK
1363 unsigned size,
1364 bool match_data,
1365 uint64_t data,
753d5e14 1366 EventNotifier *e)
3e9d69e7
AK
1367{
1368 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1369 .addr.start = int128_make64(addr),
1370 .addr.size = int128_make64(size),
3e9d69e7
AK
1371 .match_data = match_data,
1372 .data = data,
753d5e14 1373 .e = e,
3e9d69e7
AK
1374 };
1375 unsigned i;
1376
28f362be 1377 adjust_endianness(mr, &mrfd.data, size);
59023ef4 1378 memory_region_transaction_begin();
3e9d69e7
AK
1379 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1380 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1381 break;
1382 }
1383 }
1384 assert(i != mr->ioeventfd_nb);
1385 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1386 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1387 --mr->ioeventfd_nb;
7267c094 1388 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1389 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
22bde714 1390 memory_region_update_pending |= mr->enabled;
59023ef4 1391 memory_region_transaction_commit();
3e9d69e7
AK
1392}
1393
093bc2cd 1394static void memory_region_add_subregion_common(MemoryRegion *mr,
a8170e5e 1395 hwaddr offset,
093bc2cd
AK
1396 MemoryRegion *subregion)
1397{
1398 MemoryRegion *other;
1399
59023ef4
JK
1400 memory_region_transaction_begin();
1401
093bc2cd
AK
1402 assert(!subregion->parent);
1403 subregion->parent = mr;
1404 subregion->addr = offset;
1405 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1406 if (subregion->may_overlap || other->may_overlap) {
1407 continue;
1408 }
2c7cfd65 1409 if (int128_ge(int128_make64(offset),
08dafab4
AK
1410 int128_add(int128_make64(other->addr), other->size))
1411 || int128_le(int128_add(int128_make64(offset), subregion->size),
1412 int128_make64(other->addr))) {
093bc2cd
AK
1413 continue;
1414 }
a5e1cbc8 1415#if 0
860329b2
MW
1416 printf("warning: subregion collision %llx/%llx (%s) "
1417 "vs %llx/%llx (%s)\n",
093bc2cd 1418 (unsigned long long)offset,
08dafab4 1419 (unsigned long long)int128_get64(subregion->size),
860329b2
MW
1420 subregion->name,
1421 (unsigned long long)other->addr,
08dafab4 1422 (unsigned long long)int128_get64(other->size),
860329b2 1423 other->name);
a5e1cbc8 1424#endif
093bc2cd
AK
1425 }
1426 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1427 if (subregion->priority >= other->priority) {
1428 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1429 goto done;
1430 }
1431 }
1432 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1433done:
22bde714 1434 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1435 memory_region_transaction_commit();
093bc2cd
AK
1436}
1437
1438
1439void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1440 hwaddr offset,
093bc2cd
AK
1441 MemoryRegion *subregion)
1442{
1443 subregion->may_overlap = false;
1444 subregion->priority = 0;
1445 memory_region_add_subregion_common(mr, offset, subregion);
1446}
1447
1448void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1449 hwaddr offset,
093bc2cd
AK
1450 MemoryRegion *subregion,
1451 unsigned priority)
1452{
1453 subregion->may_overlap = true;
1454 subregion->priority = priority;
1455 memory_region_add_subregion_common(mr, offset, subregion);
1456}
1457
1458void memory_region_del_subregion(MemoryRegion *mr,
1459 MemoryRegion *subregion)
1460{
59023ef4 1461 memory_region_transaction_begin();
093bc2cd
AK
1462 assert(subregion->parent == mr);
1463 subregion->parent = NULL;
1464 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
22bde714 1465 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1466 memory_region_transaction_commit();
6bba19ba
AK
1467}
1468
1469void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1470{
1471 if (enabled == mr->enabled) {
1472 return;
1473 }
59023ef4 1474 memory_region_transaction_begin();
6bba19ba 1475 mr->enabled = enabled;
22bde714 1476 memory_region_update_pending = true;
59023ef4 1477 memory_region_transaction_commit();
093bc2cd 1478}
1c0ffa58 1479
a8170e5e 1480void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2282e1af
AK
1481{
1482 MemoryRegion *parent = mr->parent;
1483 unsigned priority = mr->priority;
1484 bool may_overlap = mr->may_overlap;
1485
1486 if (addr == mr->addr || !parent) {
1487 mr->addr = addr;
1488 return;
1489 }
1490
1491 memory_region_transaction_begin();
1492 memory_region_del_subregion(parent, mr);
1493 if (may_overlap) {
1494 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1495 } else {
1496 memory_region_add_subregion(parent, addr, mr);
1497 }
1498 memory_region_transaction_commit();
1499}
1500
a8170e5e 1501void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 1502{
4703359e 1503 assert(mr->alias);
4703359e 1504
59023ef4 1505 if (offset == mr->alias_offset) {
4703359e
AK
1506 return;
1507 }
1508
59023ef4
JK
1509 memory_region_transaction_begin();
1510 mr->alias_offset = offset;
22bde714 1511 memory_region_update_pending |= mr->enabled;
59023ef4 1512 memory_region_transaction_commit();
4703359e
AK
1513}
1514
e34911c4
AK
1515ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1516{
e34911c4
AK
1517 return mr->ram_addr;
1518}
1519
e2177955
AK
1520static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1521{
1522 const AddrRange *addr = addr_;
1523 const FlatRange *fr = fr_;
1524
1525 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1526 return -1;
1527 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1528 return 1;
1529 }
1530 return 0;
1531}
1532
1533static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1534{
8786db7c 1535 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
e2177955
AK
1536 sizeof(FlatRange), cmp_flatrange_addr);
1537}
1538
73034e9e 1539MemoryRegionSection memory_region_find(MemoryRegion *mr,
a8170e5e 1540 hwaddr addr, uint64_t size)
e2177955 1541{
052e87b0 1542 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
1543 MemoryRegion *root;
1544 AddressSpace *as;
1545 AddrRange range;
1546 FlatRange *fr;
1547
1548 addr += mr->addr;
1549 for (root = mr; root->parent; ) {
1550 root = root->parent;
1551 addr += root->addr;
1552 }
e2177955 1553
73034e9e
PB
1554 as = memory_region_to_address_space(root);
1555 range = addrrange_make(int128_make64(addr), int128_make64(size));
1556 fr = address_space_lookup(as, range);
e2177955
AK
1557 if (!fr) {
1558 return ret;
1559 }
1560
8786db7c 1561 while (fr > as->current_map->ranges
e2177955
AK
1562 && addrrange_intersects(fr[-1].addr, range)) {
1563 --fr;
1564 }
1565
1566 ret.mr = fr->mr;
73034e9e 1567 ret.address_space = as;
e2177955
AK
1568 range = addrrange_intersection(range, fr->addr);
1569 ret.offset_within_region = fr->offset_in_region;
1570 ret.offset_within_region += int128_get64(int128_sub(range.start,
1571 fr->addr.start));
052e87b0 1572 ret.size = range.size;
e2177955 1573 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 1574 ret.readonly = fr->readonly;
e2177955
AK
1575 return ret;
1576}
1577
1d671369 1578void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 1579{
7664e80c
AK
1580 FlatRange *fr;
1581
8786db7c 1582 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
72e22d2f 1583 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c
AK
1584 }
1585}
1586
1587void memory_global_dirty_log_start(void)
1588{
7664e80c 1589 global_dirty_log = true;
7376e582 1590 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
7664e80c
AK
1591}
1592
1593void memory_global_dirty_log_stop(void)
1594{
7664e80c 1595 global_dirty_log = false;
7376e582 1596 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
1597}
1598
1599static void listener_add_address_space(MemoryListener *listener,
1600 AddressSpace *as)
1601{
1602 FlatRange *fr;
1603
221b3a3f 1604 if (listener->address_space_filter
f6790af6 1605 && listener->address_space_filter != as) {
221b3a3f
JG
1606 return;
1607 }
1608
7664e80c 1609 if (global_dirty_log) {
975aefe0
AK
1610 if (listener->log_global_start) {
1611 listener->log_global_start(listener);
1612 }
7664e80c 1613 }
975aefe0 1614
8786db7c 1615 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
7664e80c
AK
1616 MemoryRegionSection section = {
1617 .mr = fr->mr,
f6790af6 1618 .address_space = as,
7664e80c 1619 .offset_within_region = fr->offset_in_region,
052e87b0 1620 .size = fr->addr.size,
7664e80c 1621 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 1622 .readonly = fr->readonly,
7664e80c 1623 };
975aefe0
AK
1624 if (listener->region_add) {
1625 listener->region_add(listener, &section);
1626 }
7664e80c
AK
1627 }
1628}
1629
f6790af6 1630void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 1631{
72e22d2f 1632 MemoryListener *other = NULL;
0d673e36 1633 AddressSpace *as;
72e22d2f 1634
7376e582 1635 listener->address_space_filter = filter;
72e22d2f
AK
1636 if (QTAILQ_EMPTY(&memory_listeners)
1637 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1638 memory_listeners)->priority) {
1639 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1640 } else {
1641 QTAILQ_FOREACH(other, &memory_listeners, link) {
1642 if (listener->priority < other->priority) {
1643 break;
1644 }
1645 }
1646 QTAILQ_INSERT_BEFORE(other, listener, link);
1647 }
0d673e36
AK
1648
1649 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1650 listener_add_address_space(listener, as);
1651 }
7664e80c
AK
1652}
1653
1654void memory_listener_unregister(MemoryListener *listener)
1655{
72e22d2f 1656 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 1657}
e2177955 1658
7dca8043 1659void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 1660{
59023ef4 1661 memory_region_transaction_begin();
8786db7c
AK
1662 as->root = root;
1663 as->current_map = g_new(FlatView, 1);
1664 flatview_init(as->current_map);
4c19eb72
AK
1665 as->ioeventfd_nb = 0;
1666 as->ioeventfds = NULL;
0d673e36 1667 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 1668 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 1669 address_space_init_dispatch(as);
f43793c7
PB
1670 memory_region_update_pending |= root->enabled;
1671 memory_region_transaction_commit();
1c0ffa58 1672}
658b2224 1673
83f3c251
AK
1674void address_space_destroy(AddressSpace *as)
1675{
1676 /* Flush out anything from MemoryListeners listening in on this */
1677 memory_region_transaction_begin();
1678 as->root = NULL;
1679 memory_region_transaction_commit();
1680 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1681 address_space_destroy_dispatch(as);
1682 flatview_destroy(as->current_map);
7dca8043 1683 g_free(as->name);
83f3c251 1684 g_free(as->current_map);
4c19eb72 1685 g_free(as->ioeventfds);
83f3c251
AK
1686}
1687
791af8c8 1688bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
acbbec5d 1689{
791af8c8 1690 return memory_region_dispatch_read(mr, addr, pval, size);
acbbec5d
AK
1691}
1692
791af8c8 1693bool io_mem_write(MemoryRegion *mr, hwaddr addr,
acbbec5d
AK
1694 uint64_t val, unsigned size)
1695{
791af8c8 1696 return memory_region_dispatch_write(mr, addr, val, size);
acbbec5d
AK
1697}
1698
314e2987
BS
1699typedef struct MemoryRegionList MemoryRegionList;
1700
1701struct MemoryRegionList {
1702 const MemoryRegion *mr;
1703 bool printed;
1704 QTAILQ_ENTRY(MemoryRegionList) queue;
1705};
1706
1707typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1708
1709static void mtree_print_mr(fprintf_function mon_printf, void *f,
1710 const MemoryRegion *mr, unsigned int level,
a8170e5e 1711 hwaddr base,
9479c57a 1712 MemoryRegionListHead *alias_print_queue)
314e2987 1713{
9479c57a
JK
1714 MemoryRegionList *new_ml, *ml, *next_ml;
1715 MemoryRegionListHead submr_print_queue;
314e2987
BS
1716 const MemoryRegion *submr;
1717 unsigned int i;
1718
7ea692b2 1719 if (!mr || !mr->enabled) {
314e2987
BS
1720 return;
1721 }
1722
1723 for (i = 0; i < level; i++) {
1724 mon_printf(f, " ");
1725 }
1726
1727 if (mr->alias) {
1728 MemoryRegionList *ml;
1729 bool found = false;
1730
1731 /* check if the alias is already in the queue */
9479c57a 1732 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
314e2987
BS
1733 if (ml->mr == mr->alias && !ml->printed) {
1734 found = true;
1735 }
1736 }
1737
1738 if (!found) {
1739 ml = g_new(MemoryRegionList, 1);
1740 ml->mr = mr->alias;
1741 ml->printed = false;
9479c57a 1742 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 1743 }
4896d74b
JK
1744 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1745 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1746 "-" TARGET_FMT_plx "\n",
314e2987 1747 base + mr->addr,
08dafab4 1748 base + mr->addr
052e87b0 1749 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
4b474ba7 1750 mr->priority,
5f9a5ea1
JK
1751 mr->romd_mode ? 'R' : '-',
1752 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1753 : '-',
314e2987
BS
1754 mr->name,
1755 mr->alias->name,
1756 mr->alias_offset,
08dafab4 1757 mr->alias_offset
a8170e5e 1758 + (hwaddr)int128_get64(mr->size) - 1);
314e2987 1759 } else {
4896d74b
JK
1760 mon_printf(f,
1761 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
314e2987 1762 base + mr->addr,
08dafab4 1763 base + mr->addr
052e87b0 1764 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
4b474ba7 1765 mr->priority,
5f9a5ea1
JK
1766 mr->romd_mode ? 'R' : '-',
1767 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1768 : '-',
314e2987
BS
1769 mr->name);
1770 }
9479c57a
JK
1771
1772 QTAILQ_INIT(&submr_print_queue);
1773
314e2987 1774 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
1775 new_ml = g_new(MemoryRegionList, 1);
1776 new_ml->mr = submr;
1777 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1778 if (new_ml->mr->addr < ml->mr->addr ||
1779 (new_ml->mr->addr == ml->mr->addr &&
1780 new_ml->mr->priority > ml->mr->priority)) {
1781 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1782 new_ml = NULL;
1783 break;
1784 }
1785 }
1786 if (new_ml) {
1787 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1788 }
1789 }
1790
1791 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1792 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1793 alias_print_queue);
1794 }
1795
88365e47 1796 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 1797 g_free(ml);
314e2987
BS
1798 }
1799}
1800
1801void mtree_info(fprintf_function mon_printf, void *f)
1802{
1803 MemoryRegionListHead ml_head;
1804 MemoryRegionList *ml, *ml2;
0d673e36 1805 AddressSpace *as;
314e2987
BS
1806
1807 QTAILQ_INIT(&ml_head);
1808
0d673e36 1809 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
0d673e36
AK
1810 mon_printf(f, "%s\n", as->name);
1811 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
b9f9be88
BS
1812 }
1813
1814 mon_printf(f, "aliases\n");
314e2987
BS
1815 /* print aliased regions */
1816 QTAILQ_FOREACH(ml, &ml_head, queue) {
1817 if (!ml->printed) {
1818 mon_printf(f, "%s\n", ml->mr->name);
1819 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1820 }
1821 }
1822
1823 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 1824 g_free(ml);
314e2987 1825 }
314e2987 1826}