projects / qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| bd5e6632 AJ |
1 | /* |
| 2 | * MPC8544 DS Device Tree Source | |
| 3 | * | |
| 4 | * Copyright 2007, 2008 Freescale Semiconductor Inc. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify it | |
| 7 | * under the terms of the GNU General Public License as published by the | |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your | |
| 9 | * option) any later version. | |
| 10 | */ | |
| 11 | ||
| 12 | /dts-v1/; | |
| 13 | / { | |
| 14 | model = "MPC8544DS"; | |
| 15 | compatible = "MPC8544DS", "MPC85xxDS"; | |
| 16 | #address-cells = <1>; | |
| 17 | #size-cells = <1>; | |
| 18 | ||
| 19 | aliases { | |
| 20 | serial0 = &serial0; | |
| 21 | serial1 = &serial1; | |
| 22 | pci0 = &pci0; | |
| 23 | }; | |
| 24 | ||
| 25 | cpus { | |
| 26 | #address-cells = <1>; | |
| 27 | #size-cells = <0>; | |
| bd5e6632 AJ |
28 | }; |
| 29 | ||
| 30 | memory { | |
| 31 | device_type = "memory"; | |
| 32 | reg = <0x0 0x0>; // Filled by U-Boot | |
| 33 | }; | |
| 34 | ||
| 35 | soc8544@e0000000 { | |
| 36 | #address-cells = <1>; | |
| 37 | #size-cells = <1>; | |
| 38 | device_type = "soc"; | |
| 39 | compatible = "simple-bus"; | |
| 40 | ||
| 41 | ranges = <0x0 0xe0000000 0x100000>; | |
| 42 | reg = <0xe0000000 0x1000>; // CCSRBAR 1M | |
| 43 | bus-frequency = <0>; // Filled out by uboot. | |
| 44 | ||
| 45 | serial0: serial@4500 { | |
| 46 | cell-index = <0>; | |
| 47 | device_type = "serial"; | |
| 48 | compatible = "ns16550"; | |
| 49 | reg = <0x4500 0x100>; | |
| 50 | clock-frequency = <0>; | |
| 51 | interrupts = <42 2>; | |
| 52 | interrupt-parent = <&mpic>; | |
| 53 | }; | |
| 54 | ||
| 55 | serial1: serial@4600 { | |
| 56 | cell-index = <1>; | |
| 57 | device_type = "serial"; | |
| 58 | compatible = "ns16550"; | |
| 59 | reg = <0x4600 0x100>; | |
| 60 | clock-frequency = <0>; | |
| 61 | interrupts = <42 2>; | |
| 62 | interrupt-parent = <&mpic>; | |
| 63 | }; | |
| 64 | ||
| 65 | mpic: pic@40000 { | |
| 66 | interrupt-controller; | |
| 67 | #address-cells = <0>; | |
| 68 | #interrupt-cells = <2>; | |
| 69 | reg = <0x40000 0x40000>; | |
| 70 | compatible = "chrp,open-pic"; | |
| 71 | device_type = "open-pic"; | |
| 72 | }; | |
| b0fb8423 AG |
73 | |
| 74 | global-utilities@e0000 { //global utilities block | |
| 75 | compatible = "fsl,mpc8544-guts"; | |
| 76 | reg = <0xe0000 0x1000>; | |
| 77 | fsl,has-rstcr; | |
| 78 | }; | |
| bd5e6632 AJ |
79 | }; |
| 80 | ||
| 81 | pci0: pci@e0008000 { | |
| 82 | cell-index = <0>; | |
| 83 | compatible = "fsl,mpc8540-pci"; | |
| 84 | device_type = "pci"; | |
| 85 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | |
| 86 | interrupt-map = < | |
| 87 | ||
| 88 | /* IDSEL 0x11 J17 Slot 1 */ | |
| 89 | 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 | |
| 90 | 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 | |
| 91 | 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 | |
| 92 | 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 | |
| 93 | ||
| 94 | /* IDSEL 0x12 J16 Slot 2 */ | |
| 95 | ||
| 96 | 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 | |
| 97 | 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 | |
| 98 | 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1 | |
| 99 | 0x9000 0x0 0x0 0x4 &mpic 0x1 0x1>; | |
| 100 | ||
| 101 | interrupt-parent = <&mpic>; | |
| 102 | interrupts = <24 2>; | |
| 103 | bus-range = <0 255>; | |
| 104 | ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 | |
| 105 | 0x1000000 0x0 0x0 0xe1000000 0x0 0x10000>; | |
| 106 | clock-frequency = <66666666>; | |
| 107 | #interrupt-cells = <1>; | |
| 108 | #size-cells = <2>; | |
| 109 | #address-cells = <3>; | |
| 110 | reg = <0xe0008000 0x1000>; | |
| 111 | }; | |
| 112 | ||
| 113 | chosen { | |
| 114 | linux,stdout-path = "/soc8544@e0000000/serial@4500"; | |
| 115 | }; | |
| 5de6b46d AG |
116 | |
| 117 | hypervisor { | |
| 118 | }; | |
| bd5e6632 | 119 | }; |